Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 5 | * |
| 6 | * Licensed under GPLv2 only. |
| 7 | */ |
| 8 | |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 9 | #include "skeleton.dtsi" |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 10 | #include <dt-bindings/pinctrl/at91.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 13 | |
| 14 | / { |
| 15 | model = "Atmel AT91SAM9263 family SoC"; |
| 16 | compatible = "atmel,at91sam9263"; |
| 17 | interrupt-parent = <&aic>; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &dbgu; |
| 21 | serial1 = &usart0; |
| 22 | serial2 = &usart1; |
| 23 | serial3 = &usart2; |
| 24 | gpio0 = &pioA; |
| 25 | gpio1 = &pioB; |
| 26 | gpio2 = &pioC; |
| 27 | gpio3 = &pioD; |
| 28 | gpio4 = &pioE; |
| 29 | tcb0 = &tcb0; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 30 | i2c0 = &i2c0; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 31 | ssc0 = &ssc0; |
| 32 | ssc1 = &ssc1; |
Bo Shen | f3ab052 | 2013-12-19 11:59:17 +0800 | [diff] [blame] | 33 | pwm0 = &pwm0; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 34 | }; |
| 35 | cpus { |
Lorenzo Pieralisi | e757a6e | 2013-04-18 18:31:35 +0100 | [diff] [blame] | 36 | #address-cells = <0>; |
| 37 | #size-cells = <0>; |
| 38 | |
| 39 | cpu { |
| 40 | compatible = "arm,arm926ej-s"; |
| 41 | device_type = "cpu"; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 42 | }; |
| 43 | }; |
| 44 | |
| 45 | memory { |
| 46 | reg = <0x20000000 0x08000000>; |
| 47 | }; |
| 48 | |
| 49 | ahb { |
| 50 | compatible = "simple-bus"; |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <1>; |
| 53 | ranges; |
| 54 | |
| 55 | apb { |
| 56 | compatible = "simple-bus"; |
| 57 | #address-cells = <1>; |
| 58 | #size-cells = <1>; |
| 59 | ranges; |
| 60 | |
| 61 | aic: interrupt-controller@fffff000 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 62 | #interrupt-cells = <3>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 63 | compatible = "atmel,at91rm9200-aic"; |
| 64 | interrupt-controller; |
| 65 | reg = <0xfffff000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | c657394 | 2012-04-09 19:36:36 +0800 | [diff] [blame] | 66 | atmel,external-irqs = <30 31>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | pmc: pmc@fffffc00 { |
| 70 | compatible = "atmel,at91rm9200-pmc"; |
| 71 | reg = <0xfffffc00 0x100>; |
| 72 | }; |
| 73 | |
Maxime Ripard | 1e165a7 | 2014-07-03 12:01:29 +0200 | [diff] [blame^] | 74 | ramc0: ramc@ffffe200 { |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 75 | compatible = "atmel,at91sam9260-sdramc"; |
Maxime Ripard | 1e165a7 | 2014-07-03 12:01:29 +0200 | [diff] [blame^] | 76 | reg = <0xffffe200 0x200>; |
| 77 | }; |
| 78 | |
| 79 | ramc1: ramc@ffffe800 { |
| 80 | compatible = "atmel,at91sam9260-sdramc"; |
| 81 | reg = <0xffffe800 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 82 | }; |
| 83 | |
| 84 | pit: timer@fffffd30 { |
| 85 | compatible = "atmel,at91sam9260-pit"; |
| 86 | reg = <0xfffffd30 0xf>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 87 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 88 | }; |
| 89 | |
| 90 | tcb0: timer@fff7c000 { |
| 91 | compatible = "atmel,at91rm9200-tcb"; |
| 92 | reg = <0xfff7c000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 93 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 94 | }; |
| 95 | |
| 96 | rstc@fffffd00 { |
| 97 | compatible = "atmel,at91sam9260-rstc"; |
| 98 | reg = <0xfffffd00 0x10>; |
| 99 | }; |
| 100 | |
| 101 | shdwc@fffffd10 { |
| 102 | compatible = "atmel,at91sam9260-shdwc"; |
| 103 | reg = <0xfffffd10 0x10>; |
| 104 | }; |
| 105 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 106 | pinctrl@fffff200 { |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <1>; |
| 109 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 110 | ranges = <0xfffff200 0xfffff200 0xa00>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 111 | |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 112 | atmel,mux-mask = < |
| 113 | /* A B */ |
| 114 | 0xfffffffb 0xffffe07f /* pioA */ |
| 115 | 0x0007ffff 0x39072fff /* pioB */ |
| 116 | 0xffffffff 0x3ffffff8 /* pioC */ |
| 117 | 0xfffffbff 0xffffffff /* pioD */ |
| 118 | 0xffe00fff 0xfbfcff00 /* pioE */ |
| 119 | >; |
| 120 | |
| 121 | /* shared pinctrl settings */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 122 | dbgu { |
| 123 | pinctrl_dbgu: dbgu-0 { |
| 124 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 125 | <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ |
| 126 | AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 127 | }; |
| 128 | }; |
| 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 130 | usart0 { |
| 131 | pinctrl_usart0: usart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 132 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 133 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ |
| 134 | AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 135 | }; |
| 136 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 137 | pinctrl_usart0_rts: usart0_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 138 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 139 | <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | pinctrl_usart0_cts: usart0_cts-0 { |
| 143 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 144 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 145 | }; |
| 146 | }; |
| 147 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 148 | usart1 { |
| 149 | pinctrl_usart1: usart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 150 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 151 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ |
| 152 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 153 | }; |
| 154 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 155 | pinctrl_usart1_rts: usart1_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 156 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 157 | <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 158 | }; |
| 159 | |
| 160 | pinctrl_usart1_cts: usart1_cts-0 { |
| 161 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 162 | <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 163 | }; |
| 164 | }; |
| 165 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 166 | usart2 { |
| 167 | pinctrl_usart2: usart2-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 168 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 169 | <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ |
| 170 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 171 | }; |
| 172 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 173 | pinctrl_usart2_rts: usart2_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 174 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 175 | <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 176 | }; |
| 177 | |
| 178 | pinctrl_usart2_cts: usart2_cts-0 { |
| 179 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 180 | <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 181 | }; |
| 182 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 183 | |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 184 | nand { |
| 185 | pinctrl_nand: nand-0 { |
| 186 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 187 | <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ |
| 188 | AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 189 | }; |
| 190 | }; |
| 191 | |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 192 | macb { |
| 193 | pinctrl_macb_rmii: macb_rmii-0 { |
| 194 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 195 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ |
| 196 | AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ |
| 197 | AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ |
| 198 | AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ |
| 199 | AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ |
| 200 | AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ |
| 201 | AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ |
| 202 | AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ |
| 203 | AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ |
| 204 | AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 205 | }; |
| 206 | |
| 207 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 208 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 209 | <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ |
| 210 | AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ |
| 211 | AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ |
| 212 | AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ |
| 213 | AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ |
| 214 | AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ |
| 215 | AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ |
| 216 | AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 217 | }; |
| 218 | }; |
| 219 | |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 220 | mmc0 { |
| 221 | pinctrl_mmc0_clk: mmc0_clk-0 { |
| 222 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 223 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 224 | }; |
| 225 | |
| 226 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| 227 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 228 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ |
| 229 | AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 230 | }; |
| 231 | |
| 232 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 233 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 234 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ |
| 235 | AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ |
| 236 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 237 | }; |
| 238 | |
| 239 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| 240 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 241 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ |
| 242 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 243 | }; |
| 244 | |
| 245 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| 246 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 247 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ |
| 248 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ |
| 249 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 250 | }; |
| 251 | }; |
| 252 | |
| 253 | mmc1 { |
| 254 | pinctrl_mmc1_clk: mmc1_clk-0 { |
| 255 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 256 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 257 | }; |
| 258 | |
| 259 | pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { |
| 260 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 261 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
| 262 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 263 | }; |
| 264 | |
| 265 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { |
| 266 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 267 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
| 268 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ |
| 269 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 270 | }; |
| 271 | |
| 272 | pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { |
| 273 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 274 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ |
| 275 | AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 276 | }; |
| 277 | |
| 278 | pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { |
| 279 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 280 | <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ |
| 281 | AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ |
| 282 | AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 283 | }; |
| 284 | }; |
| 285 | |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 286 | ssc0 { |
| 287 | pinctrl_ssc0_tx: ssc0_tx-0 { |
| 288 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 289 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ |
| 290 | AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ |
| 291 | AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 292 | }; |
| 293 | |
| 294 | pinctrl_ssc0_rx: ssc0_rx-0 { |
| 295 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 296 | <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ |
| 297 | AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ |
| 298 | AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 299 | }; |
| 300 | }; |
| 301 | |
| 302 | ssc1 { |
| 303 | pinctrl_ssc1_tx: ssc1_tx-0 { |
| 304 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 305 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ |
| 306 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ |
| 307 | AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 308 | }; |
| 309 | |
| 310 | pinctrl_ssc1_rx: ssc1_rx-0 { |
| 311 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 312 | <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ |
| 313 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ |
| 314 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 315 | }; |
| 316 | }; |
| 317 | |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 318 | spi0 { |
| 319 | pinctrl_spi0: spi0-0 { |
| 320 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 321 | <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ |
| 322 | AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ |
| 323 | AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 324 | }; |
| 325 | }; |
| 326 | |
| 327 | spi1 { |
| 328 | pinctrl_spi1: spi1-0 { |
| 329 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 330 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ |
| 331 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ |
| 332 | AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 333 | }; |
| 334 | }; |
| 335 | |
Boris BREZILLON | 028633c | 2013-05-24 10:05:56 +0000 | [diff] [blame] | 336 | tcb0 { |
| 337 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { |
| 338 | atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 339 | }; |
| 340 | |
| 341 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { |
| 342 | atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 343 | }; |
| 344 | |
| 345 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { |
| 346 | atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; |
| 347 | }; |
| 348 | |
| 349 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { |
| 350 | atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 351 | }; |
| 352 | |
| 353 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { |
| 354 | atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 355 | }; |
| 356 | |
| 357 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { |
| 358 | atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 359 | }; |
| 360 | |
| 361 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { |
| 362 | atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 363 | }; |
| 364 | |
| 365 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { |
| 366 | atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 367 | }; |
| 368 | |
| 369 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { |
| 370 | atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
| 371 | }; |
| 372 | }; |
| 373 | |
Jean-Christophe PLAGNIOL-VILLARD | f8a0d79 | 2013-03-29 04:50:46 +0800 | [diff] [blame] | 374 | fb { |
| 375 | pinctrl_fb: fb-0 { |
| 376 | atmel,pins = |
| 377 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ |
| 378 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ |
| 379 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ |
| 380 | AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ |
| 381 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ |
| 382 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ |
| 383 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ |
| 384 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ |
| 385 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ |
| 386 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ |
| 387 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ |
| 388 | AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ |
| 389 | AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ |
| 390 | AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ |
| 391 | AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ |
| 392 | AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ |
| 393 | AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ |
| 394 | AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ |
| 395 | AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ |
| 396 | AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ |
| 397 | AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ |
| 398 | AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ |
| 399 | }; |
| 400 | }; |
| 401 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 402 | pioA: gpio@fffff200 { |
| 403 | compatible = "atmel,at91rm9200-gpio"; |
| 404 | reg = <0xfffff200 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 405 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 406 | #gpio-cells = <2>; |
| 407 | gpio-controller; |
| 408 | interrupt-controller; |
| 409 | #interrupt-cells = <2>; |
| 410 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 411 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 412 | pioB: gpio@fffff400 { |
| 413 | compatible = "atmel,at91rm9200-gpio"; |
| 414 | reg = <0xfffff400 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 415 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 416 | #gpio-cells = <2>; |
| 417 | gpio-controller; |
| 418 | interrupt-controller; |
| 419 | #interrupt-cells = <2>; |
| 420 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 421 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 422 | pioC: gpio@fffff600 { |
| 423 | compatible = "atmel,at91rm9200-gpio"; |
| 424 | reg = <0xfffff600 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 425 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 426 | #gpio-cells = <2>; |
| 427 | gpio-controller; |
| 428 | interrupt-controller; |
| 429 | #interrupt-cells = <2>; |
| 430 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 431 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 432 | pioD: gpio@fffff800 { |
| 433 | compatible = "atmel,at91rm9200-gpio"; |
| 434 | reg = <0xfffff800 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 435 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 436 | #gpio-cells = <2>; |
| 437 | gpio-controller; |
| 438 | interrupt-controller; |
| 439 | #interrupt-cells = <2>; |
| 440 | }; |
| 441 | |
| 442 | pioE: gpio@fffffa00 { |
| 443 | compatible = "atmel,at91rm9200-gpio"; |
| 444 | reg = <0xfffffa00 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 445 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 446 | #gpio-cells = <2>; |
| 447 | gpio-controller; |
| 448 | interrupt-controller; |
| 449 | #interrupt-cells = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 450 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 451 | }; |
| 452 | |
| 453 | dbgu: serial@ffffee00 { |
| 454 | compatible = "atmel,at91sam9260-usart"; |
| 455 | reg = <0xffffee00 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 456 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 457 | pinctrl-names = "default"; |
| 458 | pinctrl-0 = <&pinctrl_dbgu>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 459 | status = "disabled"; |
| 460 | }; |
| 461 | |
| 462 | usart0: serial@fff8c000 { |
| 463 | compatible = "atmel,at91sam9260-usart"; |
| 464 | reg = <0xfff8c000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 465 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 466 | atmel,use-dma-rx; |
| 467 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 468 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 469 | pinctrl-0 = <&pinctrl_usart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 470 | status = "disabled"; |
| 471 | }; |
| 472 | |
| 473 | usart1: serial@fff90000 { |
| 474 | compatible = "atmel,at91sam9260-usart"; |
| 475 | reg = <0xfff90000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 476 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 477 | atmel,use-dma-rx; |
| 478 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 479 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 480 | pinctrl-0 = <&pinctrl_usart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 481 | status = "disabled"; |
| 482 | }; |
| 483 | |
| 484 | usart2: serial@fff94000 { |
| 485 | compatible = "atmel,at91sam9260-usart"; |
| 486 | reg = <0xfff94000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 487 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 488 | atmel,use-dma-rx; |
| 489 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 490 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 491 | pinctrl-0 = <&pinctrl_usart2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 492 | status = "disabled"; |
| 493 | }; |
| 494 | |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 495 | ssc0: ssc@fff98000 { |
| 496 | compatible = "atmel,at91rm9200-ssc"; |
| 497 | reg = <0xfff98000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 498 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 499 | pinctrl-names = "default"; |
| 500 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
Bo Shen | 315656b | 2012-12-13 10:05:07 +0800 | [diff] [blame] | 501 | status = "disabled"; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 502 | }; |
| 503 | |
| 504 | ssc1: ssc@fff9c000 { |
| 505 | compatible = "atmel,at91rm9200-ssc"; |
| 506 | reg = <0xfff9c000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 507 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 508 | pinctrl-names = "default"; |
| 509 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; |
Bo Shen | 315656b | 2012-12-13 10:05:07 +0800 | [diff] [blame] | 510 | status = "disabled"; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 511 | }; |
| 512 | |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 513 | macb0: ethernet@fffbc000 { |
| 514 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 515 | reg = <0xfffbc000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 516 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 517 | pinctrl-names = "default"; |
| 518 | pinctrl-0 = <&pinctrl_macb_rmii>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 519 | status = "disabled"; |
| 520 | }; |
| 521 | |
| 522 | usb1: gadget@fff78000 { |
| 523 | compatible = "atmel,at91rm9200-udc"; |
| 524 | reg = <0xfff78000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 525 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 526 | status = "disabled"; |
| 527 | }; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 528 | |
| 529 | i2c0: i2c@fff88000 { |
Jean-Jacques Hiblot | 821003b | 2014-01-15 11:24:46 +0100 | [diff] [blame] | 530 | compatible = "atmel,at91sam9260-i2c"; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 531 | reg = <0xfff88000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 532 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 533 | #address-cells = <1>; |
| 534 | #size-cells = <0>; |
| 535 | status = "disabled"; |
| 536 | }; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 537 | |
| 538 | mmc0: mmc@fff80000 { |
| 539 | compatible = "atmel,hsmci"; |
| 540 | reg = <0xfff80000 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 541 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 542 | #address-cells = <1>; |
| 543 | #size-cells = <0>; |
| 544 | status = "disabled"; |
| 545 | }; |
| 546 | |
| 547 | mmc1: mmc@fff84000 { |
| 548 | compatible = "atmel,hsmci"; |
| 549 | reg = <0xfff84000 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 550 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 551 | #address-cells = <1>; |
| 552 | #size-cells = <0>; |
| 553 | status = "disabled"; |
| 554 | }; |
Linus Torvalds | db5b0ae | 2012-12-13 10:39:26 -0800 | [diff] [blame] | 555 | |
Fabio Porcedda | 7492e7c | 2012-11-12 09:37:26 +0100 | [diff] [blame] | 556 | watchdog@fffffd40 { |
| 557 | compatible = "atmel,at91sam9260-wdt"; |
| 558 | reg = <0xfffffd40 0x10>; |
Boris BREZILLON | fe46aa6 | 2013-10-04 09:24:14 +0200 | [diff] [blame] | 559 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 560 | atmel,watchdog-type = "hardware"; |
| 561 | atmel,reset-type = "all"; |
| 562 | atmel,dbg-halt; |
| 563 | atmel,idle-halt; |
Fabio Porcedda | 7492e7c | 2012-11-12 09:37:26 +0100 | [diff] [blame] | 564 | status = "disabled"; |
| 565 | }; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 566 | |
| 567 | spi0: spi@fffa4000 { |
| 568 | #address-cells = <1>; |
| 569 | #size-cells = <0>; |
| 570 | compatible = "atmel,at91rm9200-spi"; |
| 571 | reg = <0xfffa4000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 572 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 573 | pinctrl-names = "default"; |
| 574 | pinctrl-0 = <&pinctrl_spi0>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 575 | status = "disabled"; |
| 576 | }; |
| 577 | |
| 578 | spi1: spi@fffa8000 { |
| 579 | #address-cells = <1>; |
| 580 | #size-cells = <0>; |
| 581 | compatible = "atmel,at91rm9200-spi"; |
| 582 | reg = <0xfffa8000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 583 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 584 | pinctrl-names = "default"; |
| 585 | pinctrl-0 = <&pinctrl_spi1>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 586 | status = "disabled"; |
| 587 | }; |
Bo Shen | f3ab052 | 2013-12-19 11:59:17 +0800 | [diff] [blame] | 588 | |
| 589 | pwm0: pwm@fffb8000 { |
| 590 | compatible = "atmel,at91sam9rl-pwm"; |
| 591 | reg = <0xfffb8000 0x300>; |
| 592 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; |
| 593 | #pwm-cells = <3>; |
| 594 | status = "disabled"; |
| 595 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 596 | }; |
| 597 | |
Jean-Christophe PLAGNIOL-VILLARD | f8a0d79 | 2013-03-29 04:50:46 +0800 | [diff] [blame] | 598 | fb0: fb@0x00700000 { |
| 599 | compatible = "atmel,at91sam9263-lcdc"; |
| 600 | reg = <0x00700000 0x1000>; |
| 601 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; |
| 602 | pinctrl-names = "default"; |
| 603 | pinctrl-0 = <&pinctrl_fb>; |
| 604 | status = "disabled"; |
| 605 | }; |
| 606 | |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 607 | nand0: nand@40000000 { |
| 608 | compatible = "atmel,at91rm9200-nand"; |
| 609 | #address-cells = <1>; |
| 610 | #size-cells = <1>; |
| 611 | reg = <0x40000000 0x10000000 |
| 612 | 0xffffe000 0x200 |
| 613 | >; |
| 614 | atmel,nand-addr-offset = <21>; |
| 615 | atmel,nand-cmd-offset = <22>; |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 616 | pinctrl-names = "default"; |
| 617 | pinctrl-0 = <&pinctrl_nand>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 618 | gpios = <&pioA 22 GPIO_ACTIVE_HIGH |
| 619 | &pioD 15 GPIO_ACTIVE_HIGH |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 620 | 0 |
| 621 | >; |
| 622 | status = "disabled"; |
| 623 | }; |
| 624 | |
| 625 | usb0: ohci@00a00000 { |
| 626 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 627 | reg = <0x00a00000 0x100000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 628 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 629 | status = "disabled"; |
| 630 | }; |
| 631 | }; |
| 632 | |
| 633 | i2c@0 { |
| 634 | compatible = "i2c-gpio"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 635 | gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ |
| 636 | &pioB 5 GPIO_ACTIVE_HIGH /* scl */ |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 637 | >; |
| 638 | i2c-gpio,sda-open-drain; |
| 639 | i2c-gpio,scl-open-drain; |
| 640 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 641 | #address-cells = <1>; |
| 642 | #size-cells = <0>; |
| 643 | status = "disabled"; |
| 644 | }; |
| 645 | }; |