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Chris Leechc13c8262006-05-23 17:18:44 -07001#
2# DMA engine configuration
3#
4
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07005menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08006 bool "DMA Engine support"
Dan Williams04ce9ab2009-06-03 14:22:28 -07007 depends on HAS_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07008 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08009 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
Dan Williams9c402f42008-06-27 01:21:11 -070012 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
Chris Leechc13c8262006-05-23 17:18:44 -070015
Linus Walleij6c664a82010-02-09 22:34:54 +010016config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070032if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070033
Chris Leech0bbd5f42006-05-23 17:35:34 -070034comment "DMA Devices"
35
Vinod Koulb3c567e2010-07-21 13:28:10 +053036config INTEL_MID_DMAC
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
38 depends on PCI && X86
39 select DMA_ENGINE
40 default n
41 help
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
44
45 Say Y here if you have such a chipset.
46
47 If unsure, say N.
48
Dan Williams5fc6d892010-10-07 16:44:50 -070049config ASYNC_TX_ENABLE_CHANNEL_SWITCH
Dan Williams138f4c32009-09-08 17:42:51 -070050 bool
51
Linus Walleije8689e62010-09-28 15:57:37 +020052config AMBA_PL08X
53 bool "ARM PrimeCell PL080 or PL081 support"
Kees Cookc6a0aec2012-10-23 13:01:54 -070054 depends on ARM_AMBA
Linus Walleije8689e62010-09-28 15:57:37 +020055 select DMA_ENGINE
Russell King083be282012-05-26 14:09:53 +010056 select DMA_VIRTUAL_CHANNELS
Linus Walleije8689e62010-09-28 15:57:37 +020057 help
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
60
Chris Leech0bbd5f42006-05-23 17:35:34 -070061config INTEL_IOATDMA
62 tristate "Intel I/OAT DMA support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070063 depends on PCI && X86
64 select DMA_ENGINE
65 select DCA
Dan Williams7b3cc2b2009-11-19 17:10:37 -070066 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070068 help
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
71
72 Say Y here if you have such a chipset.
73
74 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -070075
76config INTEL_IOP_ADMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070077 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070079 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -070080 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070081 help
82 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -070083
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070084config DW_DMAC
85 tristate "Synopsys DesignWare AHB DMA support"
Heiko Carstens6c43a512013-03-20 09:45:22 +010086 depends on GENERIC_HARDIRQS
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070087 select DMA_ENGINE
88 default y if CPU_AT32AP7000
89 help
90 Support the Synopsys DesignWare AHB DMA controller. This
91 can be integrated in chips such as the Atmel AT32ap7000.
92
Hein Tiboschd5ea7b52012-10-25 13:38:05 -070093config DW_DMAC_BIG_ENDIAN_IO
94 bool "Use big endian I/O register access"
95 default y if AVR32
96 depends on DW_DMAC
97 help
98 Say yes here to use big endian I/O access when reading and writing
99 to the DMA controller registers. This is needed on some platforms,
100 like the Atmel AVR32 architecture.
101
102 If unsure, use the default setting.
103
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200104config AT_HDMAC
105 tristate "Atmel AHB DMA support"
Nicolas Ferref898fed2012-03-15 11:31:58 +0100106 depends on ARCH_AT91
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200107 select DMA_ENGINE
108 help
Nicolas Ferref898fed2012-03-15 11:31:58 +0100109 Support the Atmel AHB DMA controller.
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200110
Zhang Wei173acc72008-03-01 07:42:48 -0700111config FSL_DMA
Timur Tabi77cd62e2008-09-26 17:00:11 -0700112 tristate "Freescale Elo and Elo Plus DMA support"
113 depends on FSL_SOC
Zhang Wei173acc72008-03-01 07:42:48 -0700114 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -0700115 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Zhang Wei173acc72008-03-01 07:42:48 -0700116 ---help---
Timur Tabi77cd62e2008-09-26 17:00:11 -0700117 Enable support for the Freescale Elo and Elo Plus DMA controllers.
118 The Elo is the DMA controller on some 82xx and 83xx parts, and the
119 Elo Plus is the DMA controller on 85xx and 86xx parts.
Zhang Wei173acc72008-03-01 07:42:48 -0700120
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000121config MPC512X_DMA
122 tristate "Freescale MPC512x built-in DMA engine support"
Ilya Yanokba2eea22010-10-27 01:52:57 +0200123 depends on PPC_MPC512x || PPC_MPC831x
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000124 select DMA_ENGINE
125 ---help---
126 Enable support for the Freescale MPC512x built-in DMA engine.
127
Philippe De Muyter9a322992012-10-12 17:52:45 +0200128source "drivers/dma/bestcomm/Kconfig"
129
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700130config MV_XOR
131 bool "Marvell XOR engine support"
132 depends on PLAT_ORION
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700133 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -0700134 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700135 ---help---
136 Enable support for the Marvell XOR engine.
137
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700138config MX3_IPU
139 bool "MX3x Image Processing Unit support"
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200140 depends on ARCH_MXC
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700141 select DMA_ENGINE
142 default y
143 help
144 If you plan to use the Image Processing unit in the i.MX3x, say
145 Y here. If unsure, select Y.
146
147config MX3_IPU_IRQS
148 int "Number of dynamically mapped interrupts for IPU"
149 depends on MX3_IPU
150 range 2 137
151 default 4
152 help
153 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
154 To avoid bloating the irq_desc[] array we allocate a sufficient
155 number of IRQ slots and map them dynamically to specific sources.
156
Atsushi Nemotoea76f0b2009-04-23 00:40:30 +0900157config TXX9_DMAC
158 tristate "Toshiba TXx9 SoC DMA support"
159 depends on MACH_TX49XX || MACH_TX39XX
160 select DMA_ENGINE
161 help
162 Support the TXx9 SoC internal DMA controller. This can be
163 integrated in chips such as the Toshiba TX4927/38/39.
164
Laxman Dewanganec8a1582012-06-06 10:55:27 +0530165config TEGRA20_APB_DMA
166 bool "NVIDIA Tegra20 APB DMA support"
167 depends on ARCH_TEGRA
168 select DMA_ENGINE
169 help
170 Support for the NVIDIA Tegra20 APB DMA controller driver. The
171 DMA controller is having multiple DMA channel which can be
172 configured for different peripherals like audio, UART, SPI,
173 I2C etc which is in APB bus.
174 This DMA controller transfers data from memory to peripheral fifo
175 or vice versa. It does not support memory to memory data transfer.
176
177
178
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000179config SH_DMAE
180 tristate "Renesas SuperH DMAC support"
Magnus Damm927a7c92010-03-19 04:47:19 +0000181 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000182 depends on !SH_DMA_API
183 select DMA_ENGINE
184 help
185 Enable support for the Renesas SuperH DMA controllers.
186
Linus Walleij61f135b2009-11-19 19:49:17 +0100187config COH901318
188 bool "ST-Ericsson COH901318 DMA support"
189 select DMA_ENGINE
190 depends on ARCH_U300
191 help
192 Enable support for ST-Ericsson COH 901 318 DMA.
193
Linus Walleij8d318a52010-03-30 15:33:42 +0200194config STE_DMA40
195 bool "ST-Ericsson DMA40 support"
196 depends on ARCH_U8500
197 select DMA_ENGINE
198 help
199 Support for ST-Ericsson DMA40 controller
200
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700201config AMCC_PPC440SPE_ADMA
202 tristate "AMCC PPC440SPe ADMA support"
203 depends on 440SPe || 440SP
204 select DMA_ENGINE
205 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
Dan Williams5fc6d892010-10-07 16:44:50 -0700206 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700207 help
208 Enable support for the AMCC PPC440SPe RAID engines.
209
Richard Röjforsde5d4452010-03-25 19:44:21 +0100210config TIMB_DMA
211 tristate "Timberdale FPGA DMA support"
212 depends on MFD_TIMBERDALE || HAS_IOMEM
213 select DMA_ENGINE
214 help
215 Enable support for the Timberdale FPGA DMA engine.
216
Rongjun Yingca21a142011-10-27 19:22:39 -0700217config SIRF_DMA
Barry Songf7d935d2012-11-01 22:54:43 +0800218 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
219 depends on ARCH_SIRF
Rongjun Yingca21a142011-10-27 19:22:39 -0700220 select DMA_ENGINE
221 help
222 Enable support for the CSR SiRFprimaII DMA engine.
223
Matt Porterc2dde5f2012-08-22 21:09:34 -0400224config TI_EDMA
225 tristate "TI EDMA support"
226 depends on ARCH_DAVINCI
227 select DMA_ENGINE
228 select DMA_VIRTUAL_CHANNELS
229 default n
230 help
231 Enable support for the TI EDMA controller. This DMA
232 engine is found on TI DaVinci and AM33xx parts.
233
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700234config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
235 bool
236
Jassi Brarb3040e42010-05-23 20:28:19 -0700237config PL330_DMA
238 tristate "DMA API Driver for PL330"
239 select DMA_ENGINE
Boojin Kim1b9bb712011-09-02 09:44:30 +0900240 depends on ARM_AMBA
Jassi Brarb3040e42010-05-23 20:28:19 -0700241 help
242 Select if your platform has one or more PL330 DMACs.
243 You need to provide platform specific settings via
244 platform_data for a dma-pl330 device.
245
Yong Wang0c42bd02010-07-30 16:23:03 +0800246config PCH_DMA
Tomoya MORINAGAca7fe2d2011-11-17 16:14:23 +0900247 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
Yong Wang0c42bd02010-07-30 16:23:03 +0800248 depends on PCI && X86
249 select DMA_ENGINE
250 help
Tomoya MORINAGA2cdf2452011-01-05 17:43:52 +0900251 Enable support for Intel EG20T PCH DMA engine.
252
Tomoya MORINAGAe79e72b2011-11-17 16:14:22 +0900253 This driver also can be used for LAPIS Semiconductor IOH(Input/
Tomoya MORINAGAca7fe2d2011-11-17 16:14:23 +0900254 Output Hub), ML7213, ML7223 and ML7831.
255 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
256 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
257 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
258 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
Yong Wang0c42bd02010-07-30 16:23:03 +0800259
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000260config IMX_SDMA
261 tristate "i.MX SDMA support"
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200262 depends on ARCH_MXC
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000263 select DMA_ENGINE
264 help
265 Support the i.MX SDMA engine. This engine is integrated into
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200266 Freescale i.MX25/31/35/51/53 chips.
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000267
Sascha Hauer1f1846c2010-10-06 10:25:55 +0200268config IMX_DMA
269 tristate "i.MX DMA support"
Vinod Koul5b2e02e2012-03-27 13:53:00 +0530270 depends on ARCH_MXC
Sascha Hauer1f1846c2010-10-06 10:25:55 +0200271 select DMA_ENGINE
272 help
273 Support the i.MX DMA engine. This engine is integrated into
274 Freescale i.MX1/21/27 chips.
275
Shawn Guoa580b8c2011-02-27 00:47:42 +0800276config MXS_DMA
277 bool "MXS DMA support"
Huang Shijief5c55842012-06-06 21:22:59 -0400278 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
Dong Aishengf5b7efc2012-05-04 20:12:15 +0800279 select STMP_DEVICE
Shawn Guoa580b8c2011-02-27 00:47:42 +0800280 select DMA_ENGINE
281 help
282 Support the MXS DMA engine. This engine including APBH-DMA
283 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
284
Mika Westerberg760ee1c2011-05-29 13:10:02 +0300285config EP93XX_DMA
286 bool "Cirrus Logic EP93xx DMA support"
287 depends on ARCH_EP93XX
288 select DMA_ENGINE
289 help
290 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
291
Russell King6365bea2012-01-09 21:44:07 +0000292config DMA_SA11X0
293 tristate "SA-11x0 DMA support"
294 depends on ARCH_SA1100
295 select DMA_ENGINE
Russell King50437bf2012-04-13 12:07:23 +0100296 select DMA_VIRTUAL_CHANNELS
Russell King6365bea2012-01-09 21:44:07 +0000297 help
298 Support the DMA engine found on Intel StrongARM SA-1100 and
299 SA-1110 SoCs. This DMA engine can only be used with on-chip
300 devices.
301
Zhangfei Gaoc6da0ba2012-06-15 11:04:08 +0800302config MMP_TDMA
303 bool "MMP Two-Channel DMA support"
Vinod Koul49d57b52012-06-22 10:29:53 +0530304 depends on ARCH_MMP
Zhangfei Gaoc6da0ba2012-06-15 11:04:08 +0800305 select DMA_ENGINE
306 help
307 Support the MMP Two-Channel DMA engine.
308 This engine used for MMP Audio DMA and pxa910 SQU.
309
310 Say Y here if you enabled MMP ADMA, otherwise say N.
311
Russell King7bedaa52012-04-13 12:10:24 +0100312config DMA_OMAP
313 tristate "OMAP DMA support"
314 depends on ARCH_OMAP
315 select DMA_ENGINE
316 select DMA_VIRTUAL_CHANNELS
317
Zhangfei Gaoc8acd6a2012-09-03 11:03:45 +0800318config MMP_PDMA
319 bool "MMP PDMA support"
320 depends on (ARCH_MMP || ARCH_PXA)
321 select DMA_ENGINE
322 help
323 Support the MMP PDMA engine for PXA and MMP platfrom.
324
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700325config DMA_ENGINE
326 bool
327
Russell King50437bf2012-04-13 12:07:23 +0100328config DMA_VIRTUAL_CHANNELS
329 tristate
330
Vinod Koul5fa422c2013-02-12 09:15:02 -0800331config DMA_OF
332 def_bool y
333 depends on OF
334
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700335comment "DMA Clients"
336 depends on DMA_ENGINE
337
338config NET_DMA
339 bool "Network: TCP receive copy offload"
340 depends on DMA_ENGINE && NET
Dan Williams9c402f42008-06-27 01:21:11 -0700341 default (INTEL_IOATDMA || FSL_DMA)
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700342 help
343 This enables the use of DMA engines in the network stack to
344 offload receive copy-to-user operations, freeing CPU cycles.
Dan Williams9c402f42008-06-27 01:21:11 -0700345
346 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
347 say N.
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700348
Dan Williams729b5d12009-03-25 09:13:25 -0700349config ASYNC_TX_DMA
350 bool "Async_tx: Offload support for the async_tx api"
Dan Williams9a8de632009-09-08 15:06:10 -0700351 depends on DMA_ENGINE
Dan Williams729b5d12009-03-25 09:13:25 -0700352 help
353 This allows the async_tx api to take advantage of offload engines for
354 memcpy, memset, xor, and raid6 p+q operations. If your platform has
355 a dma engine that can perform raid operations and you have enabled
356 MD_RAID456 say Y.
357
358 If unsure, say N.
359
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700360config DMATEST
361 tristate "DMA Test client"
362 depends on DMA_ENGINE
363 help
364 Simple DMA test client. Say N unless you're debugging a
365 DMA Device driver.
366
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700367endif