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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
Tony Lindgren0f622e82011-03-29 15:54:50 -07002 * linux/arch/arm/mach-omap2/timer.c
Tony Lindgren1dbae812005-11-10 14:26:51 +00003 *
4 * OMAP2 GP timer support.
5 *
Paul Walmsleyf2480762009-04-23 21:11:10 -06006 * Copyright (C) 2009 Nokia Corporation
7 *
Kevin Hilman5a3a3882007-11-12 23:24:02 -08008 * Update to use new clocksource/clockevent layers
9 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
10 * Copyright (C) 2007 MontaVista Software, Inc.
11 *
12 * Original driver:
Tony Lindgren1dbae812005-11-10 14:26:51 +000013 * Copyright (C) 2005 Nokia Corporation
14 * Author: Paul Mundt <paul.mundt@nokia.com>
Jan Engelhardt96de0e22007-10-19 23:21:04 +020015 * Juha Yrjölä <juha.yrjola@nokia.com>
Timo Teras77900a22006-06-26 16:16:12 -070016 * OMAP Dual-mode timer framework support by Timo Teras
Tony Lindgren1dbae812005-11-10 14:26:51 +000017 *
18 * Some parts based off of TI's 24xx code:
19 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070020 * Copyright (C) 2004-2009 Texas Instruments, Inc.
Tony Lindgren1dbae812005-11-10 14:26:51 +000021 *
22 * Roughly modelled after the OMAP1 MPU timer code.
Santosh Shilimkar44169072009-05-28 14:16:04 -070023 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000024 *
25 * This file is subject to the terms and conditions of the GNU General Public
26 * License. See the file "COPYING" in the main directory of this archive
27 * for more details.
28 */
29#include <linux/init.h>
30#include <linux/time.h>
31#include <linux/interrupt.h>
32#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000033#include <linux/clk.h>
Timo Teras77900a22006-06-26 16:16:12 -070034#include <linux/delay.h>
Dirk Behmee6687292006-12-06 17:14:00 -080035#include <linux/irq.h>
Kevin Hilman5a3a3882007-11-12 23:24:02 -080036#include <linux/clocksource.h>
37#include <linux/clockchips.h>
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +053038#include <linux/slab.h>
Santosh Shilimkareed0de22012-07-04 18:32:32 +053039#include <linux/of.h>
Jon Hunter9725f442012-05-14 10:41:37 -050040#include <linux/of_address.h>
41#include <linux/of_irq.h>
Jon Hunter40fc3bb2012-09-28 11:34:49 -050042#include <linux/platform_device.h>
43#include <linux/platform_data/dmtimer-omap.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000044
Tony Lindgren1dbae812005-11-10 14:26:51 +000045#include <asm/mach/time.h>
Marc Zyngiera45c9832012-01-10 19:44:19 +000046#include <asm/smp_twd.h>
Paul Walmsleycbc94382011-02-22 19:59:49 -070047#include <asm/sched_clock.h>
Tony Lindgren7d7e1eb2012-08-27 17:43:01 -070048
Santosh Shilimkar3c7c5da2012-08-13 14:39:03 +053049#include <asm/arch_timer.h>
Tony Lindgren2a296c82012-10-02 17:41:35 -070050#include "omap_hwmod.h"
Tony Lindgren25c7d492012-10-02 17:25:48 -070051#include "omap_device.h"
Tony Lindgren5c2e8852012-10-29 16:45:47 -070052#include <plat/counter-32k.h>
Tony Lindgren7d7e1eb2012-08-27 17:43:01 -070053#include <plat/dmtimer.h>
Tony Lindgren1d5aef42012-10-03 16:36:40 -070054#include "omap-pm.h"
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053055
Tony Lindgrendbc04162012-08-31 10:59:07 -070056#include "soc.h"
Tony Lindgren7d7e1eb2012-08-27 17:43:01 -070057#include "common.h"
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053058#include "powerdomain.h"
Tony Lindgren1dbae812005-11-10 14:26:51 +000059
Tony Lindgrenaa561882011-03-29 15:54:48 -070060/* Parent clocks, eventually these will come from the clock framework */
61
62#define OMAP2_MPU_SOURCE "sys_ck"
63#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
64#define OMAP4_MPU_SOURCE "sys_clkin_ck"
65#define OMAP2_32K_SOURCE "func_32k_ck"
66#define OMAP3_32K_SOURCE "omap_32k_fck"
67#define OMAP4_32K_SOURCE "sys_32k_ck"
68
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +053069#define REALTIME_COUNTER_BASE 0x48243200
70#define INCREMENTER_NUMERATOR_OFFSET 0x10
71#define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14
72#define NUMERATOR_DENUMERATOR_MASK 0xfffff000
73
Tony Lindgrenaa561882011-03-29 15:54:48 -070074/* Clockevent code */
75
76static struct omap_dm_timer clkev;
Kevin Hilman5a3a3882007-11-12 23:24:02 -080077static struct clock_event_device clockevent_gpt;
Tony Lindgren1dbae812005-11-10 14:26:51 +000078
Linus Torvalds0cd61b62006-10-06 10:53:39 -070079static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
Tony Lindgren1dbae812005-11-10 14:26:51 +000080{
Kevin Hilman5a3a3882007-11-12 23:24:02 -080081 struct clock_event_device *evt = &clockevent_gpt;
Tony Lindgren1dbae812005-11-10 14:26:51 +000082
Tony Lindgrenee17f112011-09-16 15:44:20 -070083 __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
Kevin Hilman5a3a3882007-11-12 23:24:02 -080084
85 evt->event_handler(evt);
Tony Lindgren1dbae812005-11-10 14:26:51 +000086 return IRQ_HANDLED;
87}
88
89static struct irqaction omap2_gp_timer_irq = {
Vaibhav Hiremathf36921b2012-05-09 10:07:05 -070090 .name = "gp_timer",
Bernhard Walleb30faba2007-05-08 00:35:39 -070091 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
Tony Lindgren1dbae812005-11-10 14:26:51 +000092 .handler = omap2_gp_timer_interrupt,
93};
94
Kevin Hilman5a3a3882007-11-12 23:24:02 -080095static int omap2_gp_timer_set_next_event(unsigned long cycles,
96 struct clock_event_device *evt)
Tony Lindgren1dbae812005-11-10 14:26:51 +000097{
Tony Lindgrenee17f112011-09-16 15:44:20 -070098 __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
Jon Hunter971d0252012-09-27 11:49:45 -050099 0xffffffff - cycles, OMAP_TIMER_POSTED);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000100
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800101 return 0;
102}
103
104static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
105 struct clock_event_device *evt)
106{
107 u32 period;
108
Jon Hunter971d0252012-09-27 11:49:45 -0500109 __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800110
111 switch (mode) {
112 case CLOCK_EVT_MODE_PERIODIC:
Tony Lindgrenaa561882011-03-29 15:54:48 -0700113 period = clkev.rate / HZ;
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800114 period -= 1;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700115 /* Looks like we need to first set the load value separately */
Tony Lindgrenee17f112011-09-16 15:44:20 -0700116 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
Jon Hunter971d0252012-09-27 11:49:45 -0500117 0xffffffff - period, OMAP_TIMER_POSTED);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700118 __omap_dm_timer_load_start(&clkev,
Tony Lindgrenaa561882011-03-29 15:54:48 -0700119 OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
Jon Hunter971d0252012-09-27 11:49:45 -0500120 0xffffffff - period, OMAP_TIMER_POSTED);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800121 break;
122 case CLOCK_EVT_MODE_ONESHOT:
123 break;
124 case CLOCK_EVT_MODE_UNUSED:
125 case CLOCK_EVT_MODE_SHUTDOWN:
126 case CLOCK_EVT_MODE_RESUME:
127 break;
128 }
129}
130
131static struct clock_event_device clockevent_gpt = {
Vaibhav Hiremathf36921b2012-05-09 10:07:05 -0700132 .name = "gp_timer",
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
134 .shift = 32,
Santosh Shilimkar11d6ec22012-03-17 15:00:16 +0530135 .rating = 300,
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800136 .set_next_event = omap2_gp_timer_set_next_event,
137 .set_mode = omap2_gp_timer_set_mode,
138};
139
Jon Hunterad24bde2012-06-20 15:55:24 -0500140static struct property device_disabled = {
141 .name = "status",
142 .length = sizeof("disabled"),
143 .value = "disabled",
144};
145
146static struct of_device_id omap_timer_match[] __initdata = {
147 { .compatible = "ti,omap2-timer", },
148 { }
149};
150
151/**
Jon Hunter9725f442012-05-14 10:41:37 -0500152 * omap_get_timer_dt - get a timer using device-tree
153 * @match - device-tree match structure for matching a device type
154 * @property - optional timer property to match
155 *
156 * Helper function to get a timer during early boot using device-tree for use
157 * as kernel system timer. Optionally, the property argument can be used to
158 * select a timer with a specific property. Once a timer is found then mark
159 * the timer node in device-tree as disabled, to prevent the kernel from
160 * registering this timer as a platform device and so no one else can use it.
161 */
162static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
163 const char *property)
164{
165 struct device_node *np;
166
167 for_each_matching_node(np, match) {
168 if (!of_device_is_available(np)) {
169 of_node_put(np);
170 continue;
171 }
172
173 if (property && !of_get_property(np, property, NULL)) {
174 of_node_put(np);
175 continue;
176 }
177
Peter Ujfalusi2727da82012-12-19 10:50:09 +0100178 of_add_property(np, &device_disabled);
Jon Hunter9725f442012-05-14 10:41:37 -0500179 return np;
180 }
181
182 return NULL;
183}
184
185/**
Jon Hunterad24bde2012-06-20 15:55:24 -0500186 * omap_dmtimer_init - initialisation function when device tree is used
187 *
188 * For secure OMAP3 devices, timers with device type "timer-secure" cannot
189 * be used by the kernel as they are reserved. Therefore, to prevent the
190 * kernel registering these devices remove them dynamically from the device
191 * tree on boot.
192 */
Vaibhav Hiremathbf85f202012-11-28 15:56:41 -0600193static void __init omap_dmtimer_init(void)
Jon Hunterad24bde2012-06-20 15:55:24 -0500194{
195 struct device_node *np;
196
197 if (!cpu_is_omap34xx())
198 return;
199
200 /* If we are a secure device, remove any secure timer nodes */
201 if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
Jon Hunter9725f442012-05-14 10:41:37 -0500202 np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
203 if (np)
204 of_node_put(np);
Jon Hunterad24bde2012-06-20 15:55:24 -0500205 }
206}
207
Jon Hunterbfd6d022012-09-27 12:47:43 -0500208/**
209 * omap_dm_timer_get_errata - get errata flags for a timer
210 *
211 * Get the timer errata flags that are specific to the OMAP device being used.
212 */
Vaibhav Hiremathbf85f202012-11-28 15:56:41 -0600213static u32 __init omap_dm_timer_get_errata(void)
Jon Hunterbfd6d022012-09-27 12:47:43 -0500214{
215 if (cpu_is_omap24xx())
216 return 0;
217
218 return OMAP_TIMER_ERRATA_I103_I767;
219}
220
Tony Lindgrenaa561882011-03-29 15:54:48 -0700221static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
222 int gptimer_id,
Jon Hunter9725f442012-05-14 10:41:37 -0500223 const char *fck_source,
Jon Hunterbfd6d022012-09-27 12:47:43 -0500224 const char *property,
225 int posted)
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800226{
Tony Lindgrenaa561882011-03-29 15:54:48 -0700227 char name[10]; /* 10 = sizeof("gptXX_Xck0") */
Jon Hunter9725f442012-05-14 10:41:37 -0500228 const char *oh_name;
229 struct device_node *np;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700230 struct omap_hwmod *oh;
Jon Hunter61b001c2012-09-28 18:03:29 -0500231 struct resource irq, mem;
Jon Hunterf88095b2012-11-09 17:07:39 -0600232 int r = 0;
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800233
Jon Hunter9725f442012-05-14 10:41:37 -0500234 if (of_have_populated_dt()) {
235 np = omap_get_timer_dt(omap_timer_match, NULL);
236 if (!np)
237 return -ENODEV;
238
239 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
240 if (!oh_name)
241 return -ENODEV;
242
243 timer->irq = irq_of_parse_and_map(np, 0);
244 if (!timer->irq)
245 return -ENXIO;
246
247 timer->io_base = of_iomap(np, 0);
248
249 of_node_put(np);
250 } else {
251 if (omap_dm_timer_reserve_systimer(gptimer_id))
252 return -ENODEV;
253
254 sprintf(name, "timer%d", gptimer_id);
255 oh_name = name;
256 }
257
Jon Hunter9725f442012-05-14 10:41:37 -0500258 oh = omap_hwmod_lookup(oh_name);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700259 if (!oh)
260 return -ENODEV;
Paul Walmsleyf2480762009-04-23 21:11:10 -0600261
Jon Hunter9725f442012-05-14 10:41:37 -0500262 if (!of_have_populated_dt()) {
263 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
Jon Hunter61b001c2012-09-28 18:03:29 -0500264 &irq);
Jon Hunter9725f442012-05-14 10:41:37 -0500265 if (r)
266 return -ENXIO;
Jon Hunter61b001c2012-09-28 18:03:29 -0500267 timer->irq = irq.start;
Paul Walmsley6c0c27f2012-04-19 04:01:50 -0600268
Jon Hunter9725f442012-05-14 10:41:37 -0500269 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
Jon Hunter61b001c2012-09-28 18:03:29 -0500270 &mem);
Jon Hunter9725f442012-05-14 10:41:37 -0500271 if (r)
272 return -ENXIO;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700273
Jon Hunter9725f442012-05-14 10:41:37 -0500274 /* Static mapping, never released */
Jon Hunter61b001c2012-09-28 18:03:29 -0500275 timer->io_base = ioremap(mem.start, mem.end - mem.start);
Jon Hunter9725f442012-05-14 10:41:37 -0500276 }
277
Tony Lindgrenaa561882011-03-29 15:54:48 -0700278 if (!timer->io_base)
279 return -ENXIO;
280
281 /* After the dmtimer is using hwmod these clocks won't be needed */
Tarun Kanti DebBarmaae6df412012-07-05 18:10:59 +0530282 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
Tony Lindgrenaa561882011-03-29 15:54:48 -0700283 if (IS_ERR(timer->fclk))
284 return -ENODEV;
285
Jon Hunter9725f442012-05-14 10:41:37 -0500286 /* FIXME: Need to remove hard-coded test on timer ID */
Tony Lindgrenaa561882011-03-29 15:54:48 -0700287 if (gptimer_id != 12) {
288 struct clk *src;
289
290 src = clk_get(NULL, fck_source);
291 if (IS_ERR(src)) {
Jon Hunterf88095b2012-11-09 17:07:39 -0600292 r = -EINVAL;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700293 } else {
Jon Hunterf88095b2012-11-09 17:07:39 -0600294 r = clk_set_parent(timer->fclk, src);
295 if (IS_ERR_VALUE(r))
Jon Hunter9725f442012-05-14 10:41:37 -0500296 pr_warn("%s: %s cannot set source\n",
297 __func__, oh->name);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700298 clk_put(src);
299 }
300 }
Jon Hunterb1538832012-09-28 11:43:30 -0500301
302 omap_hwmod_setup_one(oh_name);
303 omap_hwmod_enable(oh);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700304 __omap_dm_timer_init_regs(timer);
Jon Hunterbfd6d022012-09-27 12:47:43 -0500305
306 if (posted)
307 __omap_dm_timer_enable_posted(timer);
308
309 /* Check that the intended posted configuration matches the actual */
310 if (posted != timer->posted)
311 return -EINVAL;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700312
313 timer->rate = clk_get_rate(timer->fclk);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700314 timer->reserved = 1;
Paul Walmsley38698be2011-02-23 00:14:08 -0700315
Jon Hunterf88095b2012-11-09 17:07:39 -0600316 return r;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700317}
Paul Walmsleyf2480762009-04-23 21:11:10 -0600318
Tony Lindgrenaa561882011-03-29 15:54:48 -0700319static void __init omap2_gp_clockevent_init(int gptimer_id,
Jon Hunter9725f442012-05-14 10:41:37 -0500320 const char *fck_source,
321 const char *property)
Tony Lindgrenaa561882011-03-29 15:54:48 -0700322{
323 int res;
Paul Walmsleyf2480762009-04-23 21:11:10 -0600324
Jon Hunterbfd6d022012-09-27 12:47:43 -0500325 clkev.errata = omap_dm_timer_get_errata();
326
327 /*
328 * For clock-event timers we never read the timer counter and
329 * so we are not impacted by errata i103 and i767. Therefore,
330 * we can safely ignore this errata for clock-event timers.
331 */
332 __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
333
334 res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property,
335 OMAP_TIMER_POSTED);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700336 BUG_ON(res);
Paul Walmsleyf2480762009-04-23 21:11:10 -0600337
Paul Walmsleya032d332012-08-03 09:21:10 -0600338 omap2_gp_timer_irq.dev_id = &clkev;
Tony Lindgrenaa561882011-03-29 15:54:48 -0700339 setup_irq(clkev.irq, &omap2_gp_timer_irq);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800340
Tony Lindgrenee17f112011-09-16 15:44:20 -0700341 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700342
343 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800344 clockevent_gpt.shift);
345 clockevent_gpt.max_delta_ns =
346 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
347 clockevent_gpt.min_delta_ns =
Aaro Koskinendf88acb2009-01-29 08:57:17 -0800348 clockevent_delta2ns(3, &clockevent_gpt);
349 /* Timer internal resynch latency. */
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800350
Santosh Shilimkar11d6ec22012-03-17 15:00:16 +0530351 clockevent_gpt.cpumask = cpu_possible_mask;
352 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800353 clockevents_register_device(&clockevent_gpt);
Tony Lindgrenaa561882011-03-29 15:54:48 -0700354
355 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
356 gptimer_id, clkev.rate);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800357}
358
Paul Walmsleyf2480762009-04-23 21:11:10 -0600359/* Clocksource code */
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700360static struct omap_dm_timer clksrc;
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700361static bool use_gptimer_clksrc;
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700362
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800363/*
364 * clocksource
365 */
Magnus Damm8e196082009-04-21 12:24:00 -0700366static cycle_t clocksource_read_cycles(struct clocksource *cs)
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800367{
Jon Hunter971d0252012-09-27 11:49:45 -0500368 return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
Jon Hunterbfd6d022012-09-27 12:47:43 -0500369 OMAP_TIMER_NONPOSTED);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800370}
371
372static struct clocksource clocksource_gpt = {
Vaibhav Hiremathf36921b2012-05-09 10:07:05 -0700373 .name = "gp_timer",
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800374 .rating = 300,
375 .read = clocksource_read_cycles,
376 .mask = CLOCKSOURCE_MASK(32),
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800377 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
378};
379
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100380static u32 notrace dmtimer_read_sched_clock(void)
Paul Walmsleycbc94382011-02-22 19:59:49 -0700381{
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700382 if (clksrc.reserved)
Jon Hunter971d0252012-09-27 11:49:45 -0500383 return __omap_dm_timer_read_counter(&clksrc,
Jon Hunterbfd6d022012-09-27 12:47:43 -0500384 OMAP_TIMER_NONPOSTED);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800385
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100386 return 0;
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700387}
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800388
Jon Hunter258e84a2012-11-15 13:09:03 -0600389static struct of_device_id omap_counter_match[] __initdata = {
390 { .compatible = "ti,omap-counter32k", },
391 { }
392};
393
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700394/* Setup free-running counter for clocksource */
Jon Huntere0c3e272012-11-27 15:24:12 -0600395static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700396{
397 int ret;
Jon Hunter9883f7c2012-10-09 14:12:26 -0500398 struct device_node *np = NULL;
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700399 struct omap_hwmod *oh;
400 void __iomem *vbase;
401 const char *oh_name = "counter_32k";
402
403 /*
Jon Hunter9883f7c2012-10-09 14:12:26 -0500404 * If device-tree is present, then search the DT blob
405 * to see if the 32kHz counter is supported.
406 */
407 if (of_have_populated_dt()) {
408 np = omap_get_timer_dt(omap_counter_match, NULL);
409 if (!np)
410 return -ENODEV;
411
412 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
413 if (!oh_name)
414 return -ENODEV;
415 }
416
417 /*
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700418 * First check hwmod data is available for sync32k counter
419 */
420 oh = omap_hwmod_lookup(oh_name);
421 if (!oh || oh->slaves_cnt == 0)
422 return -ENODEV;
423
424 omap_hwmod_setup_one(oh_name);
425
Jon Hunter9883f7c2012-10-09 14:12:26 -0500426 if (np) {
427 vbase = of_iomap(np, 0);
428 of_node_put(np);
429 } else {
430 vbase = omap_hwmod_get_mpu_rt_va(oh);
431 }
432
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700433 if (!vbase) {
434 pr_warn("%s: failed to get counter_32k resource\n", __func__);
435 return -ENXIO;
436 }
437
438 ret = omap_hwmod_enable(oh);
439 if (ret) {
440 pr_warn("%s: failed to enable counter_32k module (%d)\n",
441 __func__, ret);
442 return ret;
443 }
444
445 ret = omap_init_clocksource_32k(vbase);
446 if (ret) {
447 pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
448 __func__, ret);
449 omap_hwmod_idle(oh);
450 }
451
452 return ret;
453}
454
455static void __init omap2_gptimer_clocksource_init(int gptimer_id,
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700456 const char *fck_source)
457{
458 int res;
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800459
Jon Hunterbfd6d022012-09-27 12:47:43 -0500460 clksrc.errata = omap_dm_timer_get_errata();
461
462 res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL,
463 OMAP_TIMER_NONPOSTED);
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700464 BUG_ON(res);
Paul Walmsleycbc94382011-02-22 19:59:49 -0700465
Tony Lindgrenee17f112011-09-16 15:44:20 -0700466 __omap_dm_timer_load_start(&clksrc,
Jon Hunter971d0252012-09-27 11:49:45 -0500467 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
Jon Hunterbfd6d022012-09-27 12:47:43 -0500468 OMAP_TIMER_NONPOSTED);
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100469 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
Tony Lindgren3d05a3e2011-03-29 15:54:49 -0700470
471 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
472 pr_err("Could not register clocksource %s\n",
473 clocksource_gpt.name);
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700474 else
475 pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
476 gptimer_id, clksrc.rate);
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800477}
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700478
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +0530479#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
480/*
481 * The realtime counter also called master counter, is a free-running
482 * counter, which is related to real time. It produces the count used
483 * by the CPU local timer peripherals in the MPU cluster. The timer counts
484 * at a rate of 6.144 MHz. Because the device operates on different clocks
485 * in different power modes, the master counter shifts operation between
486 * clocks, adjusting the increment per clock in hardware accordingly to
487 * maintain a constant count rate.
488 */
489static void __init realtime_counter_init(void)
490{
491 void __iomem *base;
492 static struct clk *sys_clk;
493 unsigned long rate;
494 unsigned int reg, num, den;
495
496 base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
497 if (!base) {
498 pr_err("%s: ioremap failed\n", __func__);
499 return;
500 }
501 sys_clk = clk_get(NULL, "sys_clkin_ck");
Wei Yongjun533b2982012-10-08 15:01:41 -0700502 if (IS_ERR(sys_clk)) {
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +0530503 pr_err("%s: failed to get system clock handle\n", __func__);
504 iounmap(base);
505 return;
506 }
507
508 rate = clk_get_rate(sys_clk);
509 /* Numerator/denumerator values refer TRM Realtime Counter section */
510 switch (rate) {
511 case 1200000:
512 num = 64;
513 den = 125;
514 break;
515 case 1300000:
516 num = 768;
517 den = 1625;
518 break;
519 case 19200000:
520 num = 8;
521 den = 25;
522 break;
523 case 2600000:
524 num = 384;
525 den = 1625;
526 break;
527 case 2700000:
528 num = 256;
529 den = 1125;
530 break;
531 case 38400000:
532 default:
533 /* Program it for 38.4 MHz */
534 num = 4;
535 den = 25;
536 break;
537 }
538
539 /* Program numerator and denumerator registers */
540 reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
541 NUMERATOR_DENUMERATOR_MASK;
542 reg |= num;
543 __raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
544
545 reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
546 NUMERATOR_DENUMERATOR_MASK;
547 reg |= den;
548 __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
549
550 iounmap(base);
551}
552#else
553static inline void __init realtime_counter_init(void)
554{}
555#endif
556
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200557#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
558 clksrc_nr, clksrc_src) \
559static void __init omap##name##_gptimer_timer_init(void) \
Tony Lindgrene74984e2011-03-29 15:54:48 -0700560{ \
Jon Hunterad24bde2012-06-20 15:55:24 -0500561 omap_dmtimer_init(); \
Jon Hunter9725f442012-05-14 10:41:37 -0500562 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200563 omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \
Tony Lindgrene74984e2011-03-29 15:54:48 -0700564}
565
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200566#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
567 clksrc_nr, clksrc_src) \
568static void __init omap##name##_sync32k_timer_init(void) \
569{ \
570 omap_dmtimer_init(); \
571 omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
572 /* Enable the use of clocksource="gp_timer" kernel parameter */ \
573 if (use_gptimer_clksrc) \
574 omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\
575 else \
576 omap2_sync32k_clocksource_init(); \
577}
578
579#define OMAP_SYS_TIMER(name, clksrc) \
Tony Lindgrene74984e2011-03-29 15:54:48 -0700580struct sys_timer omap##name##_timer = { \
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200581 .init = omap##name##_##clksrc##_timer_init, \
Tony Lindgrene74984e2011-03-29 15:54:48 -0700582};
583
584#ifdef CONFIG_ARCH_OMAP2
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200585OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
586 2, OMAP2_MPU_SOURCE);
587OMAP_SYS_TIMER(2, sync32k);
588#endif /* CONFIG_ARCH_OMAP2 */
Tony Lindgrene74984e2011-03-29 15:54:48 -0700589
590#ifdef CONFIG_ARCH_OMAP3
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200591OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
592 2, OMAP3_MPU_SOURCE);
593OMAP_SYS_TIMER(3, sync32k);
594OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
595 2, OMAP3_MPU_SOURCE);
596OMAP_SYS_TIMER(3_secure, sync32k);
Igor Grinberg26f01992012-11-18 17:06:41 +0200597OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
598 2, OMAP3_MPU_SOURCE);
599OMAP_SYS_TIMER(3_gp, gptimer);
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200600#endif /* CONFIG_ARCH_OMAP3 */
Tony Lindgrene74984e2011-03-29 15:54:48 -0700601
Afzal Mohammed08f30982012-05-11 00:38:49 +0530602#ifdef CONFIG_SOC_AM33XX
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200603OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
604 2, OMAP4_MPU_SOURCE);
605OMAP_SYS_TIMER(3_am33xx, gptimer);
606#endif /* CONFIG_SOC_AM33XX */
Afzal Mohammed08f30982012-05-11 00:38:49 +0530607
Tony Lindgrene74984e2011-03-29 15:54:48 -0700608#ifdef CONFIG_ARCH_OMAP4
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200609OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
610 2, OMAP4_MPU_SOURCE);
Marc Zyngiera45c9832012-01-10 19:44:19 +0000611#ifdef CONFIG_LOCAL_TIMERS
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200612static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
613static void __init omap4_local_timer_init(void)
Kevin Hilman5a3a3882007-11-12 23:24:02 -0800614{
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200615 omap4_sync32k_timer_init();
Marc Zyngiera45c9832012-01-10 19:44:19 +0000616 /* Local timers are not supprted on OMAP4430 ES1.0 */
617 if (omap_rev() != OMAP4430_REV_ES1_0) {
618 int err;
619
Santosh Shilimkareed0de22012-07-04 18:32:32 +0530620 if (of_have_populated_dt()) {
621 twd_local_timer_of_register();
622 return;
623 }
624
Marc Zyngiera45c9832012-01-10 19:44:19 +0000625 err = twd_local_timer_register(&twd_local_timer);
626 if (err)
627 pr_err("twd_local_timer_register failed %d\n", err);
628 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000629}
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200630#else /* CONFIG_LOCAL_TIMERS */
Olof Johansson73f14f62012-11-29 23:05:32 -0800631static void __init omap4_local_timer_init(void)
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200632{
Olof Johansson73f14f62012-11-29 23:05:32 -0800633 omap4_sync32k_timer_init();
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200634}
635#endif /* CONFIG_LOCAL_TIMERS */
636OMAP_SYS_TIMER(4, local);
637#endif /* CONFIG_ARCH_OMAP4 */
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530638
R Sricharan37b32802012-05-02 13:07:12 +0530639#ifdef CONFIG_SOC_OMAP5
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200640OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
641 2, OMAP4_MPU_SOURCE);
642static void __init omap5_realtime_timer_init(void)
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +0530643{
Santosh Shilimkar3c7c5da2012-08-13 14:39:03 +0530644 int err;
645
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200646 omap5_sync32k_timer_init();
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +0530647 realtime_counter_init();
Santosh Shilimkar3c7c5da2012-08-13 14:39:03 +0530648
649 err = arch_timer_of_register();
650 if (err)
651 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
Santosh Shilimkarfa6d79d2012-08-13 14:24:24 +0530652}
Igor Grinberg6f80b3b2012-11-20 09:17:15 +0200653OMAP_SYS_TIMER(5, realtime);
654#endif /* CONFIG_SOC_OMAP5 */
R Sricharan37b32802012-05-02 13:07:12 +0530655
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530656/**
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530657 * omap_timer_init - build and register timer device with an
658 * associated timer hwmod
659 * @oh: timer hwmod pointer to be used to build timer device
660 * @user: parameter that can be passed from calling hwmod API
661 *
662 * Called by omap_hwmod_for_each_by_class to register each of the timer
663 * devices present in the system. The number of timer devices is known
664 * by parsing through the hwmod database for a given class name. At the
665 * end of function call memory is allocated for timer device and it is
666 * registered to the framework ready to be proved by the driver.
667 */
668static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
669{
670 int id;
671 int ret = 0;
672 char *name = "omap_timer";
673 struct dmtimer_platform_data *pdata;
Tony Lindgrenc541c152011-10-04 09:47:06 -0700674 struct platform_device *pdev;
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530675 struct omap_timer_capability_dev_attr *timer_dev_attr;
676
677 pr_debug("%s: %s\n", __func__, oh->name);
678
679 /* on secure device, do not register secure timer */
680 timer_dev_attr = oh->dev_attr;
681 if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
682 if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
683 return ret;
684
685 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
686 if (!pdata) {
687 pr_err("%s: No memory for [%s]\n", __func__, oh->name);
688 return -ENOMEM;
689 }
690
691 /*
692 * Extract the IDs from name field in hwmod database
693 * and use the same for constructing ids' for the
694 * timer devices. In a way, we are avoiding usage of
695 * static variable witin the function to do the same.
696 * CAUTION: We have to be careful and make sure the
697 * name in hwmod database does not change in which case
698 * we might either make corresponding change here or
699 * switch back static variable mechanism.
700 */
701 sscanf(oh->name, "timer%2d", &id);
702
Jon Hunterd1c16912012-06-05 12:34:52 -0500703 if (timer_dev_attr)
704 pdata->timer_capability = timer_dev_attr->timer_capability;
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530705
Jon Hunterbfd6d022012-09-27 12:47:43 -0500706 pdata->timer_errata = omap_dm_timer_get_errata();
Tony Lindgren6e740f92012-10-29 15:20:45 -0700707 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
708
Tony Lindgrenc541c152011-10-04 09:47:06 -0700709 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
Benoit Coussonc16ae1e2011-10-04 23:20:41 +0200710 NULL, 0, 0);
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530711
Tony Lindgrenc541c152011-10-04 09:47:06 -0700712 if (IS_ERR(pdev)) {
Tarun Kanti DebBarmac345c8b2011-09-20 17:00:18 +0530713 pr_err("%s: Can't build omap_device for %s: %s.\n",
714 __func__, name, oh->name);
715 ret = -EINVAL;
716 }
717
718 kfree(pdata);
719
720 return ret;
721}
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530722
723/**
724 * omap2_dm_timer_init - top level regular device initialization
725 *
726 * Uses dedicated hwmod api to parse through hwmod database for
727 * given class name and then build and register the timer device.
728 */
729static int __init omap2_dm_timer_init(void)
730{
731 int ret;
732
Jon Hunter9725f442012-05-14 10:41:37 -0500733 /* If dtb is there, the devices will be created dynamically */
734 if (of_have_populated_dt())
735 return -ENODEV;
736
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530737 ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
738 if (unlikely(ret)) {
739 pr_err("%s: device registration failed.\n", __func__);
740 return -EINVAL;
741 }
742
743 return 0;
744}
745arch_initcall(omap2_dm_timer_init);
Vaibhav Hiremath1fe97c82012-05-09 10:07:05 -0700746
747/**
748 * omap2_override_clocksource - clocksource override with user configuration
749 *
750 * Allows user to override default clocksource, using kernel parameter
751 * clocksource="gp_timer" (For all OMAP2PLUS architectures)
752 *
753 * Note that, here we are using same standard kernel parameter "clocksource=",
754 * and not introducing any OMAP specific interface.
755 */
756static int __init omap2_override_clocksource(char *str)
757{
758 if (!str)
759 return 0;
760 /*
761 * For OMAP architecture, we only have two options
762 * - sync_32k (default)
763 * - gp_timer (sys_clk based)
764 */
765 if (!strcmp(str, "gp_timer"))
766 use_gptimer_clksrc = true;
767
768 return 0;
769}
770early_param("clocksource", omap2_override_clocksource);