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Divy Le Ray4d22de32007-01-18 22:04:14 -05001/*
Divy Le Raya02d44a2008-10-13 18:47:30 -07002 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
Divy Le Ray4d22de32007-01-18 22:04:14 -05003 *
Divy Le Ray1d68e932007-01-30 19:44:35 -08004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Divy Le Ray4d22de32007-01-18 22:04:14 -05009 *
Divy Le Ray1d68e932007-01-30 19:44:35 -080010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Divy Le Ray4d22de32007-01-18 22:04:14 -050031 */
32
33/* This file should not be included directly. Include common.h instead. */
34
35#ifndef __T3_ADAPTER_H__
36#define __T3_ADAPTER_H__
37
38#include <linux/pci.h>
39#include <linux/spinlock.h>
40#include <linux/interrupt.h>
41#include <linux/timer.h>
42#include <linux/cache.h>
Divy Le Raya13fbee2007-01-30 19:44:29 -080043#include <linux/mutex.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070044#include <linux/bitops.h>
Divy Le Ray4d22de32007-01-18 22:04:14 -050045#include "t3cdev.h"
Divy Le Ray4d22de32007-01-18 22:04:14 -050046#include <asm/io.h>
47
Divy Le Ray4d22de32007-01-18 22:04:14 -050048struct vlan_group;
Divy Le Ray5fbf8162007-08-29 19:15:47 -070049struct adapter;
Stephen Hemmingerbea33482007-10-03 16:41:36 -070050struct sge_qset;
51
Roland Dreier47fd23f2009-01-11 00:19:36 -080052enum { /* rx_offload flags */
53 T3_RX_CSUM = 1 << 0,
54 T3_LRO = 1 << 1,
55};
56
Divy Le Ray4d22de32007-01-18 22:04:14 -050057struct port_info {
Divy Le Ray5fbf8162007-08-29 19:15:47 -070058 struct adapter *adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -050059 struct vlan_group *vlan_grp;
Stephen Hemmingerbea33482007-10-03 16:41:36 -070060 struct sge_qset *qs;
Divy Le Ray4d22de32007-01-18 22:04:14 -050061 u8 port_id;
Roland Dreier47fd23f2009-01-11 00:19:36 -080062 u8 rx_offload;
Divy Le Ray4d22de32007-01-18 22:04:14 -050063 u8 nqsets;
64 u8 first_qset;
65 struct cphy phy;
66 struct cmac mac;
67 struct link_config link_config;
68 struct net_device_stats netstats;
69 int activity;
Karen Xiea109a5b2008-12-18 22:56:20 -080070 __be32 iscsi_ipv4addr;
Divy Le Raybf792092009-03-12 21:14:19 +000071
72 int link_fault; /* link fault was detected */
Divy Le Ray4d22de32007-01-18 22:04:14 -050073};
74
75enum { /* adapter flags */
76 FULL_INIT_DONE = (1 << 0),
77 USING_MSI = (1 << 1),
78 USING_MSIX = (1 << 2),
Divy Le Ray14ab9892007-01-30 19:43:50 -080079 QUEUES_BOUND = (1 << 3),
Divy Le Rayb8819552007-12-17 18:47:31 -080080 TP_PARITY_INIT = (1 << 4),
Divy Le Ray48c4b6d2008-05-06 19:25:56 -070081 NAPI_INIT = (1 << 5),
Divy Le Ray4d22de32007-01-18 22:04:14 -050082};
83
Divy Le Raycf992af2007-05-30 21:10:47 -070084struct fl_pg_chunk {
85 struct page *page;
86 void *va;
87 unsigned int offset;
88};
89
Divy Le Ray4d22de32007-01-18 22:04:14 -050090struct rx_desc;
91struct rx_sw_desc;
92
Divy Le Raycf992af2007-05-30 21:10:47 -070093struct sge_fl { /* SGE per free-buffer list state */
94 unsigned int buf_size; /* size of each Rx buffer */
95 unsigned int credits; /* # of available Rx buffers */
Divy Le Ray26b38712009-03-12 21:13:43 +000096 unsigned int pend_cred; /* new buffers since last FL DB ring */
Divy Le Raycf992af2007-05-30 21:10:47 -070097 unsigned int size; /* capacity of free list */
98 unsigned int cidx; /* consumer index */
99 unsigned int pidx; /* producer index */
100 unsigned int gen; /* free list generation */
101 struct fl_pg_chunk pg_chunk;/* page chunk cache */
102 unsigned int use_pages; /* whether FL uses pages or sk_buffs */
Divy Le Ray7385ecf2008-05-21 18:56:21 -0700103 unsigned int order; /* order of page allocations */
Divy Le Raycf992af2007-05-30 21:10:47 -0700104 struct rx_desc *desc; /* address of HW Rx descriptor ring */
105 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
106 dma_addr_t phys_addr; /* physical address of HW ring start */
107 unsigned int cntxt_id; /* SGE context id for the free list */
108 unsigned long empty; /* # of times queue ran out of buffers */
Divy Le Raye0994eb2007-02-24 16:44:17 -0800109 unsigned long alloc_failed; /* # of times buffer allocation failed */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500110};
111
112/*
113 * Bundle size for grouping offload RX packets for delivery to the stack.
114 * Don't make this too big as we do prefetch on each packet in a bundle.
115 */
116# define RX_BUNDLE_SIZE 8
117
118struct rsp_desc;
119
120struct sge_rspq { /* state for an SGE response queue */
121 unsigned int credits; /* # of pending response credits */
122 unsigned int size; /* capacity of response queue */
123 unsigned int cidx; /* consumer index */
124 unsigned int gen; /* current generation bit */
125 unsigned int polling; /* is the queue serviced through NAPI? */
126 unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */
127 unsigned int next_holdoff; /* holdoff time for next interrupt */
Divy Le Ray7385ecf2008-05-21 18:56:21 -0700128 unsigned int rx_recycle_buf; /* whether recycling occurred
129 within current sop-eop */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500130 struct rsp_desc *desc; /* address of HW response ring */
131 dma_addr_t phys_addr; /* physical address of the ring */
132 unsigned int cntxt_id; /* SGE context id for the response q */
133 spinlock_t lock; /* guards response processing */
David S. Miller147e70e2008-09-22 01:29:52 -0700134 struct sk_buff_head rx_queue; /* offload packet receive queue */
Divy Le Ray7385ecf2008-05-21 18:56:21 -0700135 struct sk_buff *pg_skb; /* used to build frag list in napi handler */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500136
137 unsigned long offload_pkts;
138 unsigned long offload_bundles;
139 unsigned long eth_pkts; /* # of ethernet packets */
140 unsigned long pure_rsps; /* # of pure (non-data) responses */
141 unsigned long imm_data; /* responses with immediate data */
142 unsigned long rx_drops; /* # of packets dropped due to no mem */
143 unsigned long async_notif; /* # of asynchronous notification events */
144 unsigned long empty; /* # of times queue ran out of credits */
145 unsigned long nomem; /* # of responses deferred due to no mem */
146 unsigned long unhandled_irqs; /* # of spurious intrs */
Divy Le Raybae73f42007-02-24 16:44:12 -0800147 unsigned long starved;
148 unsigned long restarted;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500149};
150
151struct tx_desc;
152struct tx_sw_desc;
153
154struct sge_txq { /* state for an SGE Tx queue */
155 unsigned long flags; /* HW DMA fetch status */
156 unsigned int in_use; /* # of in-use Tx descriptors */
157 unsigned int size; /* # of descriptors */
158 unsigned int processed; /* total # of descs HW has processed */
159 unsigned int cleaned; /* total # of descs SW has reclaimed */
160 unsigned int stop_thres; /* SW TX queue suspend threshold */
161 unsigned int cidx; /* consumer index */
162 unsigned int pidx; /* producer index */
163 unsigned int gen; /* current value of generation bit */
164 unsigned int unacked; /* Tx descriptors used since last COMPL */
165 struct tx_desc *desc; /* address of HW Tx descriptor ring */
166 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
167 spinlock_t lock; /* guards enqueueing of new packets */
168 unsigned int token; /* WR token */
169 dma_addr_t phys_addr; /* physical address of the ring */
170 struct sk_buff_head sendq; /* List of backpressured offload packets */
171 struct tasklet_struct qresume_tsk; /* restarts the queue */
172 unsigned int cntxt_id; /* SGE context id for the Tx q */
173 unsigned long stops; /* # of times q has been stopped */
174 unsigned long restarts; /* # of queue restarts */
175};
176
177enum { /* per port SGE statistics */
178 SGE_PSTAT_TSO, /* # of TSO requests */
179 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
180 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
181 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
182 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
183
184 SGE_PSTAT_MAX /* must be last */
185};
186
Herbert Xu7be2df42009-01-21 14:39:13 -0800187struct napi_gro_fraginfo;
Divy Le Rayb47385b2008-05-21 18:56:26 -0700188
Divy Le Ray4d22de32007-01-18 22:04:14 -0500189struct sge_qset { /* an SGE queue set */
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700190 struct adapter *adap;
191 struct napi_struct napi;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500192 struct sge_rspq rspq;
193 struct sge_fl fl[SGE_RXQ_PER_SET];
194 struct sge_txq txq[SGE_TXQ_PER_SET];
Herbert Xu7be2df42009-01-21 14:39:13 -0800195 struct napi_gro_fraginfo lro_frag_tbl;
Divy Le Rayb47385b2008-05-21 18:56:26 -0700196 int lro_enabled;
Divy Le Rayb47385b2008-05-21 18:56:26 -0700197 void *lro_va;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700198 struct net_device *netdev;
Divy Le Ray82ad3322008-12-16 01:09:39 -0800199 struct netdev_queue *tx_q; /* associated netdev TX queue */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500200 unsigned long txq_stopped; /* which Tx queues are stopped */
201 struct timer_list tx_reclaim_timer; /* reclaims TX buffers */
Divy Le Ray42c8ea12009-03-12 21:14:04 +0000202 struct timer_list rx_reclaim_timer; /* reclaims RX buffers */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500203 unsigned long port_stats[SGE_PSTAT_MAX];
204} ____cacheline_aligned;
205
206struct sge {
207 struct sge_qset qs[SGE_QSETS];
208 spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */
209};
210
211struct adapter {
212 struct t3cdev tdev;
213 struct list_head adapter_list;
214 void __iomem *regs;
215 struct pci_dev *pdev;
216 unsigned long registered_device_map;
217 unsigned long open_device_map;
218 unsigned long flags;
219
220 const char *name;
221 int msg_enable;
222 unsigned int mmio_len;
223
224 struct adapter_params params;
225 unsigned int slow_intr_mask;
226 unsigned long irq_stats[IRQ_NUM_STATS];
227
Divy Le Ray5cda9362009-01-18 21:29:40 -0800228 int msix_nvectors;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500229 struct {
230 unsigned short vec;
231 char desc[22];
232 } msix_info[SGE_QSETS + 1];
233
234 /* T3 modules */
235 struct sge sge;
236 struct mc7 pmrx;
237 struct mc7 pmtx;
238 struct mc7 cm;
239 struct mc5 mc5;
240
241 struct net_device *port[MAX_NPORTS];
242 unsigned int check_task_cnt;
243 struct delayed_work adap_check_task;
244 struct work_struct ext_intr_handler_task;
Divy Le Ray20d3fc12008-10-08 17:36:03 -0700245 struct work_struct fatal_error_handler_task;
Divy Le Raybf792092009-03-12 21:14:19 +0000246 struct work_struct link_fault_handler_task;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500247
Divy Le Ray4d22de32007-01-18 22:04:14 -0500248 struct dentry *debugfs_root;
249
250 struct mutex mdio_lock;
251 spinlock_t stats_lock;
252 spinlock_t work_lock;
253};
254
255static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
256{
257 u32 val = readl(adapter->regs + reg_addr);
258
259 CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
260 return val;
261}
262
263static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
264{
265 CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
266 writel(val, adapter->regs + reg_addr);
267}
268
269static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
270{
271 return netdev_priv(adap->port[idx]);
272}
273
Divy Le Ray4d22de32007-01-18 22:04:14 -0500274#define OFFLOAD_DEVMAP_BIT 15
275
276#define tdev2adap(d) container_of(d, struct adapter, tdev)
277
278static inline int offload_running(struct adapter *adapter)
279{
280 return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
281}
282
283int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
284
285void t3_os_ext_intr_handler(struct adapter *adapter);
286void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
287 int speed, int duplex, int fc);
Divy Le Ray04497982008-10-08 17:38:29 -0700288void t3_os_phymod_changed(struct adapter *adap, int port_id);
Divy Le Raybf792092009-03-12 21:14:19 +0000289void t3_os_link_fault(struct adapter *adapter, int port_id, int state);
290void t3_os_link_fault_handler(struct adapter *adapter, int port_id);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500291
292void t3_sge_start(struct adapter *adap);
293void t3_sge_stop(struct adapter *adap);
Divy Le Ray0ca41c02008-09-25 14:05:28 +0000294void t3_stop_sge_timers(struct adapter *adap);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500295void t3_free_sge_resources(struct adapter *adap);
296void t3_sge_err_intr_handler(struct adapter *adapter);
Jeff Garzik7c239972007-10-19 03:12:20 -0400297irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500298int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
Divy Le Ray14ab9892007-01-30 19:43:50 -0800299int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500300void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
301int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
302 int irq_vec_idx, const struct qset_params *p,
Divy Le Ray82ad3322008-12-16 01:09:39 -0800303 int ntxq, struct net_device *dev,
304 struct netdev_queue *netdevq);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500305int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
306 unsigned char *data);
307irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
308
309#endif /* __T3_ADAPTER_H__ */