blob: 69cf7241c3e0633f243c3c1a754c0582857273e6 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Chris Wilson2e88e402010-08-07 11:01:27 +010053static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080054 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Keith Packardf9c10a92009-05-30 12:16:25 -070068 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080069
70 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070071 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080072
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Active outputs controlled by this SDVO output */
74 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /*
77 * Capabilities of the SDVO device returned by
78 * i830_sdvo_get_capabilities()
79 */
Jesse Barnes79e53942008-11-07 14:24:08 -080080 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081
82 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 int pixel_clock_min, pixel_clock_max;
84
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080085 /*
86 * For multiple function SDVO device,
87 * this is for current attached outputs.
88 */
89 uint16_t attached_output;
90
Jesse Barnese2f0ba92009-02-02 15:11:52 -080091 /**
92 * This is set if we're going to treat the device as TV-out.
93 *
94 * While we have these nice friendly flags for output types that ought
95 * to decide this for us, the S-Video output on our HDMI+S-Video card
96 * shows up as RGB1 (VGA).
97 */
98 bool is_tv;
99
Zhao Yakuice6feab2009-08-24 13:50:26 +0800100 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100101 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800102
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800103 /**
104 * This is set if we treat the device as HDMI, instead of DVI.
105 */
106 bool is_hdmi;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800107
Ma Ling7086c872009-05-13 11:20:06 +0800108 /**
109 * This is set if we detect output of sdvo device as LVDS.
110 */
111 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800112
113 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800114 * This is sdvo flags for input timing.
115 */
116 uint8_t sdvo_flags;
117
118 /**
119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /*
124 * supported encoding mode, used to determine whether HDMI is
125 * supported
126 */
127 struct intel_sdvo_encode encode;
128
Eric Anholtc751ce42010-03-25 11:48:48 -0700129 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800130 uint8_t ddc_bus;
131
Keith Packard57cdaf92009-09-04 13:07:54 +0800132 /* Mac mini hack -- use the same DDC as the analog connector */
133 struct i2c_adapter *analog_ddc_bus;
134
Zhenyu Wang14571b42010-03-30 14:06:33 +0800135};
136
137struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100138 struct intel_connector base;
139
Zhenyu Wang14571b42010-03-30 14:06:33 +0800140 /* Mark the type of connector */
141 uint16_t output_flag;
142
143 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100144 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800145 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100146 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147
Zhao Yakuib9219c52009-09-10 15:45:46 +0800148 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100149 struct drm_property *left;
150 struct drm_property *right;
151 struct drm_property *top;
152 struct drm_property *bottom;
153 struct drm_property *hpos;
154 struct drm_property *vpos;
155 struct drm_property *contrast;
156 struct drm_property *saturation;
157 struct drm_property *hue;
158 struct drm_property *sharpness;
159 struct drm_property *flicker_filter;
160 struct drm_property *flicker_filter_adaptive;
161 struct drm_property *flicker_filter_2d;
162 struct drm_property *tv_chroma_filter;
163 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100164 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800165
166 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100167 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800168
169 /* Add variable to record current setting for the above property */
170 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100171
Zhao Yakuib9219c52009-09-10 15:45:46 +0800172 /* this is to get the range of margin.*/
173 u32 max_hscan, max_vscan;
174 u32 max_hpos, cur_hpos;
175 u32 max_vpos, cur_vpos;
176 u32 cur_brightness, max_brightness;
177 u32 cur_contrast, max_contrast;
178 u32 cur_saturation, max_saturation;
179 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100180 u32 cur_sharpness, max_sharpness;
181 u32 cur_flicker_filter, max_flicker_filter;
182 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
183 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
184 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
185 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100186 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800187};
188
Chris Wilsonea5b2132010-08-04 13:50:23 +0100189static struct intel_sdvo *enc_to_intel_sdvo(struct drm_encoder *encoder)
190{
191 return container_of(enc_to_intel_encoder(encoder), struct intel_sdvo, base);
192}
193
Chris Wilson615fb932010-08-04 13:50:24 +0100194static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
195{
196 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
197}
198
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800199static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100200intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100201static bool
202intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
203 struct intel_sdvo_connector *intel_sdvo_connector,
204 int type);
205static bool
206intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800208
Jesse Barnes79e53942008-11-07 14:24:08 -0800209/**
210 * Writes the SDVOB or SDVOC with the given value, but always writes both
211 * SDVOB and SDVOC to work around apparent hardware issues (according to
212 * comments in the BIOS).
213 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100214static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800215{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100216 struct drm_device *dev = intel_sdvo->base.enc.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800217 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800218 u32 bval = val, cval = val;
219 int i;
220
Chris Wilsonea5b2132010-08-04 13:50:23 +0100221 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
222 I915_WRITE(intel_sdvo->sdvo_reg, val);
223 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800224 return;
225 }
226
Chris Wilsonea5b2132010-08-04 13:50:23 +0100227 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800228 cval = I915_READ(SDVOC);
229 } else {
230 bval = I915_READ(SDVOB);
231 }
232 /*
233 * Write the registers twice for luck. Sometimes,
234 * writing them only once doesn't appear to 'stick'.
235 * The BIOS does this too. Yay, magic
236 */
237 for (i = 0; i < 2; i++)
238 {
239 I915_WRITE(SDVOB, bval);
240 I915_READ(SDVOB);
241 I915_WRITE(SDVOC, cval);
242 I915_READ(SDVOC);
243 }
244}
245
Chris Wilson32aad862010-08-04 13:50:25 +0100246static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800247{
Chris Wilson32aad862010-08-04 13:50:25 +0100248 u8 out_buf[2] = { addr, 0 };
Jesse Barnes79e53942008-11-07 14:24:08 -0800249 u8 buf[2];
Jesse Barnes79e53942008-11-07 14:24:08 -0800250 struct i2c_msg msgs[] = {
251 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100252 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800253 .flags = 0,
254 .len = 1,
255 .buf = out_buf,
256 },
257 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100258 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 .flags = I2C_M_RD,
260 .len = 1,
261 .buf = buf,
262 }
263 };
Chris Wilson32aad862010-08-04 13:50:25 +0100264 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800265
Chris Wilsonea5b2132010-08-04 13:50:23 +0100266 if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 {
268 *ch = buf[0];
269 return true;
270 }
271
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800272 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 return false;
274}
275
Chris Wilson32aad862010-08-04 13:50:25 +0100276static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800277{
Chris Wilson32aad862010-08-04 13:50:25 +0100278 u8 out_buf[2] = { addr, ch };
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 struct i2c_msg msgs[] = {
280 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100281 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800282 .flags = 0,
283 .len = 2,
284 .buf = out_buf,
285 }
286 };
287
Chris Wilson32aad862010-08-04 13:50:25 +0100288 return i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800289}
290
291#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100293static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800294 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100295 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800296} sdvo_cmd_names[] = {
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100340
Zhao Yakuib9219c52009-09-10 15:45:46 +0800341 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
386
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800408};
409
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800410#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100411#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800412
Chris Wilsonea5b2132010-08-04 13:50:23 +0100413static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100414 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800415{
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 int i;
417
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800418 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100419 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800423 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400424 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800425 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800427 break;
428 }
429 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400430 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800431 DRM_LOG_KMS("(%02X)", cmd);
432 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800433}
Jesse Barnes79e53942008-11-07 14:24:08 -0800434
Chris Wilson32aad862010-08-04 13:50:25 +0100435static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
436 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800437{
438 int i;
439
Chris Wilsonea5b2132010-08-04 13:50:23 +0100440 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
Jesse Barnes79e53942008-11-07 14:24:08 -0800441
442 for (i = 0; i < args_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100443 if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
444 ((u8*)args)[i]))
445 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800446 }
447
Chris Wilson32aad862010-08-04 13:50:25 +0100448 return intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800449}
450
Jesse Barnes79e53942008-11-07 14:24:08 -0800451static const char *cmd_status_names[] = {
452 "Power on",
453 "Success",
454 "Not supported",
455 "Invalid arg",
456 "Pending",
457 "Target not specified",
458 "Scaling not supported"
459};
460
Chris Wilsonea5b2132010-08-04 13:50:23 +0100461static void intel_sdvo_debug_response(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800462 void *response, int response_len,
463 u8 status)
464{
Zhenyu Wang33b52962009-03-24 14:02:40 +0800465 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800466
Chris Wilsonea5b2132010-08-04 13:50:23 +0100467 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800468 for (i = 0; i < response_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800469 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800470 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800471 DRM_LOG_KMS(" ");
Jesse Barnes79e53942008-11-07 14:24:08 -0800472 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800473 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800474 else
yakui_zhao342dc382009-06-02 14:12:00 +0800475 DRM_LOG_KMS("(??? %d)", status);
476 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800477}
Jesse Barnes79e53942008-11-07 14:24:08 -0800478
Chris Wilson32aad862010-08-04 13:50:25 +0100479static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
480 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800481{
482 int i;
483 u8 status;
484 u8 retry = 50;
485
486 while (retry--) {
487 /* Read the command response */
488 for (i = 0; i < response_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100489 if (!intel_sdvo_read_byte(intel_sdvo,
490 SDVO_I2C_RETURN_0 + i,
491 &((u8 *)response)[i]))
492 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800493 }
494
495 /* read the return status */
Chris Wilson32aad862010-08-04 13:50:25 +0100496 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS,
497 &status))
498 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800499
Chris Wilsonea5b2132010-08-04 13:50:23 +0100500 intel_sdvo_debug_response(intel_sdvo, response, response_len,
Jesse Barnes79e53942008-11-07 14:24:08 -0800501 status);
502 if (status != SDVO_CMD_STATUS_PENDING)
Chris Wilson32aad862010-08-04 13:50:25 +0100503 break;
Jesse Barnes79e53942008-11-07 14:24:08 -0800504
505 mdelay(50);
506 }
507
Chris Wilson32aad862010-08-04 13:50:25 +0100508 return status == SDVO_CMD_STATUS_SUCCESS;
Jesse Barnes79e53942008-11-07 14:24:08 -0800509}
510
Hannes Ederb358d0a2008-12-18 21:18:47 +0100511static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800512{
513 if (mode->clock >= 100000)
514 return 1;
515 else if (mode->clock >= 50000)
516 return 2;
517 else
518 return 4;
519}
520
521/**
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800522 * Try to read the response after issuie the DDC switch command. But it
523 * is noted that we must do the action of reading response and issuing DDC
524 * switch command in one I2C transaction. Otherwise when we try to start
525 * another I2C transaction after issuing the DDC bus switch, it will be
526 * switched to the internal SDVO register.
Jesse Barnes79e53942008-11-07 14:24:08 -0800527 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100528static void intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
Hannes Ederb358d0a2008-12-18 21:18:47 +0100529 u8 target)
Jesse Barnes79e53942008-11-07 14:24:08 -0800530{
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800531 u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
532 struct i2c_msg msgs[] = {
533 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100534 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800535 .flags = 0,
536 .len = 2,
537 .buf = out_buf,
538 },
539 /* the following two are to read the response */
540 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100541 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800542 .flags = 0,
543 .len = 1,
544 .buf = cmd_buf,
545 },
546 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100547 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800548 .flags = I2C_M_RD,
549 .len = 1,
550 .buf = ret_value,
551 },
552 };
553
Chris Wilsonea5b2132010-08-04 13:50:23 +0100554 intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800555 &target, 1);
556 /* write the DDC switch command argument */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100557 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800558
559 out_buf[0] = SDVO_I2C_OPCODE;
560 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
561 cmd_buf[0] = SDVO_I2C_CMD_STATUS;
562 cmd_buf[1] = 0;
563 ret_value[0] = 0;
564 ret_value[1] = 0;
565
Chris Wilsonea5b2132010-08-04 13:50:23 +0100566 ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800567 if (ret != 3) {
568 /* failure in I2C transfer */
569 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
570 return;
571 }
572 if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
573 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
574 ret_value[0]);
575 return;
576 }
577 return;
Jesse Barnes79e53942008-11-07 14:24:08 -0800578}
579
Chris Wilson32aad862010-08-04 13:50:25 +0100580static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
581{
582 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
583 return false;
584
585 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
586}
587
588static bool
589intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
590{
591 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
592 return false;
593
594 return intel_sdvo_read_response(intel_sdvo, value, len);
595}
596
597static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800598{
599 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100600 return intel_sdvo_set_value(intel_sdvo,
601 SDVO_CMD_SET_TARGET_INPUT,
602 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800603}
604
605/**
606 * Return whether each input is trained.
607 *
608 * This function is making an assumption about the layout of the response,
609 * which should be checked against the docs.
610 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100611static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800612{
613 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800614
Chris Wilson32aad862010-08-04 13:50:25 +0100615 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
616 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800617 return false;
618
619 *input_1 = response.input0_trained;
620 *input_2 = response.input1_trained;
621 return true;
622}
623
Chris Wilsonea5b2132010-08-04 13:50:23 +0100624static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800625 u16 outputs)
626{
Chris Wilson32aad862010-08-04 13:50:25 +0100627 return intel_sdvo_set_value(intel_sdvo,
628 SDVO_CMD_SET_ACTIVE_OUTPUTS,
629 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800630}
631
Chris Wilsonea5b2132010-08-04 13:50:23 +0100632static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800633 int mode)
634{
Chris Wilson32aad862010-08-04 13:50:25 +0100635 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800636
637 switch (mode) {
638 case DRM_MODE_DPMS_ON:
639 state = SDVO_ENCODER_STATE_ON;
640 break;
641 case DRM_MODE_DPMS_STANDBY:
642 state = SDVO_ENCODER_STATE_STANDBY;
643 break;
644 case DRM_MODE_DPMS_SUSPEND:
645 state = SDVO_ENCODER_STATE_SUSPEND;
646 break;
647 case DRM_MODE_DPMS_OFF:
648 state = SDVO_ENCODER_STATE_OFF;
649 break;
650 }
651
Chris Wilson32aad862010-08-04 13:50:25 +0100652 return intel_sdvo_set_value(intel_sdvo,
653 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800654}
655
Chris Wilsonea5b2132010-08-04 13:50:23 +0100656static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800657 int *clock_min,
658 int *clock_max)
659{
660 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800661
Chris Wilson32aad862010-08-04 13:50:25 +0100662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 return true;
671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 u16 outputs)
675{
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800679}
680
Chris Wilsonea5b2132010-08-04 13:50:23 +0100681static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 struct intel_sdvo_dtd *dtd)
683{
Chris Wilson32aad862010-08-04 13:50:25 +0100684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700}
701
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707{
708 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800710 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 args.clock = clock;
712 args.width = width;
713 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800714 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800715
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800719 args.scaled = 1;
720
Chris Wilson32aad862010-08-04 13:50:25 +0100721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724}
725
Chris Wilsonea5b2132010-08-04 13:50:23 +0100726static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727 struct intel_sdvo_dtd *dtd)
728{
Chris Wilson32aad862010-08-04 13:50:25 +0100729 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
730 &dtd->part1, sizeof(dtd->part1)) &&
731 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
732 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800733}
Jesse Barnes79e53942008-11-07 14:24:08 -0800734
Chris Wilsonea5b2132010-08-04 13:50:23 +0100735static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800736{
Chris Wilson32aad862010-08-04 13:50:25 +0100737 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800738}
739
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800740static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100741 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800742{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800743 uint16_t width, height;
744 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
745 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800746
747 width = mode->crtc_hdisplay;
748 height = mode->crtc_vdisplay;
749
750 /* do some mode translations */
751 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
752 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
753
754 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
755 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
756
757 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
758 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
759
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800760 dtd->part1.clock = mode->clock / 10;
761 dtd->part1.h_active = width & 0xff;
762 dtd->part1.h_blank = h_blank_len & 0xff;
763 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800764 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 dtd->part1.v_active = height & 0xff;
766 dtd->part1.v_blank = v_blank_len & 0xff;
767 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800768 ((v_blank_len >> 8) & 0xf);
769
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800770 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771 dtd->part2.h_sync_width = h_sync_len & 0xff;
772 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800773 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800774 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800775 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
776 ((v_sync_len & 0x30) >> 4);
777
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800779 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800780 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800781 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800782 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800783
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800784 dtd->part2.sdvo_flags = 0;
785 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
786 dtd->part2.reserved = 0;
787}
Jesse Barnes79e53942008-11-07 14:24:08 -0800788
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800789static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100790 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800791{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800792 mode->hdisplay = dtd->part1.h_active;
793 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
794 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800795 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
797 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
798 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
799 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
800
801 mode->vdisplay = dtd->part1.v_active;
802 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
803 mode->vsync_start = mode->vdisplay;
804 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800805 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800806 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
807 mode->vsync_end = mode->vsync_start +
808 (dtd->part2.v_sync_off_width & 0xf);
809 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
810 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
811 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
812
813 mode->clock = dtd->part1.clock * 10;
814
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800815 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800816 if (dtd->part2.dtd_flags & 0x2)
817 mode->flags |= DRM_MODE_FLAG_PHSYNC;
818 if (dtd->part2.dtd_flags & 0x4)
819 mode->flags |= DRM_MODE_FLAG_PVSYNC;
820}
821
Chris Wilsonea5b2132010-08-04 13:50:23 +0100822static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800823 struct intel_sdvo_encode *encode)
824{
Chris Wilson32aad862010-08-04 13:50:25 +0100825 if (intel_sdvo_get_value(intel_sdvo,
826 SDVO_CMD_GET_SUPP_ENCODE,
827 encode, sizeof(*encode)))
828 return true;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829
Chris Wilson32aad862010-08-04 13:50:25 +0100830 /* non-support means DVI */
831 memset(encode, 0, sizeof(*encode));
832 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800833}
834
Chris Wilsonea5b2132010-08-04 13:50:23 +0100835static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700836 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800837{
Chris Wilson32aad862010-08-04 13:50:25 +0100838 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800839}
840
Chris Wilsonea5b2132010-08-04 13:50:23 +0100841static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 uint8_t mode)
843{
Chris Wilson32aad862010-08-04 13:50:25 +0100844 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845}
846
847#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100848static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849{
850 int i, j;
851 uint8_t set_buf_index[2];
852 uint8_t av_split;
853 uint8_t buf_size;
854 uint8_t buf[48];
855 uint8_t *pos;
856
Chris Wilson32aad862010-08-04 13:50:25 +0100857 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800858
859 for (i = 0; i <= av_split; i++) {
860 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700861 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700863 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
864 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800865
866 pos = buf;
867 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700868 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800869 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700870 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800871 pos += 8;
872 }
873 }
874}
875#endif
876
Chris Wilson32aad862010-08-04 13:50:25 +0100877static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700878 int index,
879 uint8_t *data, int8_t size, uint8_t tx_rate)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800880{
881 uint8_t set_buf_index[2];
882
883 set_buf_index[0] = index;
884 set_buf_index[1] = 0;
885
Chris Wilson32aad862010-08-04 13:50:25 +0100886 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
887 set_buf_index, 2))
888 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800889
890 for (; size > 0; size -= 8) {
Chris Wilson32aad862010-08-04 13:50:25 +0100891 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
892 return false;
893
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800894 data += 8;
895 }
896
Chris Wilson32aad862010-08-04 13:50:25 +0100897 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800898}
899
900static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
901{
902 uint8_t csum = 0;
903 int i;
904
905 for (i = 0; i < size; i++)
906 csum += data[i];
907
908 return 0x100 - csum;
909}
910
911#define DIP_TYPE_AVI 0x82
912#define DIP_VERSION_AVI 0x2
913#define DIP_LEN_AVI 13
914
915struct dip_infoframe {
916 uint8_t type;
917 uint8_t version;
918 uint8_t len;
919 uint8_t checksum;
920 union {
921 struct {
922 /* Packet Byte #1 */
923 uint8_t S:2;
924 uint8_t B:2;
925 uint8_t A:1;
926 uint8_t Y:2;
927 uint8_t rsvd1:1;
928 /* Packet Byte #2 */
929 uint8_t R:4;
930 uint8_t M:2;
931 uint8_t C:2;
932 /* Packet Byte #3 */
933 uint8_t SC:2;
934 uint8_t Q:2;
935 uint8_t EC:3;
936 uint8_t ITC:1;
937 /* Packet Byte #4 */
938 uint8_t VIC:7;
939 uint8_t rsvd2:1;
940 /* Packet Byte #5 */
941 uint8_t PR:4;
942 uint8_t rsvd3:4;
943 /* Packet Byte #6~13 */
944 uint16_t top_bar_end;
945 uint16_t bottom_bar_start;
946 uint16_t left_bar_end;
947 uint16_t right_bar_start;
948 } avi;
949 struct {
950 /* Packet Byte #1 */
951 uint8_t channel_count:3;
952 uint8_t rsvd1:1;
953 uint8_t coding_type:4;
954 /* Packet Byte #2 */
955 uint8_t sample_size:2; /* SS0, SS1 */
956 uint8_t sample_frequency:3;
957 uint8_t rsvd2:3;
958 /* Packet Byte #3 */
959 uint8_t coding_type_private:5;
960 uint8_t rsvd3:3;
961 /* Packet Byte #4 */
962 uint8_t channel_allocation;
963 /* Packet Byte #5 */
964 uint8_t rsvd4:3;
965 uint8_t level_shift:4;
966 uint8_t downmix_inhibit:1;
967 } audio;
968 uint8_t payload[28];
969 } __attribute__ ((packed)) u;
970} __attribute__((packed));
971
Chris Wilson32aad862010-08-04 13:50:25 +0100972static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800973 struct drm_display_mode * mode)
974{
975 struct dip_infoframe avi_if = {
976 .type = DIP_TYPE_AVI,
977 .version = DIP_VERSION_AVI,
978 .len = DIP_LEN_AVI,
979 };
980
981 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
982 4 + avi_if.len);
Chris Wilson32aad862010-08-04 13:50:25 +0100983 return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
984 4 + avi_if.len,
985 SDVO_HBUF_TX_VSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800986}
987
Chris Wilson32aad862010-08-04 13:50:25 +0100988static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800989{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800990 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100991 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800992
Chris Wilson40039752010-08-04 13:50:26 +0100993 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800994 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100995 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800996
Chris Wilson32aad862010-08-04 13:50:25 +0100997 BUILD_BUG_ON(sizeof(format) != 6);
998 return intel_sdvo_set_value(intel_sdvo,
999 SDVO_CMD_SET_TV_FORMAT,
1000 &format, sizeof(format));
1001}
Zhao Yakuice6feab2009-08-24 13:50:26 +08001002
Chris Wilson32aad862010-08-04 13:50:25 +01001003static bool
1004intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1005 struct drm_display_mode *mode)
1006{
1007 struct intel_sdvo_dtd output_dtd;
1008
1009 if (!intel_sdvo_set_target_output(intel_sdvo,
1010 intel_sdvo->attached_output))
1011 return false;
1012
1013 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1014 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1015 return false;
1016
1017 return true;
1018}
1019
1020static bool
1021intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
1022 struct drm_display_mode *mode,
1023 struct drm_display_mode *adjusted_mode)
1024{
1025 struct intel_sdvo_dtd input_dtd;
1026
1027 /* Reset the input timing to the screen. Assume always input 0. */
1028 if (!intel_sdvo_set_target_input(intel_sdvo))
1029 return false;
1030
1031 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1032 mode->clock / 10,
1033 mode->hdisplay,
1034 mode->vdisplay))
1035 return false;
1036
1037 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1038 &input_dtd))
1039 return false;
1040
1041 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1042 intel_sdvo->sdvo_flags = input_dtd.part2.sdvo_flags;
1043
1044 drm_mode_set_crtcinfo(adjusted_mode, 0);
1045 mode->clock = adjusted_mode->clock;
1046 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001047}
1048
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001049static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1050 struct drm_display_mode *mode,
1051 struct drm_display_mode *adjusted_mode)
1052{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001053 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001054
Chris Wilson32aad862010-08-04 13:50:25 +01001055 /* We need to construct preferred input timings based on our
1056 * output timings. To do that, we have to set the output
1057 * timings, even though this isn't really the right place in
1058 * the sequence to do it. Oh well.
1059 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001060 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001061 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001062 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001063
1064 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1065 return false;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001066 } else if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001067 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 0);
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001068
Chris Wilson32aad862010-08-04 13:50:25 +01001069 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1070 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001071 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001072
Chris Wilson32aad862010-08-04 13:50:25 +01001073 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1074 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001075 }
Chris Wilson32aad862010-08-04 13:50:25 +01001076
1077 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1078 * SDVO device will be told of the multiplier during mode_set.
1079 */
1080 adjusted_mode->clock *= intel_sdvo_get_pixel_multiplier(mode);
1081
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001082 return true;
1083}
1084
1085static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1086 struct drm_display_mode *mode,
1087 struct drm_display_mode *adjusted_mode)
1088{
1089 struct drm_device *dev = encoder->dev;
1090 struct drm_i915_private *dev_priv = dev->dev_private;
1091 struct drm_crtc *crtc = encoder->crtc;
1092 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001093 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001094 u32 sdvox = 0;
Chris Wilson32aad862010-08-04 13:50:25 +01001095 int sdvo_pixel_multiply, rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001096 struct intel_sdvo_in_out_map in_out;
1097 struct intel_sdvo_dtd input_dtd;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001098
1099 if (!mode)
1100 return;
1101
1102 /* First, set the input mapping for the first input to our controlled
1103 * output. This is only correct if we're a single-input device, in
1104 * which case the first input is the output from the appropriate SDVO
1105 * channel on the motherboard. In a two-input device, the first input
1106 * will be SDVOB and the second SDVOC.
1107 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001108 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001109 in_out.in1 = 0;
1110
Chris Wilson32aad862010-08-04 13:50:25 +01001111 if (!intel_sdvo_set_value(intel_sdvo,
1112 SDVO_CMD_SET_IN_OUT_MAP,
1113 &in_out, sizeof(in_out)))
1114 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001115
Chris Wilsonea5b2132010-08-04 13:50:23 +01001116 if (intel_sdvo->is_hdmi) {
Chris Wilson32aad862010-08-04 13:50:25 +01001117 if (!intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1118 return;
1119
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001120 sdvox |= SDVO_AUDIO_ENABLE;
1121 }
1122
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001123 /* We have tried to get input timing in mode_fixup, and filled into
1124 adjusted_mode */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001125 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001126 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001127 input_dtd.part2.sdvo_flags = intel_sdvo->sdvo_flags;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001128 } else
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001129 intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001130
1131 /* If it's a TV, we already set the output timing in mode_fixup.
1132 * Otherwise, the output timing is equal to the input timing.
1133 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001134 if (!intel_sdvo->is_tv && !intel_sdvo->is_lvds) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001135 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001136 if (!intel_sdvo_set_target_output(intel_sdvo,
1137 intel_sdvo->attached_output))
1138 return;
1139
1140 if (!intel_sdvo_set_output_timing(intel_sdvo, &input_dtd))
1141 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001142 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001143
1144 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001145 if (!intel_sdvo_set_target_input(intel_sdvo))
1146 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001147
Chris Wilson32aad862010-08-04 13:50:25 +01001148 if (intel_sdvo->is_tv) {
1149 if (!intel_sdvo_set_tv_format(intel_sdvo))
1150 return;
1151 }
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001152
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001153 /* We would like to use intel_sdvo_create_preferred_input_timing() to
Jesse Barnes79e53942008-11-07 14:24:08 -08001154 * provide the device with a timing it can support, if it supports that
1155 * feature. However, presumably we would need to adjust the CRTC to
1156 * output the preferred timing, and we don't support that currently.
1157 */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001158#if 0
Eric Anholtc751ce42010-03-25 11:48:48 -07001159 success = intel_sdvo_create_preferred_input_timing(encoder, clock,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001160 width, height);
1161 if (success) {
1162 struct intel_sdvo_dtd *input_dtd;
1163
Eric Anholtc751ce42010-03-25 11:48:48 -07001164 intel_sdvo_get_preferred_input_timing(encoder, &input_dtd);
1165 intel_sdvo_set_input_timing(encoder, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001166 }
1167#else
Chris Wilson32aad862010-08-04 13:50:25 +01001168 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1169 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001170#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001171
Chris Wilson32aad862010-08-04 13:50:25 +01001172 sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode);
1173 switch (sdvo_pixel_multiply) {
1174 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1175 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1176 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 }
Chris Wilson32aad862010-08-04 13:50:25 +01001178 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1179 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001180
1181 /* Set the SDVO control regs. */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001182 if (IS_I965G(dev)) {
Adam Jackson81a14b42010-07-16 14:46:32 -04001183 sdvox |= SDVO_BORDER_ENABLE;
1184 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1185 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1186 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1187 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001188 } else {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001189 sdvox |= I915_READ(intel_sdvo->sdvo_reg);
1190 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001191 case SDVOB:
1192 sdvox &= SDVOB_PRESERVE_MASK;
1193 break;
1194 case SDVOC:
1195 sdvox &= SDVOC_PRESERVE_MASK;
1196 break;
1197 }
1198 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1199 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001200 if (intel_crtc->pipe == 1)
1201 sdvox |= SDVO_PIPE_B_SELECT;
1202
Jesse Barnes79e53942008-11-07 14:24:08 -08001203 if (IS_I965G(dev)) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001204 /* done in crtc_mode_set as the dpll_md reg must be written early */
1205 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1206 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001207 } else {
1208 sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1209 }
1210
Chris Wilsonea5b2132010-08-04 13:50:23 +01001211 if (intel_sdvo->sdvo_flags & SDVO_NEED_TO_STALL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001212 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001213 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001214}
1215
1216static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1217{
1218 struct drm_device *dev = encoder->dev;
1219 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001220 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001221 u32 temp;
1222
1223 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001224 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001225 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001226 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001227
1228 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001229 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001230 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001231 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001232 }
1233 }
1234 } else {
1235 bool input1, input2;
1236 int i;
1237 u8 status;
1238
Chris Wilsonea5b2132010-08-04 13:50:23 +01001239 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001240 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001241 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001242 for (i = 0; i < 2; i++)
1243 intel_wait_for_vblank(dev);
1244
Chris Wilson32aad862010-08-04 13:50:25 +01001245 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001246 /* Warn if the device reported failure to sync.
1247 * A lot of SDVO devices fail to notify of sync, but it's
1248 * a given it the status is a success, we succeeded.
1249 */
1250 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001251 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001252 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001253 }
1254
1255 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001256 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1257 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001258 }
1259 return;
1260}
1261
Jesse Barnes79e53942008-11-07 14:24:08 -08001262static int intel_sdvo_mode_valid(struct drm_connector *connector,
1263 struct drm_display_mode *mode)
1264{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001265 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001266 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001267
1268 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1269 return MODE_NO_DBLESCAN;
1270
Chris Wilsonea5b2132010-08-04 13:50:23 +01001271 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001272 return MODE_CLOCK_LOW;
1273
Chris Wilsonea5b2132010-08-04 13:50:23 +01001274 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001275 return MODE_CLOCK_HIGH;
1276
Chris Wilsonea5b2132010-08-04 13:50:23 +01001277 if (intel_sdvo->is_lvds == true) {
1278 if (intel_sdvo->sdvo_lvds_fixed_mode == NULL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001279 return MODE_PANEL;
1280
Chris Wilsonea5b2132010-08-04 13:50:23 +01001281 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001282 return MODE_PANEL;
1283
Chris Wilsonea5b2132010-08-04 13:50:23 +01001284 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001285 return MODE_PANEL;
1286 }
1287
Jesse Barnes79e53942008-11-07 14:24:08 -08001288 return MODE_OK;
1289}
1290
Chris Wilsonea5b2132010-08-04 13:50:23 +01001291static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001292{
Chris Wilson32aad862010-08-04 13:50:25 +01001293 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, caps, sizeof(*caps));
Jesse Barnes79e53942008-11-07 14:24:08 -08001294}
1295
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001296/* No use! */
1297#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001298struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1299{
1300 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001301 struct intel_sdvo *iout = NULL;
1302 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001303
1304 /* find the sdvo connector */
1305 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001306 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001307
1308 if (iout->type != INTEL_OUTPUT_SDVO)
1309 continue;
1310
1311 sdvo = iout->dev_priv;
1312
Eric Anholtc751ce42010-03-25 11:48:48 -07001313 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001314 return connector;
1315
Eric Anholtc751ce42010-03-25 11:48:48 -07001316 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001317 return connector;
1318
1319 }
1320
1321 return NULL;
1322}
1323
1324int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1325{
1326 u8 response[2];
1327 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001328 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001329 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001330
1331 if (!connector)
1332 return 0;
1333
Chris Wilsonea5b2132010-08-04 13:50:23 +01001334 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001335
Chris Wilson32aad862010-08-04 13:50:25 +01001336 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1337 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001338}
1339
1340void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1341{
1342 u8 response[2];
1343 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001344 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001345
Chris Wilsonea5b2132010-08-04 13:50:23 +01001346 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1347 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001348
1349 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001350 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1351 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001352
Chris Wilsonea5b2132010-08-04 13:50:23 +01001353 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001354 } else {
1355 response[0] = 0;
1356 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001357 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001358 }
1359
Chris Wilsonea5b2132010-08-04 13:50:23 +01001360 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1361 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001362}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001363#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001364
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001365static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001366intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001367{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001368 int caps = 0;
1369
Chris Wilsonea5b2132010-08-04 13:50:23 +01001370 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001371 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1372 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001373 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001374 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1375 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001376 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001377 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001378 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001379 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001380 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1381 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001382 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001383 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1384 caps++;
1385
Chris Wilsonea5b2132010-08-04 13:50:23 +01001386 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001387 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1388 caps++;
1389
Chris Wilsonea5b2132010-08-04 13:50:23 +01001390 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001391 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1392 caps++;
1393
1394 return (caps > 1);
1395}
1396
Keith Packard57cdaf92009-09-04 13:07:54 +08001397static struct drm_connector *
1398intel_find_analog_connector(struct drm_device *dev)
1399{
1400 struct drm_connector *connector;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001401 struct drm_encoder *encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001402 struct intel_sdvo *intel_sdvo;
Keith Packard57cdaf92009-09-04 13:07:54 +08001403
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001404 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001405 intel_sdvo = enc_to_intel_sdvo(encoder);
1406 if (intel_sdvo->base.type == INTEL_OUTPUT_ANALOG) {
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001407 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Dan Carpenter90a78e82010-05-07 10:40:09 +02001408 if (encoder == intel_attached_encoder(connector))
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001409 return connector;
1410 }
1411 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001412 }
1413 return NULL;
1414}
1415
1416static int
1417intel_analog_is_connected(struct drm_device *dev)
1418{
1419 struct drm_connector *analog_connector;
Keith Packard57cdaf92009-09-04 13:07:54 +08001420
Chris Wilson32aad862010-08-04 13:50:25 +01001421 analog_connector = intel_find_analog_connector(dev);
Keith Packard57cdaf92009-09-04 13:07:54 +08001422 if (!analog_connector)
1423 return false;
1424
1425 if (analog_connector->funcs->detect(analog_connector) ==
1426 connector_status_disconnected)
1427 return false;
1428
1429 return true;
1430}
1431
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001432enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001433intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001434{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001435 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001436 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001437 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001438 enum drm_connector_status status = connector_status_connected;
Ma Ling9dff6af2009-04-02 13:13:26 +08001439 struct edid *edid = NULL;
1440
Chris Wilsonea5b2132010-08-04 13:50:23 +01001441 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Keith Packard57cdaf92009-09-04 13:07:54 +08001442
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001443 /* This is only applied to SDVO cards with multiple outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001444 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001445 uint8_t saved_ddc, temp_ddc;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001446 saved_ddc = intel_sdvo->ddc_bus;
1447 temp_ddc = intel_sdvo->ddc_bus >> 1;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001448 /*
1449 * Don't use the 1 as the argument of DDC bus switch to get
1450 * the EDID. It is used for SDVO SPD ROM.
1451 */
1452 while(temp_ddc > 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001453 intel_sdvo->ddc_bus = temp_ddc;
1454 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001455 if (edid) {
1456 /*
1457 * When we can get the EDID, maybe it is the
1458 * correct DDC bus. Update it.
1459 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001460 intel_sdvo->ddc_bus = temp_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001461 break;
1462 }
1463 temp_ddc >>= 1;
1464 }
1465 if (edid == NULL)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001466 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001467 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001468 /* when there is no edid and no monitor is connected with VGA
1469 * port, try to use the CRT ddc to read the EDID for DVI-connector
1470 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001471 if (edid == NULL && intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001472 !intel_analog_is_connected(connector->dev))
Chris Wilsonea5b2132010-08-04 13:50:23 +01001473 edid = drm_get_edid(connector, intel_sdvo->analog_ddc_bus);
Adam Jackson149c36a2010-04-29 14:05:18 -04001474
Ma Ling9dff6af2009-04-02 13:13:26 +08001475 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001476 bool is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
Chris Wilson615fb932010-08-04 13:50:24 +01001477 bool need_digital = !!(intel_sdvo_connector->output_flag & SDVO_TMDS_MASK);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001478
Adam Jackson149c36a2010-04-29 14:05:18 -04001479 /* DDC bus is shared, match EDID to connector type */
1480 if (is_digital && need_digital)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001481 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
Adam Jackson149c36a2010-04-29 14:05:18 -04001482 else if (is_digital != need_digital)
1483 status = connector_status_disconnected;
1484
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001485 connector->display_info.raw_edid = NULL;
Adam Jackson149c36a2010-04-29 14:05:18 -04001486 } else
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001487 status = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001488
1489 kfree(edid);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001490
1491 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001492}
1493
Jesse Barnes79e53942008-11-07 14:24:08 -08001494static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1495{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001496 uint16_t response;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001497 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001498 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001499 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001500 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001501
Chris Wilson32aad862010-08-04 13:50:25 +01001502 if (!intel_sdvo_write_cmd(intel_sdvo,
1503 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1504 return connector_status_unknown;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001505 if (intel_sdvo->is_tv) {
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001506 /* add 30ms delay when the output type is SDVO-TV */
1507 mdelay(30);
1508 }
Chris Wilson32aad862010-08-04 13:50:25 +01001509 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1510 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001511
Dave Airlie51c8b402009-08-20 13:38:04 +10001512 DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001513
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001514 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001515 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001516
Chris Wilsonea5b2132010-08-04 13:50:23 +01001517 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001518
Chris Wilson615fb932010-08-04 13:50:24 +01001519 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001520 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001521 else if (response & SDVO_TMDS_MASK)
1522 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001523 else
1524 ret = connector_status_connected;
1525
1526 /* May update encoder flag for like clock for SDVO TV, etc.*/
1527 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001528 intel_sdvo->is_tv = false;
1529 intel_sdvo->is_lvds = false;
1530 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001531
1532 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001533 intel_sdvo->is_tv = true;
1534 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001535 }
1536 if (response & SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001537 intel_sdvo->is_lvds = true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001538 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001539
1540 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001541}
1542
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001543static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001544{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001545 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001546 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Keith Packard57cdaf92009-09-04 13:07:54 +08001547 int num_modes;
Jesse Barnes79e53942008-11-07 14:24:08 -08001548
1549 /* set the bus switch and get the modes */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001550 num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Jesse Barnes79e53942008-11-07 14:24:08 -08001551
Keith Packard57cdaf92009-09-04 13:07:54 +08001552 /*
1553 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1554 * link between analog and digital outputs. So, if the regular SDVO
1555 * DDC fails, check to see if the analog output is disconnected, in
1556 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001557 */
Keith Packard57cdaf92009-09-04 13:07:54 +08001558 if (num_modes == 0 &&
Chris Wilsonea5b2132010-08-04 13:50:23 +01001559 intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001560 !intel_analog_is_connected(connector->dev)) {
Keith Packard57cdaf92009-09-04 13:07:54 +08001561 /* Switch to the analog ddc bus and try that
1562 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001563 (void) intel_ddc_get_modes(connector, intel_sdvo->analog_ddc_bus);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001564 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001565}
1566
1567/*
1568 * Set of SDVO TV modes.
1569 * Note! This is in reply order (see loop in get_tv_modes).
1570 * XXX: all 60Hz refresh?
1571 */
1572struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001573 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1574 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001575 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001576 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1577 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001578 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001579 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1580 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001581 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001582 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1583 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001585 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1586 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001588 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1589 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001590 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001591 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1592 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001593 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001594 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1595 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001596 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001597 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1598 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001599 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001600 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1601 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001602 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001603 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1604 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001606 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1607 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001609 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1610 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001611 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001612 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1613 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001614 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001615 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1616 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001617 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001618 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1619 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001620 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001621 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1622 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001623 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001624 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1625 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001626 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001627 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1628 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001629 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1630};
1631
1632static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1633{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001634 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001635 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001636 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001637 uint32_t reply = 0, format_map = 0;
1638 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001639
1640 /* Read the list of supported input resolutions for the selected TV
1641 * format.
1642 */
Chris Wilson40039752010-08-04 13:50:26 +01001643 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001644 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001645 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001646
Chris Wilson32aad862010-08-04 13:50:25 +01001647 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1648 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001649
Chris Wilson32aad862010-08-04 13:50:25 +01001650 BUILD_BUG_ON(sizeof(tv_res) != 3);
1651 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1652 &tv_res, sizeof(tv_res)))
1653 return;
1654 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001655 return;
1656
1657 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001658 if (reply & (1 << i)) {
1659 struct drm_display_mode *nmode;
1660 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001661 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001662 if (nmode)
1663 drm_mode_probed_add(connector, nmode);
1664 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001665}
1666
Ma Ling7086c872009-05-13 11:20:06 +08001667static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1668{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001669 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001670 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Ma Ling7086c872009-05-13 11:20:06 +08001671 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001672 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001673
1674 /*
1675 * Attempt to get the mode list from DDC.
1676 * Assume that the preferred modes are
1677 * arranged in priority order.
1678 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001679 intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Ma Ling7086c872009-05-13 11:20:06 +08001680 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001681 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001682
1683 /* Fetch modes from VBT */
1684 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001685 newmode = drm_mode_duplicate(connector->dev,
1686 dev_priv->sdvo_lvds_vbt_mode);
1687 if (newmode != NULL) {
1688 /* Guarantee the mode is preferred */
1689 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1690 DRM_MODE_TYPE_DRIVER);
1691 drm_mode_probed_add(connector, newmode);
1692 }
1693 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001694
1695end:
1696 list_for_each_entry(newmode, &connector->probed_modes, head) {
1697 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001698 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001699 drm_mode_duplicate(connector->dev, newmode);
1700 break;
1701 }
1702 }
1703
Ma Ling7086c872009-05-13 11:20:06 +08001704}
1705
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001706static int intel_sdvo_get_modes(struct drm_connector *connector)
1707{
Chris Wilson615fb932010-08-04 13:50:24 +01001708 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001709
Chris Wilson615fb932010-08-04 13:50:24 +01001710 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001711 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001712 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001713 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001714 else
1715 intel_sdvo_get_ddc_modes(connector);
1716
Chris Wilson32aad862010-08-04 13:50:25 +01001717 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001718}
1719
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001720static void
1721intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001722{
Chris Wilson615fb932010-08-04 13:50:24 +01001723 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001724 struct drm_device *dev = connector->dev;
1725
Chris Wilsonc5521702010-08-04 13:50:28 +01001726 if (intel_sdvo_connector->left)
1727 drm_property_destroy(dev, intel_sdvo_connector->left);
1728 if (intel_sdvo_connector->right)
1729 drm_property_destroy(dev, intel_sdvo_connector->right);
1730 if (intel_sdvo_connector->top)
1731 drm_property_destroy(dev, intel_sdvo_connector->top);
1732 if (intel_sdvo_connector->bottom)
1733 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1734 if (intel_sdvo_connector->hpos)
1735 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1736 if (intel_sdvo_connector->vpos)
1737 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1738 if (intel_sdvo_connector->saturation)
1739 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1740 if (intel_sdvo_connector->contrast)
1741 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1742 if (intel_sdvo_connector->hue)
1743 drm_property_destroy(dev, intel_sdvo_connector->hue);
1744 if (intel_sdvo_connector->sharpness)
1745 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1746 if (intel_sdvo_connector->flicker_filter)
1747 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1748 if (intel_sdvo_connector->flicker_filter_2d)
1749 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1750 if (intel_sdvo_connector->flicker_filter_adaptive)
1751 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1752 if (intel_sdvo_connector->tv_luma_filter)
1753 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1754 if (intel_sdvo_connector->tv_chroma_filter)
1755 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001756 if (intel_sdvo_connector->dot_crawl)
1757 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001758 if (intel_sdvo_connector->brightness)
1759 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001760}
1761
Jesse Barnes79e53942008-11-07 14:24:08 -08001762static void intel_sdvo_destroy(struct drm_connector *connector)
1763{
Chris Wilson615fb932010-08-04 13:50:24 +01001764 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001765
Chris Wilsonc5521702010-08-04 13:50:28 +01001766 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001767 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001768 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001769
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001770 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001771 drm_sysfs_connector_remove(connector);
1772 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001773 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001774}
1775
Zhao Yakuice6feab2009-08-24 13:50:26 +08001776static int
1777intel_sdvo_set_property(struct drm_connector *connector,
1778 struct drm_property *property,
1779 uint64_t val)
1780{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001781 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001782 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001783 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001784 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001785 uint8_t cmd;
1786 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001787
1788 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001789 if (ret)
1790 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001791
Chris Wilsonc5521702010-08-04 13:50:28 +01001792#define CHECK_PROPERTY(name, NAME) \
1793 if (intel_sdvo_connector->name == property) { \
1794 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1795 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1796 cmd = SDVO_CMD_SET_##NAME; \
1797 intel_sdvo_connector->cur_##name = temp_value; \
1798 goto set_value; \
1799 }
1800
1801 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001802 if (val >= TV_FORMAT_NUM)
1803 return -EINVAL;
1804
Chris Wilson40039752010-08-04 13:50:26 +01001805 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001806 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001807 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001808
Chris Wilson40039752010-08-04 13:50:26 +01001809 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001810 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001811 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001812 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001813 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001814 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001815 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001816 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001817 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001818
Chris Wilson615fb932010-08-04 13:50:24 +01001819 intel_sdvo_connector->left_margin = temp_value;
1820 intel_sdvo_connector->right_margin = temp_value;
1821 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001822 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001823 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001824 goto set_value;
1825 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001826 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001827 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001828 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001829 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001830
Chris Wilson615fb932010-08-04 13:50:24 +01001831 intel_sdvo_connector->left_margin = temp_value;
1832 intel_sdvo_connector->right_margin = temp_value;
1833 temp_value = intel_sdvo_connector->max_hscan -
1834 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001835 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001836 goto set_value;
1837 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001838 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001839 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001840 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001841 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001842
Chris Wilson615fb932010-08-04 13:50:24 +01001843 intel_sdvo_connector->top_margin = temp_value;
1844 intel_sdvo_connector->bottom_margin = temp_value;
1845 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001846 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001847 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001848 goto set_value;
1849 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001850 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001851 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001852 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001853 return 0;
1854
Chris Wilson615fb932010-08-04 13:50:24 +01001855 intel_sdvo_connector->top_margin = temp_value;
1856 intel_sdvo_connector->bottom_margin = temp_value;
1857 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001858 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001859 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001860 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001861 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001862 CHECK_PROPERTY(hpos, HPOS)
1863 CHECK_PROPERTY(vpos, VPOS)
1864 CHECK_PROPERTY(saturation, SATURATION)
1865 CHECK_PROPERTY(contrast, CONTRAST)
1866 CHECK_PROPERTY(hue, HUE)
1867 CHECK_PROPERTY(brightness, BRIGHTNESS)
1868 CHECK_PROPERTY(sharpness, SHARPNESS)
1869 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1870 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1871 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1872 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1873 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001874 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001875 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001876
1877 return -EINVAL; /* unknown property */
1878
1879set_value:
1880 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1881 return -EIO;
1882
1883
1884done:
1885 if (encoder->crtc) {
1886 struct drm_crtc *crtc = encoder->crtc;
1887
Zhao Yakuice6feab2009-08-24 13:50:26 +08001888 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001889 crtc->y, crtc->fb);
1890 }
1891
Chris Wilson32aad862010-08-04 13:50:25 +01001892 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001893#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001894}
1895
Jesse Barnes79e53942008-11-07 14:24:08 -08001896static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1897 .dpms = intel_sdvo_dpms,
1898 .mode_fixup = intel_sdvo_mode_fixup,
1899 .prepare = intel_encoder_prepare,
1900 .mode_set = intel_sdvo_mode_set,
1901 .commit = intel_encoder_commit,
1902};
1903
1904static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001905 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001906 .detect = intel_sdvo_detect,
1907 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001908 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001909 .destroy = intel_sdvo_destroy,
1910};
1911
1912static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1913 .get_modes = intel_sdvo_get_modes,
1914 .mode_valid = intel_sdvo_mode_valid,
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001915 .best_encoder = intel_attached_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001916};
1917
Hannes Ederb358d0a2008-12-18 21:18:47 +01001918static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001919{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001920 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001921
Chris Wilsonea5b2132010-08-04 13:50:23 +01001922 if (intel_sdvo->analog_ddc_bus)
1923 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001924
Chris Wilsonea5b2132010-08-04 13:50:23 +01001925 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001926 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001927 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001928
Chris Wilsonea5b2132010-08-04 13:50:23 +01001929 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001930}
1931
1932static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1933 .destroy = intel_sdvo_enc_destroy,
1934};
1935
1936
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001937/**
1938 * Choose the appropriate DDC bus for control bus switch command for this
1939 * SDVO output based on the controlled output.
1940 *
1941 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1942 * outputs, then LVDS outputs.
1943 */
1944static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001945intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001946 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001947{
Adam Jacksonb1083332010-04-23 16:07:40 -04001948 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001949
Adam Jacksonb1083332010-04-23 16:07:40 -04001950 if (IS_SDVOB(reg))
1951 mapping = &(dev_priv->sdvo_mappings[0]);
1952 else
1953 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001954
Adam Jacksonb1083332010-04-23 16:07:40 -04001955 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001956}
1957
1958static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001959intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001960{
Chris Wilson32aad862010-08-04 13:50:25 +01001961 return intel_sdvo_set_target_output(intel_sdvo,
1962 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1963 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1964 &intel_sdvo->is_hdmi, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001965}
1966
Chris Wilsonea5b2132010-08-04 13:50:23 +01001967static struct intel_sdvo *
1968intel_sdvo_chan_to_intel_sdvo(struct intel_i2c_chan *chan)
Ma Ling619ac3b2009-05-18 16:12:46 +08001969{
1970 struct drm_device *dev = chan->drm_dev;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001971 struct drm_encoder *encoder;
Ma Ling619ac3b2009-05-18 16:12:46 +08001972
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001973 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001974 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1975 if (intel_sdvo->base.ddc_bus == &chan->adapter)
1976 return intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001977 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01001978
Chris Wilson32aad862010-08-04 13:50:25 +01001979 return NULL;
Ma Ling619ac3b2009-05-18 16:12:46 +08001980}
1981
1982static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1983 struct i2c_msg msgs[], int num)
1984{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001985 struct intel_sdvo *intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001986 struct i2c_algo_bit_data *algo_data;
Keith Packardf9c10a92009-05-30 12:16:25 -07001987 const struct i2c_algorithm *algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001988
1989 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001990 intel_sdvo =
1991 intel_sdvo_chan_to_intel_sdvo((struct intel_i2c_chan *)
1992 (algo_data->data));
1993 if (intel_sdvo == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08001994 return -EINVAL;
1995
Chris Wilsonea5b2132010-08-04 13:50:23 +01001996 algo = intel_sdvo->base.i2c_bus->algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001997
Chris Wilsonea5b2132010-08-04 13:50:23 +01001998 intel_sdvo_set_control_bus_switch(intel_sdvo, intel_sdvo->ddc_bus);
Ma Ling619ac3b2009-05-18 16:12:46 +08001999 return algo->master_xfer(i2c_adap, msgs, num);
2000}
2001
2002static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
2003 .master_xfer = intel_sdvo_master_xfer,
2004};
2005
yakui_zhao714605e2009-05-31 17:18:07 +08002006static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07002007intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08002008{
2009 struct drm_i915_private *dev_priv = dev->dev_private;
2010 struct sdvo_device_mapping *my_mapping, *other_mapping;
2011
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002012 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08002013 my_mapping = &dev_priv->sdvo_mappings[0];
2014 other_mapping = &dev_priv->sdvo_mappings[1];
2015 } else {
2016 my_mapping = &dev_priv->sdvo_mappings[1];
2017 other_mapping = &dev_priv->sdvo_mappings[0];
2018 }
2019
2020 /* If the BIOS described our SDVO device, take advantage of it. */
2021 if (my_mapping->slave_addr)
2022 return my_mapping->slave_addr;
2023
2024 /* If the BIOS only described a different SDVO device, use the
2025 * address that it isn't using.
2026 */
2027 if (other_mapping->slave_addr) {
2028 if (other_mapping->slave_addr == 0x70)
2029 return 0x72;
2030 else
2031 return 0x70;
2032 }
2033
2034 /* No SDVO device info is found for another DVO port,
2035 * so use mapping assumption we had before BIOS parsing.
2036 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002037 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002038 return 0x70;
2039 else
2040 return 0x72;
2041}
2042
Zhenyu Wang14571b42010-03-30 14:06:33 +08002043static void
Chris Wilson32aad862010-08-04 13:50:25 +01002044intel_sdvo_connector_init(struct drm_encoder *encoder,
2045 struct drm_connector *connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002046{
2047 drm_connector_init(encoder->dev, connector, &intel_sdvo_connector_funcs,
2048 connector->connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002049
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
2051
2052 connector->interlace_allowed = 0;
2053 connector->doublescan_allowed = 0;
2054 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
2055
2056 drm_mode_connector_attach_encoder(connector, encoder);
2057 drm_sysfs_connector_add(connector);
2058}
2059
2060static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002061intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002062{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002063 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064 struct drm_connector *connector;
2065 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002066 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002067
Chris Wilson615fb932010-08-04 13:50:24 +01002068 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2069 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002070 return false;
2071
Zhenyu Wang14571b42010-03-30 14:06:33 +08002072 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002073 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002074 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002075 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002076 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002077 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002078 }
2079
Chris Wilson615fb932010-08-04 13:50:24 +01002080 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002081 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002082 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2084 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2085
Chris Wilsonea5b2132010-08-04 13:50:23 +01002086 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2087 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2088 && intel_sdvo->is_hdmi) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002089 /* enable hdmi encoding mode if supported */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002090 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2091 intel_sdvo_set_colorimetry(intel_sdvo,
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092 SDVO_COLORIMETRY_RGB256);
2093 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2094 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002095 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2096 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilson32aad862010-08-04 13:50:25 +01002098 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002099
2100 return true;
2101}
2102
2103static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002104intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002105{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002106 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002107 struct drm_connector *connector;
2108 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002109 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002110
Chris Wilson615fb932010-08-04 13:50:24 +01002111 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2112 if (!intel_sdvo_connector)
2113 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114
Chris Wilson615fb932010-08-04 13:50:24 +01002115 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116 connector = &intel_connector->base;
2117 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2118 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002119
Chris Wilsonea5b2132010-08-04 13:50:23 +01002120 intel_sdvo->controlled_output |= type;
Chris Wilson615fb932010-08-04 13:50:24 +01002121 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002122
Chris Wilsonea5b2132010-08-04 13:50:23 +01002123 intel_sdvo->is_tv = true;
2124 intel_sdvo->base.needs_tv_clock = true;
2125 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002126
Chris Wilson32aad862010-08-04 13:50:25 +01002127 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002128
Chris Wilson32aad862010-08-04 13:50:25 +01002129 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2130 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002131
Chris Wilson32aad862010-08-04 13:50:25 +01002132 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2133 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002134
2135 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002136
2137err:
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002138 intel_sdvo_destroy_enhance_property(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002139 kfree(intel_sdvo_connector);
2140 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141}
2142
2143static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002144intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002145{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002146 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002147 struct drm_connector *connector;
2148 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002149 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150
Chris Wilson615fb932010-08-04 13:50:24 +01002151 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2152 if (!intel_sdvo_connector)
2153 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002154
Chris Wilson615fb932010-08-04 13:50:24 +01002155 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002156 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002157 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002158 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2159 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002160
2161 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002162 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
Chris Wilson615fb932010-08-04 13:50:24 +01002163 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002164 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002165 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
Chris Wilson615fb932010-08-04 13:50:24 +01002166 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167 }
2168
Chris Wilsonea5b2132010-08-04 13:50:23 +01002169 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2170 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002171
Chris Wilson32aad862010-08-04 13:50:25 +01002172 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002173 return true;
2174}
2175
2176static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002177intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002178{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002179 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002180 struct drm_connector *connector;
2181 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002182 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002183
Chris Wilson615fb932010-08-04 13:50:24 +01002184 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2185 if (!intel_sdvo_connector)
2186 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002187
Chris Wilson615fb932010-08-04 13:50:24 +01002188 intel_connector = &intel_sdvo_connector->base;
2189 connector = &intel_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002190 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2191 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192
Chris Wilsonea5b2132010-08-04 13:50:23 +01002193 intel_sdvo->is_lvds = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194
2195 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002196 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002197 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002198 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002199 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002200 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 }
2202
Chris Wilsonea5b2132010-08-04 13:50:23 +01002203 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2204 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205
Chris Wilson32aad862010-08-04 13:50:25 +01002206 intel_sdvo_connector_init(encoder, connector);
2207 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2208 goto err;
2209
2210 return true;
2211
2212err:
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002213 intel_sdvo_destroy_enhance_property(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002214 kfree(intel_sdvo_connector);
2215 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002217
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002218static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002219intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002220{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002221 intel_sdvo->is_tv = false;
2222 intel_sdvo->base.needs_tv_clock = false;
2223 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002224
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002226
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002228 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002230
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002232 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002233 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002234
Zhenyu Wang14571b42010-03-30 14:06:33 +08002235 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002236 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002237 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002238 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002239
Zhenyu Wang14571b42010-03-30 14:06:33 +08002240 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002241 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002242 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002243
Zhenyu Wang14571b42010-03-30 14:06:33 +08002244 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002245 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002246 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002247
Zhenyu Wang14571b42010-03-30 14:06:33 +08002248 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002249 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002250 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002251
Zhenyu Wang14571b42010-03-30 14:06:33 +08002252 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002253 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002254 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002255
Zhenyu Wang14571b42010-03-30 14:06:33 +08002256 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002257 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002258 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002259
Zhenyu Wang14571b42010-03-30 14:06:33 +08002260 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002261 unsigned char bytes[2];
2262
Chris Wilsonea5b2132010-08-04 13:50:23 +01002263 intel_sdvo->controlled_output = 0;
2264 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002265 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002266 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002267 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002268 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002269 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002270 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002271
Zhenyu Wang14571b42010-03-30 14:06:33 +08002272 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002273}
2274
Chris Wilson32aad862010-08-04 13:50:25 +01002275static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2276 struct intel_sdvo_connector *intel_sdvo_connector,
2277 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002278{
Chris Wilson32aad862010-08-04 13:50:25 +01002279 struct drm_device *dev = intel_sdvo->base.enc.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002280 struct intel_sdvo_tv_format format;
2281 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002282
Chris Wilson32aad862010-08-04 13:50:25 +01002283 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2284 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002285
Chris Wilson32aad862010-08-04 13:50:25 +01002286 if (!intel_sdvo_get_value(intel_sdvo,
2287 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2288 &format, sizeof(format)))
2289 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002290
Chris Wilson32aad862010-08-04 13:50:25 +01002291 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002292
2293 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002294 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002295
Chris Wilson615fb932010-08-04 13:50:24 +01002296 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002297 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002298 if (format_map & (1 << i))
2299 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002300
2301
Chris Wilsonc5521702010-08-04 13:50:28 +01002302 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002303 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2304 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002305 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002306 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002307
Chris Wilson615fb932010-08-04 13:50:24 +01002308 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002309 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002310 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002311 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002312
Chris Wilson40039752010-08-04 13:50:26 +01002313 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002314 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002315 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002316 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002317
2318}
2319
Chris Wilsonc5521702010-08-04 13:50:28 +01002320#define ENHANCEMENT(name, NAME) do { \
2321 if (enhancements.name) { \
2322 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2323 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2324 return false; \
2325 intel_sdvo_connector->max_##name = data_value[0]; \
2326 intel_sdvo_connector->cur_##name = response; \
2327 intel_sdvo_connector->name = \
2328 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2329 if (!intel_sdvo_connector->name) return false; \
2330 intel_sdvo_connector->name->values[0] = 0; \
2331 intel_sdvo_connector->name->values[1] = data_value[0]; \
2332 drm_connector_attach_property(connector, \
2333 intel_sdvo_connector->name, \
2334 intel_sdvo_connector->cur_##name); \
2335 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2336 data_value[0], data_value[1], response); \
2337 } \
2338} while(0)
2339
2340static bool
2341intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2342 struct intel_sdvo_connector *intel_sdvo_connector,
2343 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002344{
Chris Wilson32aad862010-08-04 13:50:25 +01002345 struct drm_device *dev = intel_sdvo->base.enc.dev;
2346 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002347 uint16_t response, data_value[2];
2348
Chris Wilsonc5521702010-08-04 13:50:28 +01002349 /* when horizontal overscan is supported, Add the left/right property */
2350 if (enhancements.overscan_h) {
2351 if (!intel_sdvo_get_value(intel_sdvo,
2352 SDVO_CMD_GET_MAX_OVERSCAN_H,
2353 &data_value, 4))
2354 return false;
2355
2356 if (!intel_sdvo_get_value(intel_sdvo,
2357 SDVO_CMD_GET_OVERSCAN_H,
2358 &response, 2))
2359 return false;
2360
2361 intel_sdvo_connector->max_hscan = data_value[0];
2362 intel_sdvo_connector->left_margin = data_value[0] - response;
2363 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2364 intel_sdvo_connector->left =
2365 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2366 "left_margin", 2);
2367 if (!intel_sdvo_connector->left)
2368 return false;
2369
2370 intel_sdvo_connector->left->values[0] = 0;
2371 intel_sdvo_connector->left->values[1] = data_value[0];
2372 drm_connector_attach_property(connector,
2373 intel_sdvo_connector->left,
2374 intel_sdvo_connector->left_margin);
2375
2376 intel_sdvo_connector->right =
2377 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2378 "right_margin", 2);
2379 if (!intel_sdvo_connector->right)
2380 return false;
2381
2382 intel_sdvo_connector->right->values[0] = 0;
2383 intel_sdvo_connector->right->values[1] = data_value[0];
2384 drm_connector_attach_property(connector,
2385 intel_sdvo_connector->right,
2386 intel_sdvo_connector->right_margin);
2387 DRM_DEBUG_KMS("h_overscan: max %d, "
2388 "default %d, current %d\n",
2389 data_value[0], data_value[1], response);
2390 }
2391
2392 if (enhancements.overscan_v) {
2393 if (!intel_sdvo_get_value(intel_sdvo,
2394 SDVO_CMD_GET_MAX_OVERSCAN_V,
2395 &data_value, 4))
2396 return false;
2397
2398 if (!intel_sdvo_get_value(intel_sdvo,
2399 SDVO_CMD_GET_OVERSCAN_V,
2400 &response, 2))
2401 return false;
2402
2403 intel_sdvo_connector->max_vscan = data_value[0];
2404 intel_sdvo_connector->top_margin = data_value[0] - response;
2405 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2406 intel_sdvo_connector->top =
2407 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2408 "top_margin", 2);
2409 if (!intel_sdvo_connector->top)
2410 return false;
2411
2412 intel_sdvo_connector->top->values[0] = 0;
2413 intel_sdvo_connector->top->values[1] = data_value[0];
2414 drm_connector_attach_property(connector,
2415 intel_sdvo_connector->top,
2416 intel_sdvo_connector->top_margin);
2417
2418 intel_sdvo_connector->bottom =
2419 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2420 "bottom_margin", 2);
2421 if (!intel_sdvo_connector->bottom)
2422 return false;
2423
2424 intel_sdvo_connector->bottom->values[0] = 0;
2425 intel_sdvo_connector->bottom->values[1] = data_value[0];
2426 drm_connector_attach_property(connector,
2427 intel_sdvo_connector->bottom,
2428 intel_sdvo_connector->bottom_margin);
2429 DRM_DEBUG_KMS("v_overscan: max %d, "
2430 "default %d, current %d\n",
2431 data_value[0], data_value[1], response);
2432 }
2433
2434 ENHANCEMENT(hpos, HPOS);
2435 ENHANCEMENT(vpos, VPOS);
2436 ENHANCEMENT(saturation, SATURATION);
2437 ENHANCEMENT(contrast, CONTRAST);
2438 ENHANCEMENT(hue, HUE);
2439 ENHANCEMENT(sharpness, SHARPNESS);
2440 ENHANCEMENT(brightness, BRIGHTNESS);
2441 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2442 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2443 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2444 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2445 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2446
Chris Wilsone0442182010-08-04 13:50:29 +01002447 if (enhancements.dot_crawl) {
2448 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2449 return false;
2450
2451 intel_sdvo_connector->max_dot_crawl = 1;
2452 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2453 intel_sdvo_connector->dot_crawl =
2454 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2455 if (!intel_sdvo_connector->dot_crawl)
2456 return false;
2457
2458 intel_sdvo_connector->dot_crawl->values[0] = 0;
2459 intel_sdvo_connector->dot_crawl->values[1] = 1;
2460 drm_connector_attach_property(connector,
2461 intel_sdvo_connector->dot_crawl,
2462 intel_sdvo_connector->cur_dot_crawl);
2463 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2464 }
2465
Chris Wilsonc5521702010-08-04 13:50:28 +01002466 return true;
2467}
2468
2469static bool
2470intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2471 struct intel_sdvo_connector *intel_sdvo_connector,
2472 struct intel_sdvo_enhancements_reply enhancements)
2473{
2474 struct drm_device *dev = intel_sdvo->base.enc.dev;
2475 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2476 uint16_t response, data_value[2];
2477
2478 ENHANCEMENT(brightness, BRIGHTNESS);
2479
2480 return true;
2481}
2482#undef ENHANCEMENT
2483
2484static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2485 struct intel_sdvo_connector *intel_sdvo_connector)
2486{
2487 union {
2488 struct intel_sdvo_enhancements_reply reply;
2489 uint16_t response;
2490 } enhancements;
2491
Chris Wilson32aad862010-08-04 13:50:25 +01002492 if (!intel_sdvo_get_value(intel_sdvo,
2493 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
Chris Wilsonc5521702010-08-04 13:50:28 +01002494 &enhancements, sizeof(enhancements)))
Chris Wilson32aad862010-08-04 13:50:25 +01002495 return false;
2496
Chris Wilsonc5521702010-08-04 13:50:28 +01002497 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002498 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002499 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002500 }
Chris Wilson32aad862010-08-04 13:50:25 +01002501
Chris Wilsonc5521702010-08-04 13:50:28 +01002502 if (IS_TV(intel_sdvo_connector))
2503 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2504 else if(IS_LVDS(intel_sdvo_connector))
2505 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2506 else
2507 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002508
Zhao Yakuib9219c52009-09-10 15:45:46 +08002509}
2510
Eric Anholtc751ce42010-03-25 11:48:48 -07002511bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002512{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002513 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002514 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002515 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002516 u8 ch[0x40];
2517 int i;
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002518 u32 i2c_reg, ddc_reg, analog_ddc_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -08002519
Chris Wilsonea5b2132010-08-04 13:50:23 +01002520 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2521 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002522 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002523
Chris Wilsonea5b2132010-08-04 13:50:23 +01002524 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002525
Chris Wilsonea5b2132010-08-04 13:50:23 +01002526 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002527 intel_encoder->type = INTEL_OUTPUT_SDVO;
Jesse Barnes79e53942008-11-07 14:24:08 -08002528
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002529 if (HAS_PCH_SPLIT(dev)) {
2530 i2c_reg = PCH_GPIOE;
2531 ddc_reg = PCH_GPIOE;
2532 analog_ddc_reg = PCH_GPIOA;
2533 } else {
2534 i2c_reg = GPIOE;
2535 ddc_reg = GPIOE;
2536 analog_ddc_reg = GPIOA;
2537 }
2538
Jesse Barnes79e53942008-11-07 14:24:08 -08002539 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002540 if (IS_SDVOB(sdvo_reg))
2541 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOB");
Keith Packard308cd3a2009-06-14 11:56:18 -07002542 else
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002543 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOC");
Keith Packard308cd3a2009-06-14 11:56:18 -07002544
Eric Anholt21d40d32010-03-25 11:11:14 -07002545 if (!intel_encoder->i2c_bus)
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002546 goto err_inteloutput;
Jesse Barnes79e53942008-11-07 14:24:08 -08002547
Chris Wilsonea5b2132010-08-04 13:50:23 +01002548 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002549
Keith Packard308cd3a2009-06-14 11:56:18 -07002550 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
Eric Anholt21d40d32010-03-25 11:11:14 -07002551 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
Jesse Barnes79e53942008-11-07 14:24:08 -08002552
Jesse Barnes79e53942008-11-07 14:24:08 -08002553 /* Read the regs to test if we can talk to the device */
2554 for (i = 0; i < 0x40; i++) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002555 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002556 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002557 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Jesse Barnes79e53942008-11-07 14:24:08 -08002558 goto err_i2c;
2559 }
2560 }
2561
Ma Ling619ac3b2009-05-18 16:12:46 +08002562 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002563 if (IS_SDVOB(sdvo_reg)) {
2564 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOB DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002565 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002566 "SDVOB/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002567 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002568 } else {
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002569 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOC DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002570 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002571 "SDVOC/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002572 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002573 }
Chris Wilson32aad862010-08-04 13:50:25 +01002574 if (intel_encoder->ddc_bus == NULL || intel_sdvo->analog_ddc_bus == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08002575 goto err_i2c;
2576
Keith Packard308cd3a2009-06-14 11:56:18 -07002577 /* Wrap with our custom algo which switches to DDC mode */
Eric Anholt21d40d32010-03-25 11:11:14 -07002578 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08002579
Zhenyu Wang14571b42010-03-30 14:06:33 +08002580 /* encoder type will be decided later */
2581 drm_encoder_init(dev, &intel_encoder->enc, &intel_sdvo_enc_funcs, 0);
2582 drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs);
2583
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002584 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002585 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2586 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002587
Chris Wilsonea5b2132010-08-04 13:50:23 +01002588 if (intel_sdvo_output_setup(intel_sdvo,
2589 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002590 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002591 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilson32aad862010-08-04 13:50:25 +01002592 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002593 }
2594
Chris Wilsonea5b2132010-08-04 13:50:23 +01002595 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002596
Jesse Barnes79e53942008-11-07 14:24:08 -08002597 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002598 if (!intel_sdvo_set_target_input(intel_sdvo))
2599 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002600
Chris Wilson32aad862010-08-04 13:50:25 +01002601 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2602 &intel_sdvo->pixel_clock_min,
2603 &intel_sdvo->pixel_clock_max))
2604 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002605
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002606 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002607 "clock range %dMHz - %dMHz, "
2608 "input 1: %c, input 2: %c, "
2609 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002610 SDVO_NAME(intel_sdvo),
2611 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2612 intel_sdvo->caps.device_rev_id,
2613 intel_sdvo->pixel_clock_min / 1000,
2614 intel_sdvo->pixel_clock_max / 1000,
2615 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2616 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002617 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002618 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002619 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002620 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002621 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002622 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002623
Chris Wilson32aad862010-08-04 13:50:25 +01002624err_enc:
2625 drm_encoder_cleanup(&intel_encoder->enc);
Jesse Barnes79e53942008-11-07 14:24:08 -08002626err_i2c:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002627 if (intel_sdvo->analog_ddc_bus != NULL)
2628 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Eric Anholt21d40d32010-03-25 11:11:14 -07002629 if (intel_encoder->ddc_bus != NULL)
2630 intel_i2c_destroy(intel_encoder->ddc_bus);
2631 if (intel_encoder->i2c_bus != NULL)
2632 intel_i2c_destroy(intel_encoder->i2c_bus);
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002633err_inteloutput:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002634 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002635
Eric Anholt7d573822009-01-02 13:33:00 -08002636 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002637}