Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1 | /* bnx2x.h: Broadcom Everest network driver. |
| 2 | * |
Yuval Mintz | 247fa82 | 2013-01-14 05:11:50 +0000 | [diff] [blame] | 3 | * Copyright (c) 2007-2013 Broadcom Corporation |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
Ariel Elior | 08f6dd8 | 2014-05-27 13:11:36 +0300 | [diff] [blame] | 9 | * Maintained by: Ariel Elior <ariel.elior@qlogic.com> |
Eilon Greenstein | 24e3fce | 2008-06-12 14:30:28 -0700 | [diff] [blame] | 10 | * Written by: Eliezer Tamir |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 11 | * Based on code from Michael Chan's bnx2 driver |
| 12 | */ |
| 13 | |
| 14 | #ifndef BNX2X_H |
| 15 | #define BNX2X_H |
Ariel Elior | 290ca2b | 2013-01-01 05:22:31 +0000 | [diff] [blame] | 16 | |
| 17 | #include <linux/pci.h> |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 18 | #include <linux/netdevice.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 19 | #include <linux/dma-mapping.h> |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 20 | #include <linux/types.h> |
Ariel Elior | 290ca2b | 2013-01-01 05:22:31 +0000 | [diff] [blame] | 21 | #include <linux/pci_regs.h> |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 22 | |
Michal Kalderon | eeed018 | 2014-08-17 16:47:44 +0300 | [diff] [blame] | 23 | #include <linux/ptp_clock_kernel.h> |
| 24 | #include <linux/net_tstamp.h> |
Richard Cochran | 74d23cc | 2014-12-21 19:46:56 +0100 | [diff] [blame] | 25 | #include <linux/timecounter.h> |
Michal Kalderon | eeed018 | 2014-08-17 16:47:44 +0300 | [diff] [blame] | 26 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 27 | /* compilation time flags */ |
| 28 | |
| 29 | /* define this to make the driver freeze on error to allow getting debug info |
| 30 | * (you will need to reboot afterwards) */ |
| 31 | /* #define BNX2X_STOP_ON_ERROR */ |
| 32 | |
Yuval Mintz | 6260412 | 2014-08-17 16:47:46 +0300 | [diff] [blame] | 33 | #define DRV_MODULE_VERSION "1.710.51-0" |
Dmitry Kravkov | 3156b8e | 2014-02-12 18:19:57 +0200 | [diff] [blame] | 34 | #define DRV_MODULE_RELDATE "2014/02/10" |
Dmitry Kravkov | de0c62d | 2010-07-27 12:35:24 +0000 | [diff] [blame] | 35 | #define BNX2X_BC_VER 0x040200 |
| 36 | |
Shmulik Ravid | 785b9b1 | 2010-12-30 06:27:03 +0000 | [diff] [blame] | 37 | #if defined(CONFIG_DCB) |
Shmulik Ravid | 9850767 | 2011-02-28 12:19:55 -0800 | [diff] [blame] | 38 | #define BCM_DCBNL |
Shmulik Ravid | 785b9b1 | 2010-12-30 06:27:03 +0000 | [diff] [blame] | 39 | #endif |
Yuval Mintz | b475d78 | 2012-04-03 18:41:29 +0000 | [diff] [blame] | 40 | |
Yuval Mintz | b475d78 | 2012-04-03 18:41:29 +0000 | [diff] [blame] | 41 | #include "bnx2x_hsi.h" |
| 42 | |
Dmitry Kravkov | 5d1e859 | 2010-07-27 12:31:10 +0000 | [diff] [blame] | 43 | #include "../cnic_if.h" |
Vladislav Zolotarov | 1ac218c | 2010-04-19 01:14:18 +0000 | [diff] [blame] | 44 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 45 | #define BNX2X_MIN_MSIX_VEC_CNT(bp) ((bp)->min_msix_vec_cnt) |
Vladislav Zolotarov | 1ac218c | 2010-04-19 01:14:18 +0000 | [diff] [blame] | 46 | |
Eilon Greenstein | 01cd452 | 2009-08-12 08:23:08 +0000 | [diff] [blame] | 47 | #include <linux/mdio.h> |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 48 | |
Eilon Greenstein | 359d8b1 | 2009-02-12 08:38:25 +0000 | [diff] [blame] | 49 | #include "bnx2x_reg.h" |
| 50 | #include "bnx2x_fw_defs.h" |
Barak Witkowski | 2e499d3 | 2012-06-26 01:31:19 +0000 | [diff] [blame] | 51 | #include "bnx2x_mfw_req.h" |
Eilon Greenstein | 359d8b1 | 2009-02-12 08:38:25 +0000 | [diff] [blame] | 52 | #include "bnx2x_link.h" |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 53 | #include "bnx2x_sp.h" |
Vladislav Zolotarov | e4901dd | 2010-12-13 05:44:18 +0000 | [diff] [blame] | 54 | #include "bnx2x_dcb.h" |
Dmitry Kravkov | 6c719d0 | 2010-07-27 12:36:15 +0000 | [diff] [blame] | 55 | #include "bnx2x_stats.h" |
Ariel Elior | be1f1ffa | 2013-01-01 05:22:24 +0000 | [diff] [blame] | 56 | #include "bnx2x_vfpf.h" |
Eilon Greenstein | 359d8b1 | 2009-02-12 08:38:25 +0000 | [diff] [blame] | 57 | |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 58 | enum bnx2x_int_mode { |
| 59 | BNX2X_INT_MODE_MSIX, |
| 60 | BNX2X_INT_MODE_INTX, |
| 61 | BNX2X_INT_MODE_MSI |
| 62 | }; |
| 63 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 64 | /* error/debug prints */ |
| 65 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 66 | #define DRV_MODULE_NAME "bnx2x" |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 67 | |
| 68 | /* for messages that are currently off */ |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 69 | #define BNX2X_MSG_OFF 0x0 |
| 70 | #define BNX2X_MSG_MCP 0x0010000 /* was: NETIF_MSG_HW */ |
| 71 | #define BNX2X_MSG_STATS 0x0020000 /* was: NETIF_MSG_TIMER */ |
| 72 | #define BNX2X_MSG_NVM 0x0040000 /* was: NETIF_MSG_HW */ |
| 73 | #define BNX2X_MSG_DMAE 0x0080000 /* was: NETIF_MSG_HW */ |
| 74 | #define BNX2X_MSG_SP 0x0100000 /* was: NETIF_MSG_INTR */ |
| 75 | #define BNX2X_MSG_FP 0x0200000 /* was: NETIF_MSG_INTR */ |
| 76 | #define BNX2X_MSG_IOV 0x0800000 |
Michal Kalderon | eeed018 | 2014-08-17 16:47:44 +0300 | [diff] [blame] | 77 | #define BNX2X_MSG_PTP 0x1000000 |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 78 | #define BNX2X_MSG_IDLE 0x2000000 /* used for idle check*/ |
| 79 | #define BNX2X_MSG_ETHTOOL 0x4000000 |
| 80 | #define BNX2X_MSG_DCB 0x8000000 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 81 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 82 | /* regular debug print */ |
Yuval Mintz | 76ca70f | 2014-02-12 18:19:49 +0200 | [diff] [blame] | 83 | #define DP_INNER(fmt, ...) \ |
| 84 | pr_notice("[%s:%d(%s)]" fmt, \ |
| 85 | __func__, __LINE__, \ |
| 86 | bp->dev ? (bp->dev->name) : "?", \ |
| 87 | ##__VA_ARGS__); |
| 88 | |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 89 | #define DP(__mask, fmt, ...) \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 90 | do { \ |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 91 | if (unlikely(bp->msg_enable & (__mask))) \ |
Yuval Mintz | 76ca70f | 2014-02-12 18:19:49 +0200 | [diff] [blame] | 92 | DP_INNER(fmt, ##__VA_ARGS__); \ |
| 93 | } while (0) |
| 94 | |
| 95 | #define DP_AND(__mask, fmt, ...) \ |
| 96 | do { \ |
| 97 | if (unlikely((bp->msg_enable & (__mask)) == __mask)) \ |
| 98 | DP_INNER(fmt, ##__VA_ARGS__); \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 99 | } while (0) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 100 | |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 101 | #define DP_CONT(__mask, fmt, ...) \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 102 | do { \ |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 103 | if (unlikely(bp->msg_enable & (__mask))) \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 104 | pr_cont(fmt, ##__VA_ARGS__); \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 105 | } while (0) |
| 106 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 107 | /* errors debug print */ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 108 | #define BNX2X_DBG_ERR(fmt, ...) \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 109 | do { \ |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 110 | if (unlikely(netif_msg_probe(bp))) \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 111 | pr_err("[%s:%d(%s)]" fmt, \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 112 | __func__, __LINE__, \ |
| 113 | bp->dev ? (bp->dev->name) : "?", \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 114 | ##__VA_ARGS__); \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 115 | } while (0) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 116 | |
| 117 | /* for errors (never masked) */ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 118 | #define BNX2X_ERR(fmt, ...) \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 119 | do { \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 120 | pr_err("[%s:%d(%s)]" fmt, \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 121 | __func__, __LINE__, \ |
| 122 | bp->dev ? (bp->dev->name) : "?", \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 123 | ##__VA_ARGS__); \ |
| 124 | } while (0) |
Vladislav Zolotarov | cdaa7cb | 2010-04-19 01:13:57 +0000 | [diff] [blame] | 125 | |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 126 | #define BNX2X_ERROR(fmt, ...) \ |
| 127 | pr_err("[%s:%d]" fmt, __func__, __LINE__, ##__VA_ARGS__) |
Vladislav Zolotarov | cdaa7cb | 2010-04-19 01:13:57 +0000 | [diff] [blame] | 128 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 129 | /* before we have a dev->name use dev_info() */ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 130 | #define BNX2X_DEV_INFO(fmt, ...) \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 131 | do { \ |
Merav Sicron | 51c1a58 | 2012-03-18 10:33:38 +0000 | [diff] [blame] | 132 | if (unlikely(netif_msg_probe(bp))) \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 133 | dev_info(&bp->pdev->dev, fmt, ##__VA_ARGS__); \ |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 134 | } while (0) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 135 | |
Yuval Mintz | ca9bdb9 | 2013-01-23 03:21:53 +0000 | [diff] [blame] | 136 | /* Error handling */ |
| 137 | void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int); |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 138 | #ifdef BNX2X_STOP_ON_ERROR |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 139 | #define bnx2x_panic() \ |
| 140 | do { \ |
| 141 | bp->panic = 1; \ |
| 142 | BNX2X_ERR("driver assert\n"); \ |
Yuval Mintz | 823e1d9 | 2013-01-14 05:11:47 +0000 | [diff] [blame] | 143 | bnx2x_panic_dump(bp, true); \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 144 | } while (0) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 145 | #else |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 146 | #define bnx2x_panic() \ |
| 147 | do { \ |
| 148 | bp->panic = 1; \ |
| 149 | BNX2X_ERR("driver assert\n"); \ |
Yuval Mintz | 823e1d9 | 2013-01-14 05:11:47 +0000 | [diff] [blame] | 150 | bnx2x_panic_dump(bp, false); \ |
Joe Perches | f1deab5 | 2011-08-14 12:16:21 +0000 | [diff] [blame] | 151 | } while (0) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 152 | #endif |
| 153 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 154 | #define bnx2x_mc_addr(ha) ((ha)->addr) |
Vladislav Zolotarov | 6e30dd4 | 2011-02-06 11:25:41 -0800 | [diff] [blame] | 155 | #define bnx2x_uc_addr(ha) ((ha)->addr) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 156 | |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 157 | #define U64_LO(x) ((u32)(((u64)(x)) & 0xffffffff)) |
| 158 | #define U64_HI(x) ((u32)(((u64)(x)) >> 32)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 159 | #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 160 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 161 | #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 162 | |
| 163 | #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) |
| 164 | #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset)) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 165 | #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 166 | |
| 167 | #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 168 | #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 169 | #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 170 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 171 | #define REG_RD_IND(bp, offset) bnx2x_reg_rd_ind(bp, offset) |
| 172 | #define REG_WR_IND(bp, offset, val) bnx2x_reg_wr_ind(bp, offset, val) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 173 | |
Yaniv Rosner | c18487e | 2008-06-23 20:27:52 -0700 | [diff] [blame] | 174 | #define REG_RD_DMAE(bp, offset, valp, len32) \ |
| 175 | do { \ |
| 176 | bnx2x_read_dmae(bp, offset, len32);\ |
Eilon Greenstein | 573f203 | 2009-08-12 08:24:14 +0000 | [diff] [blame] | 177 | memcpy(valp, bnx2x_sp(bp, wb_data[0]), (len32) * 4); \ |
Yaniv Rosner | c18487e | 2008-06-23 20:27:52 -0700 | [diff] [blame] | 178 | } while (0) |
| 179 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 180 | #define REG_WR_DMAE(bp, offset, valp, len32) \ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 181 | do { \ |
Eilon Greenstein | 573f203 | 2009-08-12 08:24:14 +0000 | [diff] [blame] | 182 | memcpy(bnx2x_sp(bp, wb_data[0]), valp, (len32) * 4); \ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 183 | bnx2x_write_dmae(bp, bnx2x_sp_mapping(bp, wb_data), \ |
| 184 | offset, len32); \ |
| 185 | } while (0) |
| 186 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 187 | #define REG_WR_DMAE_LEN(bp, offset, valp, len32) \ |
| 188 | REG_WR_DMAE(bp, offset, valp, len32) |
| 189 | |
Vladislav Zolotarov | 3359fce | 2010-02-17 13:35:01 -0800 | [diff] [blame] | 190 | #define VIRT_WR_DMAE_LEN(bp, data, addr, len32, le32_swap) \ |
Eilon Greenstein | 573f203 | 2009-08-12 08:24:14 +0000 | [diff] [blame] | 191 | do { \ |
| 192 | memcpy(GUNZIP_BUF(bp), data, (len32) * 4); \ |
| 193 | bnx2x_write_big_buf_wb(bp, addr, len32); \ |
| 194 | } while (0) |
| 195 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 196 | #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \ |
| 197 | offsetof(struct shmem_region, field)) |
| 198 | #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) |
| 199 | #define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 200 | |
Eilon Greenstein | 2691d51 | 2009-08-12 08:22:08 +0000 | [diff] [blame] | 201 | #define SHMEM2_ADDR(bp, field) (bp->common.shmem2_base + \ |
| 202 | offsetof(struct shmem2_region, field)) |
| 203 | #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) |
| 204 | #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 205 | #define MF_CFG_ADDR(bp, field) (bp->common.mf_cfg_base + \ |
| 206 | offsetof(struct mf_cfg, field)) |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 207 | #define MF2_CFG_ADDR(bp, field) (bp->common.mf2_cfg_base + \ |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 208 | offsetof(struct mf2_cfg, field)) |
Eilon Greenstein | 2691d51 | 2009-08-12 08:22:08 +0000 | [diff] [blame] | 209 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 210 | #define MF_CFG_RD(bp, field) REG_RD(bp, MF_CFG_ADDR(bp, field)) |
| 211 | #define MF_CFG_WR(bp, field, val) REG_WR(bp,\ |
| 212 | MF_CFG_ADDR(bp, field), (val)) |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 213 | #define MF2_CFG_RD(bp, field) REG_RD(bp, MF2_CFG_ADDR(bp, field)) |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 214 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 215 | #define SHMEM2_HAS(bp, field) ((bp)->common.shmem2_base && \ |
| 216 | (SHMEM2_RD((bp), size) > \ |
| 217 | offsetof(struct shmem2_region, field))) |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 218 | |
Eilon Greenstein | 345b5d5 | 2008-08-13 15:58:12 -0700 | [diff] [blame] | 219 | #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) |
Eilon Greenstein | 3196a88 | 2008-08-13 15:58:49 -0700 | [diff] [blame] | 220 | #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 221 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 222 | /* SP SB indices */ |
| 223 | |
| 224 | /* General SP events - stats query, cfc delete, etc */ |
| 225 | #define HC_SP_INDEX_ETH_DEF_CONS 3 |
| 226 | |
| 227 | /* EQ completions */ |
| 228 | #define HC_SP_INDEX_EQ_CONS 7 |
| 229 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 230 | /* FCoE L2 connection completions */ |
| 231 | #define HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS 6 |
| 232 | #define HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS 4 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 233 | /* iSCSI L2 */ |
| 234 | #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5 |
| 235 | #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1 |
| 236 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 237 | /* Special clients parameters */ |
| 238 | |
| 239 | /* SB indices */ |
| 240 | /* FCoE L2 */ |
| 241 | #define BNX2X_FCOE_L2_RX_INDEX \ |
| 242 | (&bp->def_status_blk->sp_sb.\ |
| 243 | index_values[HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS]) |
| 244 | |
| 245 | #define BNX2X_FCOE_L2_TX_INDEX \ |
| 246 | (&bp->def_status_blk->sp_sb.\ |
| 247 | index_values[HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS]) |
| 248 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 249 | /** |
| 250 | * CIDs and CLIDs: |
| 251 | * CLIDs below is a CLID for func 0, then the CLID for other |
| 252 | * functions will be calculated by the formula: |
| 253 | * |
| 254 | * FUNC_N_CLID_X = N * NUM_SPECIAL_CLIENTS + FUNC_0_CLID_X |
| 255 | * |
| 256 | */ |
David S. Miller | 1805b2f | 2011-10-24 18:18:09 -0400 | [diff] [blame] | 257 | enum { |
| 258 | BNX2X_ISCSI_ETH_CL_ID_IDX, |
| 259 | BNX2X_FCOE_ETH_CL_ID_IDX, |
| 260 | BNX2X_MAX_CNIC_ETH_CL_ID_IDX, |
| 261 | }; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 262 | |
Michael Chan | f78afb3 | 2013-09-18 01:50:38 -0700 | [diff] [blame] | 263 | /* use a value high enough to be above all the PFs, which has least significant |
| 264 | * nibble as 8, so when cnic needs to come up with a CID for UIO to use to |
| 265 | * calculate doorbell address according to old doorbell configuration scheme |
| 266 | * (db_msg_sz 1 << 7 * cid + 0x40 DPM offset) it can come up with a valid number |
| 267 | * We must avoid coming up with cid 8 for iscsi since according to this method |
| 268 | * the designated UIO cid will come out 0 and it has a special handling for that |
| 269 | * case which doesn't suit us. Therefore will will cieling to closes cid which |
| 270 | * has least signigifcant nibble 8 and if it is 8 we will move forward to 0x18. |
| 271 | */ |
| 272 | |
| 273 | #define BNX2X_1st_NON_L2_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * \ |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 274 | (bp)->max_cos) |
Michael Chan | f78afb3 | 2013-09-18 01:50:38 -0700 | [diff] [blame] | 275 | /* amount of cids traversed by UIO's DPM addition to doorbell */ |
| 276 | #define UIO_DPM 8 |
| 277 | /* roundup to DPM offset */ |
| 278 | #define UIO_ROUNDUP(bp) (roundup(BNX2X_1st_NON_L2_ETH_CID(bp), \ |
| 279 | UIO_DPM)) |
| 280 | /* offset to nearest value which has lsb nibble matching DPM */ |
| 281 | #define UIO_CID_OFFSET(bp) ((UIO_ROUNDUP(bp) + UIO_DPM) % \ |
| 282 | (UIO_DPM * 2)) |
| 283 | /* add offset to rounded-up cid to get a value which could be used with UIO */ |
| 284 | #define UIO_DPM_ALIGN(bp) (UIO_ROUNDUP(bp) + UIO_CID_OFFSET(bp)) |
| 285 | /* but wait - avoid UIO special case for cid 0 */ |
| 286 | #define UIO_DPM_CID0_OFFSET(bp) ((UIO_DPM * 2) * \ |
| 287 | (UIO_DPM_ALIGN(bp) == UIO_DPM)) |
| 288 | /* Properly DPM aligned CID dajusted to cid 0 secal case */ |
| 289 | #define BNX2X_CNIC_START_ETH_CID(bp) (UIO_DPM_ALIGN(bp) + \ |
| 290 | (UIO_DPM_CID0_OFFSET(bp))) |
| 291 | /* how many cids were wasted - need this value for cid allocation */ |
| 292 | #define UIO_CID_PAD(bp) (BNX2X_CNIC_START_ETH_CID(bp) - \ |
| 293 | BNX2X_1st_NON_L2_ETH_CID(bp)) |
David S. Miller | 1805b2f | 2011-10-24 18:18:09 -0400 | [diff] [blame] | 294 | /* iSCSI L2 */ |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 295 | #define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp)) |
David S. Miller | 1805b2f | 2011-10-24 18:18:09 -0400 | [diff] [blame] | 296 | /* FCoE L2 */ |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 297 | #define BNX2X_FCOE_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 1) |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 298 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 299 | #define CNIC_SUPPORT(bp) ((bp)->cnic_support) |
| 300 | #define CNIC_ENABLED(bp) ((bp)->cnic_enabled) |
| 301 | #define CNIC_LOADED(bp) ((bp)->cnic_loaded) |
| 302 | #define FCOE_INIT(bp) ((bp)->fcoe_init) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 303 | |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 304 | #define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ |
| 305 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR |
| 306 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 307 | #define SM_RX_ID 0 |
| 308 | #define SM_TX_ID 1 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 309 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 310 | /* defines for multiple tx priority indices */ |
| 311 | #define FIRST_TX_ONLY_COS_INDEX 1 |
| 312 | #define FIRST_TX_COS_INDEX 0 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 313 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 314 | /* rules for calculating the cids of tx-only connections */ |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 315 | #define CID_TO_FP(cid, bp) ((cid) % BNX2X_NUM_NON_CNIC_QUEUES(bp)) |
| 316 | #define CID_COS_TO_TX_ONLY_CID(cid, cos, bp) \ |
| 317 | (cid + cos * BNX2X_NUM_NON_CNIC_QUEUES(bp)) |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 318 | |
| 319 | /* fp index inside class of service range */ |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 320 | #define FP_COS_TO_TXQ(fp, cos, bp) \ |
| 321 | ((fp)->index + cos * BNX2X_NUM_NON_CNIC_QUEUES(bp)) |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 322 | |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 323 | /* Indexes for transmission queues array: |
| 324 | * txdata for RSS i CoS j is at location i + (j * num of RSS) |
| 325 | * txdata for FCoE (if exist) is at location max cos * num of RSS |
| 326 | * txdata for FWD (if exist) is one location after FCoE |
| 327 | * txdata for OOO (if exist) is one location after FWD |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 328 | */ |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 329 | enum { |
| 330 | FCOE_TXQ_IDX_OFFSET, |
| 331 | FWD_TXQ_IDX_OFFSET, |
| 332 | OOO_TXQ_IDX_OFFSET, |
| 333 | }; |
| 334 | #define MAX_ETH_TXQ_IDX(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * (bp)->max_cos) |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 335 | #define FCOE_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp) + FCOE_TXQ_IDX_OFFSET) |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 336 | |
| 337 | /* fast path */ |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 338 | /* |
| 339 | * This driver uses new build_skb() API : |
| 340 | * RX ring buffer contains pointer to kmalloc() data only, |
| 341 | * skb are built only after Hardware filled the frame. |
| 342 | */ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 343 | struct sw_rx_bd { |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 344 | u8 *data; |
FUJITA Tomonori | 1a98314 | 2010-04-04 01:51:03 +0000 | [diff] [blame] | 345 | DEFINE_DMA_UNMAP_ADDR(mapping); |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 346 | }; |
| 347 | |
| 348 | struct sw_tx_bd { |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 349 | struct sk_buff *skb; |
| 350 | u16 first_bd; |
Eilon Greenstein | ca00392 | 2009-08-12 22:53:28 -0700 | [diff] [blame] | 351 | u8 flags; |
| 352 | /* Set on the first BD descriptor when there is a split BD */ |
| 353 | #define BNX2X_TSO_SPLIT_BD (1<<0) |
Dmitry Kravkov | fe26566d | 2014-07-24 18:54:47 +0300 | [diff] [blame] | 354 | #define BNX2X_HAS_SECOND_PBD (1<<1) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 355 | }; |
| 356 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 357 | struct sw_rx_page { |
| 358 | struct page *page; |
FUJITA Tomonori | 1a98314 | 2010-04-04 01:51:03 +0000 | [diff] [blame] | 359 | DEFINE_DMA_UNMAP_ADDR(mapping); |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 360 | }; |
| 361 | |
Eilon Greenstein | ca00392 | 2009-08-12 22:53:28 -0700 | [diff] [blame] | 362 | union db_prod { |
| 363 | struct doorbell_set_prod data; |
| 364 | u32 raw; |
| 365 | }; |
| 366 | |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 367 | /* dropless fc FW/HW related params */ |
| 368 | #define BRB_SIZE(bp) (CHIP_IS_E3(bp) ? 1024 : 512) |
| 369 | #define MAX_AGG_QS(bp) (CHIP_IS_E1(bp) ? \ |
| 370 | ETH_MAX_AGGREGATION_QUEUES_E1 :\ |
| 371 | ETH_MAX_AGGREGATION_QUEUES_E1H_E2) |
| 372 | #define FW_DROP_LEVEL(bp) (3 + MAX_SPQ_PENDING + MAX_AGG_QS(bp)) |
| 373 | #define FW_PREFETCH_CNT 16 |
| 374 | #define DROPLESS_FC_HEADROOM 100 |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 375 | |
| 376 | /* MC hsi */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 377 | #define BCM_PAGE_SHIFT 12 |
| 378 | #define BCM_PAGE_SIZE (1 << BCM_PAGE_SHIFT) |
| 379 | #define BCM_PAGE_MASK (~(BCM_PAGE_SIZE - 1)) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 380 | #define BCM_PAGE_ALIGN(addr) (((addr) + BCM_PAGE_SIZE - 1) & BCM_PAGE_MASK) |
| 381 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 382 | #define PAGES_PER_SGE_SHIFT 0 |
| 383 | #define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT) |
| 384 | #define SGE_PAGE_SIZE PAGE_SIZE |
| 385 | #define SGE_PAGE_SHIFT PAGE_SHIFT |
| 386 | #define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))(addr)) |
Ariel Elior | 8d9ac29 | 2013-01-01 05:22:27 +0000 | [diff] [blame] | 387 | #define SGE_PAGES (SGE_PAGE_SIZE * PAGES_PER_SGE) |
| 388 | #define TPA_AGG_SIZE min_t(u32, (min_t(u32, 8, MAX_SKB_FRAGS) * \ |
| 389 | SGE_PAGES), 0xffff) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 390 | |
| 391 | /* SGE ring related macros */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 392 | #define NUM_RX_SGE_PAGES 2 |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 393 | #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 394 | #define NEXT_PAGE_SGE_DESC_CNT 2 |
| 395 | #define MAX_RX_SGE_CNT (RX_SGE_CNT - NEXT_PAGE_SGE_DESC_CNT) |
Eilon Greenstein | 3347162 | 2008-08-13 15:59:08 -0700 | [diff] [blame] | 396 | /* RX_SGE_CNT is promised to be a power of 2 */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 397 | #define RX_SGE_MASK (RX_SGE_CNT - 1) |
| 398 | #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) |
| 399 | #define MAX_RX_SGE (NUM_RX_SGE - 1) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 400 | #define NEXT_SGE_IDX(x) ((((x) & RX_SGE_MASK) == \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 401 | (MAX_RX_SGE_CNT - 1)) ? \ |
| 402 | (x) + 1 + NEXT_PAGE_SGE_DESC_CNT : \ |
| 403 | (x) + 1) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 404 | #define RX_SGE(x) ((x) & MAX_RX_SGE) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 405 | |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 406 | /* |
| 407 | * Number of required SGEs is the sum of two: |
| 408 | * 1. Number of possible opened aggregations (next packet for |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 409 | * these aggregations will probably consume SGE immediately) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 410 | * 2. Rest of BRB blocks divided by 2 (block will consume new SGE only |
| 411 | * after placement on BD for new TPA aggregation) |
| 412 | * |
| 413 | * Takes into account NEXT_PAGE_SGE_DESC_CNT "next" elements on each page |
| 414 | */ |
| 415 | #define NUM_SGE_REQ (MAX_AGG_QS(bp) + \ |
| 416 | (BRB_SIZE(bp) - MAX_AGG_QS(bp)) / 2) |
| 417 | #define NUM_SGE_PG_REQ ((NUM_SGE_REQ + MAX_RX_SGE_CNT - 1) / \ |
| 418 | MAX_RX_SGE_CNT) |
| 419 | #define SGE_TH_LO(bp) (NUM_SGE_REQ + \ |
| 420 | NUM_SGE_PG_REQ * NEXT_PAGE_SGE_DESC_CNT) |
| 421 | #define SGE_TH_HI(bp) (SGE_TH_LO(bp) + DROPLESS_FC_HEADROOM) |
| 422 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 423 | /* Manipulate a bit vector defined as an array of u64 */ |
| 424 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 425 | /* Number of bits in one sge_mask array element */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 426 | #define BIT_VEC64_ELEM_SZ 64 |
| 427 | #define BIT_VEC64_ELEM_SHIFT 6 |
| 428 | #define BIT_VEC64_ELEM_MASK ((u64)BIT_VEC64_ELEM_SZ - 1) |
| 429 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 430 | #define __BIT_VEC64_SET_BIT(el, bit) \ |
| 431 | do { \ |
| 432 | el = ((el) | ((u64)0x1 << (bit))); \ |
| 433 | } while (0) |
| 434 | |
| 435 | #define __BIT_VEC64_CLEAR_BIT(el, bit) \ |
| 436 | do { \ |
| 437 | el = ((el) & (~((u64)0x1 << (bit)))); \ |
| 438 | } while (0) |
| 439 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 440 | #define BIT_VEC64_SET_BIT(vec64, idx) \ |
| 441 | __BIT_VEC64_SET_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \ |
| 442 | (idx) & BIT_VEC64_ELEM_MASK) |
| 443 | |
| 444 | #define BIT_VEC64_CLEAR_BIT(vec64, idx) \ |
| 445 | __BIT_VEC64_CLEAR_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \ |
| 446 | (idx) & BIT_VEC64_ELEM_MASK) |
| 447 | |
| 448 | #define BIT_VEC64_TEST_BIT(vec64, idx) \ |
| 449 | (((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT] >> \ |
| 450 | ((idx) & BIT_VEC64_ELEM_MASK)) & 0x1) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 451 | |
| 452 | /* Creates a bitmask of all ones in less significant bits. |
| 453 | idx - index of the most significant bit in the created mask */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 454 | #define BIT_VEC64_ONES_MASK(idx) \ |
| 455 | (((u64)0x1 << (((idx) & BIT_VEC64_ELEM_MASK) + 1)) - 1) |
| 456 | #define BIT_VEC64_ELEM_ONE_MASK ((u64)(~0)) |
| 457 | |
| 458 | /*******************************************************/ |
| 459 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 460 | /* Number of u64 elements in SGE mask array */ |
Dmitry Kravkov | b363782 | 2011-11-13 04:34:27 +0000 | [diff] [blame] | 461 | #define RX_SGE_MASK_LEN (NUM_RX_SGE / BIT_VEC64_ELEM_SZ) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 462 | #define RX_SGE_MASK_LEN_MASK (RX_SGE_MASK_LEN - 1) |
| 463 | #define NEXT_SGE_MASK_ELEM(el) (((el) + 1) & RX_SGE_MASK_LEN_MASK) |
| 464 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 465 | union host_hc_status_block { |
| 466 | /* pointer to fp status block e1x */ |
| 467 | struct host_hc_status_block_e1x *e1x_sb; |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 468 | /* pointer to fp status block e2 */ |
| 469 | struct host_hc_status_block_e2 *e2_sb; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 470 | }; |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 471 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 472 | struct bnx2x_agg_info { |
| 473 | /* |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 474 | * First aggregation buffer is a data buffer, the following - are pages. |
| 475 | * We will preallocate the data buffer for each aggregation when |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 476 | * we open the interface and will replace the BD at the consumer |
| 477 | * with this one when we receive the TPA_START CQE in order to |
| 478 | * keep the Rx BD ring consistent. |
| 479 | */ |
| 480 | struct sw_rx_bd first_buf; |
| 481 | u8 tpa_state; |
| 482 | #define BNX2X_TPA_START 1 |
| 483 | #define BNX2X_TPA_STOP 2 |
| 484 | #define BNX2X_TPA_ERROR 3 |
| 485 | u8 placement_offset; |
| 486 | u16 parsing_flags; |
| 487 | u16 vlan_tag; |
| 488 | u16 len_on_bd; |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 489 | u32 rxhash; |
Tom Herbert | 5495ab7 | 2013-12-19 08:59:08 -0800 | [diff] [blame] | 490 | enum pkt_hash_types rxhash_type; |
Dmitry Kravkov | 621b4d6 | 2012-02-20 09:59:08 +0000 | [diff] [blame] | 491 | u16 gro_size; |
| 492 | u16 full_page; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 493 | }; |
| 494 | |
| 495 | #define Q_STATS_OFFSET32(stat_name) \ |
| 496 | (offsetof(struct bnx2x_eth_q_stats, stat_name) / 4) |
| 497 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 498 | struct bnx2x_fp_txdata { |
| 499 | |
| 500 | struct sw_tx_bd *tx_buf_ring; |
| 501 | |
| 502 | union eth_tx_bd_types *tx_desc_ring; |
| 503 | dma_addr_t tx_desc_mapping; |
| 504 | |
| 505 | u32 cid; |
| 506 | |
| 507 | union db_prod tx_db; |
| 508 | |
| 509 | u16 tx_pkt_prod; |
| 510 | u16 tx_pkt_cons; |
| 511 | u16 tx_bd_prod; |
| 512 | u16 tx_bd_cons; |
| 513 | |
| 514 | unsigned long tx_pkt; |
| 515 | |
| 516 | __le16 *tx_cons_sb; |
| 517 | |
| 518 | int txq_index; |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 519 | struct bnx2x_fastpath *parent_fp; |
| 520 | int tx_ring_size; |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 521 | }; |
| 522 | |
Dmitry Kravkov | 621b4d6 | 2012-02-20 09:59:08 +0000 | [diff] [blame] | 523 | enum bnx2x_tpa_mode_t { |
Michal Schmidt | 7e6b4d4 | 2015-04-28 11:34:22 +0200 | [diff] [blame] | 524 | TPA_MODE_DISABLED, |
Dmitry Kravkov | 621b4d6 | 2012-02-20 09:59:08 +0000 | [diff] [blame] | 525 | TPA_MODE_LRO, |
| 526 | TPA_MODE_GRO |
| 527 | }; |
| 528 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 529 | struct bnx2x_fastpath { |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 530 | struct bnx2x *bp; /* parent */ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 531 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 532 | struct napi_struct napi; |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 533 | |
Cong Wang | e0d1095 | 2013-08-01 11:10:25 +0800 | [diff] [blame] | 534 | #ifdef CONFIG_NET_RX_BUSY_POLL |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 535 | unsigned long busy_poll_state; |
| 536 | #endif |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 537 | |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 538 | union host_hc_status_block status_blk; |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 539 | /* chip independent shortcuts into sb structure */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 540 | __le16 *sb_index_values; |
| 541 | __le16 *sb_running_index; |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 542 | /* chip independent shortcut into rx_prods_offset memory */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 543 | u32 ustorm_rx_prods_offset; |
| 544 | |
Vladislav Zolotarov | a8c94b9 | 2011-02-06 11:21:02 -0800 | [diff] [blame] | 545 | u32 rx_buf_size; |
Eric Dumazet | d46d132 | 2012-12-10 12:16:06 +0000 | [diff] [blame] | 546 | u32 rx_frag_size; /* 0 if kmalloced(), or rx_buf_size + NET_SKB_PAD */ |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 547 | dma_addr_t status_blk_mapping; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 548 | |
Dmitry Kravkov | 621b4d6 | 2012-02-20 09:59:08 +0000 | [diff] [blame] | 549 | enum bnx2x_tpa_mode_t mode; |
| 550 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 551 | u8 max_cos; /* actual number of active tx coses */ |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 552 | struct bnx2x_fp_txdata *txdata_ptr[BNX2X_MULTI_TX_COS]; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 553 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 554 | struct sw_rx_bd *rx_buf_ring; /* BDs mappings ring */ |
| 555 | struct sw_rx_page *rx_page_ring; /* SGE pages mappings ring */ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 556 | |
| 557 | struct eth_rx_bd *rx_desc_ring; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 558 | dma_addr_t rx_desc_mapping; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 559 | |
| 560 | union eth_rx_cqe *rx_comp_ring; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 561 | dma_addr_t rx_comp_mapping; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 562 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 563 | /* SGE ring */ |
| 564 | struct eth_rx_sge *rx_sge_ring; |
| 565 | dma_addr_t rx_sge_mapping; |
| 566 | |
| 567 | u64 sge_mask[RX_SGE_MASK_LEN]; |
| 568 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 569 | u32 cid; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 570 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 571 | __le16 fp_hc_idx; |
| 572 | |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 573 | u8 index; /* number in fp array */ |
Dmitry Kravkov | f233caf | 2011-11-13 04:34:22 +0000 | [diff] [blame] | 574 | u8 rx_queue; /* index for skb_record */ |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 575 | u8 cl_id; /* eth client id */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 576 | u8 cl_qzone_id; |
| 577 | u8 fw_sb_id; /* status block number in FW */ |
| 578 | u8 igu_sb_id; /* status block number in HW */ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 579 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 580 | u16 rx_bd_prod; |
| 581 | u16 rx_bd_cons; |
| 582 | u16 rx_comp_prod; |
| 583 | u16 rx_comp_cons; |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 584 | u16 rx_sge_prod; |
| 585 | /* The last maximal completed SGE */ |
| 586 | u16 last_max_sge; |
Eilon Greenstein | 4781bfa | 2009-02-12 08:38:17 +0000 | [diff] [blame] | 587 | __le16 *rx_cons_sb; |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 588 | unsigned long rx_pkt, |
Yitchak Gertner | 66e855f | 2008-08-13 15:49:05 -0700 | [diff] [blame] | 589 | rx_calls; |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 590 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 591 | /* TPA related */ |
Barak Witkowski | 15192a8 | 2012-06-19 07:48:28 +0000 | [diff] [blame] | 592 | struct bnx2x_agg_info *tpa_info; |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 593 | #ifdef BNX2X_STOP_ON_ERROR |
| 594 | u64 tpa_queue_used; |
| 595 | #endif |
Eilon Greenstein | ca00392 | 2009-08-12 22:53:28 -0700 | [diff] [blame] | 596 | /* The size is calculated using the following: |
| 597 | sizeof name field from netdev structure + |
| 598 | 4 ('-Xx-' string) + |
| 599 | 4 (for the digits and to make it DWORD aligned) */ |
| 600 | #define FP_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8) |
| 601 | char name[FP_NAME_SIZE]; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 602 | }; |
| 603 | |
Barak Witkowski | 15192a8 | 2012-06-19 07:48:28 +0000 | [diff] [blame] | 604 | #define bnx2x_fp(bp, nr, var) ((bp)->fp[(nr)].var) |
| 605 | #define bnx2x_sp_obj(bp, fp) ((bp)->sp_objs[(fp)->index]) |
| 606 | #define bnx2x_fp_stats(bp, fp) (&((bp)->fp_stats[(fp)->index])) |
| 607 | #define bnx2x_fp_qstats(bp, fp) (&((bp)->fp_stats[(fp)->index].eth_q_stats)) |
Vladislav Zolotarov | a8c94b9 | 2011-02-06 11:21:02 -0800 | [diff] [blame] | 608 | |
Cong Wang | e0d1095 | 2013-08-01 11:10:25 +0800 | [diff] [blame] | 609 | #ifdef CONFIG_NET_RX_BUSY_POLL |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 610 | |
| 611 | enum bnx2x_fp_state { |
| 612 | BNX2X_STATE_FP_NAPI = BIT(0), /* NAPI handler owns the queue */ |
| 613 | |
| 614 | BNX2X_STATE_FP_NAPI_REQ_BIT = 1, /* NAPI would like to own the queue */ |
| 615 | BNX2X_STATE_FP_NAPI_REQ = BIT(1), |
| 616 | |
| 617 | BNX2X_STATE_FP_POLL_BIT = 2, |
| 618 | BNX2X_STATE_FP_POLL = BIT(2), /* busy_poll owns the queue */ |
| 619 | |
| 620 | BNX2X_STATE_FP_DISABLE_BIT = 3, /* queue is dismantled */ |
| 621 | }; |
| 622 | |
| 623 | static inline void bnx2x_fp_busy_poll_init(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 624 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 625 | WRITE_ONCE(fp->busy_poll_state, 0); |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | /* called from the device poll routine to get ownership of a FP */ |
| 629 | static inline bool bnx2x_fp_lock_napi(struct bnx2x_fastpath *fp) |
| 630 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 631 | unsigned long prev, old = READ_ONCE(fp->busy_poll_state); |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 632 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 633 | while (1) { |
| 634 | switch (old) { |
| 635 | case BNX2X_STATE_FP_POLL: |
| 636 | /* make sure bnx2x_fp_lock_poll() wont starve us */ |
| 637 | set_bit(BNX2X_STATE_FP_NAPI_REQ_BIT, |
| 638 | &fp->busy_poll_state); |
| 639 | /* fallthrough */ |
| 640 | case BNX2X_STATE_FP_POLL | BNX2X_STATE_FP_NAPI_REQ: |
| 641 | return false; |
| 642 | default: |
| 643 | break; |
| 644 | } |
| 645 | prev = cmpxchg(&fp->busy_poll_state, old, BNX2X_STATE_FP_NAPI); |
| 646 | if (unlikely(prev != old)) { |
| 647 | old = prev; |
| 648 | continue; |
| 649 | } |
| 650 | return true; |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 651 | } |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 652 | } |
| 653 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 654 | static inline void bnx2x_fp_unlock_napi(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 655 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 656 | smp_wmb(); |
| 657 | fp->busy_poll_state = 0; |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 658 | } |
| 659 | |
| 660 | /* called from bnx2x_low_latency_poll() */ |
| 661 | static inline bool bnx2x_fp_lock_poll(struct bnx2x_fastpath *fp) |
| 662 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 663 | return cmpxchg(&fp->busy_poll_state, 0, BNX2X_STATE_FP_POLL) == 0; |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 664 | } |
| 665 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 666 | static inline void bnx2x_fp_unlock_poll(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 667 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 668 | smp_mb__before_atomic(); |
| 669 | clear_bit(BNX2X_STATE_FP_POLL_BIT, &fp->busy_poll_state); |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 670 | } |
| 671 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 672 | /* true if a socket is polling */ |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 673 | static inline bool bnx2x_fp_ll_polling(struct bnx2x_fastpath *fp) |
| 674 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 675 | return READ_ONCE(fp->busy_poll_state) & BNX2X_STATE_FP_POLL; |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 676 | } |
Yuval Mintz | 9a2620c | 2014-01-07 12:07:41 +0200 | [diff] [blame] | 677 | |
| 678 | /* false if fp is currently owned */ |
| 679 | static inline bool bnx2x_fp_ll_disable(struct bnx2x_fastpath *fp) |
| 680 | { |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 681 | set_bit(BNX2X_STATE_FP_DISABLE_BIT, &fp->busy_poll_state); |
| 682 | return !bnx2x_fp_ll_polling(fp); |
Yuval Mintz | 9a2620c | 2014-01-07 12:07:41 +0200 | [diff] [blame] | 683 | |
Yuval Mintz | 9a2620c | 2014-01-07 12:07:41 +0200 | [diff] [blame] | 684 | } |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 685 | #else |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 686 | static inline void bnx2x_fp_busy_poll_init(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 687 | { |
| 688 | } |
| 689 | |
| 690 | static inline bool bnx2x_fp_lock_napi(struct bnx2x_fastpath *fp) |
| 691 | { |
| 692 | return true; |
| 693 | } |
| 694 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 695 | static inline void bnx2x_fp_unlock_napi(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 696 | { |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 697 | } |
| 698 | |
| 699 | static inline bool bnx2x_fp_lock_poll(struct bnx2x_fastpath *fp) |
| 700 | { |
| 701 | return false; |
| 702 | } |
| 703 | |
Eric Dumazet | 074975d | 2015-04-14 18:45:00 -0700 | [diff] [blame] | 704 | static inline void bnx2x_fp_unlock_poll(struct bnx2x_fastpath *fp) |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 705 | { |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 706 | } |
| 707 | |
| 708 | static inline bool bnx2x_fp_ll_polling(struct bnx2x_fastpath *fp) |
| 709 | { |
| 710 | return false; |
| 711 | } |
Yuval Mintz | 9a2620c | 2014-01-07 12:07:41 +0200 | [diff] [blame] | 712 | static inline bool bnx2x_fp_ll_disable(struct bnx2x_fastpath *fp) |
| 713 | { |
| 714 | return true; |
| 715 | } |
Cong Wang | e0d1095 | 2013-08-01 11:10:25 +0800 | [diff] [blame] | 716 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
Dmitry Kravkov | 8f20aa5 | 2013-06-19 01:36:04 +0300 | [diff] [blame] | 717 | |
Vladislav Zolotarov | a8c94b9 | 2011-02-06 11:21:02 -0800 | [diff] [blame] | 718 | /* Use 2500 as a mini-jumbo MTU for FCoE */ |
| 719 | #define BNX2X_FCOE_MINI_JUMBO_MTU 2500 |
| 720 | |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 721 | #define FCOE_IDX_OFFSET 0 |
| 722 | |
| 723 | #define FCOE_IDX(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) + \ |
| 724 | FCOE_IDX_OFFSET) |
| 725 | #define bnx2x_fcoe_fp(bp) (&bp->fp[FCOE_IDX(bp)]) |
| 726 | #define bnx2x_fcoe(bp, var) (bnx2x_fcoe_fp(bp)->var) |
Barak Witkowski | 15192a8 | 2012-06-19 07:48:28 +0000 | [diff] [blame] | 727 | #define bnx2x_fcoe_inner_sp_obj(bp) (&bp->sp_objs[FCOE_IDX(bp)]) |
| 728 | #define bnx2x_fcoe_sp_obj(bp, var) (bnx2x_fcoe_inner_sp_obj(bp)->var) |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 729 | #define bnx2x_fcoe_tx(bp, var) (bnx2x_fcoe_fp(bp)-> \ |
| 730 | txdata_ptr[FIRST_TX_COS_INDEX] \ |
| 731 | ->var) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 732 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 733 | #define IS_ETH_FP(fp) ((fp)->index < BNX2X_NUM_ETH_QUEUES((fp)->bp)) |
| 734 | #define IS_FCOE_FP(fp) ((fp)->index == FCOE_IDX((fp)->bp)) |
| 735 | #define IS_FCOE_IDX(idx) ((idx) == FCOE_IDX(bp)) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 736 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 737 | /* MC hsi */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 738 | #define MAX_FETCH_BD 13 /* HW max BDs per packet */ |
| 739 | #define RX_COPY_THRESH 92 |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 740 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 741 | #define NUM_TX_RINGS 16 |
Eilon Greenstein | ca00392 | 2009-08-12 22:53:28 -0700 | [diff] [blame] | 742 | #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 743 | #define NEXT_PAGE_TX_DESC_CNT 1 |
| 744 | #define MAX_TX_DESC_CNT (TX_DESC_CNT - NEXT_PAGE_TX_DESC_CNT) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 745 | #define NUM_TX_BD (TX_DESC_CNT * NUM_TX_RINGS) |
| 746 | #define MAX_TX_BD (NUM_TX_BD - 1) |
| 747 | #define MAX_TX_AVAIL (MAX_TX_DESC_CNT * NUM_TX_RINGS - 2) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 748 | #define NEXT_TX_IDX(x) ((((x) & MAX_TX_DESC_CNT) == \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 749 | (MAX_TX_DESC_CNT - 1)) ? \ |
| 750 | (x) + 1 + NEXT_PAGE_TX_DESC_CNT : \ |
| 751 | (x) + 1) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 752 | #define TX_BD(x) ((x) & MAX_TX_BD) |
| 753 | #define TX_BD_POFF(x) ((x) & MAX_TX_DESC_CNT) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 754 | |
Dmitry Kravkov | 7df2dc6 | 2012-06-25 22:32:50 +0000 | [diff] [blame] | 755 | /* number of NEXT_PAGE descriptors may be required during placement */ |
| 756 | #define NEXT_CNT_PER_TX_PKT(bds) \ |
| 757 | (((bds) + MAX_TX_DESC_CNT - 1) / \ |
| 758 | MAX_TX_DESC_CNT * NEXT_PAGE_TX_DESC_CNT) |
| 759 | /* max BDs per tx packet w/o next_pages: |
| 760 | * START_BD - describes packed |
| 761 | * START_BD(splitted) - includes unpaged data segment for GSO |
| 762 | * PARSING_BD - for TSO and CSUM data |
Dmitry Kravkov | a848ade | 2013-03-18 06:51:03 +0000 | [diff] [blame] | 763 | * PARSING_BD2 - for encapsulation data |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 764 | * Frag BDs - describes pages for frags |
Dmitry Kravkov | 7df2dc6 | 2012-06-25 22:32:50 +0000 | [diff] [blame] | 765 | */ |
Dmitry Kravkov | a848ade | 2013-03-18 06:51:03 +0000 | [diff] [blame] | 766 | #define BDS_PER_TX_PKT 4 |
Dmitry Kravkov | 7df2dc6 | 2012-06-25 22:32:50 +0000 | [diff] [blame] | 767 | #define MAX_BDS_PER_TX_PKT (MAX_SKB_FRAGS + BDS_PER_TX_PKT) |
| 768 | /* max BDs per tx packet including next pages */ |
| 769 | #define MAX_DESC_PER_TX_PKT (MAX_BDS_PER_TX_PKT + \ |
| 770 | NEXT_CNT_PER_TX_PKT(MAX_BDS_PER_TX_PKT)) |
| 771 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 772 | /* The RX BD ring is special, each bd is 8 bytes but the last one is 16 */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 773 | #define NUM_RX_RINGS 8 |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 774 | #define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 775 | #define NEXT_PAGE_RX_DESC_CNT 2 |
| 776 | #define MAX_RX_DESC_CNT (RX_DESC_CNT - NEXT_PAGE_RX_DESC_CNT) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 777 | #define RX_DESC_MASK (RX_DESC_CNT - 1) |
| 778 | #define NUM_RX_BD (RX_DESC_CNT * NUM_RX_RINGS) |
| 779 | #define MAX_RX_BD (NUM_RX_BD - 1) |
| 780 | #define MAX_RX_AVAIL (MAX_RX_DESC_CNT * NUM_RX_RINGS - 2) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 781 | |
| 782 | /* dropless fc calculations for BDs |
| 783 | * |
| 784 | * Number of BDs should as number of buffers in BRB: |
| 785 | * Low threshold takes into account NEXT_PAGE_RX_DESC_CNT |
| 786 | * "next" elements on each page |
| 787 | */ |
| 788 | #define NUM_BD_REQ BRB_SIZE(bp) |
| 789 | #define NUM_BD_PG_REQ ((NUM_BD_REQ + MAX_RX_DESC_CNT - 1) / \ |
| 790 | MAX_RX_DESC_CNT) |
| 791 | #define BD_TH_LO(bp) (NUM_BD_REQ + \ |
| 792 | NUM_BD_PG_REQ * NEXT_PAGE_RX_DESC_CNT + \ |
| 793 | FW_DROP_LEVEL(bp)) |
| 794 | #define BD_TH_HI(bp) (BD_TH_LO(bp) + DROPLESS_FC_HEADROOM) |
| 795 | |
| 796 | #define MIN_RX_AVAIL ((bp)->dropless_fc ? BD_TH_HI(bp) + 128 : 128) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 797 | |
| 798 | #define MIN_RX_SIZE_TPA_HW (CHIP_IS_E1(bp) ? \ |
| 799 | ETH_MIN_RX_CQES_WITH_TPA_E1 : \ |
| 800 | ETH_MIN_RX_CQES_WITH_TPA_E1H_E2) |
| 801 | #define MIN_RX_SIZE_NONTPA_HW ETH_MIN_RX_CQES_WITHOUT_TPA |
| 802 | #define MIN_RX_SIZE_TPA (max_t(u32, MIN_RX_SIZE_TPA_HW, MIN_RX_AVAIL)) |
| 803 | #define MIN_RX_SIZE_NONTPA (max_t(u32, MIN_RX_SIZE_NONTPA_HW,\ |
| 804 | MIN_RX_AVAIL)) |
| 805 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 806 | #define NEXT_RX_IDX(x) ((((x) & RX_DESC_MASK) == \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 807 | (MAX_RX_DESC_CNT - 1)) ? \ |
| 808 | (x) + 1 + NEXT_PAGE_RX_DESC_CNT : \ |
| 809 | (x) + 1) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 810 | #define RX_BD(x) ((x) & MAX_RX_BD) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 811 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 812 | /* |
| 813 | * As long as CQE is X times bigger than BD entry we have to allocate X times |
| 814 | * more pages for CQ ring in order to keep it balanced with BD ring |
| 815 | */ |
| 816 | #define CQE_BD_REL (sizeof(union eth_rx_cqe) / sizeof(struct eth_rx_bd)) |
| 817 | #define NUM_RCQ_RINGS (NUM_RX_RINGS * CQE_BD_REL) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 818 | #define RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 819 | #define NEXT_PAGE_RCQ_DESC_CNT 1 |
| 820 | #define MAX_RCQ_DESC_CNT (RCQ_DESC_CNT - NEXT_PAGE_RCQ_DESC_CNT) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 821 | #define NUM_RCQ_BD (RCQ_DESC_CNT * NUM_RCQ_RINGS) |
| 822 | #define MAX_RCQ_BD (NUM_RCQ_BD - 1) |
| 823 | #define MAX_RCQ_AVAIL (MAX_RCQ_DESC_CNT * NUM_RCQ_RINGS - 2) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 824 | #define NEXT_RCQ_IDX(x) ((((x) & MAX_RCQ_DESC_CNT) == \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 825 | (MAX_RCQ_DESC_CNT - 1)) ? \ |
| 826 | (x) + 1 + NEXT_PAGE_RCQ_DESC_CNT : \ |
| 827 | (x) + 1) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 828 | #define RCQ_BD(x) ((x) & MAX_RCQ_BD) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 829 | |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 830 | /* dropless fc calculations for RCQs |
| 831 | * |
| 832 | * Number of RCQs should be as number of buffers in BRB: |
| 833 | * Low threshold takes into account NEXT_PAGE_RCQ_DESC_CNT |
| 834 | * "next" elements on each page |
| 835 | */ |
| 836 | #define NUM_RCQ_REQ BRB_SIZE(bp) |
| 837 | #define NUM_RCQ_PG_REQ ((NUM_BD_REQ + MAX_RCQ_DESC_CNT - 1) / \ |
| 838 | MAX_RCQ_DESC_CNT) |
| 839 | #define RCQ_TH_LO(bp) (NUM_RCQ_REQ + \ |
| 840 | NUM_RCQ_PG_REQ * NEXT_PAGE_RCQ_DESC_CNT + \ |
| 841 | FW_DROP_LEVEL(bp)) |
| 842 | #define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) |
| 843 | |
Eilon Greenstein | 3347162 | 2008-08-13 15:59:08 -0700 | [diff] [blame] | 844 | /* This is needed for determining of last_max */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 845 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) |
| 846 | #define SUB_S32(a, b) (s32)((s32)(a) - (s32)(b)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 847 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 848 | #define BNX2X_SWCID_SHIFT 17 |
| 849 | #define BNX2X_SWCID_MASK ((0x1 << BNX2X_SWCID_SHIFT) - 1) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 850 | |
| 851 | /* used on a CID received from the HW */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 852 | #define SW_CID(x) (le32_to_cpu(x) & BNX2X_SWCID_MASK) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 853 | #define CQE_CMD(x) (le32_to_cpu(x) >> \ |
| 854 | COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT) |
| 855 | |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 856 | #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr_hi), \ |
| 857 | le32_to_cpu((bd)->addr_lo)) |
| 858 | #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes)) |
| 859 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 860 | #define BNX2X_DB_MIN_SHIFT 3 /* 8 bytes */ |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 861 | #define BNX2X_DB_SHIFT 3 /* 8 bytes*/ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 862 | #if (BNX2X_DB_SHIFT < BNX2X_DB_MIN_SHIFT) |
| 863 | #error "Min DB doorbell stride is 8" |
| 864 | #endif |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 865 | #define DOORBELL(bp, cid, val) \ |
| 866 | do { \ |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 867 | writel((u32)(val), bp->doorbells + (bp->db_size * (cid))); \ |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 868 | } while (0) |
| 869 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 870 | /* TX CSUM helpers */ |
| 871 | #define SKB_CS_OFF(skb) (offsetof(struct tcphdr, check) - \ |
| 872 | skb->csum_offset) |
| 873 | #define SKB_CS(skb) (*(u16 *)(skb_transport_header(skb) + \ |
| 874 | skb->csum_offset)) |
| 875 | |
Dmitry Kravkov | 9122679 | 2013-03-11 05:17:52 +0000 | [diff] [blame] | 876 | #define pbd_tcp_flags(tcp_hdr) (ntohl(tcp_flag_word(tcp_hdr))>>16 & 0xff) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 877 | |
Dmitry Kravkov | a848ade | 2013-03-18 06:51:03 +0000 | [diff] [blame] | 878 | #define XMIT_PLAIN 0 |
| 879 | #define XMIT_CSUM_V4 (1 << 0) |
| 880 | #define XMIT_CSUM_V6 (1 << 1) |
| 881 | #define XMIT_CSUM_TCP (1 << 2) |
| 882 | #define XMIT_GSO_V4 (1 << 3) |
| 883 | #define XMIT_GSO_V6 (1 << 4) |
| 884 | #define XMIT_CSUM_ENC_V4 (1 << 5) |
| 885 | #define XMIT_CSUM_ENC_V6 (1 << 6) |
| 886 | #define XMIT_GSO_ENC_V4 (1 << 7) |
| 887 | #define XMIT_GSO_ENC_V6 (1 << 8) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 888 | |
Dmitry Kravkov | a848ade | 2013-03-18 06:51:03 +0000 | [diff] [blame] | 889 | #define XMIT_CSUM_ENC (XMIT_CSUM_ENC_V4 | XMIT_CSUM_ENC_V6) |
| 890 | #define XMIT_GSO_ENC (XMIT_GSO_ENC_V4 | XMIT_GSO_ENC_V6) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 891 | |
Dmitry Kravkov | a848ade | 2013-03-18 06:51:03 +0000 | [diff] [blame] | 892 | #define XMIT_CSUM (XMIT_CSUM_V4 | XMIT_CSUM_V6 | XMIT_CSUM_ENC) |
| 893 | #define XMIT_GSO (XMIT_GSO_V4 | XMIT_GSO_V6 | XMIT_GSO_ENC) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 894 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 895 | /* stuff added to make the code fit 80Col */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 896 | #define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE) |
| 897 | #define CQE_TYPE_START(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_START_AGG) |
| 898 | #define CQE_TYPE_STOP(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_STOP_AGG) |
| 899 | #define CQE_TYPE_SLOW(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_RAMROD) |
| 900 | #define CQE_TYPE_FAST(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_FASTPATH) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 901 | |
Eilon Greenstein | 1adcd8b | 2008-08-13 15:48:29 -0700 | [diff] [blame] | 902 | #define ETH_RX_ERROR_FALGS ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG |
| 903 | |
Eilon Greenstein | 052a38e | 2009-02-12 08:37:16 +0000 | [diff] [blame] | 904 | #define BNX2X_PRS_FLAG_OVERETH_IPV4(flags) \ |
| 905 | (((le16_to_cpu(flags) & \ |
| 906 | PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) >> \ |
| 907 | PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT) \ |
| 908 | == PRS_FLAG_OVERETH_IPV4) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 909 | #define BNX2X_RX_SUM_FIX(cqe) \ |
Eilon Greenstein | 052a38e | 2009-02-12 08:37:16 +0000 | [diff] [blame] | 910 | BNX2X_PRS_FLAG_OVERETH_IPV4(cqe->fast_path_cqe.pars_flags.flags) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 911 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 912 | #define FP_USB_FUNC_OFF \ |
| 913 | offsetof(struct cstorm_status_block_u, func) |
| 914 | #define FP_CSB_FUNC_OFF \ |
| 915 | offsetof(struct cstorm_status_block_c, func) |
| 916 | |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 917 | #define HC_INDEX_ETH_RX_CQ_CONS 1 |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 918 | |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 919 | #define HC_INDEX_OOO_TX_CQ_CONS 4 |
| 920 | |
| 921 | #define HC_INDEX_ETH_TX_CQ_CONS_COS0 5 |
| 922 | |
| 923 | #define HC_INDEX_ETH_TX_CQ_CONS_COS1 6 |
| 924 | |
| 925 | #define HC_INDEX_ETH_TX_CQ_CONS_COS2 7 |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 926 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 927 | #define HC_INDEX_ETH_FIRST_TX_CQ_CONS HC_INDEX_ETH_TX_CQ_CONS_COS0 |
| 928 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 929 | #define BNX2X_RX_SB_INDEX \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 930 | (&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS]) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 931 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 932 | #define BNX2X_TX_SB_INDEX_BASE BNX2X_TX_SB_INDEX_COS0 |
| 933 | |
| 934 | #define BNX2X_TX_SB_INDEX_COS0 \ |
| 935 | (&fp->sb_index_values[HC_INDEX_ETH_TX_CQ_CONS_COS0]) |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 936 | |
| 937 | /* end of fast path */ |
| 938 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 939 | /* common */ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 940 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 941 | struct bnx2x_common { |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 942 | |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 943 | u32 chip_id; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 944 | /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 945 | #define CHIP_ID(bp) (bp->common.chip_id & 0xfffffff0) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 946 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 947 | #define CHIP_NUM(bp) (bp->common.chip_id >> 16) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 948 | #define CHIP_NUM_57710 0x164e |
| 949 | #define CHIP_NUM_57711 0x164f |
| 950 | #define CHIP_NUM_57711E 0x1650 |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 951 | #define CHIP_NUM_57712 0x1662 |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 952 | #define CHIP_NUM_57712_MF 0x1663 |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 953 | #define CHIP_NUM_57712_VF 0x166f |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 954 | #define CHIP_NUM_57713 0x1651 |
| 955 | #define CHIP_NUM_57713E 0x1652 |
| 956 | #define CHIP_NUM_57800 0x168a |
| 957 | #define CHIP_NUM_57800_MF 0x16a5 |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 958 | #define CHIP_NUM_57800_VF 0x16a9 |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 959 | #define CHIP_NUM_57810 0x168e |
| 960 | #define CHIP_NUM_57810_MF 0x16ae |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 961 | #define CHIP_NUM_57810_VF 0x16af |
Barak Witkowski | 7e8e02d | 2012-04-03 18:41:28 +0000 | [diff] [blame] | 962 | #define CHIP_NUM_57811 0x163d |
| 963 | #define CHIP_NUM_57811_MF 0x163e |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 964 | #define CHIP_NUM_57811_VF 0x163f |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 965 | #define CHIP_NUM_57840_OBSOLETE 0x168d |
Yuval Mintz | c3def94 | 2012-07-23 10:25:43 +0300 | [diff] [blame] | 966 | #define CHIP_NUM_57840_MF_OBSOLETE 0x16ab |
| 967 | #define CHIP_NUM_57840_4_10 0x16a1 |
| 968 | #define CHIP_NUM_57840_2_20 0x16a2 |
| 969 | #define CHIP_NUM_57840_MF 0x16a4 |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 970 | #define CHIP_NUM_57840_VF 0x16ad |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 971 | #define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) |
| 972 | #define CHIP_IS_57711(bp) (CHIP_NUM(bp) == CHIP_NUM_57711) |
| 973 | #define CHIP_IS_57711E(bp) (CHIP_NUM(bp) == CHIP_NUM_57711E) |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 974 | #define CHIP_IS_57712(bp) (CHIP_NUM(bp) == CHIP_NUM_57712) |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 975 | #define CHIP_IS_57712_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_VF) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 976 | #define CHIP_IS_57712_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_MF) |
| 977 | #define CHIP_IS_57800(bp) (CHIP_NUM(bp) == CHIP_NUM_57800) |
| 978 | #define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF) |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 979 | #define CHIP_IS_57800_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_VF) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 980 | #define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810) |
| 981 | #define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF) |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 982 | #define CHIP_IS_57810_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_VF) |
Barak Witkowski | 7e8e02d | 2012-04-03 18:41:28 +0000 | [diff] [blame] | 983 | #define CHIP_IS_57811(bp) (CHIP_NUM(bp) == CHIP_NUM_57811) |
| 984 | #define CHIP_IS_57811_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_MF) |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 985 | #define CHIP_IS_57811_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_VF) |
Yuval Mintz | c3def94 | 2012-07-23 10:25:43 +0300 | [diff] [blame] | 986 | #define CHIP_IS_57840(bp) \ |
| 987 | ((CHIP_NUM(bp) == CHIP_NUM_57840_4_10) || \ |
| 988 | (CHIP_NUM(bp) == CHIP_NUM_57840_2_20) || \ |
| 989 | (CHIP_NUM(bp) == CHIP_NUM_57840_OBSOLETE)) |
| 990 | #define CHIP_IS_57840_MF(bp) ((CHIP_NUM(bp) == CHIP_NUM_57840_MF) || \ |
| 991 | (CHIP_NUM(bp) == CHIP_NUM_57840_MF_OBSOLETE)) |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 992 | #define CHIP_IS_57840_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_VF) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 993 | #define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ |
| 994 | CHIP_IS_57711E(bp)) |
Dmitry Kravkov | edb944d | 2013-04-22 03:48:09 +0000 | [diff] [blame] | 995 | #define CHIP_IS_57811xx(bp) (CHIP_IS_57811(bp) || \ |
| 996 | CHIP_IS_57811_MF(bp) || \ |
| 997 | CHIP_IS_57811_VF(bp)) |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 998 | #define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ |
Yuval Mintz | 6ab2035 | 2013-01-23 03:21:47 +0000 | [diff] [blame] | 999 | CHIP_IS_57712_MF(bp) || \ |
| 1000 | CHIP_IS_57712_VF(bp)) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1001 | #define CHIP_IS_E3(bp) (CHIP_IS_57800(bp) || \ |
| 1002 | CHIP_IS_57800_MF(bp) || \ |
Yuval Mintz | 6ab2035 | 2013-01-23 03:21:47 +0000 | [diff] [blame] | 1003 | CHIP_IS_57800_VF(bp) || \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1004 | CHIP_IS_57810(bp) || \ |
| 1005 | CHIP_IS_57810_MF(bp) || \ |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 1006 | CHIP_IS_57810_VF(bp) || \ |
Dmitry Kravkov | edb944d | 2013-04-22 03:48:09 +0000 | [diff] [blame] | 1007 | CHIP_IS_57811xx(bp) || \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1008 | CHIP_IS_57840(bp) || \ |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 1009 | CHIP_IS_57840_MF(bp) || \ |
| 1010 | CHIP_IS_57840_VF(bp)) |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1011 | #define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp))) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1012 | #define USES_WARPCORE(bp) (CHIP_IS_E3(bp)) |
| 1013 | #define IS_E1H_OFFSET (!CHIP_IS_E1(bp)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1014 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1015 | #define CHIP_REV_SHIFT 12 |
| 1016 | #define CHIP_REV_MASK (0xF << CHIP_REV_SHIFT) |
| 1017 | #define CHIP_REV_VAL(bp) (bp->common.chip_id & CHIP_REV_MASK) |
| 1018 | #define CHIP_REV_Ax (0x0 << CHIP_REV_SHIFT) |
| 1019 | #define CHIP_REV_Bx (0x1 << CHIP_REV_SHIFT) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1020 | /* assume maximum 5 revisions */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1021 | #define CHIP_REV_IS_SLOW(bp) (CHIP_REV_VAL(bp) > 0x00005000) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1022 | /* Emul versions are A=>0xe, B=>0xc, C=>0xa, D=>8, E=>6 */ |
| 1023 | #define CHIP_REV_IS_EMUL(bp) ((CHIP_REV_IS_SLOW(bp)) && \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1024 | !(CHIP_REV_VAL(bp) & 0x00001000)) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1025 | /* FPGA versions are A=>0xf, B=>0xd, C=>0xb, D=>9, E=>7 */ |
| 1026 | #define CHIP_REV_IS_FPGA(bp) ((CHIP_REV_IS_SLOW(bp)) && \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1027 | (CHIP_REV_VAL(bp) & 0x00001000)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1028 | |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1029 | #define CHIP_TIME(bp) ((CHIP_REV_IS_EMUL(bp)) ? 2000 : \ |
| 1030 | ((CHIP_REV_IS_FPGA(bp)) ? 200 : 1)) |
| 1031 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1032 | #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) |
| 1033 | #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1034 | #define CHIP_REV_SIM(bp) (((CHIP_REV_MASK - CHIP_REV_VAL(bp)) >>\ |
| 1035 | (CHIP_REV_SHIFT + 1)) \ |
| 1036 | << CHIP_REV_SHIFT) |
| 1037 | #define CHIP_REV(bp) (CHIP_REV_IS_SLOW(bp) ? \ |
| 1038 | CHIP_REV_SIM(bp) :\ |
| 1039 | CHIP_REV_VAL(bp)) |
| 1040 | #define CHIP_IS_E3B0(bp) (CHIP_IS_E3(bp) && \ |
| 1041 | (CHIP_REV(bp) == CHIP_REV_Bx)) |
| 1042 | #define CHIP_IS_E3A0(bp) (CHIP_IS_E3(bp) && \ |
| 1043 | (CHIP_REV(bp) == CHIP_REV_Ax)) |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1044 | /* This define is used in two main places: |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1045 | * 1. In the early stages of nic_load, to know if to configure Parser / Searcher |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1046 | * to nic-only mode or to offload mode. Offload mode is configured if either the |
| 1047 | * chip is E1x (where MIC_MODE register is not applicable), or if cnic already |
| 1048 | * registered for this port (which means that the user wants storage services). |
| 1049 | * 2. During cnic-related load, to know if offload mode is already configured in |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1050 | * the HW or needs to be configured. |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1051 | * Since the transition from nic-mode to offload-mode in HW causes traffic |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1052 | * corruption, nic-mode is configured only in ports on which storage services |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1053 | * where never requested. |
| 1054 | */ |
| 1055 | #define CONFIGURE_NIC_MODE(bp) (!CHIP_IS_E1x(bp) && !CNIC_ENABLED(bp)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1056 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1057 | int flash_size; |
Dmitry Kravkov | 754a2f5 | 2011-06-14 01:34:02 +0000 | [diff] [blame] | 1058 | #define BNX2X_NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ |
| 1059 | #define BNX2X_NVRAM_TIMEOUT_COUNT 30000 |
| 1060 | #define BNX2X_NVRAM_PAGE_SIZE 256 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1061 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1062 | u32 shmem_base; |
Eilon Greenstein | 2691d51 | 2009-08-12 08:22:08 +0000 | [diff] [blame] | 1063 | u32 shmem2_base; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1064 | u32 mf_cfg_base; |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1065 | u32 mf2_cfg_base; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1066 | |
| 1067 | u32 hw_config; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1068 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1069 | u32 bc_ver; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1070 | |
| 1071 | u8 int_block; |
| 1072 | #define INT_BLOCK_HC 0 |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1073 | #define INT_BLOCK_IGU 1 |
| 1074 | #define INT_BLOCK_MODE_NORMAL 0 |
| 1075 | #define INT_BLOCK_MODE_BW_COMP 2 |
| 1076 | #define CHIP_INT_MODE_IS_NBC(bp) \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1077 | (!CHIP_IS_E1x(bp) && \ |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1078 | !((bp)->common.int_block & INT_BLOCK_MODE_BW_COMP)) |
| 1079 | #define CHIP_INT_MODE_IS_BC(bp) (!CHIP_INT_MODE_IS_NBC(bp)) |
| 1080 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1081 | u8 chip_port_mode; |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1082 | #define CHIP_4_PORT_MODE 0x0 |
| 1083 | #define CHIP_2_PORT_MODE 0x1 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1084 | #define CHIP_PORT_MODE_NONE 0x2 |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1085 | #define CHIP_MODE(bp) (bp->common.chip_port_mode) |
| 1086 | #define CHIP_MODE_IS_4_PORT(bp) (CHIP_MODE(bp) == CHIP_4_PORT_MODE) |
Barak Witkowski | 1d187b3 | 2011-12-05 22:41:50 +0000 | [diff] [blame] | 1087 | |
| 1088 | u32 boot_mode; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1089 | }; |
| 1090 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1091 | /* IGU MSIX STATISTICS on 57712: 64 for VFs; 4 for PFs; 4 for Attentions */ |
| 1092 | #define BNX2X_IGU_STAS_MSG_VF_CNT 64 |
| 1093 | #define BNX2X_IGU_STAS_MSG_PF_CNT 4 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1094 | |
Yaniv Rosner | 27c1151 | 2012-12-02 04:05:54 +0000 | [diff] [blame] | 1095 | #define MAX_IGU_ATTN_ACK_TO 100 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1096 | /* end of common */ |
| 1097 | |
| 1098 | /* port */ |
| 1099 | |
| 1100 | struct bnx2x_port { |
| 1101 | u32 pmf; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1102 | |
Yaniv Rosner | a22f078 | 2010-09-07 11:41:20 +0000 | [diff] [blame] | 1103 | u32 link_config[LINK_CONFIG_SIZE]; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1104 | |
Yaniv Rosner | a22f078 | 2010-09-07 11:41:20 +0000 | [diff] [blame] | 1105 | u32 supported[LINK_CONFIG_SIZE]; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1106 | |
Yaniv Rosner | a22f078 | 2010-09-07 11:41:20 +0000 | [diff] [blame] | 1107 | u32 advertising[LINK_CONFIG_SIZE]; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1108 | |
| 1109 | u32 phy_addr; |
Yaniv Rosner | c18487e | 2008-06-23 20:27:52 -0700 | [diff] [blame] | 1110 | |
| 1111 | /* used to synchronize phy accesses */ |
| 1112 | struct mutex phy_mutex; |
| 1113 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1114 | u32 port_stx; |
| 1115 | |
| 1116 | struct nig_stats old_nig_stats; |
| 1117 | }; |
| 1118 | |
| 1119 | /* end of port */ |
| 1120 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1121 | #define STATS_OFFSET32(stat_name) \ |
| 1122 | (offsetof(struct bnx2x_eth_stats, stat_name) / 4) |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1123 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1124 | /* slow path */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1125 | #define BNX2X_MAX_NUM_OF_VFS 64 |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1126 | #define BNX2X_VF_CID_WND 4 /* log num of queues per VF. HW config. */ |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1127 | #define BNX2X_CIDS_PER_VF (1 << BNX2X_VF_CID_WND) |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1128 | |
| 1129 | /* We need to reserve doorbell addresses for all VF and queue combinations */ |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1130 | #define BNX2X_VF_CIDS (BNX2X_MAX_NUM_OF_VFS * BNX2X_CIDS_PER_VF) |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1131 | |
| 1132 | /* The doorbell is configured to have the same number of CIDs for PFs and for |
| 1133 | * VFs. For this reason the PF CID zone is as large as the VF zone. |
| 1134 | */ |
| 1135 | #define BNX2X_FIRST_VF_CID BNX2X_VF_CIDS |
| 1136 | #define BNX2X_MAX_NUM_VF_QUEUES 64 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1137 | #define BNX2X_VF_ID_INVALID 0xFF |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1138 | |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1139 | /* the number of VF CIDS multiplied by the amount of bytes reserved for each |
| 1140 | * cid must not exceed the size of the VF doorbell |
| 1141 | */ |
| 1142 | #define BNX2X_VF_BAR_SIZE 512 |
| 1143 | #if (BNX2X_VF_BAR_SIZE < BNX2X_CIDS_PER_VF * (1 << BNX2X_DB_SHIFT)) |
| 1144 | #error "VF doorbell bar size is 512" |
| 1145 | #endif |
| 1146 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1147 | /* |
| 1148 | * The total number of L2 queues, MSIX vectors and HW contexts (CIDs) is |
| 1149 | * control by the number of fast-path status blocks supported by the |
| 1150 | * device (HW/FW). Each fast-path status block (FP-SB) aka non-default |
| 1151 | * status block represents an independent interrupts context that can |
| 1152 | * serve a regular L2 networking queue. However special L2 queues such |
| 1153 | * as the FCoE queue do not require a FP-SB and other components like |
| 1154 | * the CNIC may consume FP-SB reducing the number of possible L2 queues |
| 1155 | * |
| 1156 | * If the maximum number of FP-SB available is X then: |
| 1157 | * a. If CNIC is supported it consumes 1 FP-SB thus the max number of |
| 1158 | * regular L2 queues is Y=X-1 |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1159 | * b. In MF mode the actual number of L2 queues is Y= (X-1/MF_factor) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1160 | * c. If the FCoE L2 queue is supported the actual number of L2 queues |
| 1161 | * is Y+1 |
| 1162 | * d. The number of irqs (MSIX vectors) is either Y+1 (one extra for |
| 1163 | * slow-path interrupts) or Y+2 if CNIC is supported (one additional |
| 1164 | * FP interrupt context for the CNIC). |
| 1165 | * e. The number of HW context (CID count) is always X or X+1 if FCoE |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1166 | * L2 queue is supported. The cid for the FCoE L2 queue is always X. |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1167 | */ |
| 1168 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1169 | /* fast-path interrupt contexts E1x */ |
| 1170 | #define FP_SB_MAX_E1x 16 |
| 1171 | /* fast-path interrupt contexts E2 */ |
| 1172 | #define FP_SB_MAX_E2 HC_SB_MAX_SB_E2 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1173 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1174 | union cdu_context { |
| 1175 | struct eth_context eth; |
| 1176 | char pad[1024]; |
| 1177 | }; |
| 1178 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1179 | /* CDU host DB constants */ |
Merav Sicron | a052997 | 2012-06-19 07:48:25 +0000 | [diff] [blame] | 1180 | #define CDU_ILT_PAGE_SZ_HW 2 |
| 1181 | #define CDU_ILT_PAGE_SZ (8192 << CDU_ILT_PAGE_SZ_HW) /* 32K */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1182 | #define ILT_PAGE_CIDS (CDU_ILT_PAGE_SZ / sizeof(union cdu_context)) |
| 1183 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1184 | #define CNIC_ISCSI_CID_MAX 256 |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1185 | #define CNIC_FCOE_CID_MAX 2048 |
| 1186 | #define CNIC_CID_MAX (CNIC_ISCSI_CID_MAX + CNIC_FCOE_CID_MAX) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1187 | #define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1188 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1189 | #define QM_ILT_PAGE_SZ_HW 0 |
| 1190 | #define QM_ILT_PAGE_SZ (4096 << QM_ILT_PAGE_SZ_HW) /* 4K */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1191 | #define QM_CID_ROUND 1024 |
| 1192 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1193 | /* TM (timers) host DB constants */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1194 | #define TM_ILT_PAGE_SZ_HW 0 |
| 1195 | #define TM_ILT_PAGE_SZ (4096 << TM_ILT_PAGE_SZ_HW) /* 4K */ |
Ariel Elior | 0907f34 | 2013-10-20 16:51:30 +0200 | [diff] [blame] | 1196 | #define TM_CONN_NUM (BNX2X_FIRST_VF_CID + \ |
| 1197 | BNX2X_VF_CIDS + \ |
| 1198 | CNIC_ISCSI_CID_MAX) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1199 | #define TM_ILT_SZ (8 * TM_CONN_NUM) |
| 1200 | #define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ) |
| 1201 | |
| 1202 | /* SRC (Searcher) host DB constants */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1203 | #define SRC_ILT_PAGE_SZ_HW 0 |
| 1204 | #define SRC_ILT_PAGE_SZ (4096 << SRC_ILT_PAGE_SZ_HW) /* 4K */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1205 | #define SRC_HASH_BITS 10 |
| 1206 | #define SRC_CONN_NUM (1 << SRC_HASH_BITS) /* 1024 */ |
| 1207 | #define SRC_ILT_SZ (sizeof(struct src_ent) * SRC_CONN_NUM) |
| 1208 | #define SRC_T2_SZ SRC_ILT_SZ |
| 1209 | #define SRC_ILT_LINES DIV_ROUND_UP(SRC_ILT_SZ, SRC_ILT_PAGE_SZ) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1210 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1211 | #define MAX_DMAE_C 8 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1212 | |
| 1213 | /* DMA memory not used in fastpath */ |
| 1214 | struct bnx2x_slowpath { |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1215 | union { |
| 1216 | struct mac_configuration_cmd e1x; |
| 1217 | struct eth_classify_rules_ramrod_data e2; |
| 1218 | } mac_rdata; |
| 1219 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1220 | union { |
| 1221 | struct tstorm_eth_mac_filter_config e1x; |
| 1222 | struct eth_filter_rules_ramrod_data e2; |
| 1223 | } rx_mode_rdata; |
| 1224 | |
| 1225 | union { |
| 1226 | struct mac_configuration_cmd e1; |
| 1227 | struct eth_multicast_rules_ramrod_data e2; |
| 1228 | } mcast_rdata; |
| 1229 | |
| 1230 | struct eth_rss_update_ramrod_data rss_rdata; |
| 1231 | |
| 1232 | /* Queue State related ramrods are always sent under rtnl_lock */ |
| 1233 | union { |
| 1234 | struct client_init_ramrod_data init_data; |
| 1235 | struct client_update_ramrod_data update_data; |
Michal Kalderon | 14a94eb | 2014-02-12 18:19:53 +0200 | [diff] [blame] | 1236 | struct tpa_update_ramrod_data tpa_data; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1237 | } q_rdata; |
| 1238 | |
| 1239 | union { |
| 1240 | struct function_start_data func_start; |
Dmitry Kravkov | 6debea8 | 2011-07-19 01:42:04 +0000 | [diff] [blame] | 1241 | /* pfc configuration for DCBX ramrod */ |
| 1242 | struct flow_control_configuration pfc_config; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1243 | } func_rdata; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1244 | |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 1245 | /* afex ramrod can not be a part of func_rdata union because these |
| 1246 | * events might arrive in parallel to other events from func_rdata. |
| 1247 | * Therefore, if they would have been defined in the same union, |
| 1248 | * data can get corrupted. |
| 1249 | */ |
Yuval Mintz | 9dfef3a | 2014-01-05 18:33:53 +0200 | [diff] [blame] | 1250 | union { |
| 1251 | struct afex_vif_list_ramrod_data viflist_data; |
| 1252 | struct function_update_data func_update; |
| 1253 | } func_afex_rdata; |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 1254 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1255 | /* used by dmae command executer */ |
| 1256 | struct dmae_command dmae[MAX_DMAE_C]; |
| 1257 | |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1258 | u32 stats_comp; |
| 1259 | union mac_stats mac_stats; |
| 1260 | struct nig_stats nig_stats; |
| 1261 | struct host_port_stats port_stats; |
| 1262 | struct host_func_stats func_stats; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1263 | |
| 1264 | u32 wb_comp; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1265 | u32 wb_data[4]; |
Barak Witkowski | 1d187b3 | 2011-12-05 22:41:50 +0000 | [diff] [blame] | 1266 | |
| 1267 | union drv_info_to_mcp drv_info_to_mcp; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1268 | }; |
| 1269 | |
| 1270 | #define bnx2x_sp(bp, var) (&bp->slowpath->var) |
| 1271 | #define bnx2x_sp_mapping(bp, var) \ |
| 1272 | (bp->slowpath_mapping + offsetof(struct bnx2x_slowpath, var)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1273 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1274 | /* attn group wiring */ |
| 1275 | #define MAX_DYNAMIC_ATTN_GRPS 8 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1276 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1277 | struct attn_route { |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1278 | u32 sig[5]; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1279 | }; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1280 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1281 | struct iro { |
| 1282 | u32 base; |
| 1283 | u16 m1; |
| 1284 | u16 m2; |
| 1285 | u16 m3; |
| 1286 | u16 size; |
| 1287 | }; |
| 1288 | |
| 1289 | struct hw_context { |
| 1290 | union cdu_context *vcxt; |
| 1291 | dma_addr_t cxt_mapping; |
| 1292 | size_t size; |
| 1293 | }; |
| 1294 | |
| 1295 | /* forward */ |
| 1296 | struct bnx2x_ilt; |
| 1297 | |
Ariel Elior | 290ca2b | 2013-01-01 05:22:31 +0000 | [diff] [blame] | 1298 | struct bnx2x_vfdb; |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 1299 | |
| 1300 | enum bnx2x_recovery_state { |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 1301 | BNX2X_RECOVERY_DONE, |
| 1302 | BNX2X_RECOVERY_INIT, |
| 1303 | BNX2X_RECOVERY_WAIT, |
Ariel Elior | 95c6c616 | 2012-01-26 06:01:52 +0000 | [diff] [blame] | 1304 | BNX2X_RECOVERY_FAILED, |
| 1305 | BNX2X_RECOVERY_NIC_LOADING |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 1306 | }; |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 1307 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1308 | /* |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1309 | * Event queue (EQ or event ring) MC hsi |
| 1310 | * NUM_EQ_PAGES and EQ_DESC_CNT_PAGE must be power of 2 |
| 1311 | */ |
| 1312 | #define NUM_EQ_PAGES 1 |
| 1313 | #define EQ_DESC_CNT_PAGE (BCM_PAGE_SIZE / sizeof(union event_ring_elem)) |
| 1314 | #define EQ_DESC_MAX_PAGE (EQ_DESC_CNT_PAGE - 1) |
| 1315 | #define NUM_EQ_DESC (EQ_DESC_CNT_PAGE * NUM_EQ_PAGES) |
| 1316 | #define EQ_DESC_MASK (NUM_EQ_DESC - 1) |
| 1317 | #define MAX_EQ_AVAIL (EQ_DESC_MAX_PAGE * NUM_EQ_PAGES - 2) |
| 1318 | |
| 1319 | /* depends on EQ_DESC_CNT_PAGE being a power of 2 */ |
| 1320 | #define NEXT_EQ_IDX(x) ((((x) & EQ_DESC_MAX_PAGE) == \ |
| 1321 | (EQ_DESC_MAX_PAGE - 1)) ? (x) + 2 : (x) + 1) |
| 1322 | |
| 1323 | /* depends on the above and on NUM_EQ_PAGES being a power of 2 */ |
| 1324 | #define EQ_DESC(x) ((x) & EQ_DESC_MASK) |
| 1325 | |
| 1326 | #define BNX2X_EQ_INDEX \ |
| 1327 | (&bp->def_status_blk->sp_sb.\ |
| 1328 | index_values[HC_SP_INDEX_EQ_CONS]) |
| 1329 | |
Vladislav Zolotarov | 2ae17f6 | 2011-05-04 23:48:23 +0000 | [diff] [blame] | 1330 | /* This is a data that will be used to create a link report message. |
| 1331 | * We will keep the data used for the last link report in order |
| 1332 | * to prevent reporting the same link parameters twice. |
| 1333 | */ |
| 1334 | struct bnx2x_link_report_data { |
| 1335 | u16 line_speed; /* Effective line speed */ |
| 1336 | unsigned long link_report_flags;/* BNX2X_LINK_REPORT_XXX flags */ |
| 1337 | }; |
| 1338 | |
| 1339 | enum { |
| 1340 | BNX2X_LINK_REPORT_FD, /* Full DUPLEX */ |
| 1341 | BNX2X_LINK_REPORT_LINK_DOWN, |
| 1342 | BNX2X_LINK_REPORT_RX_FC_ON, |
| 1343 | BNX2X_LINK_REPORT_TX_FC_ON, |
| 1344 | }; |
| 1345 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1346 | enum { |
| 1347 | BNX2X_PORT_QUERY_IDX, |
| 1348 | BNX2X_PF_QUERY_IDX, |
Barak Witkowski | 50f0a56 | 2011-12-05 21:52:23 +0000 | [diff] [blame] | 1349 | BNX2X_FCOE_QUERY_IDX, |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1350 | BNX2X_FIRST_QUEUE_QUERY_IDX, |
| 1351 | }; |
| 1352 | |
| 1353 | struct bnx2x_fw_stats_req { |
| 1354 | struct stats_query_header hdr; |
Barak Witkowski | 50f0a56 | 2011-12-05 21:52:23 +0000 | [diff] [blame] | 1355 | struct stats_query_entry query[FP_SB_MAX_E1x+ |
| 1356 | BNX2X_FIRST_QUEUE_QUERY_IDX]; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1357 | }; |
| 1358 | |
| 1359 | struct bnx2x_fw_stats_data { |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 1360 | struct stats_counter storm_counters; |
| 1361 | struct per_port_stats port; |
| 1362 | struct per_pf_stats pf; |
Barak Witkowski | 50f0a56 | 2011-12-05 21:52:23 +0000 | [diff] [blame] | 1363 | struct fcoe_statistics_params fcoe; |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 1364 | struct per_queue_stats queue_stats[1]; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1365 | }; |
| 1366 | |
Ariel Elior | 7be08a7 | 2011-07-14 08:31:19 +0000 | [diff] [blame] | 1367 | /* Public slow path states */ |
Yuval Mintz | 230bb0f | 2014-02-12 18:19:56 +0200 | [diff] [blame] | 1368 | enum sp_rtnl_flag { |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1369 | BNX2X_SP_RTNL_SETUP_TC, |
Ariel Elior | 7be08a7 | 2011-07-14 08:31:19 +0000 | [diff] [blame] | 1370 | BNX2X_SP_RTNL_TX_TIMEOUT, |
Ariel Elior | 8304859 | 2011-11-13 04:34:29 +0000 | [diff] [blame] | 1371 | BNX2X_SP_RTNL_FAN_FAILURE, |
Ariel Elior | 8395be5 | 2013-01-01 05:22:44 +0000 | [diff] [blame] | 1372 | BNX2X_SP_RTNL_AFEX_F_UPDATE, |
| 1373 | BNX2X_SP_RTNL_ENABLE_SRIOV, |
Ariel Elior | 381ac16 | 2013-01-01 05:22:29 +0000 | [diff] [blame] | 1374 | BNX2X_SP_RTNL_VFPF_MCAST, |
Ariel Elior | 78c3bcc | 2013-06-20 17:39:08 +0300 | [diff] [blame] | 1375 | BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN, |
Yuval Mintz | 8b09be5 | 2013-08-01 17:30:59 +0300 | [diff] [blame] | 1376 | BNX2X_SP_RTNL_RX_MODE, |
Ariel Elior | 3ec9f9c | 2013-03-11 05:17:45 +0000 | [diff] [blame] | 1377 | BNX2X_SP_RTNL_HYPERVISOR_VLAN, |
Dmitry Kravkov | 07b4eb3 | 2013-08-19 09:11:57 +0300 | [diff] [blame] | 1378 | BNX2X_SP_RTNL_TX_STOP, |
Yuval Mintz | 42f8277 | 2014-03-23 18:12:23 +0200 | [diff] [blame] | 1379 | BNX2X_SP_RTNL_GET_DRV_VERSION, |
Ariel Elior | 7be08a7 | 2011-07-14 08:31:19 +0000 | [diff] [blame] | 1380 | }; |
| 1381 | |
Yuval Mintz | 370d4a2 | 2014-03-23 18:12:24 +0200 | [diff] [blame] | 1382 | enum bnx2x_iov_flag { |
| 1383 | BNX2X_IOV_HANDLE_VF_MSG, |
Yuval Mintz | 370d4a2 | 2014-03-23 18:12:24 +0200 | [diff] [blame] | 1384 | BNX2X_IOV_HANDLE_FLR, |
| 1385 | }; |
| 1386 | |
Yuval Mintz | 452427b | 2012-03-26 20:47:07 +0000 | [diff] [blame] | 1387 | struct bnx2x_prev_path_list { |
Yuval Mintz | 7fa6f340 | 2013-03-20 05:21:28 +0000 | [diff] [blame] | 1388 | struct list_head list; |
Yuval Mintz | 452427b | 2012-03-26 20:47:07 +0000 | [diff] [blame] | 1389 | u8 bus; |
| 1390 | u8 slot; |
| 1391 | u8 path; |
Yuval Mintz | 7fa6f340 | 2013-03-20 05:21:28 +0000 | [diff] [blame] | 1392 | u8 aer; |
Barak Witkowski | c63da99 | 2012-12-05 23:04:03 +0000 | [diff] [blame] | 1393 | u8 undi; |
Yuval Mintz | 452427b | 2012-03-26 20:47:07 +0000 | [diff] [blame] | 1394 | }; |
| 1395 | |
Barak Witkowski | 15192a8 | 2012-06-19 07:48:28 +0000 | [diff] [blame] | 1396 | struct bnx2x_sp_objs { |
| 1397 | /* MACs object */ |
| 1398 | struct bnx2x_vlan_mac_obj mac_obj; |
| 1399 | |
| 1400 | /* Queue State object */ |
| 1401 | struct bnx2x_queue_sp_obj q_obj; |
| 1402 | }; |
| 1403 | |
| 1404 | struct bnx2x_fp_stats { |
| 1405 | struct tstorm_per_queue_stats old_tclient; |
| 1406 | struct ustorm_per_queue_stats old_uclient; |
| 1407 | struct xstorm_per_queue_stats old_xclient; |
| 1408 | struct bnx2x_eth_q_stats eth_q_stats; |
| 1409 | struct bnx2x_eth_q_stats_old eth_q_stats_old; |
| 1410 | }; |
| 1411 | |
Yuval Mintz | 7609647 | 2014-09-17 16:24:37 +0300 | [diff] [blame] | 1412 | enum { |
| 1413 | SUB_MF_MODE_UNKNOWN = 0, |
| 1414 | SUB_MF_MODE_UFP, |
Yuval Mintz | 83bad20 | 2014-09-17 16:24:38 +0300 | [diff] [blame] | 1415 | SUB_MF_MODE_NPAR1_DOT_5, |
Yuval Mintz | 7609647 | 2014-09-17 16:24:37 +0300 | [diff] [blame] | 1416 | }; |
| 1417 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1418 | struct bnx2x { |
| 1419 | /* Fields used in the tx and intr/napi performance paths |
| 1420 | * are grouped together in the beginning of the structure |
| 1421 | */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1422 | struct bnx2x_fastpath *fp; |
Barak Witkowski | 15192a8 | 2012-06-19 07:48:28 +0000 | [diff] [blame] | 1423 | struct bnx2x_sp_objs *sp_objs; |
| 1424 | struct bnx2x_fp_stats *fp_stats; |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 1425 | struct bnx2x_fp_txdata *bnx2x_txq; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1426 | void __iomem *regview; |
| 1427 | void __iomem *doorbells; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1428 | u16 db_size; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1429 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1430 | u8 pf_num; /* absolute PF number */ |
| 1431 | u8 pfid; /* per-path PF number */ |
| 1432 | int base_fw_ndsb; /**/ |
| 1433 | #define BP_PATH(bp) (CHIP_IS_E1x(bp) ? 0 : (bp->pf_num & 1)) |
| 1434 | #define BP_PORT(bp) (bp->pfid & 1) |
| 1435 | #define BP_FUNC(bp) (bp->pfid) |
| 1436 | #define BP_ABS_FUNC(bp) (bp->pf_num) |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 1437 | #define BP_VN(bp) ((bp)->pfid >> 1) |
| 1438 | #define BP_MAX_VN_NUM(bp) (CHIP_MODE_IS_4_PORT(bp) ? 2 : 4) |
| 1439 | #define BP_L_ID(bp) (BP_VN(bp) << 2) |
| 1440 | #define BP_FW_MB_IDX_VN(bp, vn) (BP_PORT(bp) +\ |
| 1441 | (vn) * ((CHIP_IS_E1x(bp) || (CHIP_MODE_IS_4_PORT(bp))) ? 2 : 1)) |
| 1442 | #define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp)) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1443 | |
Ariel Elior | 6411280 | 2013-01-07 00:50:23 +0000 | [diff] [blame] | 1444 | #ifdef CONFIG_BNX2X_SRIOV |
Dmitry Kravkov | 1d6f3cd | 2013-03-27 01:05:17 +0000 | [diff] [blame] | 1445 | /* protects vf2pf mailbox from simultaneous access */ |
| 1446 | struct mutex vf2pf_mutex; |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1447 | /* vf pf channel mailbox contains request and response buffers */ |
| 1448 | struct bnx2x_vf_mbx_msg *vf2pf_mbox; |
| 1449 | dma_addr_t vf2pf_mbox_mapping; |
| 1450 | |
Ariel Elior | be1f1ffa | 2013-01-01 05:22:24 +0000 | [diff] [blame] | 1451 | /* we set aside a copy of the acquire response */ |
| 1452 | struct pfvf_acquire_resp_tlv acquire_resp; |
| 1453 | |
Ariel Elior | abc5a02 | 2013-01-01 05:22:43 +0000 | [diff] [blame] | 1454 | /* bulletin board for messages from pf to vf */ |
| 1455 | union pf_vf_bulletin *pf2vf_bulletin; |
| 1456 | dma_addr_t pf2vf_bulletin_mapping; |
| 1457 | |
Dmitry Kravkov | 6495d15 | 2014-06-26 14:31:04 +0300 | [diff] [blame] | 1458 | union pf_vf_bulletin shadow_bulletin; |
Ariel Elior | abc5a02 | 2013-01-01 05:22:43 +0000 | [diff] [blame] | 1459 | struct pf_vf_bulletin_content old_bulletin; |
Ariel Elior | 3c76fef | 2013-03-11 05:17:46 +0000 | [diff] [blame] | 1460 | |
| 1461 | u16 requested_nr_virtfn; |
Ariel Elior | 6411280 | 2013-01-07 00:50:23 +0000 | [diff] [blame] | 1462 | #endif /* CONFIG_BNX2X_SRIOV */ |
Ariel Elior | abc5a02 | 2013-01-01 05:22:43 +0000 | [diff] [blame] | 1463 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1464 | struct net_device *dev; |
| 1465 | struct pci_dev *pdev; |
| 1466 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1467 | const struct iro *iro_arr; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1468 | #define IRO (bp->iro_arr) |
| 1469 | |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 1470 | enum bnx2x_recovery_state recovery_state; |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 1471 | int is_leader; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1472 | struct msix_entry *msix_table; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1473 | |
| 1474 | int tx_ring_size; |
| 1475 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1476 | /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ |
| 1477 | #define ETH_OVREHEAD (ETH_HLEN + 8 + 8) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1478 | #define ETH_MIN_PACKET_SIZE 60 |
| 1479 | #define ETH_MAX_PACKET_SIZE 1500 |
| 1480 | #define ETH_MAX_JUMBO_PACKET_SIZE 9600 |
Dmitry Kravkov | 621b4d6 | 2012-02-20 09:59:08 +0000 | [diff] [blame] | 1481 | /* TCP with Timestamp Option (32) + IPv6 (40) */ |
| 1482 | #define ETH_MAX_TPA_HEADER_SIZE 72 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1483 | |
Dmitry Kravkov | 9927b51 | 2014-06-26 14:31:05 +0300 | [diff] [blame] | 1484 | /* Max supported alignment is 256 (8 shift) |
| 1485 | * minimal alignment shift 6 is optimal for 57xxx HW performance |
| 1486 | */ |
| 1487 | #define BNX2X_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT)) |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 1488 | |
| 1489 | /* FW uses 2 Cache lines Alignment for start packet and size |
| 1490 | * |
| 1491 | * We assume skb_build() uses sizeof(struct skb_shared_info) bytes |
| 1492 | * at the end of skb->data, to avoid wasting a full cache line. |
| 1493 | * This reduces memory use (skb->truesize). |
| 1494 | */ |
| 1495 | #define BNX2X_FW_RX_ALIGN_START (1UL << BNX2X_RX_ALIGN_SHIFT) |
| 1496 | |
| 1497 | #define BNX2X_FW_RX_ALIGN_END \ |
Joren Van Onder | f57b07c | 2012-08-11 17:10:35 +0000 | [diff] [blame] | 1498 | max_t(u64, 1UL << BNX2X_RX_ALIGN_SHIFT, \ |
Eric Dumazet | e52fcb2 | 2011-11-14 06:05:34 +0000 | [diff] [blame] | 1499 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) |
| 1500 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1501 | #define BNX2X_PXP_DRAM_ALIGN (BNX2X_RX_ALIGN_SHIFT - 5) |
Eilon Greenstein | 0f00846 | 2009-02-12 08:36:18 +0000 | [diff] [blame] | 1502 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1503 | struct host_sp_status_block *def_status_blk; |
| 1504 | #define DEF_SB_IGU_ID 16 |
| 1505 | #define DEF_SB_ID HC_SP_SB_ID |
| 1506 | __le16 def_idx; |
Eilon Greenstein | 4781bfa | 2009-02-12 08:38:17 +0000 | [diff] [blame] | 1507 | __le16 def_att_idx; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1508 | u32 attn_state; |
| 1509 | struct attn_route attn_group[MAX_DYNAMIC_ATTN_GRPS]; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1510 | |
| 1511 | /* slow path ring */ |
| 1512 | struct eth_spe *spq; |
| 1513 | dma_addr_t spq_mapping; |
| 1514 | u16 spq_prod_idx; |
| 1515 | struct eth_spe *spq_prod_bd; |
| 1516 | struct eth_spe *spq_last_bd; |
Eilon Greenstein | 4781bfa | 2009-02-12 08:38:17 +0000 | [diff] [blame] | 1517 | __le16 *dsb_sp_prod; |
Vladislav Zolotarov | 6e30dd4 | 2011-02-06 11:25:41 -0800 | [diff] [blame] | 1518 | atomic_t cq_spq_left; /* ETH_XXX ramrods credit */ |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1519 | /* used to synchronize spq accesses */ |
| 1520 | spinlock_t spq_lock; |
| 1521 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1522 | /* event queue */ |
| 1523 | union event_ring_elem *eq_ring; |
| 1524 | dma_addr_t eq_mapping; |
| 1525 | u16 eq_prod; |
| 1526 | u16 eq_cons; |
| 1527 | __le16 *eq_cons_sb; |
Vladislav Zolotarov | 6e30dd4 | 2011-02-06 11:25:41 -0800 | [diff] [blame] | 1528 | atomic_t eq_spq_left; /* COMMON_XXX ramrods credit */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1529 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1530 | /* Counter for marking that there is a STAT_QUERY ramrod pending */ |
| 1531 | u16 stats_pending; |
| 1532 | /* Counter for completed statistics ramrods */ |
| 1533 | u16 stats_comp; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1534 | |
Eilon Greenstein | 3347162 | 2008-08-13 15:59:08 -0700 | [diff] [blame] | 1535 | /* End of fields used in the performance code paths */ |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1536 | |
| 1537 | int panic; |
Joe Perches | 7995c64 | 2010-02-17 15:01:52 +0000 | [diff] [blame] | 1538 | int msg_enable; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1539 | |
| 1540 | u32 flags; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1541 | #define PCIX_FLAG (1 << 0) |
| 1542 | #define PCI_32BIT_FLAG (1 << 1) |
| 1543 | #define ONE_PORT_FLAG (1 << 2) |
| 1544 | #define NO_WOL_FLAG (1 << 3) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1545 | #define USING_MSIX_FLAG (1 << 5) |
| 1546 | #define USING_MSI_FLAG (1 << 6) |
| 1547 | #define DISABLE_MSI_FLAG (1 << 7) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1548 | #define NO_MCP_FLAG (1 << 9) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1549 | #define MF_FUNC_DIS (1 << 11) |
| 1550 | #define OWN_CNIC_IRQ (1 << 12) |
| 1551 | #define NO_ISCSI_OOO_FLAG (1 << 13) |
| 1552 | #define NO_ISCSI_FLAG (1 << 14) |
| 1553 | #define NO_FCOE_FLAG (1 << 15) |
Barak Witkowski | 0e898dd | 2011-12-05 21:52:22 +0000 | [diff] [blame] | 1554 | #define BC_SUPPORTS_PFC_STATS (1 << 17) |
Yuval Mintz | c14db20 | 2014-01-12 14:37:59 +0200 | [diff] [blame] | 1555 | #define TX_SWITCHING (1 << 18) |
Barak Witkowski | 2e499d3 | 2012-06-26 01:31:19 +0000 | [diff] [blame] | 1556 | #define BC_SUPPORTS_FCOE_FEATURES (1 << 19) |
Dmitry Kravkov | 30a5de7 | 2012-04-03 18:41:26 +0000 | [diff] [blame] | 1557 | #define USING_SINGLE_MSIX_FLAG (1 << 20) |
Barak Witkowski | 9876879 | 2012-06-19 07:48:31 +0000 | [diff] [blame] | 1558 | #define BC_SUPPORTS_DCBX_MSG_NON_PMF (1 << 21) |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1559 | #define IS_VF_FLAG (1 << 22) |
Yuval Mintz | 0c23ad3 | 2014-08-17 16:47:45 +0300 | [diff] [blame] | 1560 | #define BC_SUPPORTS_RMMOD_CMD (1 << 23) |
| 1561 | #define HAS_PHYS_PORT_ID (1 << 24) |
| 1562 | #define AER_ENABLED (1 << 25) |
| 1563 | #define PTP_SUPPORTED (1 << 26) |
| 1564 | #define TX_TIMESTAMPING_EN (1 << 27) |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1565 | |
| 1566 | #define BP_NOMCP(bp) ((bp)->flags & NO_MCP_FLAG) |
Ariel Elior | 6411280 | 2013-01-07 00:50:23 +0000 | [diff] [blame] | 1567 | |
| 1568 | #ifdef CONFIG_BNX2X_SRIOV |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1569 | #define IS_VF(bp) ((bp)->flags & IS_VF_FLAG) |
| 1570 | #define IS_PF(bp) (!((bp)->flags & IS_VF_FLAG)) |
Ariel Elior | 6411280 | 2013-01-07 00:50:23 +0000 | [diff] [blame] | 1571 | #else |
| 1572 | #define IS_VF(bp) false |
| 1573 | #define IS_PF(bp) true |
| 1574 | #endif |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1575 | |
Vladislav Zolotarov | 2ba4514 | 2011-01-31 14:39:17 +0000 | [diff] [blame] | 1576 | #define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG) |
| 1577 | #define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1578 | #define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1579 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1580 | u8 cnic_support; |
| 1581 | bool cnic_enabled; |
| 1582 | bool cnic_loaded; |
Michael Chan | 4bd9b0ff | 2012-12-06 10:33:12 +0000 | [diff] [blame] | 1583 | struct cnic_eth_dev *(*cnic_probe)(struct net_device *); |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1584 | |
| 1585 | /* Flag that indicates that we can start looking for FCoE L2 queue |
| 1586 | * completions in the default status block. |
| 1587 | */ |
| 1588 | bool fcoe_init; |
| 1589 | |
Eilon Greenstein | 8d5726c | 2009-02-12 08:37:19 +0000 | [diff] [blame] | 1590 | int mrrs; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1591 | |
Eilon Greenstein | 1cf167f | 2009-01-14 21:22:18 -0800 | [diff] [blame] | 1592 | struct delayed_work sp_task; |
Yuval Mintz | 370d4a2 | 2014-03-23 18:12:24 +0200 | [diff] [blame] | 1593 | struct delayed_work iov_task; |
| 1594 | |
Ariel Elior | fd1fc79 | 2013-01-01 05:22:33 +0000 | [diff] [blame] | 1595 | atomic_t interrupt_occurred; |
Ariel Elior | 7be08a7 | 2011-07-14 08:31:19 +0000 | [diff] [blame] | 1596 | struct delayed_work sp_rtnl_task; |
Yaniv Rosner | 3deb816 | 2011-06-14 01:34:33 +0000 | [diff] [blame] | 1597 | |
| 1598 | struct delayed_work period_task; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1599 | struct timer_list timer; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1600 | int current_interval; |
| 1601 | |
| 1602 | u16 fw_seq; |
| 1603 | u16 fw_drv_pulse_wr_seq; |
| 1604 | u32 func_stx; |
| 1605 | |
| 1606 | struct link_params link_params; |
| 1607 | struct link_vars link_vars; |
Vladislav Zolotarov | 2ae17f6 | 2011-05-04 23:48:23 +0000 | [diff] [blame] | 1608 | u32 link_cnt; |
| 1609 | struct bnx2x_link_report_data last_reported_link; |
| 1610 | |
Eilon Greenstein | 01cd452 | 2009-08-12 08:23:08 +0000 | [diff] [blame] | 1611 | struct mdio_if_info mdio; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1612 | |
| 1613 | struct bnx2x_common common; |
| 1614 | struct bnx2x_port port; |
| 1615 | |
Yuval Mintz | b475d78 | 2012-04-03 18:41:29 +0000 | [diff] [blame] | 1616 | struct cmng_init cmng; |
| 1617 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 1618 | u32 mf_config[E1HVN_MAX]; |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 1619 | u32 mf_ext_config; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1620 | u32 path_has_ovlan; /* E3 */ |
Dmitry Kravkov | fb3bff1 | 2010-10-06 03:26:40 +0000 | [diff] [blame] | 1621 | u16 mf_ov; |
| 1622 | u8 mf_mode; |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 1623 | #define IS_MF(bp) (bp->mf_mode != 0) |
Dmitry Kravkov | 0793f83f | 2010-12-01 12:39:28 -0800 | [diff] [blame] | 1624 | #define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) |
| 1625 | #define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 1626 | #define IS_MF_AFEX(bp) (bp->mf_mode == MULTI_FUNCTION_AFEX) |
Yuval Mintz | 7609647 | 2014-09-17 16:24:37 +0300 | [diff] [blame] | 1627 | u8 mf_sub_mode; |
| 1628 | #define IS_MF_UFP(bp) (IS_MF_SD(bp) && \ |
| 1629 | bp->mf_sub_mode == SUB_MF_MODE_UFP) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1630 | |
Eliezer Tamir | f141064 | 2008-02-28 11:51:50 -0800 | [diff] [blame] | 1631 | u8 wol; |
| 1632 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1633 | int rx_ring_size; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1634 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1635 | u16 tx_quick_cons_trip_int; |
| 1636 | u16 tx_quick_cons_trip; |
| 1637 | u16 tx_ticks_int; |
| 1638 | u16 tx_ticks; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1639 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1640 | u16 rx_quick_cons_trip_int; |
| 1641 | u16 rx_quick_cons_trip; |
| 1642 | u16 rx_ticks_int; |
| 1643 | u16 rx_ticks; |
Vladislav Zolotarov | cdaa7cb | 2010-04-19 01:13:57 +0000 | [diff] [blame] | 1644 | /* Maximal coalescing timeout in us */ |
Dmitry Kravkov | 6802516 | 2013-10-20 16:51:29 +0200 | [diff] [blame] | 1645 | #define BNX2X_MAX_COALESCE_TOUT (0xff*BNX2X_BTR) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1646 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1647 | u32 lin_cnt; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1648 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1649 | u16 state; |
Eilon Greenstein | 356e238 | 2009-02-12 08:38:32 +0000 | [diff] [blame] | 1650 | #define BNX2X_STATE_CLOSED 0 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1651 | #define BNX2X_STATE_OPENING_WAIT4_LOAD 0x1000 |
| 1652 | #define BNX2X_STATE_OPENING_WAIT4_PORT 0x2000 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1653 | #define BNX2X_STATE_OPEN 0x3000 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1654 | #define BNX2X_STATE_CLOSING_WAIT4_HALT 0x4000 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1655 | #define BNX2X_STATE_CLOSING_WAIT4_DELETE 0x5000 |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1656 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1657 | #define BNX2X_STATE_DIAG 0xe000 |
| 1658 | #define BNX2X_STATE_ERROR 0xf000 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1659 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1660 | #define BNX2X_MAX_PRIORITY 8 |
Vladislav Zolotarov | 54b9dda | 2009-11-16 06:05:58 +0000 | [diff] [blame] | 1661 | int num_queues; |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1662 | uint num_ethernet_queues; |
| 1663 | uint num_cnic_queues; |
Dmitry Kravkov | 5d7cd49 | 2010-07-27 12:32:19 +0000 | [diff] [blame] | 1664 | int disable_tpa; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1665 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1666 | u32 rx_mode; |
| 1667 | #define BNX2X_RX_MODE_NONE 0 |
| 1668 | #define BNX2X_RX_MODE_NORMAL 1 |
| 1669 | #define BNX2X_RX_MODE_ALLMULTI 2 |
| 1670 | #define BNX2X_RX_MODE_PROMISC 3 |
| 1671 | #define BNX2X_MAX_MULTICAST 64 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1672 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1673 | u8 igu_dsb_id; |
| 1674 | u8 igu_base_sb; |
| 1675 | u8 igu_sb_cnt; |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1676 | u8 min_msix_vec_cnt; |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 1677 | |
Ariel Elior | 1ab4434 | 2013-01-01 05:22:23 +0000 | [diff] [blame] | 1678 | u32 igu_base_addr; |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1679 | dma_addr_t def_status_blk_mapping; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1680 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 1681 | struct bnx2x_slowpath *slowpath; |
| 1682 | dma_addr_t slowpath_mapping; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1683 | |
Yuval Mintz | 42f8277 | 2014-03-23 18:12:23 +0200 | [diff] [blame] | 1684 | /* Mechanism protecting the drv_info_to_mcp */ |
| 1685 | struct mutex drv_info_mutex; |
| 1686 | bool drv_info_mng_owner; |
| 1687 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1688 | /* Total number of FW statistics requests */ |
| 1689 | u8 fw_stats_num; |
| 1690 | |
| 1691 | /* |
| 1692 | * This is a memory buffer that will contain both statistics |
| 1693 | * ramrod request and data. |
| 1694 | */ |
| 1695 | void *fw_stats; |
| 1696 | dma_addr_t fw_stats_mapping; |
| 1697 | |
| 1698 | /* |
| 1699 | * FW statistics request shortcut (points at the |
| 1700 | * beginning of fw_stats buffer). |
| 1701 | */ |
| 1702 | struct bnx2x_fw_stats_req *fw_stats_req; |
| 1703 | dma_addr_t fw_stats_req_mapping; |
| 1704 | int fw_stats_req_sz; |
| 1705 | |
| 1706 | /* |
Anatol Pomozov | 4907cb7 | 2012-09-01 10:31:09 -0700 | [diff] [blame] | 1707 | * FW statistics data shortcut (points at the beginning of |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1708 | * fw_stats buffer + fw_stats_req_sz). |
| 1709 | */ |
| 1710 | struct bnx2x_fw_stats_data *fw_stats_data; |
| 1711 | dma_addr_t fw_stats_data_mapping; |
| 1712 | int fw_stats_data_sz; |
| 1713 | |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1714 | /* For max 1024 cids (VF RSS), 32KB ILT page size and 1KB |
Merav Sicron | a052997 | 2012-06-19 07:48:25 +0000 | [diff] [blame] | 1715 | * context size we need 8 ILT entries. |
| 1716 | */ |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1717 | #define ILT_MAX_L2_LINES 32 |
Merav Sicron | a052997 | 2012-06-19 07:48:25 +0000 | [diff] [blame] | 1718 | struct hw_context context[ILT_MAX_L2_LINES]; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1719 | |
| 1720 | struct bnx2x_ilt *ilt; |
| 1721 | #define BP_ILT(bp) ((bp)->ilt) |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1722 | #define ILT_MAX_LINES 256 |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1723 | /* |
| 1724 | * Maximum supported number of RSS queues: number of IGU SBs minus one that goes |
| 1725 | * to CNIC. |
| 1726 | */ |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1727 | #define BNX2X_MAX_RSS_COUNT(bp) ((bp)->igu_sb_cnt - CNIC_SUPPORT(bp)) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1728 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1729 | /* |
| 1730 | * Maximum CID count that might be required by the bnx2x: |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 1731 | * Max RSS * Max_Tx_Multi_Cos + FCoE + iSCSI |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1732 | */ |
Michael Chan | f78afb3 | 2013-09-18 01:50:38 -0700 | [diff] [blame] | 1733 | |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 1734 | #define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \ |
Michael Chan | f78afb3 | 2013-09-18 01:50:38 -0700 | [diff] [blame] | 1735 | + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp))) |
Merav Sicron | 37ae41a | 2012-06-19 07:48:27 +0000 | [diff] [blame] | 1736 | #define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \ |
Michael Chan | f78afb3 | 2013-09-18 01:50:38 -0700 | [diff] [blame] | 1737 | + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp))) |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1738 | #define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ |
| 1739 | ILT_PAGE_CIDS)) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1740 | |
| 1741 | int qm_cid_count; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1742 | |
Yuval Mintz | 7964211 | 2012-12-02 04:05:50 +0000 | [diff] [blame] | 1743 | bool dropless_fc; |
Eilon Greenstein | a18f512 | 2009-08-12 08:23:26 +0000 | [diff] [blame] | 1744 | |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1745 | void *t2; |
| 1746 | dma_addr_t t2_mapping; |
Eric Dumazet | 13707f9 | 2011-01-26 19:28:23 +0000 | [diff] [blame] | 1747 | struct cnic_ops __rcu *cnic_ops; |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1748 | void *cnic_data; |
| 1749 | u32 cnic_tag; |
| 1750 | struct cnic_eth_dev cnic_eth_dev; |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1751 | union host_hc_status_block cnic_sb; |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1752 | dma_addr_t cnic_sb_mapping; |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1753 | struct eth_spe *cnic_kwq; |
| 1754 | struct eth_spe *cnic_kwq_prod; |
| 1755 | struct eth_spe *cnic_kwq_cons; |
| 1756 | struct eth_spe *cnic_kwq_last; |
| 1757 | u16 cnic_kwq_pending; |
| 1758 | u16 cnic_spq_pending; |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1759 | u8 fip_mac[ETH_ALEN]; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1760 | struct mutex cnic_mutex; |
| 1761 | struct bnx2x_vlan_mac_obj iscsi_l2_mac_obj; |
| 1762 | |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1763 | /* Start index of the "special" (CNIC related) L2 clients */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1764 | u8 cnic_base_cl_id; |
Michael Chan | 37b091b | 2009-10-10 13:46:55 +0000 | [diff] [blame] | 1765 | |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1766 | int dmae_ready; |
| 1767 | /* used to synchronize dmae accesses */ |
Vladislav Zolotarov | 6e30dd4 | 2011-02-06 11:25:41 -0800 | [diff] [blame] | 1768 | spinlock_t dmae_lock; |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1769 | |
Eilon Greenstein | c4ff7cb | 2009-10-15 00:18:27 -0700 | [diff] [blame] | 1770 | /* used to protect the FW mail box */ |
| 1771 | struct mutex fw_mb_mutex; |
| 1772 | |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1773 | /* used to synchronize stats collecting */ |
| 1774 | int stats_state; |
Vladislav Zolotarov | a13773a | 2010-07-21 05:59:01 +0000 | [diff] [blame] | 1775 | |
| 1776 | /* used for synchronization of concurrent threads statistics handling */ |
Yuval Mintz | dff173d | 2015-03-23 10:56:14 +0200 | [diff] [blame] | 1777 | struct mutex stats_lock; |
Vladislav Zolotarov | a13773a | 2010-07-21 05:59:01 +0000 | [diff] [blame] | 1778 | |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1779 | /* used by dmae command loader */ |
| 1780 | struct dmae_command stats_dmae; |
| 1781 | int executer_idx; |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1782 | |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1783 | u16 stats_counter; |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1784 | struct bnx2x_eth_stats eth_stats; |
Yuval Mintz | cb4dca2 | 2012-03-18 10:33:44 +0000 | [diff] [blame] | 1785 | struct host_func_stats func_stats; |
Mintz Yuval | 1355b70 | 2012-02-15 02:10:22 +0000 | [diff] [blame] | 1786 | struct bnx2x_eth_stats_old eth_stats_old; |
| 1787 | struct bnx2x_net_stats_old net_stats_old; |
| 1788 | struct bnx2x_fw_port_stats_old fw_stats_old; |
| 1789 | bool stats_init; |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 1790 | |
| 1791 | struct z_stream_s *strm; |
| 1792 | void *gunzip_buf; |
| 1793 | dma_addr_t gunzip_mapping; |
| 1794 | int gunzip_outlen; |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 1795 | #define FW_BUF_SIZE 0x8000 |
Eilon Greenstein | 573f203 | 2009-08-12 08:24:14 +0000 | [diff] [blame] | 1796 | #define GUNZIP_BUF(bp) (bp->gunzip_buf) |
| 1797 | #define GUNZIP_PHYS(bp) (bp->gunzip_mapping) |
| 1798 | #define GUNZIP_OUTLEN(bp) (bp->gunzip_outlen) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1799 | |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 1800 | struct raw_op *init_ops; |
Vladislav Zolotarov | 94a78b7 | 2009-04-27 03:27:43 -0700 | [diff] [blame] | 1801 | /* Init blocks offsets inside init_ops */ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 1802 | u16 *init_ops_offsets; |
Vladislav Zolotarov | 94a78b7 | 2009-04-27 03:27:43 -0700 | [diff] [blame] | 1803 | /* Data blob - has 32 bit granularity */ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 1804 | u32 *init_data; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1805 | u32 init_mode_flags; |
| 1806 | #define INIT_MODE_FLAGS(bp) (bp->init_mode_flags) |
Vladislav Zolotarov | 94a78b7 | 2009-04-27 03:27:43 -0700 | [diff] [blame] | 1807 | /* Zipped PRAM blobs - raw data */ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 1808 | const u8 *tsem_int_table_data; |
| 1809 | const u8 *tsem_pram_data; |
| 1810 | const u8 *usem_int_table_data; |
| 1811 | const u8 *usem_pram_data; |
| 1812 | const u8 *xsem_int_table_data; |
| 1813 | const u8 *xsem_pram_data; |
| 1814 | const u8 *csem_int_table_data; |
| 1815 | const u8 *csem_pram_data; |
Eilon Greenstein | 573f203 | 2009-08-12 08:24:14 +0000 | [diff] [blame] | 1816 | #define INIT_OPS(bp) (bp->init_ops) |
| 1817 | #define INIT_OPS_OFFSETS(bp) (bp->init_ops_offsets) |
| 1818 | #define INIT_DATA(bp) (bp->init_data) |
| 1819 | #define INIT_TSEM_INT_TABLE_DATA(bp) (bp->tsem_int_table_data) |
| 1820 | #define INIT_TSEM_PRAM_DATA(bp) (bp->tsem_pram_data) |
| 1821 | #define INIT_USEM_INT_TABLE_DATA(bp) (bp->usem_int_table_data) |
| 1822 | #define INIT_USEM_PRAM_DATA(bp) (bp->usem_pram_data) |
| 1823 | #define INIT_XSEM_INT_TABLE_DATA(bp) (bp->xsem_int_table_data) |
| 1824 | #define INIT_XSEM_PRAM_DATA(bp) (bp->xsem_pram_data) |
| 1825 | #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) |
| 1826 | #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) |
| 1827 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1828 | #define PHY_FW_VER_LEN 20 |
Vladislav Zolotarov | 34f24c7 | 2010-04-19 01:13:23 +0000 | [diff] [blame] | 1829 | char fw_ver[32]; |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 1830 | const struct firmware *firmware; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1831 | |
Ariel Elior | 290ca2b | 2013-01-01 05:22:31 +0000 | [diff] [blame] | 1832 | struct bnx2x_vfdb *vfdb; |
| 1833 | #define IS_SRIOV(bp) ((bp)->vfdb) |
| 1834 | |
Shmulik Ravid | 785b9b1 | 2010-12-30 06:27:03 +0000 | [diff] [blame] | 1835 | /* DCB support on/off */ |
| 1836 | u16 dcb_state; |
| 1837 | #define BNX2X_DCB_STATE_OFF 0 |
| 1838 | #define BNX2X_DCB_STATE_ON 1 |
| 1839 | |
| 1840 | /* DCBX engine mode */ |
| 1841 | int dcbx_enabled; |
| 1842 | #define BNX2X_DCBX_ENABLED_OFF 0 |
| 1843 | #define BNX2X_DCBX_ENABLED_ON_NEG_OFF 1 |
| 1844 | #define BNX2X_DCBX_ENABLED_ON_NEG_ON 2 |
| 1845 | #define BNX2X_DCBX_ENABLED_INVALID (-1) |
| 1846 | |
| 1847 | bool dcbx_mode_uset; |
| 1848 | |
Vladislav Zolotarov | e4901dd | 2010-12-13 05:44:18 +0000 | [diff] [blame] | 1849 | struct bnx2x_config_dcbx_params dcbx_config_params; |
Vladislav Zolotarov | e4901dd | 2010-12-13 05:44:18 +0000 | [diff] [blame] | 1850 | struct bnx2x_dcbx_port_params dcbx_port_params; |
| 1851 | int dcb_version; |
| 1852 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1853 | /* CAM credit pools */ |
Ariel Elior | b56e967 | 2013-01-01 05:22:32 +0000 | [diff] [blame] | 1854 | |
| 1855 | /* used only in sriov */ |
| 1856 | struct bnx2x_credit_pool_obj vlans_pool; |
| 1857 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1858 | struct bnx2x_credit_pool_obj macs_pool; |
| 1859 | |
| 1860 | /* RX_MODE object */ |
| 1861 | struct bnx2x_rx_mode_obj rx_mode_obj; |
| 1862 | |
| 1863 | /* MCAST object */ |
| 1864 | struct bnx2x_mcast_obj mcast_obj; |
| 1865 | |
| 1866 | /* RSS configuration object */ |
| 1867 | struct bnx2x_rss_config_obj rss_conf_obj; |
| 1868 | |
| 1869 | /* Function State controlling object */ |
| 1870 | struct bnx2x_func_sp_obj func_obj; |
| 1871 | |
| 1872 | unsigned long sp_state; |
| 1873 | |
Ariel Elior | 7be08a7 | 2011-07-14 08:31:19 +0000 | [diff] [blame] | 1874 | /* operation indication for the sp_rtnl task */ |
| 1875 | unsigned long sp_rtnl_state; |
| 1876 | |
Yuval Mintz | 370d4a2 | 2014-03-23 18:12:24 +0200 | [diff] [blame] | 1877 | /* Indication of the IOV tasks */ |
| 1878 | unsigned long iov_task_state; |
| 1879 | |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 1880 | /* DCBX Negotiation results */ |
Vladislav Zolotarov | e4901dd | 2010-12-13 05:44:18 +0000 | [diff] [blame] | 1881 | struct dcbx_features dcbx_local_feat; |
| 1882 | u32 dcbx_error; |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1883 | |
Shmulik Ravid | 0be6bc6 | 2011-05-18 02:55:31 +0000 | [diff] [blame] | 1884 | #ifdef BCM_DCBNL |
| 1885 | struct dcbx_features dcbx_remote_feat; |
| 1886 | u32 dcbx_remote_flags; |
| 1887 | #endif |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 1888 | /* AFEX: store default vlan used */ |
| 1889 | int afex_def_vlan_tag; |
| 1890 | enum mf_cfg_afex_vlan_mode afex_vlan_mode; |
Dmitry Kravkov | e3835b9 | 2011-03-06 10:50:44 +0000 | [diff] [blame] | 1891 | u32 pending_max; |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1892 | |
| 1893 | /* multiple tx classes of service */ |
| 1894 | u8 max_cos; |
| 1895 | |
| 1896 | /* priority to cos mapping */ |
| 1897 | u8 prio_to_cos[8]; |
Dmitry Kravkov | c3146eb | 2013-01-23 03:21:48 +0000 | [diff] [blame] | 1898 | |
| 1899 | int fp_array_size; |
Miriam Shitrit | 07ba6af | 2013-01-14 05:11:46 +0000 | [diff] [blame] | 1900 | u32 dump_preset_idx; |
Yuval Mintz | 3d7d562 | 2013-10-09 16:06:28 +0200 | [diff] [blame] | 1901 | |
| 1902 | u8 phys_port_id[ETH_ALEN]; |
Dmitry Kravkov | 6495d15 | 2014-06-26 14:31:04 +0300 | [diff] [blame] | 1903 | |
Michal Kalderon | eeed018 | 2014-08-17 16:47:44 +0300 | [diff] [blame] | 1904 | /* PTP related context */ |
| 1905 | struct ptp_clock *ptp_clock; |
| 1906 | struct ptp_clock_info ptp_clock_info; |
| 1907 | struct work_struct ptp_task; |
| 1908 | struct cyclecounter cyclecounter; |
| 1909 | struct timecounter timecounter; |
| 1910 | bool timecounter_init_done; |
| 1911 | struct sk_buff *ptp_tx_skb; |
| 1912 | unsigned long ptp_tx_start; |
| 1913 | bool hwtstamp_ioctl_called; |
| 1914 | u16 tx_type; |
| 1915 | u16 rx_filter; |
| 1916 | |
Dmitry Kravkov | 6495d15 | 2014-06-26 14:31:04 +0300 | [diff] [blame] | 1917 | struct bnx2x_link_report_data vf_link_vars; |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 1918 | }; |
| 1919 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1920 | /* Tx queues may be less or equal to Rx queues */ |
| 1921 | extern int num_queues; |
Vladislav Zolotarov | 54b9dda | 2009-11-16 06:05:58 +0000 | [diff] [blame] | 1922 | #define BNX2X_NUM_QUEUES(bp) (bp->num_queues) |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1923 | #define BNX2X_NUM_ETH_QUEUES(bp) ((bp)->num_ethernet_queues) |
Merav Sicron | 6556588 | 2012-06-19 07:48:26 +0000 | [diff] [blame] | 1924 | #define BNX2X_NUM_NON_CNIC_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - \ |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1925 | (bp)->num_cnic_queues) |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1926 | #define BNX2X_NUM_RX_QUEUES(bp) BNX2X_NUM_QUEUES(bp) |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1927 | |
Vladislav Zolotarov | 54b9dda | 2009-11-16 06:05:58 +0000 | [diff] [blame] | 1928 | #define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) |
Eilon Greenstein | 3196a88 | 2008-08-13 15:58:49 -0700 | [diff] [blame] | 1929 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1930 | #define BNX2X_MAX_QUEUES(bp) BNX2X_MAX_RSS_COUNT(bp) |
| 1931 | /* #define is_eth_multi(bp) (BNX2X_NUM_ETH_QUEUES(bp) > 1) */ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1932 | |
| 1933 | #define RSS_IPV4_CAP_MASK \ |
| 1934 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY |
| 1935 | |
| 1936 | #define RSS_IPV4_TCP_CAP_MASK \ |
| 1937 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY |
| 1938 | |
| 1939 | #define RSS_IPV6_CAP_MASK \ |
| 1940 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY |
| 1941 | |
| 1942 | #define RSS_IPV6_TCP_CAP_MASK \ |
| 1943 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY |
| 1944 | |
| 1945 | /* func init flags */ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 1946 | #define FUNC_FLG_RSS 0x0001 |
| 1947 | #define FUNC_FLG_STATS 0x0002 |
| 1948 | /* removed FUNC_FLG_UNMATCHED 0x0004 */ |
| 1949 | #define FUNC_FLG_TPA 0x0008 |
| 1950 | #define FUNC_FLG_SPQ 0x0010 |
| 1951 | #define FUNC_FLG_LEADING 0x0020 /* PF only */ |
Ariel Elior | b9871bc | 2013-09-04 14:09:21 +0300 | [diff] [blame] | 1952 | #define FUNC_FLG_LEADING_STATS 0x0040 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1953 | struct bnx2x_func_init_params { |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 1954 | /* dma */ |
| 1955 | dma_addr_t fw_stat_map; /* valid iff FUNC_FLG_STATS */ |
| 1956 | dma_addr_t spq_map; /* valid iff FUNC_FLG_SPQ */ |
| 1957 | |
| 1958 | u16 func_flgs; |
| 1959 | u16 func_id; /* abs fid */ |
| 1960 | u16 pf_id; |
| 1961 | u16 spq_prod; /* valid iff FUNC_FLG_SPQ */ |
| 1962 | }; |
| 1963 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1964 | #define for_each_cnic_queue(bp, var) \ |
| 1965 | for ((var) = BNX2X_NUM_ETH_QUEUES(bp); (var) < BNX2X_NUM_QUEUES(bp); \ |
| 1966 | (var)++) \ |
| 1967 | if (skip_queue(bp, var)) \ |
| 1968 | continue; \ |
| 1969 | else |
| 1970 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1971 | #define for_each_eth_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1972 | for ((var) = 0; (var) < BNX2X_NUM_ETH_QUEUES(bp); (var)++) |
Eilon Greenstein | 3196a88 | 2008-08-13 15:58:49 -0700 | [diff] [blame] | 1973 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1974 | #define for_each_nondefault_eth_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1975 | for ((var) = 1; (var) < BNX2X_NUM_ETH_QUEUES(bp); (var)++) |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1976 | |
| 1977 | #define for_each_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1978 | for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 1979 | if (skip_queue(bp, var)) \ |
| 1980 | continue; \ |
| 1981 | else |
| 1982 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 1983 | /* Skip forwarding FP */ |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 1984 | #define for_each_valid_rx_queue(bp, var) \ |
| 1985 | for ((var) = 0; \ |
| 1986 | (var) < (CNIC_LOADED(bp) ? BNX2X_NUM_QUEUES(bp) : \ |
| 1987 | BNX2X_NUM_ETH_QUEUES(bp)); \ |
| 1988 | (var)++) \ |
| 1989 | if (skip_rx_queue(bp, var)) \ |
| 1990 | continue; \ |
| 1991 | else |
| 1992 | |
| 1993 | #define for_each_rx_queue_cnic(bp, var) \ |
| 1994 | for ((var) = BNX2X_NUM_ETH_QUEUES(bp); (var) < BNX2X_NUM_QUEUES(bp); \ |
| 1995 | (var)++) \ |
| 1996 | if (skip_rx_queue(bp, var)) \ |
| 1997 | continue; \ |
| 1998 | else |
| 1999 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2000 | #define for_each_rx_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 2001 | for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2002 | if (skip_rx_queue(bp, var)) \ |
| 2003 | continue; \ |
| 2004 | else |
| 2005 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 2006 | /* Skip OOO FP */ |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 2007 | #define for_each_valid_tx_queue(bp, var) \ |
| 2008 | for ((var) = 0; \ |
| 2009 | (var) < (CNIC_LOADED(bp) ? BNX2X_NUM_QUEUES(bp) : \ |
| 2010 | BNX2X_NUM_ETH_QUEUES(bp)); \ |
| 2011 | (var)++) \ |
| 2012 | if (skip_tx_queue(bp, var)) \ |
| 2013 | continue; \ |
| 2014 | else |
| 2015 | |
| 2016 | #define for_each_tx_queue_cnic(bp, var) \ |
| 2017 | for ((var) = BNX2X_NUM_ETH_QUEUES(bp); (var) < BNX2X_NUM_QUEUES(bp); \ |
| 2018 | (var)++) \ |
| 2019 | if (skip_tx_queue(bp, var)) \ |
| 2020 | continue; \ |
| 2021 | else |
| 2022 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2023 | #define for_each_tx_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 2024 | for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2025 | if (skip_tx_queue(bp, var)) \ |
| 2026 | continue; \ |
| 2027 | else |
| 2028 | |
| 2029 | #define for_each_nondefault_queue(bp, var) \ |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 2030 | for ((var) = 1; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2031 | if (skip_queue(bp, var)) \ |
| 2032 | continue; \ |
| 2033 | else |
| 2034 | |
Ariel Elior | 6383c0b | 2011-07-14 08:31:57 +0000 | [diff] [blame] | 2035 | #define for_each_cos_in_tx_queue(fp, var) \ |
| 2036 | for ((var) = 0; (var) < (fp)->max_cos; (var)++) |
| 2037 | |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2038 | /* skip rx queue |
Linus Torvalds | 008d23e | 2011-01-13 10:05:56 -0800 | [diff] [blame] | 2039 | * if FCOE l2 support is disabled and this is the fcoe L2 queue |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2040 | */ |
| 2041 | #define skip_rx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) |
| 2042 | |
| 2043 | /* skip tx queue |
Linus Torvalds | 008d23e | 2011-01-13 10:05:56 -0800 | [diff] [blame] | 2044 | * if FCOE l2 support is disabled and this is the fcoe L2 queue |
Vladislav Zolotarov | ec6ba94 | 2010-12-13 05:44:01 +0000 | [diff] [blame] | 2045 | */ |
| 2046 | #define skip_tx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) |
| 2047 | |
| 2048 | #define skip_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) |
Eilon Greenstein | 3196a88 | 2008-08-13 15:58:49 -0700 | [diff] [blame] | 2049 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2050 | /** |
| 2051 | * bnx2x_set_mac_one - configure a single MAC address |
| 2052 | * |
| 2053 | * @bp: driver handle |
| 2054 | * @mac: MAC to configure |
| 2055 | * @obj: MAC object handle |
| 2056 | * @set: if 'true' add a new MAC, otherwise - delete |
| 2057 | * @mac_type: the type of the MAC to configure (e.g. ETH, UC list) |
| 2058 | * @ramrod_flags: RAMROD_XXX flags (e.g. RAMROD_CONT, RAMROD_COMP_WAIT) |
| 2059 | * |
| 2060 | * Configures one MAC according to provided parameters or continues the |
| 2061 | * execution of previously scheduled commands if RAMROD_CONT is set in |
| 2062 | * ramrod_flags. |
| 2063 | * |
| 2064 | * Returns zero if operation has successfully completed, a positive value if the |
| 2065 | * operation has been successfully scheduled and a negative - if a requested |
| 2066 | * operations has failed. |
| 2067 | */ |
| 2068 | int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac, |
| 2069 | struct bnx2x_vlan_mac_obj *obj, bool set, |
| 2070 | int mac_type, unsigned long *ramrod_flags); |
| 2071 | /** |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2072 | * bnx2x_del_all_macs - delete all MACs configured for the specific MAC object |
| 2073 | * |
| 2074 | * @bp: driver handle |
| 2075 | * @mac_obj: MAC object handle |
| 2076 | * @mac_type: type of the MACs to clear (BNX2X_XXX_MAC) |
| 2077 | * @wait_for_comp: if 'true' block until completion |
| 2078 | * |
| 2079 | * Deletes all MACs of the specific type (e.g. ETH, UC list). |
| 2080 | * |
| 2081 | * Returns zero if operation has successfully completed, a positive value if the |
| 2082 | * operation has been successfully scheduled and a negative - if a requested |
| 2083 | * operations has failed. |
| 2084 | */ |
| 2085 | int bnx2x_del_all_macs(struct bnx2x *bp, |
| 2086 | struct bnx2x_vlan_mac_obj *mac_obj, |
| 2087 | int mac_type, bool wait_for_comp); |
| 2088 | |
| 2089 | /* Init Function API */ |
| 2090 | void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p); |
Ariel Elior | b93288d | 2013-01-01 05:22:35 +0000 | [diff] [blame] | 2091 | void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, |
| 2092 | u8 vf_valid, int fw_sb_id, int igu_sb_id); |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2093 | int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); |
| 2094 | int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
| 2095 | int bnx2x_set_mult_gpio(struct bnx2x *bp, u8 pins, u32 mode); |
| 2096 | int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
Vladislav Zolotarov | 2ae17f6 | 2011-05-04 23:48:23 +0000 | [diff] [blame] | 2097 | void bnx2x_read_mf_cfg(struct bnx2x *bp); |
| 2098 | |
Ariel Elior | b56e967 | 2013-01-01 05:22:32 +0000 | [diff] [blame] | 2099 | int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val); |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2100 | |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2101 | /* dmae */ |
Yaniv Rosner | c18487e | 2008-06-23 20:27:52 -0700 | [diff] [blame] | 2102 | void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); |
| 2103 | void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, |
| 2104 | u32 len32); |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2105 | void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); |
| 2106 | u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); |
| 2107 | u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); |
| 2108 | u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, |
| 2109 | bool with_comp, u8 comp_type); |
| 2110 | |
Ariel Elior | fd1fc79 | 2013-01-01 05:22:33 +0000 | [diff] [blame] | 2111 | void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
| 2112 | u8 src_type, u8 dst_type); |
Ariel Elior | 32316a4 | 2013-10-20 16:51:32 +0200 | [diff] [blame] | 2113 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
| 2114 | u32 *comp); |
Ariel Elior | fd1fc79 | 2013-01-01 05:22:33 +0000 | [diff] [blame] | 2115 | |
Ariel Elior | d16132c | 2013-01-01 05:22:42 +0000 | [diff] [blame] | 2116 | /* FLR related routines */ |
| 2117 | u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); |
| 2118 | void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count); |
| 2119 | int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt); |
Ariel Elior | b56e967 | 2013-01-01 05:22:32 +0000 | [diff] [blame] | 2120 | u8 bnx2x_is_pcie_pending(struct pci_dev *dev); |
Ariel Elior | d16132c | 2013-01-01 05:22:42 +0000 | [diff] [blame] | 2121 | int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, |
| 2122 | char *msg, u32 poll_cnt); |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2123 | |
Dmitry Kravkov | de0c62d | 2010-07-27 12:35:24 +0000 | [diff] [blame] | 2124 | void bnx2x_calc_fc_adv(struct bnx2x *bp); |
| 2125 | int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2126 | u32 data_hi, u32 data_lo, int cmd_type); |
Dmitry Kravkov | de0c62d | 2010-07-27 12:35:24 +0000 | [diff] [blame] | 2127 | void bnx2x_update_coalesce(struct bnx2x *bp); |
Yaniv Rosner | 1ac9e42 | 2011-05-31 21:26:11 +0000 | [diff] [blame] | 2128 | int bnx2x_get_cur_phy_idx(struct bnx2x *bp); |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2129 | |
Dmitry Kravkov | 178135c | 2013-05-22 21:21:50 +0000 | [diff] [blame] | 2130 | bool bnx2x_port_after_undi(struct bnx2x *bp); |
| 2131 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2132 | static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, |
| 2133 | int wait) |
| 2134 | { |
| 2135 | u32 val; |
| 2136 | |
| 2137 | do { |
| 2138 | val = REG_RD(bp, reg); |
| 2139 | if (val == expected) |
| 2140 | break; |
| 2141 | ms -= wait; |
| 2142 | msleep(wait); |
| 2143 | |
| 2144 | } while (ms > 0); |
| 2145 | |
| 2146 | return val; |
| 2147 | } |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2148 | |
Ariel Elior | b56e967 | 2013-01-01 05:22:32 +0000 | [diff] [blame] | 2149 | void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, |
| 2150 | bool is_pf); |
| 2151 | |
Joe Perches | ede23fa | 2013-08-26 22:45:23 -0700 | [diff] [blame] | 2152 | #define BNX2X_ILT_ZALLOC(x, y, size) \ |
| 2153 | x = dma_zalloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL) |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2154 | |
| 2155 | #define BNX2X_ILT_FREE(x, y, size) \ |
| 2156 | do { \ |
| 2157 | if (x) { \ |
Vladislav Zolotarov | d245a11 | 2010-12-08 01:43:17 +0000 | [diff] [blame] | 2158 | dma_free_coherent(&bp->pdev->dev, size, x, y); \ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2159 | x = NULL; \ |
| 2160 | y = 0; \ |
| 2161 | } \ |
| 2162 | } while (0) |
| 2163 | |
| 2164 | #define ILOG2(x) (ilog2((x))) |
| 2165 | |
| 2166 | #define ILT_NUM_PAGE_ENTRIES (3072) |
| 2167 | /* In 57710/11 we use whole table since we have 8 func |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2168 | * In 57712 we have only 4 func, but use same size per func, then only half of |
| 2169 | * the table in use |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2170 | */ |
| 2171 | #define ILT_PER_FUNC (ILT_NUM_PAGE_ENTRIES/8) |
| 2172 | |
| 2173 | #define FUNC_ILT_BASE(func) (func * ILT_PER_FUNC) |
| 2174 | /* |
| 2175 | * the phys address is shifted right 12 bits and has an added |
| 2176 | * 1=valid bit added to the 53rd bit |
| 2177 | * then since this is a wide register(TM) |
| 2178 | * we split it into two 32 bit writes |
| 2179 | */ |
| 2180 | #define ONCHIP_ADDR1(x) ((u32)(((u64)x >> 12) & 0xFFFFFFFF)) |
| 2181 | #define ONCHIP_ADDR2(x) ((u32)((1 << 20) | ((u64)x >> 44))) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2182 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2183 | /* load/unload mode */ |
| 2184 | #define LOAD_NORMAL 0 |
| 2185 | #define LOAD_OPEN 1 |
| 2186 | #define LOAD_DIAG 2 |
Merav Sicron | 8970b2e | 2012-06-19 07:48:22 +0000 | [diff] [blame] | 2187 | #define LOAD_LOOPBACK_EXT 3 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2188 | #define UNLOAD_NORMAL 0 |
| 2189 | #define UNLOAD_CLOSE 1 |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2190 | #define UNLOAD_RECOVERY 2 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2191 | |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2192 | /* DMAE command defines */ |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2193 | #define DMAE_TIMEOUT -1 |
| 2194 | #define DMAE_PCI_ERROR -2 /* E2 and onward */ |
| 2195 | #define DMAE_NOT_RDY -3 |
| 2196 | #define DMAE_PCI_ERR_FLAG 0x80000000 |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2197 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2198 | #define DMAE_SRC_PCI 0 |
| 2199 | #define DMAE_SRC_GRC 1 |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2200 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2201 | #define DMAE_DST_NONE 0 |
| 2202 | #define DMAE_DST_PCI 1 |
| 2203 | #define DMAE_DST_GRC 2 |
| 2204 | |
| 2205 | #define DMAE_COMP_PCI 0 |
| 2206 | #define DMAE_COMP_GRC 1 |
| 2207 | |
| 2208 | /* E2 and onward - PCI error handling in the completion */ |
| 2209 | |
| 2210 | #define DMAE_COMP_REGULAR 0 |
| 2211 | #define DMAE_COM_SET_ERR 1 |
| 2212 | |
| 2213 | #define DMAE_CMD_SRC_PCI (DMAE_SRC_PCI << \ |
| 2214 | DMAE_COMMAND_SRC_SHIFT) |
| 2215 | #define DMAE_CMD_SRC_GRC (DMAE_SRC_GRC << \ |
| 2216 | DMAE_COMMAND_SRC_SHIFT) |
| 2217 | |
| 2218 | #define DMAE_CMD_DST_PCI (DMAE_DST_PCI << \ |
| 2219 | DMAE_COMMAND_DST_SHIFT) |
| 2220 | #define DMAE_CMD_DST_GRC (DMAE_DST_GRC << \ |
| 2221 | DMAE_COMMAND_DST_SHIFT) |
| 2222 | |
| 2223 | #define DMAE_CMD_C_DST_PCI (DMAE_COMP_PCI << \ |
| 2224 | DMAE_COMMAND_C_DST_SHIFT) |
| 2225 | #define DMAE_CMD_C_DST_GRC (DMAE_COMP_GRC << \ |
| 2226 | DMAE_COMMAND_C_DST_SHIFT) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2227 | |
| 2228 | #define DMAE_CMD_C_ENABLE DMAE_COMMAND_C_TYPE_ENABLE |
| 2229 | |
| 2230 | #define DMAE_CMD_ENDIANITY_NO_SWAP (0 << DMAE_COMMAND_ENDIANITY_SHIFT) |
| 2231 | #define DMAE_CMD_ENDIANITY_B_SWAP (1 << DMAE_COMMAND_ENDIANITY_SHIFT) |
| 2232 | #define DMAE_CMD_ENDIANITY_DW_SWAP (2 << DMAE_COMMAND_ENDIANITY_SHIFT) |
| 2233 | #define DMAE_CMD_ENDIANITY_B_DW_SWAP (3 << DMAE_COMMAND_ENDIANITY_SHIFT) |
| 2234 | |
| 2235 | #define DMAE_CMD_PORT_0 0 |
| 2236 | #define DMAE_CMD_PORT_1 DMAE_COMMAND_PORT |
| 2237 | |
| 2238 | #define DMAE_CMD_SRC_RESET DMAE_COMMAND_SRC_RESET |
| 2239 | #define DMAE_CMD_DST_RESET DMAE_COMMAND_DST_RESET |
| 2240 | #define DMAE_CMD_E1HVN_SHIFT DMAE_COMMAND_E1HVN_SHIFT |
| 2241 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2242 | #define DMAE_SRC_PF 0 |
| 2243 | #define DMAE_SRC_VF 1 |
| 2244 | |
| 2245 | #define DMAE_DST_PF 0 |
| 2246 | #define DMAE_DST_VF 1 |
| 2247 | |
| 2248 | #define DMAE_C_SRC 0 |
| 2249 | #define DMAE_C_DST 1 |
| 2250 | |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2251 | #define DMAE_LEN32_RD_MAX 0x80 |
Vladislav Zolotarov | 02e3c6c | 2010-04-19 01:13:33 +0000 | [diff] [blame] | 2252 | #define DMAE_LEN32_WR_MAX(bp) (CHIP_IS_E1(bp) ? 0x400 : 0x2000) |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2253 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2254 | #define DMAE_COMP_VAL 0x60d0d0ae /* E2 and on - upper bit |
Yuval Mintz | 16a5fd9 | 2013-06-02 00:06:18 +0000 | [diff] [blame] | 2255 | * indicates error |
| 2256 | */ |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2257 | |
| 2258 | #define MAX_DMAE_C_PER_PORT 8 |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 2259 | #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 2260 | BP_VN(bp)) |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 2261 | #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ |
Eilon Greenstein | ad8d394 | 2008-06-23 20:29:02 -0700 | [diff] [blame] | 2262 | E1HVN_MAX) |
| 2263 | |
Eliezer Tamir | 2504795 | 2008-02-28 11:50:16 -0800 | [diff] [blame] | 2264 | /* PCIE link and speed */ |
| 2265 | #define PCICFG_LINK_WIDTH 0x1f00000 |
| 2266 | #define PCICFG_LINK_WIDTH_SHIFT 20 |
| 2267 | #define PCICFG_LINK_SPEED 0xf0000 |
| 2268 | #define PCICFG_LINK_SPEED_SHIFT 16 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2269 | |
Merav Sicron | cf2c1df6 | 2012-06-19 07:48:23 +0000 | [diff] [blame] | 2270 | #define BNX2X_NUM_TESTS_SF 7 |
| 2271 | #define BNX2X_NUM_TESTS_MF 3 |
| 2272 | #define BNX2X_NUM_TESTS(bp) (IS_MF(bp) ? BNX2X_NUM_TESTS_MF : \ |
Yuval Mintz | 7554374 | 2013-09-28 08:46:08 +0300 | [diff] [blame] | 2273 | IS_VF(bp) ? 0 : BNX2X_NUM_TESTS_SF) |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 2274 | |
Eilon Greenstein | b5bf906 | 2009-02-12 08:38:08 +0000 | [diff] [blame] | 2275 | #define BNX2X_PHY_LOOPBACK 0 |
| 2276 | #define BNX2X_MAC_LOOPBACK 1 |
Merav Sicron | 8970b2e | 2012-06-19 07:48:22 +0000 | [diff] [blame] | 2277 | #define BNX2X_EXT_LOOPBACK 2 |
Eilon Greenstein | b5bf906 | 2009-02-12 08:38:08 +0000 | [diff] [blame] | 2278 | #define BNX2X_PHY_LOOPBACK_FAILED 1 |
| 2279 | #define BNX2X_MAC_LOOPBACK_FAILED 2 |
Merav Sicron | 8970b2e | 2012-06-19 07:48:22 +0000 | [diff] [blame] | 2280 | #define BNX2X_EXT_LOOPBACK_FAILED 3 |
Yitchak Gertner | bb2a0f7 | 2008-06-23 20:33:36 -0700 | [diff] [blame] | 2281 | #define BNX2X_LOOPBACK_FAILED (BNX2X_MAC_LOOPBACK_FAILED | \ |
| 2282 | BNX2X_PHY_LOOPBACK_FAILED) |
Eliezer Tamir | 96fc178 | 2008-02-28 11:57:55 -0800 | [diff] [blame] | 2283 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 2284 | #define STROM_ASSERT_ARRAY_SIZE 50 |
| 2285 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2286 | /* must be used on a CID before placing it on a HW ring */ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 2287 | #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ |
David S. Miller | 8decf86 | 2011-09-22 03:23:13 -0400 | [diff] [blame] | 2288 | (BP_VN(bp) << BNX2X_SWCID_SHIFT) | \ |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2289 | (x)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2290 | |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 2291 | #define SP_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_spe)) |
| 2292 | #define MAX_SP_DESC_CNT (SP_DESC_CNT - 1) |
| 2293 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2294 | #define BNX2X_BTR 4 |
Vladislav Zolotarov | 7a9b255 | 2008-06-23 20:34:36 -0700 | [diff] [blame] | 2295 | #define MAX_SPQ_PENDING 8 |
| 2296 | |
Dmitry Kravkov | ff80ee0 | 2011-02-28 03:37:11 +0000 | [diff] [blame] | 2297 | /* CMNG constants, as derived from system spec calculations */ |
| 2298 | /* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */ |
| 2299 | #define DEF_MIN_RATE 100 |
Dmitry Kravkov | 9b3de1ef | 2011-03-06 10:51:37 +0000 | [diff] [blame] | 2300 | /* resolution of the rate shaping timer - 400 usec */ |
| 2301 | #define RS_PERIODIC_TIMEOUT_USEC 400 |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2302 | /* number of bytes in single QM arbitration cycle - |
Dmitry Kravkov | ff80ee0 | 2011-02-28 03:37:11 +0000 | [diff] [blame] | 2303 | * coefficient for calculating the fairness timer */ |
| 2304 | #define QM_ARB_BYTES 160000 |
| 2305 | /* resolution of Min algorithm 1:100 */ |
| 2306 | #define MIN_RES 100 |
| 2307 | /* how many bytes above threshold for the minimal credit of Min algorithm*/ |
| 2308 | #define MIN_ABOVE_THRESH 32768 |
| 2309 | /* Fairness algorithm integration time coefficient - |
| 2310 | * for calculating the actual Tfair */ |
| 2311 | #define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES) |
| 2312 | /* Memory of fairness algorithm . 2 cycles */ |
| 2313 | #define FAIR_MEM 2 |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2314 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2315 | #define ATTN_NIG_FOR_FUNC (1L << 8) |
| 2316 | #define ATTN_SW_TIMER_4_FUNC (1L << 9) |
| 2317 | #define GPIO_2_FUNC (1L << 10) |
| 2318 | #define GPIO_3_FUNC (1L << 11) |
| 2319 | #define GPIO_4_FUNC (1L << 12) |
| 2320 | #define ATTN_GENERAL_ATTN_1 (1L << 13) |
| 2321 | #define ATTN_GENERAL_ATTN_2 (1L << 14) |
| 2322 | #define ATTN_GENERAL_ATTN_3 (1L << 15) |
| 2323 | #define ATTN_GENERAL_ATTN_4 (1L << 13) |
| 2324 | #define ATTN_GENERAL_ATTN_5 (1L << 14) |
| 2325 | #define ATTN_GENERAL_ATTN_6 (1L << 15) |
| 2326 | |
| 2327 | #define ATTN_HARD_WIRED_MASK 0xff00 |
| 2328 | #define ATTENTION_ID 4 |
| 2329 | |
Dmitry Kravkov | 2e98ffc | 2014-09-17 16:24:36 +0300 | [diff] [blame] | 2330 | #define IS_MF_STORAGE_ONLY(bp) (IS_MF_STORAGE_PERSONALITY_ONLY(bp) || \ |
Yuval Mintz | 3521b419 | 2013-05-22 21:21:49 +0000 | [diff] [blame] | 2331 | IS_MF_FCOE_AFEX(bp)) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2332 | |
| 2333 | /* stuff added to make the code fit 80Col */ |
| 2334 | |
| 2335 | #define BNX2X_PMF_LINK_ASSERT \ |
| 2336 | GENERAL_ATTEN_OFFSET(LINK_SYNC_ATTENTION_BIT_FUNC_0 + BP_FUNC(bp)) |
| 2337 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2338 | #define BNX2X_MC_ASSERT_BITS \ |
| 2339 | (GENERAL_ATTEN_OFFSET(TSTORM_FATAL_ASSERT_ATTENTION_BIT) | \ |
| 2340 | GENERAL_ATTEN_OFFSET(USTORM_FATAL_ASSERT_ATTENTION_BIT) | \ |
| 2341 | GENERAL_ATTEN_OFFSET(CSTORM_FATAL_ASSERT_ATTENTION_BIT) | \ |
| 2342 | GENERAL_ATTEN_OFFSET(XSTORM_FATAL_ASSERT_ATTENTION_BIT)) |
| 2343 | |
| 2344 | #define BNX2X_MCP_ASSERT \ |
| 2345 | GENERAL_ATTEN_OFFSET(MCP_FATAL_ASSERT_ATTENTION_BIT) |
| 2346 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2347 | #define BNX2X_GRC_TIMEOUT GENERAL_ATTEN_OFFSET(LATCHED_ATTN_TIMEOUT_GRC) |
| 2348 | #define BNX2X_GRC_RSV (GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RBCR) | \ |
| 2349 | GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RBCT) | \ |
| 2350 | GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RBCN) | \ |
| 2351 | GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RBCU) | \ |
| 2352 | GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RBCP) | \ |
| 2353 | GENERAL_ATTEN_OFFSET(LATCHED_ATTN_RSVD_GRC)) |
| 2354 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2355 | #define HW_INTERRUT_ASSERT_SET_0 \ |
| 2356 | (AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT | \ |
| 2357 | AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT | \ |
| 2358 | AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT | \ |
Dmitry Kravkov | c14a09b | 2013-01-14 05:11:42 +0000 | [diff] [blame] | 2359 | AEU_INPUTS_ATTN_BITS_BRB_HW_INTERRUPT | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2360 | AEU_INPUTS_ATTN_BITS_PBCLIENT_HW_INTERRUPT) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2361 | #define HW_PRTY_ASSERT_SET_0 (AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR | \ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2362 | AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR | \ |
| 2363 | AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR | \ |
| 2364 | AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR |\ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2365 | AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR |\ |
| 2366 | AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR |\ |
| 2367 | AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2368 | #define HW_INTERRUT_ASSERT_SET_1 \ |
| 2369 | (AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT | \ |
| 2370 | AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT | \ |
| 2371 | AEU_INPUTS_ATTN_BITS_XSDM_HW_INTERRUPT | \ |
| 2372 | AEU_INPUTS_ATTN_BITS_XCM_HW_INTERRUPT | \ |
| 2373 | AEU_INPUTS_ATTN_BITS_XSEMI_HW_INTERRUPT | \ |
| 2374 | AEU_INPUTS_ATTN_BITS_USDM_HW_INTERRUPT | \ |
| 2375 | AEU_INPUTS_ATTN_BITS_UCM_HW_INTERRUPT | \ |
| 2376 | AEU_INPUTS_ATTN_BITS_USEMI_HW_INTERRUPT | \ |
| 2377 | AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT | \ |
| 2378 | AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT | \ |
| 2379 | AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT) |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2380 | #define HW_PRTY_ASSERT_SET_1 (AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2381 | AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2382 | AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2383 | AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2384 | AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2385 | AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR | \ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 2386 | AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR |\ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2387 | AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR |\ |
Eilon Greenstein | ab6ad5a | 2009-08-12 08:24:29 +0000 | [diff] [blame] | 2388 | AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2389 | AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR | \ |
| 2390 | AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2391 | AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2392 | AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR | \ |
| 2393 | AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2394 | AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR |\ |
| 2395 | AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2396 | #define HW_INTERRUT_ASSERT_SET_2 \ |
| 2397 | (AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT | \ |
| 2398 | AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT | \ |
| 2399 | AEU_INPUTS_ATTN_BITS_DMAE_HW_INTERRUPT | \ |
| 2400 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT |\ |
| 2401 | AEU_INPUTS_ATTN_BITS_MISC_HW_INTERRUPT) |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2402 | #define HW_PRTY_ASSERT_SET_2 (AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR | \ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2403 | AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR | \ |
| 2404 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR |\ |
| 2405 | AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR | \ |
| 2406 | AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR | \ |
Vladislav Zolotarov | c9ee920 | 2011-06-14 01:33:51 +0000 | [diff] [blame] | 2407 | AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR |\ |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2408 | AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \ |
| 2409 | AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR) |
| 2410 | |
Vladislav Zolotarov | 72fd071 | 2010-04-19 01:13:12 +0000 | [diff] [blame] | 2411 | #define HW_PRTY_ASSERT_SET_3 (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ |
| 2412 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ |
| 2413 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ |
| 2414 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2415 | |
Vladislav Zolotarov | 8736c82 | 2011-07-21 07:58:36 +0000 | [diff] [blame] | 2416 | #define HW_PRTY_ASSERT_SET_4 (AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR | \ |
| 2417 | AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR) |
| 2418 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2419 | #define MULTI_MASK 0x7f |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2420 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2421 | #define DEF_USB_FUNC_OFF offsetof(struct cstorm_def_status_block_u, func) |
| 2422 | #define DEF_CSB_FUNC_OFF offsetof(struct cstorm_def_status_block_c, func) |
| 2423 | #define DEF_XSB_FUNC_OFF offsetof(struct xstorm_def_status_block, func) |
| 2424 | #define DEF_TSB_FUNC_OFF offsetof(struct tstorm_def_status_block, func) |
| 2425 | |
| 2426 | #define DEF_USB_IGU_INDEX_OFF \ |
| 2427 | offsetof(struct cstorm_def_status_block_u, igu_index) |
| 2428 | #define DEF_CSB_IGU_INDEX_OFF \ |
| 2429 | offsetof(struct cstorm_def_status_block_c, igu_index) |
| 2430 | #define DEF_XSB_IGU_INDEX_OFF \ |
| 2431 | offsetof(struct xstorm_def_status_block, igu_index) |
| 2432 | #define DEF_TSB_IGU_INDEX_OFF \ |
| 2433 | offsetof(struct tstorm_def_status_block, igu_index) |
| 2434 | |
| 2435 | #define DEF_USB_SEGMENT_OFF \ |
| 2436 | offsetof(struct cstorm_def_status_block_u, segment) |
| 2437 | #define DEF_CSB_SEGMENT_OFF \ |
| 2438 | offsetof(struct cstorm_def_status_block_c, segment) |
| 2439 | #define DEF_XSB_SEGMENT_OFF \ |
| 2440 | offsetof(struct xstorm_def_status_block, segment) |
| 2441 | #define DEF_TSB_SEGMENT_OFF \ |
| 2442 | offsetof(struct tstorm_def_status_block, segment) |
| 2443 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2444 | #define BNX2X_SP_DSB_INDEX \ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2445 | (&bp->def_status_blk->sp_sb.\ |
| 2446 | index_values[HC_SP_INDEX_ETH_DEF_CONS]) |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2447 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2448 | #define CAM_IS_INVALID(x) \ |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2449 | (GET_FLAG(x.flags, \ |
| 2450 | MAC_CONFIGURATION_ENTRY_ACTION_TYPE) == \ |
| 2451 | (T_ETH_MAC_COMMAND_INVALIDATE)) |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2452 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2453 | /* Number of u32 elements in MC hash array */ |
| 2454 | #define MC_HASH_SIZE 8 |
| 2455 | #define MC_HASH_OFFSET(bp, i) (BAR_TSTRORM_INTMEM + \ |
| 2456 | TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(BP_FUNC(bp)) + i*4) |
| 2457 | |
Eilon Greenstein | 34f80b0 | 2008-06-23 20:33:01 -0700 | [diff] [blame] | 2458 | #ifndef PXP2_REG_PXP2_INT_STS |
| 2459 | #define PXP2_REG_PXP2_INT_STS PXP2_REG_PXP2_INT_STS_0 |
| 2460 | #endif |
| 2461 | |
Dmitry Kravkov | f2e0899 | 2010-10-06 03:28:26 +0000 | [diff] [blame] | 2462 | #ifndef ETH_MAX_RX_CLIENTS_E2 |
| 2463 | #define ETH_MAX_RX_CLIENTS_E2 ETH_MAX_RX_CLIENTS_E1H |
| 2464 | #endif |
Dmitry Kravkov | f85582f | 2010-10-06 03:34:21 +0000 | [diff] [blame] | 2465 | |
Vladislav Zolotarov | 34f24c7 | 2010-04-19 01:13:23 +0000 | [diff] [blame] | 2466 | #define BNX2X_VPD_LEN 128 |
| 2467 | #define VENDOR_ID_LEN 4 |
| 2468 | |
Ariel Elior | be1f1ffa | 2013-01-01 05:22:24 +0000 | [diff] [blame] | 2469 | #define VF_ACQUIRE_THRESH 3 |
| 2470 | #define VF_ACQUIRE_MAC_FILTERS 1 |
| 2471 | #define VF_ACQUIRE_MC_FILTERS 10 |
| 2472 | |
| 2473 | #define GOOD_ME_REG(me_reg) (((me_reg) & ME_REG_VF_VALID) && \ |
| 2474 | (!((me_reg) & ME_REG_VF_ERR))) |
Yuval Mintz | 91ebb92 | 2013-12-26 09:57:07 +0200 | [diff] [blame] | 2475 | int bnx2x_compare_fw_ver(struct bnx2x *bp, u32 load_code, bool print_err); |
| 2476 | |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2477 | /* Congestion management fairness mode */ |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 2478 | #define CMNG_FNS_NONE 0 |
| 2479 | #define CMNG_FNS_MINMAX 1 |
Dmitry Kravkov | 523224a | 2010-10-06 03:23:26 +0000 | [diff] [blame] | 2480 | |
| 2481 | #define HC_SEG_ACCESS_DEF 0 /*Driver decision 0-3*/ |
| 2482 | #define HC_SEG_ACCESS_ATTN 4 |
| 2483 | #define HC_SEG_ACCESS_NORM 0 /*Driver decision 0-1*/ |
| 2484 | |
Vlad Zolotarov | 619c5cb | 2011-06-14 14:33:44 +0300 | [diff] [blame] | 2485 | static const u32 dmae_reg_go_c[] = { |
| 2486 | DMAE_REG_GO_C0, DMAE_REG_GO_C1, DMAE_REG_GO_C2, DMAE_REG_GO_C3, |
| 2487 | DMAE_REG_GO_C4, DMAE_REG_GO_C5, DMAE_REG_GO_C6, DMAE_REG_GO_C7, |
| 2488 | DMAE_REG_GO_C8, DMAE_REG_GO_C9, DMAE_REG_GO_C10, DMAE_REG_GO_C11, |
| 2489 | DMAE_REG_GO_C12, DMAE_REG_GO_C13, DMAE_REG_GO_C14, DMAE_REG_GO_C15 |
| 2490 | }; |
Dmitry Kravkov | b0efbb9 | 2010-07-27 12:33:43 +0000 | [diff] [blame] | 2491 | |
Ariel Elior | 005a07ba | 2013-03-11 05:17:42 +0000 | [diff] [blame] | 2492 | void bnx2x_set_ethtool_ops(struct bnx2x *bp, struct net_device *netdev); |
Yaniv Rosner | 3deb816 | 2011-06-14 01:34:33 +0000 | [diff] [blame] | 2493 | void bnx2x_notify_link_changed(struct bnx2x *bp); |
Dmitry Kravkov | 614c76d | 2011-11-28 12:31:49 +0000 | [diff] [blame] | 2494 | |
Dmitry Kravkov | 9e62e91 | 2012-03-18 10:33:43 +0000 | [diff] [blame] | 2495 | #define BNX2X_MF_SD_PROTOCOL(bp) \ |
Dmitry Kravkov | 614c76d | 2011-11-28 12:31:49 +0000 | [diff] [blame] | 2496 | ((bp)->mf_config[BP_VN(bp)] & FUNC_MF_CFG_PROTOCOL_MASK) |
| 2497 | |
Dmitry Kravkov | 9e62e91 | 2012-03-18 10:33:43 +0000 | [diff] [blame] | 2498 | #define BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) \ |
| 2499 | (BNX2X_MF_SD_PROTOCOL(bp) == FUNC_MF_CFG_PROTOCOL_ISCSI) |
Dmitry Kravkov | 614c76d | 2011-11-28 12:31:49 +0000 | [diff] [blame] | 2500 | |
Dmitry Kravkov | 9e62e91 | 2012-03-18 10:33:43 +0000 | [diff] [blame] | 2501 | #define BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp) \ |
| 2502 | (BNX2X_MF_SD_PROTOCOL(bp) == FUNC_MF_CFG_PROTOCOL_FCOE) |
| 2503 | |
| 2504 | #define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) |
| 2505 | #define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) |
Dmitry Kravkov | 2e98ffc | 2014-09-17 16:24:36 +0300 | [diff] [blame] | 2506 | #define IS_MF_ISCSI_SI(bp) (IS_MF_SI(bp) && BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp)) |
Dmitry Kravkov | 9e62e91 | 2012-03-18 10:33:43 +0000 | [diff] [blame] | 2507 | |
Dmitry Kravkov | 2e98ffc | 2014-09-17 16:24:36 +0300 | [diff] [blame] | 2508 | #define IS_MF_ISCSI_ONLY(bp) (IS_MF_ISCSI_SD(bp) || IS_MF_ISCSI_SI(bp)) |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 2509 | |
Dmitry Kravkov | 2e98ffc | 2014-09-17 16:24:36 +0300 | [diff] [blame] | 2510 | #define BNX2X_MF_EXT_PROTOCOL_MASK \ |
| 2511 | (MACP_FUNC_CFG_FLAGS_ETHERNET | \ |
| 2512 | MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD | \ |
| 2513 | MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) |
| 2514 | |
| 2515 | #define BNX2X_MF_EXT_PROT(bp) ((bp)->mf_ext_config & \ |
| 2516 | BNX2X_MF_EXT_PROTOCOL_MASK) |
| 2517 | |
| 2518 | #define BNX2X_HAS_MF_EXT_PROTOCOL_FCOE(bp) \ |
| 2519 | (BNX2X_MF_EXT_PROT(bp) & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) |
| 2520 | |
| 2521 | #define BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp) \ |
| 2522 | (BNX2X_MF_EXT_PROT(bp) == MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) |
| 2523 | |
| 2524 | #define BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp) \ |
| 2525 | (BNX2X_MF_EXT_PROT(bp) == MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) |
| 2526 | |
| 2527 | #define IS_MF_FCOE_AFEX(bp) \ |
| 2528 | (IS_MF_AFEX(bp) && BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp)) |
| 2529 | |
| 2530 | #define IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp) \ |
| 2531 | (IS_MF_SD(bp) && \ |
| 2532 | (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) || \ |
| 2533 | BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))) |
| 2534 | |
| 2535 | #define IS_MF_SI_STORAGE_PERSONALITY_ONLY(bp) \ |
| 2536 | (IS_MF_SI(bp) && \ |
| 2537 | (BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp) || \ |
| 2538 | BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp))) |
| 2539 | |
| 2540 | #define IS_MF_STORAGE_PERSONALITY_ONLY(bp) \ |
| 2541 | (IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp) || \ |
| 2542 | IS_MF_SI_STORAGE_PERSONALITY_ONLY(bp)) |
| 2543 | |
Dmitry Kravkov | 614c76d | 2011-11-28 12:31:49 +0000 | [diff] [blame] | 2544 | |
Yuval Mintz | 2de6743 | 2013-01-23 03:21:43 +0000 | [diff] [blame] | 2545 | #define SET_FLAG(value, mask, flag) \ |
| 2546 | do {\ |
| 2547 | (value) &= ~(mask);\ |
| 2548 | (value) |= ((flag) << (mask##_SHIFT));\ |
| 2549 | } while (0) |
| 2550 | |
| 2551 | #define GET_FLAG(value, mask) \ |
| 2552 | (((value) & (mask)) >> (mask##_SHIFT)) |
| 2553 | |
| 2554 | #define GET_FIELD(value, fname) \ |
| 2555 | (((value) & (fname##_MASK)) >> (fname##_SHIFT)) |
| 2556 | |
Merav Sicron | 55c1194 | 2012-11-07 00:45:48 +0000 | [diff] [blame] | 2557 | enum { |
| 2558 | SWITCH_UPDATE, |
| 2559 | AFEX_UPDATE, |
| 2560 | }; |
| 2561 | |
| 2562 | #define NUM_MACS 8 |
Barak Witkowski | a334872 | 2012-04-23 03:04:46 +0000 | [diff] [blame] | 2563 | |
Dmitry Kravkov | 568e242 | 2013-08-13 02:25:00 +0300 | [diff] [blame] | 2564 | void bnx2x_set_local_cmng(struct bnx2x *bp); |
Yuval Mintz | 1a6974b | 2013-10-20 16:51:27 +0200 | [diff] [blame] | 2565 | |
Yuval Mintz | 42f8277 | 2014-03-23 18:12:23 +0200 | [diff] [blame] | 2566 | void bnx2x_update_mng_version(struct bnx2x *bp); |
| 2567 | |
Yuval Mintz | 1a6974b | 2013-10-20 16:51:27 +0200 | [diff] [blame] | 2568 | #define MCPR_SCRATCH_BASE(bp) \ |
| 2569 | (CHIP_IS_E1x(bp) ? MCP_REG_MCPR_SCRATCH : MCP_A_REG_MCPR_SCRATCH) |
| 2570 | |
Dmitry Kravkov | e848582 | 2014-01-05 18:33:50 +0200 | [diff] [blame] | 2571 | #define E1H_MAX_MF_SB_COUNT (HC_SB_MAX_SB_E1X/(E1HVN_MAX * PORT_MAX)) |
| 2572 | |
Michal Kalderon | eeed018 | 2014-08-17 16:47:44 +0300 | [diff] [blame] | 2573 | void bnx2x_init_ptp(struct bnx2x *bp); |
| 2574 | int bnx2x_configure_ptp_filters(struct bnx2x *bp); |
| 2575 | void bnx2x_set_rx_ts(struct bnx2x *bp, struct sk_buff *skb); |
| 2576 | |
| 2577 | #define BNX2X_MAX_PHC_DRIFT 31000000 |
| 2578 | #define BNX2X_PTP_TX_TIMEOUT |
| 2579 | |
Eliezer Tamir | a2fbb9e | 2007-11-15 20:09:02 +0200 | [diff] [blame] | 2580 | #endif /* bnx2x.h */ |