Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 1 | /* |
| 2 | * TI OMAP4 ISS V4L2 Driver - ISP RESIZER module |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. |
| 5 | * |
| 6 | * Author: Sergio Aguirre <sergio.a.aguirre@gmail.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/uaccess.h> |
| 16 | #include <linux/delay.h> |
| 17 | #include <linux/device.h> |
| 18 | #include <linux/dma-mapping.h> |
| 19 | #include <linux/mm.h> |
| 20 | #include <linux/sched.h> |
| 21 | |
| 22 | #include "iss.h" |
| 23 | #include "iss_regs.h" |
| 24 | #include "iss_resizer.h" |
| 25 | |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 26 | static const unsigned int resizer_fmts[] = { |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 27 | MEDIA_BUS_FMT_UYVY8_1X16, |
| 28 | MEDIA_BUS_FMT_YUYV8_1X16, |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 29 | }; |
| 30 | |
| 31 | /* |
| 32 | * resizer_print_status - Print current RESIZER Module register values. |
| 33 | * @resizer: Pointer to ISS ISP RESIZER device. |
| 34 | * |
| 35 | * Also prints other debug information stored in the RESIZER module. |
| 36 | */ |
| 37 | #define RSZ_PRINT_REGISTER(iss, name)\ |
| 38 | dev_dbg(iss->dev, "###RSZ " #name "=0x%08x\n", \ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 39 | iss_reg_read(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_##name)) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 40 | |
| 41 | #define RZA_PRINT_REGISTER(iss, name)\ |
| 42 | dev_dbg(iss->dev, "###RZA " #name "=0x%08x\n", \ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 43 | iss_reg_read(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_##name)) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 44 | |
| 45 | static void resizer_print_status(struct iss_resizer_device *resizer) |
| 46 | { |
| 47 | struct iss_device *iss = to_iss_device(resizer); |
| 48 | |
| 49 | dev_dbg(iss->dev, "-------------RESIZER Register dump-------------\n"); |
| 50 | |
| 51 | RSZ_PRINT_REGISTER(iss, SYSCONFIG); |
| 52 | RSZ_PRINT_REGISTER(iss, IN_FIFO_CTRL); |
| 53 | RSZ_PRINT_REGISTER(iss, FRACDIV); |
| 54 | RSZ_PRINT_REGISTER(iss, SRC_EN); |
| 55 | RSZ_PRINT_REGISTER(iss, SRC_MODE); |
| 56 | RSZ_PRINT_REGISTER(iss, SRC_FMT0); |
| 57 | RSZ_PRINT_REGISTER(iss, SRC_FMT1); |
| 58 | RSZ_PRINT_REGISTER(iss, SRC_VPS); |
| 59 | RSZ_PRINT_REGISTER(iss, SRC_VSZ); |
| 60 | RSZ_PRINT_REGISTER(iss, SRC_HPS); |
| 61 | RSZ_PRINT_REGISTER(iss, SRC_HSZ); |
| 62 | RSZ_PRINT_REGISTER(iss, DMA_RZA); |
| 63 | RSZ_PRINT_REGISTER(iss, DMA_RZB); |
| 64 | RSZ_PRINT_REGISTER(iss, DMA_STA); |
| 65 | RSZ_PRINT_REGISTER(iss, GCK_MMR); |
| 66 | RSZ_PRINT_REGISTER(iss, GCK_SDR); |
| 67 | RSZ_PRINT_REGISTER(iss, IRQ_RZA); |
| 68 | RSZ_PRINT_REGISTER(iss, IRQ_RZB); |
| 69 | RSZ_PRINT_REGISTER(iss, YUV_Y_MIN); |
| 70 | RSZ_PRINT_REGISTER(iss, YUV_Y_MAX); |
| 71 | RSZ_PRINT_REGISTER(iss, YUV_C_MIN); |
| 72 | RSZ_PRINT_REGISTER(iss, YUV_C_MAX); |
| 73 | RSZ_PRINT_REGISTER(iss, SEQ); |
| 74 | |
| 75 | RZA_PRINT_REGISTER(iss, EN); |
| 76 | RZA_PRINT_REGISTER(iss, MODE); |
| 77 | RZA_PRINT_REGISTER(iss, 420); |
| 78 | RZA_PRINT_REGISTER(iss, I_VPS); |
| 79 | RZA_PRINT_REGISTER(iss, I_HPS); |
| 80 | RZA_PRINT_REGISTER(iss, O_VSZ); |
| 81 | RZA_PRINT_REGISTER(iss, O_HSZ); |
| 82 | RZA_PRINT_REGISTER(iss, V_PHS_Y); |
| 83 | RZA_PRINT_REGISTER(iss, V_PHS_C); |
| 84 | RZA_PRINT_REGISTER(iss, V_DIF); |
| 85 | RZA_PRINT_REGISTER(iss, V_TYP); |
| 86 | RZA_PRINT_REGISTER(iss, V_LPF); |
| 87 | RZA_PRINT_REGISTER(iss, H_PHS); |
| 88 | RZA_PRINT_REGISTER(iss, H_DIF); |
| 89 | RZA_PRINT_REGISTER(iss, H_TYP); |
| 90 | RZA_PRINT_REGISTER(iss, H_LPF); |
| 91 | RZA_PRINT_REGISTER(iss, DWN_EN); |
| 92 | RZA_PRINT_REGISTER(iss, SDR_Y_BAD_H); |
| 93 | RZA_PRINT_REGISTER(iss, SDR_Y_BAD_L); |
| 94 | RZA_PRINT_REGISTER(iss, SDR_Y_SAD_H); |
| 95 | RZA_PRINT_REGISTER(iss, SDR_Y_SAD_L); |
| 96 | RZA_PRINT_REGISTER(iss, SDR_Y_OFT); |
| 97 | RZA_PRINT_REGISTER(iss, SDR_Y_PTR_S); |
| 98 | RZA_PRINT_REGISTER(iss, SDR_Y_PTR_E); |
| 99 | RZA_PRINT_REGISTER(iss, SDR_C_BAD_H); |
| 100 | RZA_PRINT_REGISTER(iss, SDR_C_BAD_L); |
| 101 | RZA_PRINT_REGISTER(iss, SDR_C_SAD_H); |
| 102 | RZA_PRINT_REGISTER(iss, SDR_C_SAD_L); |
| 103 | RZA_PRINT_REGISTER(iss, SDR_C_OFT); |
| 104 | RZA_PRINT_REGISTER(iss, SDR_C_PTR_S); |
| 105 | RZA_PRINT_REGISTER(iss, SDR_C_PTR_E); |
| 106 | |
| 107 | dev_dbg(iss->dev, "-----------------------------------------------\n"); |
| 108 | } |
| 109 | |
| 110 | /* |
| 111 | * resizer_enable - Enable/Disable RESIZER. |
| 112 | * @enable: enable flag |
| 113 | * |
| 114 | */ |
| 115 | static void resizer_enable(struct iss_resizer_device *resizer, u8 enable) |
| 116 | { |
| 117 | struct iss_device *iss = to_iss_device(resizer); |
| 118 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 119 | iss_reg_update(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_EN, |
| 120 | RSZ_SRC_EN_SRC_EN, enable ? RSZ_SRC_EN_SRC_EN : 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 121 | |
| 122 | /* TODO: Enable RSZB */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 123 | iss_reg_update(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_EN, RSZ_EN_EN, |
| 124 | enable ? RSZ_EN_EN : 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | /* ----------------------------------------------------------------------------- |
| 128 | * Format- and pipeline-related configuration helpers |
| 129 | */ |
| 130 | |
| 131 | /* |
| 132 | * resizer_set_outaddr - Set memory address to save output image |
| 133 | * @resizer: Pointer to ISP RESIZER device. |
| 134 | * @addr: 32-bit memory address aligned on 32 byte boundary. |
| 135 | * |
| 136 | * Sets the memory address where the output will be saved. |
| 137 | */ |
| 138 | static void resizer_set_outaddr(struct iss_resizer_device *resizer, u32 addr) |
| 139 | { |
| 140 | struct iss_device *iss = to_iss_device(resizer); |
| 141 | struct v4l2_mbus_framefmt *informat, *outformat; |
| 142 | |
| 143 | informat = &resizer->formats[RESIZER_PAD_SINK]; |
| 144 | outformat = &resizer->formats[RESIZER_PAD_SOURCE_MEM]; |
| 145 | |
| 146 | /* Save address splitted in Base Address H & L */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 147 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_BAD_H, |
| 148 | (addr >> 16) & 0xffff); |
| 149 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_BAD_L, |
| 150 | addr & 0xffff); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 151 | |
| 152 | /* SAD = BAD */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 153 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_SAD_H, |
| 154 | (addr >> 16) & 0xffff); |
| 155 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_SAD_L, |
| 156 | addr & 0xffff); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 157 | |
| 158 | /* Program UV buffer address... Hardcoded to be contiguous! */ |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 159 | if ((informat->code == MEDIA_BUS_FMT_UYVY8_1X16) && |
| 160 | (outformat->code == MEDIA_BUS_FMT_YUYV8_1_5X8)) { |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 161 | u32 c_addr = addr + (resizer->video_out.bpl_value * |
| 162 | (outformat->height - 1)); |
| 163 | |
| 164 | /* Ensure Y_BAD_L[6:0] = C_BAD_L[6:0]*/ |
| 165 | if ((c_addr ^ addr) & 0x7f) { |
| 166 | c_addr &= ~0x7f; |
| 167 | c_addr += 0x80; |
| 168 | c_addr |= addr & 0x7f; |
| 169 | } |
| 170 | |
| 171 | /* Save address splitted in Base Address H & L */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 172 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_BAD_H, |
| 173 | (c_addr >> 16) & 0xffff); |
| 174 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_BAD_L, |
| 175 | c_addr & 0xffff); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 176 | |
| 177 | /* SAD = BAD */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 178 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_SAD_H, |
| 179 | (c_addr >> 16) & 0xffff); |
| 180 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_SAD_L, |
| 181 | c_addr & 0xffff); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 182 | } |
| 183 | } |
| 184 | |
| 185 | static void resizer_configure(struct iss_resizer_device *resizer) |
| 186 | { |
| 187 | struct iss_device *iss = to_iss_device(resizer); |
| 188 | struct v4l2_mbus_framefmt *informat, *outformat; |
| 189 | |
| 190 | informat = &resizer->formats[RESIZER_PAD_SINK]; |
| 191 | outformat = &resizer->formats[RESIZER_PAD_SOURCE_MEM]; |
| 192 | |
Laurent Pinchart | bea7791 | 2013-11-13 19:54:32 -0300 | [diff] [blame] | 193 | /* Disable pass-through more. Despite its name, the BYPASS bit controls |
| 194 | * pass-through mode, not bypass mode. |
| 195 | */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 196 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_FMT0, |
| 197 | RSZ_SRC_FMT0_BYPASS); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 198 | |
| 199 | /* Select RSZ input */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 200 | iss_reg_update(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_FMT0, |
| 201 | RSZ_SRC_FMT0_SEL, |
| 202 | resizer->input == RESIZER_INPUT_IPIPEIF ? |
| 203 | RSZ_SRC_FMT0_SEL : 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 204 | |
| 205 | /* RSZ ignores WEN signal from IPIPE/IPIPEIF */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 206 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_MODE, |
| 207 | RSZ_SRC_MODE_WRT); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 208 | |
| 209 | /* Set Resizer in free-running mode */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 210 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_MODE, |
| 211 | RSZ_SRC_MODE_OST); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 212 | |
| 213 | /* Init Resizer A */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 214 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_MODE, |
| 215 | RZA_MODE_ONE_SHOT); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 216 | |
| 217 | /* Set size related things now */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 218 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_VPS, 0); |
| 219 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_HPS, 0); |
| 220 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_VSZ, |
| 221 | informat->height - 2); |
| 222 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SRC_HSZ, |
| 223 | informat->width - 1); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 224 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 225 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_I_VPS, 0); |
| 226 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_I_HPS, 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 227 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 228 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_O_VSZ, |
| 229 | outformat->height - 2); |
| 230 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_O_HSZ, |
| 231 | outformat->width - 1); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 232 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 233 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_V_DIF, 0x100); |
| 234 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_H_DIF, 0x100); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 235 | |
| 236 | /* Buffer output settings */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 237 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_PTR_S, 0); |
| 238 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_PTR_E, |
| 239 | outformat->height - 1); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 240 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 241 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_Y_OFT, |
| 242 | resizer->video_out.bpl_value); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 243 | |
| 244 | /* UYVY -> NV12 conversion */ |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 245 | if ((informat->code == MEDIA_BUS_FMT_UYVY8_1X16) && |
| 246 | (outformat->code == MEDIA_BUS_FMT_YUYV8_1_5X8)) { |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 247 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_420, |
| 248 | RSZ_420_CEN | RSZ_420_YEN); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 249 | |
| 250 | /* UV Buffer output settings */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 251 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_PTR_S, |
| 252 | 0); |
| 253 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_PTR_E, |
| 254 | outformat->height - 1); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 255 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 256 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_SDR_C_OFT, |
| 257 | resizer->video_out.bpl_value); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 258 | } else { |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 259 | iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_420, 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 260 | } |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | /* ----------------------------------------------------------------------------- |
| 264 | * Interrupt handling |
| 265 | */ |
| 266 | |
| 267 | static void resizer_isr_buffer(struct iss_resizer_device *resizer) |
| 268 | { |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 269 | struct iss_buffer *buffer; |
| 270 | |
Laurent Pinchart | 82043ff | 2013-09-04 09:48:20 -0300 | [diff] [blame] | 271 | /* The whole resizer needs to be stopped. Disabling RZA only produces |
| 272 | * input FIFO overflows, most probably when the next frame is received. |
| 273 | */ |
| 274 | resizer_enable(resizer, 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 275 | |
| 276 | buffer = omap4iss_video_buffer_next(&resizer->video_out); |
| 277 | if (buffer == NULL) |
| 278 | return; |
| 279 | |
| 280 | resizer_set_outaddr(resizer, buffer->iss_addr); |
| 281 | |
Laurent Pinchart | 82043ff | 2013-09-04 09:48:20 -0300 | [diff] [blame] | 282 | resizer_enable(resizer, 1); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | /* |
| 286 | * resizer_isif0_isr - Handle ISIF0 event |
| 287 | * @resizer: Pointer to ISP RESIZER device. |
| 288 | * |
| 289 | * Executes LSC deferred enablement before next frame starts. |
| 290 | */ |
| 291 | static void resizer_int_dma_isr(struct iss_resizer_device *resizer) |
| 292 | { |
| 293 | struct iss_pipeline *pipe = |
| 294 | to_iss_pipeline(&resizer->subdev.entity); |
| 295 | if (pipe->do_propagation) |
| 296 | atomic_inc(&pipe->frame_number); |
| 297 | |
| 298 | resizer_isr_buffer(resizer); |
| 299 | } |
| 300 | |
| 301 | /* |
| 302 | * omap4iss_resizer_isr - Configure resizer during interframe time. |
| 303 | * @resizer: Pointer to ISP RESIZER device. |
| 304 | * @events: RESIZER events |
| 305 | */ |
| 306 | void omap4iss_resizer_isr(struct iss_resizer_device *resizer, u32 events) |
| 307 | { |
| 308 | struct iss_device *iss = to_iss_device(resizer); |
| 309 | struct iss_pipeline *pipe = |
| 310 | to_iss_pipeline(&resizer->subdev.entity); |
| 311 | |
Laurent Pinchart | ade1ec3 | 2013-08-28 12:03:50 -0300 | [diff] [blame] | 312 | if (events & (ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR | |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 313 | ISP5_IRQ_RSZ_FIFO_OVF)) { |
Laurent Pinchart | 499226f | 2013-12-03 21:26:37 -0300 | [diff] [blame] | 314 | dev_dbg(iss->dev, "RSZ Err: FIFO_IN_BLK:%d, FIFO_OVF:%d\n", |
Laurent Pinchart | cd782f9 | 2013-08-28 13:40:57 -0300 | [diff] [blame] | 315 | events & ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR ? 1 : 0, |
| 316 | events & ISP5_IRQ_RSZ_FIFO_OVF ? 1 : 0); |
Laurent Pinchart | 112da08 | 2013-11-05 12:32:05 -0300 | [diff] [blame] | 317 | omap4iss_pipeline_cancel_stream(pipe); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 318 | } |
| 319 | |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 320 | if (omap4iss_module_sync_is_stopping(&resizer->wait, |
| 321 | &resizer->stopping)) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 322 | return; |
| 323 | |
| 324 | if (events & ISP5_IRQ_RSZ_INT_DMA) |
| 325 | resizer_int_dma_isr(resizer); |
| 326 | } |
| 327 | |
| 328 | /* ----------------------------------------------------------------------------- |
| 329 | * ISS video operations |
| 330 | */ |
| 331 | |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 332 | static int resizer_video_queue(struct iss_video *video, |
| 333 | struct iss_buffer *buffer) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 334 | { |
| 335 | struct iss_resizer_device *resizer = container_of(video, |
| 336 | struct iss_resizer_device, video_out); |
| 337 | |
| 338 | if (!(resizer->output & RESIZER_OUTPUT_MEMORY)) |
| 339 | return -ENODEV; |
| 340 | |
| 341 | resizer_set_outaddr(resizer, buffer->iss_addr); |
| 342 | |
| 343 | /* |
| 344 | * If streaming was enabled before there was a buffer queued |
| 345 | * or underrun happened in the ISR, the hardware was not enabled |
| 346 | * and DMA queue flag ISS_VIDEO_DMAQUEUE_UNDERRUN is still set. |
| 347 | * Enable it now. |
| 348 | */ |
| 349 | if (video->dmaqueue_flags & ISS_VIDEO_DMAQUEUE_UNDERRUN) { |
| 350 | resizer_enable(resizer, 1); |
| 351 | iss_video_dmaqueue_flags_clr(video); |
| 352 | } |
| 353 | |
| 354 | return 0; |
| 355 | } |
| 356 | |
| 357 | static const struct iss_video_operations resizer_video_ops = { |
| 358 | .queue = resizer_video_queue, |
| 359 | }; |
| 360 | |
| 361 | /* ----------------------------------------------------------------------------- |
| 362 | * V4L2 subdev operations |
| 363 | */ |
| 364 | |
| 365 | /* |
| 366 | * resizer_set_stream - Enable/Disable streaming on the RESIZER module |
| 367 | * @sd: ISP RESIZER V4L2 subdevice |
| 368 | * @enable: Enable/disable stream |
| 369 | */ |
| 370 | static int resizer_set_stream(struct v4l2_subdev *sd, int enable) |
| 371 | { |
| 372 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 373 | struct iss_device *iss = to_iss_device(resizer); |
| 374 | struct iss_video *video_out = &resizer->video_out; |
| 375 | int ret = 0; |
| 376 | |
| 377 | if (resizer->state == ISS_PIPELINE_STREAM_STOPPED) { |
| 378 | if (enable == ISS_PIPELINE_STREAM_STOPPED) |
| 379 | return 0; |
| 380 | |
| 381 | omap4iss_isp_subclk_enable(iss, OMAP4_ISS_ISP_SUBCLK_RSZ); |
| 382 | |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 383 | iss_reg_set(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_GCK_MMR, |
| 384 | RSZ_GCK_MMR_MMR); |
| 385 | iss_reg_set(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_GCK_SDR, |
| 386 | RSZ_GCK_SDR_CORE); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 387 | |
| 388 | /* FIXME: Enable RSZB also */ |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 389 | iss_reg_set(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SYSCONFIG, |
| 390 | RSZ_SYSCONFIG_RSZA_CLK_EN); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | switch (enable) { |
| 394 | case ISS_PIPELINE_STREAM_CONTINUOUS: |
| 395 | |
| 396 | resizer_configure(resizer); |
| 397 | resizer_print_status(resizer); |
| 398 | |
| 399 | /* |
| 400 | * When outputting to memory with no buffer available, let the |
| 401 | * buffer queue handler start the hardware. A DMA queue flag |
| 402 | * ISS_VIDEO_DMAQUEUE_QUEUED will be set as soon as there is |
| 403 | * a buffer available. |
| 404 | */ |
| 405 | if (resizer->output & RESIZER_OUTPUT_MEMORY && |
| 406 | !(video_out->dmaqueue_flags & ISS_VIDEO_DMAQUEUE_QUEUED)) |
| 407 | break; |
| 408 | |
| 409 | atomic_set(&resizer->stopping, 0); |
| 410 | resizer_enable(resizer, 1); |
| 411 | iss_video_dmaqueue_flags_clr(video_out); |
| 412 | break; |
| 413 | |
| 414 | case ISS_PIPELINE_STREAM_STOPPED: |
| 415 | if (resizer->state == ISS_PIPELINE_STREAM_STOPPED) |
| 416 | return 0; |
| 417 | if (omap4iss_module_sync_idle(&sd->entity, &resizer->wait, |
| 418 | &resizer->stopping)) |
Laurent Pinchart | 6016498 | 2013-10-09 11:52:45 -0300 | [diff] [blame] | 419 | ret = -ETIMEDOUT; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 420 | |
| 421 | resizer_enable(resizer, 0); |
Laurent Pinchart | 11abbfd | 2013-08-30 22:23:17 -0300 | [diff] [blame] | 422 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SYSCONFIG, |
| 423 | RSZ_SYSCONFIG_RSZA_CLK_EN); |
| 424 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_GCK_SDR, |
| 425 | RSZ_GCK_SDR_CORE); |
| 426 | iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_GCK_MMR, |
| 427 | RSZ_GCK_MMR_MMR); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 428 | omap4iss_isp_subclk_disable(iss, OMAP4_ISS_ISP_SUBCLK_RSZ); |
| 429 | iss_video_dmaqueue_flags_clr(video_out); |
| 430 | break; |
| 431 | } |
| 432 | |
| 433 | resizer->state = enable; |
| 434 | return ret; |
| 435 | } |
| 436 | |
| 437 | static struct v4l2_mbus_framefmt * |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 438 | __resizer_get_format(struct iss_resizer_device *resizer, |
| 439 | struct v4l2_subdev_fh *fh, unsigned int pad, |
| 440 | enum v4l2_subdev_format_whence which) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 441 | { |
| 442 | if (which == V4L2_SUBDEV_FORMAT_TRY) |
| 443 | return v4l2_subdev_get_try_format(fh, pad); |
Gulsah Kose | 9eeea5e | 2014-09-27 22:34:33 +0300 | [diff] [blame] | 444 | return &resizer->formats[pad]; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | /* |
| 448 | * resizer_try_format - Try video format on a pad |
| 449 | * @resizer: ISS RESIZER device |
| 450 | * @fh : V4L2 subdev file handle |
| 451 | * @pad: Pad number |
| 452 | * @fmt: Format |
| 453 | */ |
| 454 | static void |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 455 | resizer_try_format(struct iss_resizer_device *resizer, |
| 456 | struct v4l2_subdev_fh *fh, unsigned int pad, |
| 457 | struct v4l2_mbus_framefmt *fmt, |
| 458 | enum v4l2_subdev_format_whence which) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 459 | { |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 460 | u32 pixelcode; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 461 | struct v4l2_mbus_framefmt *format; |
| 462 | unsigned int width = fmt->width; |
| 463 | unsigned int height = fmt->height; |
| 464 | unsigned int i; |
| 465 | |
| 466 | switch (pad) { |
| 467 | case RESIZER_PAD_SINK: |
| 468 | for (i = 0; i < ARRAY_SIZE(resizer_fmts); i++) { |
| 469 | if (fmt->code == resizer_fmts[i]) |
| 470 | break; |
| 471 | } |
| 472 | |
| 473 | /* If not found, use UYVY as default */ |
| 474 | if (i >= ARRAY_SIZE(resizer_fmts)) |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 475 | fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 476 | |
| 477 | /* Clamp the input size. */ |
| 478 | fmt->width = clamp_t(u32, width, 1, 8192); |
| 479 | fmt->height = clamp_t(u32, height, 1, 8192); |
| 480 | break; |
| 481 | |
| 482 | case RESIZER_PAD_SOURCE_MEM: |
| 483 | pixelcode = fmt->code; |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 484 | format = __resizer_get_format(resizer, fh, RESIZER_PAD_SINK, |
| 485 | which); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 486 | memcpy(fmt, format, sizeof(*fmt)); |
| 487 | |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 488 | if ((pixelcode == MEDIA_BUS_FMT_YUYV8_1_5X8) && |
| 489 | (fmt->code == MEDIA_BUS_FMT_UYVY8_1X16)) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 490 | fmt->code = pixelcode; |
| 491 | |
| 492 | /* The data formatter truncates the number of horizontal output |
| 493 | * pixels to a multiple of 16. To avoid clipping data, allow |
| 494 | * callers to request an output size bigger than the input size |
| 495 | * up to the nearest multiple of 16. |
| 496 | */ |
| 497 | fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15); |
| 498 | fmt->width &= ~15; |
| 499 | fmt->height = clamp_t(u32, height, 32, fmt->height); |
| 500 | break; |
| 501 | |
| 502 | } |
| 503 | |
| 504 | fmt->colorspace = V4L2_COLORSPACE_JPEG; |
| 505 | fmt->field = V4L2_FIELD_NONE; |
| 506 | } |
| 507 | |
| 508 | /* |
| 509 | * resizer_enum_mbus_code - Handle pixel format enumeration |
| 510 | * @sd : pointer to v4l2 subdev structure |
| 511 | * @fh : V4L2 subdev file handle |
| 512 | * @code : pointer to v4l2_subdev_mbus_code_enum structure |
| 513 | * return -EINVAL or zero on success |
| 514 | */ |
| 515 | static int resizer_enum_mbus_code(struct v4l2_subdev *sd, |
| 516 | struct v4l2_subdev_fh *fh, |
| 517 | struct v4l2_subdev_mbus_code_enum *code) |
| 518 | { |
| 519 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 520 | struct v4l2_mbus_framefmt *format; |
| 521 | |
| 522 | switch (code->pad) { |
| 523 | case RESIZER_PAD_SINK: |
| 524 | if (code->index >= ARRAY_SIZE(resizer_fmts)) |
| 525 | return -EINVAL; |
| 526 | |
| 527 | code->code = resizer_fmts[code->index]; |
| 528 | break; |
| 529 | |
| 530 | case RESIZER_PAD_SOURCE_MEM: |
| 531 | format = __resizer_get_format(resizer, fh, RESIZER_PAD_SINK, |
| 532 | V4L2_SUBDEV_FORMAT_TRY); |
| 533 | |
| 534 | if (code->index == 0) { |
| 535 | code->code = format->code; |
| 536 | break; |
| 537 | } |
| 538 | |
| 539 | switch (format->code) { |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 540 | case MEDIA_BUS_FMT_UYVY8_1X16: |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 541 | if (code->index == 1) |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 542 | code->code = MEDIA_BUS_FMT_YUYV8_1_5X8; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 543 | else |
| 544 | return -EINVAL; |
| 545 | break; |
| 546 | default: |
| 547 | if (code->index != 0) |
| 548 | return -EINVAL; |
| 549 | } |
| 550 | |
| 551 | break; |
| 552 | |
| 553 | default: |
| 554 | return -EINVAL; |
| 555 | } |
| 556 | |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | static int resizer_enum_frame_size(struct v4l2_subdev *sd, |
| 561 | struct v4l2_subdev_fh *fh, |
| 562 | struct v4l2_subdev_frame_size_enum *fse) |
| 563 | { |
| 564 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 565 | struct v4l2_mbus_framefmt format; |
| 566 | |
| 567 | if (fse->index != 0) |
| 568 | return -EINVAL; |
| 569 | |
| 570 | format.code = fse->code; |
| 571 | format.width = 1; |
| 572 | format.height = 1; |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 573 | resizer_try_format(resizer, fh, fse->pad, &format, |
| 574 | V4L2_SUBDEV_FORMAT_TRY); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 575 | fse->min_width = format.width; |
| 576 | fse->min_height = format.height; |
| 577 | |
| 578 | if (format.code != fse->code) |
| 579 | return -EINVAL; |
| 580 | |
| 581 | format.code = fse->code; |
| 582 | format.width = -1; |
| 583 | format.height = -1; |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 584 | resizer_try_format(resizer, fh, fse->pad, &format, |
| 585 | V4L2_SUBDEV_FORMAT_TRY); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 586 | fse->max_width = format.width; |
| 587 | fse->max_height = format.height; |
| 588 | |
| 589 | return 0; |
| 590 | } |
| 591 | |
| 592 | /* |
| 593 | * resizer_get_format - Retrieve the video format on a pad |
| 594 | * @sd : ISP RESIZER V4L2 subdevice |
| 595 | * @fh : V4L2 subdev file handle |
| 596 | * @fmt: Format |
| 597 | * |
| 598 | * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond |
| 599 | * to the format type. |
| 600 | */ |
| 601 | static int resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, |
| 602 | struct v4l2_subdev_format *fmt) |
| 603 | { |
| 604 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 605 | struct v4l2_mbus_framefmt *format; |
| 606 | |
| 607 | format = __resizer_get_format(resizer, fh, fmt->pad, fmt->which); |
| 608 | if (format == NULL) |
| 609 | return -EINVAL; |
| 610 | |
| 611 | fmt->format = *format; |
| 612 | return 0; |
| 613 | } |
| 614 | |
| 615 | /* |
| 616 | * resizer_set_format - Set the video format on a pad |
| 617 | * @sd : ISP RESIZER V4L2 subdevice |
| 618 | * @fh : V4L2 subdev file handle |
| 619 | * @fmt: Format |
| 620 | * |
| 621 | * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond |
| 622 | * to the format type. |
| 623 | */ |
| 624 | static int resizer_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, |
| 625 | struct v4l2_subdev_format *fmt) |
| 626 | { |
| 627 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 628 | struct v4l2_mbus_framefmt *format; |
| 629 | |
| 630 | format = __resizer_get_format(resizer, fh, fmt->pad, fmt->which); |
| 631 | if (format == NULL) |
| 632 | return -EINVAL; |
| 633 | |
| 634 | resizer_try_format(resizer, fh, fmt->pad, &fmt->format, fmt->which); |
| 635 | *format = fmt->format; |
| 636 | |
| 637 | /* Propagate the format from sink to source */ |
| 638 | if (fmt->pad == RESIZER_PAD_SINK) { |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 639 | format = __resizer_get_format(resizer, fh, |
| 640 | RESIZER_PAD_SOURCE_MEM, |
| 641 | fmt->which); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 642 | *format = fmt->format; |
| 643 | resizer_try_format(resizer, fh, RESIZER_PAD_SOURCE_MEM, format, |
| 644 | fmt->which); |
| 645 | } |
| 646 | |
| 647 | return 0; |
| 648 | } |
| 649 | |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 650 | static int resizer_link_validate(struct v4l2_subdev *sd, |
| 651 | struct media_link *link, |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 652 | struct v4l2_subdev_format *source_fmt, |
| 653 | struct v4l2_subdev_format *sink_fmt) |
| 654 | { |
| 655 | /* Check if the two ends match */ |
| 656 | if (source_fmt->format.width != sink_fmt->format.width || |
| 657 | source_fmt->format.height != sink_fmt->format.height) |
| 658 | return -EPIPE; |
| 659 | |
| 660 | if (source_fmt->format.code != sink_fmt->format.code) |
| 661 | return -EPIPE; |
| 662 | |
| 663 | return 0; |
| 664 | } |
| 665 | |
| 666 | /* |
| 667 | * resizer_init_formats - Initialize formats on all pads |
| 668 | * @sd: ISP RESIZER V4L2 subdevice |
| 669 | * @fh: V4L2 subdev file handle |
| 670 | * |
| 671 | * Initialize all pad formats with default values. If fh is not NULL, try |
| 672 | * formats are initialized on the file handle. Otherwise active formats are |
| 673 | * initialized on the device. |
| 674 | */ |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 675 | static int resizer_init_formats(struct v4l2_subdev *sd, |
| 676 | struct v4l2_subdev_fh *fh) |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 677 | { |
| 678 | struct v4l2_subdev_format format; |
| 679 | |
| 680 | memset(&format, 0, sizeof(format)); |
| 681 | format.pad = RESIZER_PAD_SINK; |
| 682 | format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; |
Boris BREZILLON | 3336f07 | 2014-11-10 14:28:33 -0300 | [diff] [blame^] | 683 | format.format.code = MEDIA_BUS_FMT_UYVY8_1X16; |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 684 | format.format.width = 4096; |
| 685 | format.format.height = 4096; |
| 686 | resizer_set_format(sd, fh, &format); |
| 687 | |
| 688 | return 0; |
| 689 | } |
| 690 | |
| 691 | /* V4L2 subdev video operations */ |
| 692 | static const struct v4l2_subdev_video_ops resizer_v4l2_video_ops = { |
| 693 | .s_stream = resizer_set_stream, |
| 694 | }; |
| 695 | |
| 696 | /* V4L2 subdev pad operations */ |
| 697 | static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = { |
| 698 | .enum_mbus_code = resizer_enum_mbus_code, |
| 699 | .enum_frame_size = resizer_enum_frame_size, |
| 700 | .get_fmt = resizer_get_format, |
| 701 | .set_fmt = resizer_set_format, |
| 702 | .link_validate = resizer_link_validate, |
| 703 | }; |
| 704 | |
| 705 | /* V4L2 subdev operations */ |
| 706 | static const struct v4l2_subdev_ops resizer_v4l2_ops = { |
| 707 | .video = &resizer_v4l2_video_ops, |
| 708 | .pad = &resizer_v4l2_pad_ops, |
| 709 | }; |
| 710 | |
| 711 | /* V4L2 subdev internal operations */ |
| 712 | static const struct v4l2_subdev_internal_ops resizer_v4l2_internal_ops = { |
| 713 | .open = resizer_init_formats, |
| 714 | }; |
| 715 | |
| 716 | /* ----------------------------------------------------------------------------- |
| 717 | * Media entity operations |
| 718 | */ |
| 719 | |
| 720 | /* |
| 721 | * resizer_link_setup - Setup RESIZER connections |
| 722 | * @entity: RESIZER media entity |
| 723 | * @local: Pad at the local end of the link |
| 724 | * @remote: Pad at the remote end of the link |
| 725 | * @flags: Link flags |
| 726 | * |
| 727 | * return -EINVAL or zero on success |
| 728 | */ |
| 729 | static int resizer_link_setup(struct media_entity *entity, |
| 730 | const struct media_pad *local, |
| 731 | const struct media_pad *remote, u32 flags) |
| 732 | { |
| 733 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); |
| 734 | struct iss_resizer_device *resizer = v4l2_get_subdevdata(sd); |
| 735 | struct iss_device *iss = to_iss_device(resizer); |
| 736 | |
| 737 | switch (local->index | media_entity_type(remote->entity)) { |
| 738 | case RESIZER_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV: |
| 739 | /* Read from IPIPE or IPIPEIF. */ |
| 740 | if (!(flags & MEDIA_LNK_FL_ENABLED)) { |
| 741 | resizer->input = RESIZER_INPUT_NONE; |
| 742 | break; |
| 743 | } |
| 744 | |
| 745 | if (resizer->input != RESIZER_INPUT_NONE) |
| 746 | return -EBUSY; |
| 747 | |
| 748 | if (remote->entity == &iss->ipipeif.subdev.entity) |
| 749 | resizer->input = RESIZER_INPUT_IPIPEIF; |
| 750 | else if (remote->entity == &iss->ipipe.subdev.entity) |
| 751 | resizer->input = RESIZER_INPUT_IPIPE; |
| 752 | |
| 753 | |
| 754 | break; |
| 755 | |
| 756 | case RESIZER_PAD_SOURCE_MEM | MEDIA_ENT_T_DEVNODE: |
| 757 | /* Write to memory */ |
| 758 | if (flags & MEDIA_LNK_FL_ENABLED) { |
| 759 | if (resizer->output & ~RESIZER_OUTPUT_MEMORY) |
| 760 | return -EBUSY; |
| 761 | resizer->output |= RESIZER_OUTPUT_MEMORY; |
| 762 | } else { |
| 763 | resizer->output &= ~RESIZER_OUTPUT_MEMORY; |
| 764 | } |
| 765 | break; |
| 766 | |
| 767 | default: |
| 768 | return -EINVAL; |
| 769 | } |
| 770 | |
| 771 | return 0; |
| 772 | } |
| 773 | |
| 774 | /* media operations */ |
| 775 | static const struct media_entity_operations resizer_media_ops = { |
| 776 | .link_setup = resizer_link_setup, |
| 777 | .link_validate = v4l2_subdev_link_validate, |
| 778 | }; |
| 779 | |
| 780 | /* |
| 781 | * resizer_init_entities - Initialize V4L2 subdev and media entity |
| 782 | * @resizer: ISS ISP RESIZER module |
| 783 | * |
| 784 | * Return 0 on success and a negative error code on failure. |
| 785 | */ |
| 786 | static int resizer_init_entities(struct iss_resizer_device *resizer) |
| 787 | { |
| 788 | struct v4l2_subdev *sd = &resizer->subdev; |
| 789 | struct media_pad *pads = resizer->pads; |
| 790 | struct media_entity *me = &sd->entity; |
| 791 | int ret; |
| 792 | |
| 793 | resizer->input = RESIZER_INPUT_NONE; |
| 794 | |
| 795 | v4l2_subdev_init(sd, &resizer_v4l2_ops); |
| 796 | sd->internal_ops = &resizer_v4l2_internal_ops; |
| 797 | strlcpy(sd->name, "OMAP4 ISS ISP resizer", sizeof(sd->name)); |
| 798 | sd->grp_id = 1 << 16; /* group ID for iss subdevs */ |
| 799 | v4l2_set_subdevdata(sd, resizer); |
| 800 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
| 801 | |
| 802 | pads[RESIZER_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
| 803 | pads[RESIZER_PAD_SOURCE_MEM].flags = MEDIA_PAD_FL_SOURCE; |
| 804 | |
| 805 | me->ops = &resizer_media_ops; |
| 806 | ret = media_entity_init(me, RESIZER_PADS_NUM, pads, 0); |
| 807 | if (ret < 0) |
| 808 | return ret; |
| 809 | |
| 810 | resizer_init_formats(sd, NULL); |
| 811 | |
| 812 | resizer->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 813 | resizer->video_out.ops = &resizer_video_ops; |
| 814 | resizer->video_out.iss = to_iss_device(resizer); |
| 815 | resizer->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3; |
| 816 | resizer->video_out.bpl_alignment = 32; |
| 817 | resizer->video_out.bpl_zero_padding = 1; |
| 818 | resizer->video_out.bpl_max = 0x1ffe0; |
| 819 | |
| 820 | ret = omap4iss_video_init(&resizer->video_out, "ISP resizer a"); |
| 821 | if (ret < 0) |
| 822 | return ret; |
| 823 | |
| 824 | /* Connect the RESIZER subdev to the video node. */ |
Laurent Pinchart | a0fe029 | 2013-12-03 21:28:37 -0300 | [diff] [blame] | 825 | ret = media_entity_create_link(&resizer->subdev.entity, |
| 826 | RESIZER_PAD_SOURCE_MEM, |
| 827 | &resizer->video_out.video.entity, 0, 0); |
Sergio Aguirre | 69c536b | 2011-01-24 15:48:19 -0300 | [diff] [blame] | 828 | if (ret < 0) |
| 829 | return ret; |
| 830 | |
| 831 | return 0; |
| 832 | } |
| 833 | |
| 834 | void omap4iss_resizer_unregister_entities(struct iss_resizer_device *resizer) |
| 835 | { |
| 836 | media_entity_cleanup(&resizer->subdev.entity); |
| 837 | |
| 838 | v4l2_device_unregister_subdev(&resizer->subdev); |
| 839 | omap4iss_video_unregister(&resizer->video_out); |
| 840 | } |
| 841 | |
| 842 | int omap4iss_resizer_register_entities(struct iss_resizer_device *resizer, |
| 843 | struct v4l2_device *vdev) |
| 844 | { |
| 845 | int ret; |
| 846 | |
| 847 | /* Register the subdev and video node. */ |
| 848 | ret = v4l2_device_register_subdev(vdev, &resizer->subdev); |
| 849 | if (ret < 0) |
| 850 | goto error; |
| 851 | |
| 852 | ret = omap4iss_video_register(&resizer->video_out, vdev); |
| 853 | if (ret < 0) |
| 854 | goto error; |
| 855 | |
| 856 | return 0; |
| 857 | |
| 858 | error: |
| 859 | omap4iss_resizer_unregister_entities(resizer); |
| 860 | return ret; |
| 861 | } |
| 862 | |
| 863 | /* ----------------------------------------------------------------------------- |
| 864 | * ISP RESIZER initialisation and cleanup |
| 865 | */ |
| 866 | |
| 867 | /* |
| 868 | * omap4iss_resizer_init - RESIZER module initialization. |
| 869 | * @iss: Device pointer specific to the OMAP4 ISS. |
| 870 | * |
| 871 | * TODO: Get the initialisation values from platform data. |
| 872 | * |
| 873 | * Return 0 on success or a negative error code otherwise. |
| 874 | */ |
| 875 | int omap4iss_resizer_init(struct iss_device *iss) |
| 876 | { |
| 877 | struct iss_resizer_device *resizer = &iss->resizer; |
| 878 | |
| 879 | resizer->state = ISS_PIPELINE_STREAM_STOPPED; |
| 880 | init_waitqueue_head(&resizer->wait); |
| 881 | |
| 882 | return resizer_init_entities(resizer); |
| 883 | } |
| 884 | |
| 885 | /* |
| 886 | * omap4iss_resizer_cleanup - RESIZER module cleanup. |
| 887 | * @iss: Device pointer specific to the OMAP4 ISS. |
| 888 | */ |
| 889 | void omap4iss_resizer_cleanup(struct iss_device *iss) |
| 890 | { |
| 891 | /* FIXME: are you sure there's nothing to do? */ |
| 892 | } |