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James Bottomley2908d772006-08-29 09:22:51 -05001/*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26#ifndef _SAS_H_
27#define _SAS_H_
28
29#include <linux/types.h>
30#include <asm/byteorder.h>
31
32#define SAS_ADDR_SIZE 8
33#define HASHED_SAS_ADDR_SIZE 3
34#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36#define SMP_REQUEST 0x40
37#define SMP_RESPONSE 0x41
38
39#define SSP_DATA 0x01
40#define SSP_XFER_RDY 0x05
41#define SSP_COMMAND 0x06
42#define SSP_RESPONSE 0x07
43#define SSP_TASK 0x16
44
45#define SMP_REPORT_GENERAL 0x00
46#define SMP_REPORT_MANUF_INFO 0x01
47#define SMP_READ_GPIO_REG 0x02
48#define SMP_DISCOVER 0x10
49#define SMP_REPORT_PHY_ERR_LOG 0x11
50#define SMP_REPORT_PHY_SATA 0x12
51#define SMP_REPORT_ROUTE_INFO 0x13
52#define SMP_WRITE_GPIO_REG 0x82
53#define SMP_CONF_ROUTE_INFO 0x90
54#define SMP_PHY_CONTROL 0x91
55#define SMP_PHY_TEST_FUNCTION 0x92
56
57#define SMP_RESP_FUNC_ACC 0x00
58#define SMP_RESP_FUNC_UNK 0x01
59#define SMP_RESP_FUNC_FAILED 0x02
60#define SMP_RESP_INV_FRM_LEN 0x03
61#define SMP_RESP_NO_PHY 0x10
62#define SMP_RESP_NO_INDEX 0x11
63#define SMP_RESP_PHY_NO_SATA 0x12
64#define SMP_RESP_PHY_UNK_OP 0x13
65#define SMP_RESP_PHY_UNK_TESTF 0x14
66#define SMP_RESP_PHY_TEST_INPROG 0x15
67#define SMP_RESP_PHY_VACANT 0x16
68
69/* SAM TMFs */
70#define TMF_ABORT_TASK 0x01
71#define TMF_ABORT_TASK_SET 0x02
72#define TMF_CLEAR_TASK_SET 0x04
73#define TMF_LU_RESET 0x08
74#define TMF_CLEAR_ACA 0x40
75#define TMF_QUERY_TASK 0x80
76
77/* SAS TMF responses */
78#define TMF_RESP_FUNC_COMPLETE 0x00
79#define TMF_RESP_INVALID_FRAME 0x02
80#define TMF_RESP_FUNC_ESUPP 0x04
81#define TMF_RESP_FUNC_FAILED 0x05
82#define TMF_RESP_FUNC_SUCC 0x08
83#define TMF_RESP_NO_LUN 0x09
84#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90};
91
Dan Williams354cf822012-01-12 17:57:35 -080092/* See sas_discover.c if you plan on changing these */
James Bottomley2908d772006-08-29 09:22:51 -050093enum sas_dev_type {
94 NO_DEVICE = 0, /* protocol */
95 SAS_END_DEV = 1, /* protocol */
96 EDGE_DEV = 2, /* protocol */
97 FANOUT_DEV = 3, /* protocol */
98 SAS_HA = 4,
99 SATA_DEV = 5,
100 SATA_PM = 7,
101 SATA_PM_PORT= 8,
Dan Williams354cf822012-01-12 17:57:35 -0800102 SATA_PENDING = 9,
James Bottomley2908d772006-08-29 09:22:51 -0500103};
104
Darrick J. Wong5929faf2007-11-05 11:51:17 -0800105enum sas_protocol {
106 SAS_PROTOCOL_SATA = 0x01,
107 SAS_PROTOCOL_SMP = 0x02,
108 SAS_PROTOCOL_STP = 0x04,
109 SAS_PROTOCOL_SSP = 0x08,
110 SAS_PROTOCOL_ALL = 0x0E,
Dan Williams05a2a172011-09-23 18:09:11 -0700111 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
James Bottomley2908d772006-08-29 09:22:51 -0500112};
113
114/* From the spec; local phys only */
115enum phy_func {
116 PHY_FUNC_NOP,
117 PHY_FUNC_LINK_RESET, /* Enables the phy */
118 PHY_FUNC_HARD_RESET,
119 PHY_FUNC_DISABLE,
120 PHY_FUNC_CLEAR_ERROR_LOG = 5,
121 PHY_FUNC_CLEAR_AFFIL,
122 PHY_FUNC_TX_SATA_PS_SIGNAL,
123 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
James Bottomleya01e70e2006-09-06 19:28:07 -0500124 PHY_FUNC_SET_LINK_RATE,
Dan Williamsac013ed12011-09-28 18:48:02 -0700125 PHY_FUNC_GET_EVENTS,
James Bottomley2908d772006-08-29 09:22:51 -0500126};
127
128/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
129 * Most of those are here for completeness.
130 */
131enum sas_prim {
132 SAS_PRIM_AIP_NORMAL = 1,
133 SAS_PRIM_AIP_R0 = 2,
134 SAS_PRIM_AIP_R1 = 3,
135 SAS_PRIM_AIP_R2 = 4,
136 SAS_PRIM_AIP_WC = 5,
137 SAS_PRIM_AIP_WD = 6,
138 SAS_PRIM_AIP_WP = 7,
139 SAS_PRIM_AIP_RWP = 8,
140
141 SAS_PRIM_BC_CH = 9,
142 SAS_PRIM_BC_RCH0 = 10,
143 SAS_PRIM_BC_RCH1 = 11,
144 SAS_PRIM_BC_R0 = 12,
145 SAS_PRIM_BC_R1 = 13,
146 SAS_PRIM_BC_R2 = 14,
147 SAS_PRIM_BC_R3 = 15,
148 SAS_PRIM_BC_R4 = 16,
149
150 SAS_PRIM_NOTIFY_ENSP= 17,
151 SAS_PRIM_NOTIFY_R0 = 18,
152 SAS_PRIM_NOTIFY_R1 = 19,
153 SAS_PRIM_NOTIFY_R2 = 20,
154
155 SAS_PRIM_CLOSE_CLAF = 21,
156 SAS_PRIM_CLOSE_NORM = 22,
157 SAS_PRIM_CLOSE_R0 = 23,
158 SAS_PRIM_CLOSE_R1 = 24,
159
160 SAS_PRIM_OPEN_RTRY = 25,
161 SAS_PRIM_OPEN_RJCT = 26,
162 SAS_PRIM_OPEN_ACPT = 27,
163
164 SAS_PRIM_DONE = 28,
165 SAS_PRIM_BREAK = 29,
166
167 SATA_PRIM_DMAT = 33,
168 SATA_PRIM_PMNAK = 34,
169 SATA_PRIM_PMACK = 35,
170 SATA_PRIM_PMREQ_S = 36,
171 SATA_PRIM_PMREQ_P = 37,
172 SATA_SATA_R_ERR = 38,
173};
174
175enum sas_open_rej_reason {
176 /* Abandon open */
177 SAS_OREJ_UNKNOWN = 0,
178 SAS_OREJ_BAD_DEST = 1,
179 SAS_OREJ_CONN_RATE = 2,
180 SAS_OREJ_EPROTO = 3,
181 SAS_OREJ_RESV_AB0 = 4,
182 SAS_OREJ_RESV_AB1 = 5,
183 SAS_OREJ_RESV_AB2 = 6,
184 SAS_OREJ_RESV_AB3 = 7,
185 SAS_OREJ_WRONG_DEST= 8,
186 SAS_OREJ_STP_NORES = 9,
187
188 /* Retry open */
189 SAS_OREJ_NO_DEST = 10,
190 SAS_OREJ_PATH_BLOCKED = 11,
191 SAS_OREJ_RSVD_CONT0 = 12,
192 SAS_OREJ_RSVD_CONT1 = 13,
193 SAS_OREJ_RSVD_INIT0 = 14,
194 SAS_OREJ_RSVD_INIT1 = 15,
195 SAS_OREJ_RSVD_STOP0 = 16,
196 SAS_OREJ_RSVD_STOP1 = 17,
197 SAS_OREJ_RSVD_RETRY = 18,
198};
199
Dan Williams8ec65522011-09-01 21:18:20 -0700200enum sas_gpio_reg_type {
201 SAS_GPIO_REG_CFG = 0,
202 SAS_GPIO_REG_RX = 1,
203 SAS_GPIO_REG_RX_GP = 2,
204 SAS_GPIO_REG_TX = 3,
205 SAS_GPIO_REG_TX_GP = 4,
206};
207
James Bottomley2908d772006-08-29 09:22:51 -0500208struct dev_to_host_fis {
209 u8 fis_type; /* 0x34 */
210 u8 flags;
211 u8 status;
212 u8 error;
213
214 u8 lbal;
215 union { u8 lbam; u8 byte_count_low; };
216 union { u8 lbah; u8 byte_count_high; };
217 u8 device;
218
219 u8 lbal_exp;
220 u8 lbam_exp;
221 u8 lbah_exp;
222 u8 _r_a;
223
224 union { u8 sector_count; u8 interrupt_reason; };
225 u8 sector_count_exp;
226 u8 _r_b;
227 u8 _r_c;
228
229 u32 _r_d;
230} __attribute__ ((packed));
231
232struct host_to_dev_fis {
233 u8 fis_type; /* 0x27 */
234 u8 flags;
235 u8 command;
236 u8 features;
237
238 u8 lbal;
239 union { u8 lbam; u8 byte_count_low; };
240 union { u8 lbah; u8 byte_count_high; };
241 u8 device;
242
243 u8 lbal_exp;
244 u8 lbam_exp;
245 u8 lbah_exp;
246 u8 features_exp;
247
248 union { u8 sector_count; u8 interrupt_reason; };
249 u8 sector_count_exp;
250 u8 _r_a;
251 u8 control;
252
253 u32 _r_b;
254} __attribute__ ((packed));
255
256/* Prefer to have code clarity over header file clarity.
257 */
258#ifdef __LITTLE_ENDIAN_BITFIELD
259struct sas_identify_frame {
260 /* Byte 0 */
261 u8 frame_type:4;
262 u8 dev_type:3;
263 u8 _un0:1;
264
265 /* Byte 1 */
266 u8 _un1;
267
268 /* Byte 2 */
269 union {
270 struct {
271 u8 _un20:1;
272 u8 smp_iport:1;
273 u8 stp_iport:1;
274 u8 ssp_iport:1;
275 u8 _un247:4;
276 };
277 u8 initiator_bits;
278 };
279
280 /* Byte 3 */
281 union {
282 struct {
283 u8 _un30:1;
284 u8 smp_tport:1;
285 u8 stp_tport:1;
286 u8 ssp_tport:1;
287 u8 _un347:4;
288 };
289 u8 target_bits;
290 };
291
292 /* Byte 4 - 11 */
293 u8 _un4_11[8];
294
295 /* Byte 12 - 19 */
296 u8 sas_addr[SAS_ADDR_SIZE];
297
298 /* Byte 20 */
299 u8 phy_id;
300
301 u8 _un21_27[7];
302
303 __be32 crc;
304} __attribute__ ((packed));
305
306struct ssp_frame_hdr {
307 u8 frame_type;
308 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
309 u8 _r_a;
310 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
311 __be16 _r_b;
312
313 u8 changing_data_ptr:1;
314 u8 retransmit:1;
315 u8 retry_data_frames:1;
316 u8 _r_c:5;
317
318 u8 num_fill_bytes:2;
319 u8 _r_d:6;
320
321 u32 _r_e;
322 __be16 tag;
323 __be16 tptt;
324 __be32 data_offs;
325} __attribute__ ((packed));
326
327struct ssp_response_iu {
328 u8 _r_a[10];
329
330 u8 datapres:2;
331 u8 _r_b:6;
332
333 u8 status;
334
335 u32 _r_c;
336
337 __be32 sense_data_len;
338 __be32 response_data_len;
339
340 u8 resp_data[0];
341 u8 sense_data[0];
342} __attribute__ ((packed));
343
344/* ---------- SMP ---------- */
345
346struct report_general_resp {
347 __be16 change_count;
348 __be16 route_indexes;
349 u8 _r_a;
350 u8 num_phys;
351
352 u8 conf_route_table:1;
353 u8 configuring:1;
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700354 u8 config_others:1;
355 u8 orej_retry_supp:1;
356 u8 stp_cont_awt:1;
357 u8 self_config:1;
358 u8 zone_config:1;
359 u8 t2t_supp:1;
James Bottomley2908d772006-08-29 09:22:51 -0500360
361 u8 _r_c;
362
363 u8 enclosure_logical_id[8];
364
365 u8 _r_d[12];
366} __attribute__ ((packed));
367
368struct discover_resp {
369 u8 _r_a[5];
370
371 u8 phy_id;
372 __be16 _r_b;
373
374 u8 _r_c:4;
375 u8 attached_dev_type:3;
376 u8 _r_d:1;
377
378 u8 linkrate:4;
379 u8 _r_e:4;
380
381 u8 attached_sata_host:1;
382 u8 iproto:3;
383 u8 _r_f:4;
384
385 u8 attached_sata_dev:1;
386 u8 tproto:3;
387 u8 _r_g:3;
388 u8 attached_sata_ps:1;
389
390 u8 sas_addr[8];
391 u8 attached_sas_addr[8];
392 u8 attached_phy_id;
393
394 u8 _r_h[7];
395
396 u8 hmin_linkrate:4;
397 u8 pmin_linkrate:4;
398 u8 hmax_linkrate:4;
399 u8 pmax_linkrate:4;
400
401 u8 change_count;
402
403 u8 pptv:4;
404 u8 _r_i:3;
405 u8 virtual:1;
406
407 u8 routing_attr:4;
408 u8 _r_j:4;
409
410 u8 conn_type;
411 u8 conn_el_index;
412 u8 conn_phy_link;
413
414 u8 _r_k[8];
415} __attribute__ ((packed));
416
417struct report_phy_sata_resp {
418 u8 _r_a[5];
419
420 u8 phy_id;
421 u8 _r_b;
422
423 u8 affil_valid:1;
424 u8 affil_supp:1;
425 u8 _r_c:6;
426
427 u32 _r_d;
428
429 u8 stp_sas_addr[8];
430
431 struct dev_to_host_fis fis;
432
433 u32 _r_e;
434
435 u8 affil_stp_ini_addr[8];
436
437 __be32 crc;
438} __attribute__ ((packed));
439
440struct smp_resp {
441 u8 frame_type;
442 u8 function;
443 u8 result;
444 u8 reserved;
445 union {
446 struct report_general_resp rg;
447 struct discover_resp disc;
448 struct report_phy_sata_resp rps;
449 };
450} __attribute__ ((packed));
451
452#elif defined(__BIG_ENDIAN_BITFIELD)
453struct sas_identify_frame {
454 /* Byte 0 */
455 u8 _un0:1;
456 u8 dev_type:3;
457 u8 frame_type:4;
458
459 /* Byte 1 */
460 u8 _un1;
461
462 /* Byte 2 */
463 union {
464 struct {
465 u8 _un247:4;
466 u8 ssp_iport:1;
467 u8 stp_iport:1;
468 u8 smp_iport:1;
469 u8 _un20:1;
470 };
471 u8 initiator_bits;
472 };
473
474 /* Byte 3 */
475 union {
476 struct {
477 u8 _un347:4;
478 u8 ssp_tport:1;
479 u8 stp_tport:1;
480 u8 smp_tport:1;
481 u8 _un30:1;
482 };
483 u8 target_bits;
484 };
485
486 /* Byte 4 - 11 */
487 u8 _un4_11[8];
488
489 /* Byte 12 - 19 */
490 u8 sas_addr[SAS_ADDR_SIZE];
491
492 /* Byte 20 */
493 u8 phy_id;
494
495 u8 _un21_27[7];
496
497 __be32 crc;
498} __attribute__ ((packed));
499
500struct ssp_frame_hdr {
501 u8 frame_type;
502 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
503 u8 _r_a;
504 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
505 __be16 _r_b;
506
507 u8 _r_c:5;
508 u8 retry_data_frames:1;
509 u8 retransmit:1;
510 u8 changing_data_ptr:1;
511
512 u8 _r_d:6;
513 u8 num_fill_bytes:2;
514
515 u32 _r_e;
516 __be16 tag;
517 __be16 tptt;
518 __be32 data_offs;
519} __attribute__ ((packed));
520
521struct ssp_response_iu {
522 u8 _r_a[10];
523
524 u8 _r_b:6;
525 u8 datapres:2;
526
527 u8 status;
528
529 u32 _r_c;
530
531 __be32 sense_data_len;
532 __be32 response_data_len;
533
534 u8 resp_data[0];
535 u8 sense_data[0];
536} __attribute__ ((packed));
537
538/* ---------- SMP ---------- */
539
540struct report_general_resp {
541 __be16 change_count;
542 __be16 route_indexes;
543 u8 _r_a;
544 u8 num_phys;
545
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700546 u8 t2t_supp:1;
547 u8 zone_config:1;
548 u8 self_config:1;
549 u8 stp_cont_awt:1;
550 u8 orej_retry_supp:1;
551 u8 config_others:1;
James Bottomley2908d772006-08-29 09:22:51 -0500552 u8 configuring:1;
553 u8 conf_route_table:1;
554
555 u8 _r_c;
556
557 u8 enclosure_logical_id[8];
558
559 u8 _r_d[12];
560} __attribute__ ((packed));
561
562struct discover_resp {
563 u8 _r_a[5];
564
565 u8 phy_id;
566 __be16 _r_b;
567
568 u8 _r_d:1;
569 u8 attached_dev_type:3;
570 u8 _r_c:4;
571
572 u8 _r_e:4;
573 u8 linkrate:4;
574
575 u8 _r_f:4;
576 u8 iproto:3;
577 u8 attached_sata_host:1;
578
579 u8 attached_sata_ps:1;
580 u8 _r_g:3;
581 u8 tproto:3;
582 u8 attached_sata_dev:1;
583
584 u8 sas_addr[8];
585 u8 attached_sas_addr[8];
586 u8 attached_phy_id;
587
588 u8 _r_h[7];
589
590 u8 pmin_linkrate:4;
591 u8 hmin_linkrate:4;
592 u8 pmax_linkrate:4;
593 u8 hmax_linkrate:4;
594
595 u8 change_count;
596
597 u8 virtual:1;
598 u8 _r_i:3;
599 u8 pptv:4;
600
601 u8 _r_j:4;
602 u8 routing_attr:4;
603
604 u8 conn_type;
605 u8 conn_el_index;
606 u8 conn_phy_link;
607
608 u8 _r_k[8];
609} __attribute__ ((packed));
610
611struct report_phy_sata_resp {
612 u8 _r_a[5];
613
614 u8 phy_id;
615 u8 _r_b;
616
617 u8 _r_c:6;
618 u8 affil_supp:1;
619 u8 affil_valid:1;
620
621 u32 _r_d;
622
623 u8 stp_sas_addr[8];
624
625 struct dev_to_host_fis fis;
626
627 u32 _r_e;
628
629 u8 affil_stp_ini_addr[8];
630
631 __be32 crc;
632} __attribute__ ((packed));
633
634struct smp_resp {
635 u8 frame_type;
636 u8 function;
637 u8 result;
638 u8 reserved;
639 union {
640 struct report_general_resp rg;
641 struct discover_resp disc;
642 struct report_phy_sata_resp rps;
643 };
644} __attribute__ ((packed));
645
646#else
647#error "Bitfield order not defined!"
648#endif
649
650#endif /* _SAS_H_ */