Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 1 | /* |
| 2 | * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs |
| 3 | * |
| 4 | * Copyright (C) 2010 Google, Inc. |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 5 | * Copyright (C) 2009 - 2013 NVIDIA Corporation |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/clk.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 20 | #include <linux/dma-mapping.h> |
Kishon Vijay Abraham I | ded017e | 2012-06-26 17:40:32 +0530 | [diff] [blame] | 21 | #include <linux/err.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 22 | #include <linux/gpio.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 23 | #include <linux/io.h> |
| 24 | #include <linux/irq.h> |
| 25 | #include <linux/module.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 26 | #include <linux/of.h> |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 27 | #include <linux/of_device.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 28 | #include <linux/of_gpio.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 29 | #include <linux/platform_device.h> |
Alan Stern | ebf20de | 2012-05-01 11:28:49 -0400 | [diff] [blame] | 30 | #include <linux/pm_runtime.h> |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 31 | #include <linux/reset.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 32 | #include <linux/slab.h> |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 33 | #include <linux/usb/ehci_def.h> |
Venu Byravarasu | 1ba8216 | 2012-09-05 18:50:23 +0530 | [diff] [blame] | 34 | #include <linux/usb/tegra_usb_phy.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 35 | #include <linux/usb.h> |
| 36 | #include <linux/usb/hcd.h> |
| 37 | #include <linux/usb/otg.h> |
| 38 | |
| 39 | #include "ehci.h" |
Stephen Warren | 54388b2 | 2012-10-02 16:49:25 -0600 | [diff] [blame] | 40 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 41 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
| 42 | |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 43 | #define TEGRA_USB_DMA_ALIGN 32 |
| 44 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 45 | #define DRIVER_DESC "Tegra EHCI driver" |
| 46 | #define DRV_NAME "tegra-ehci" |
| 47 | |
| 48 | static struct hc_driver __read_mostly tegra_ehci_hc_driver; |
| 49 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 50 | struct tegra_ehci_soc_config { |
| 51 | bool has_hostpc; |
| 52 | }; |
| 53 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 54 | struct tegra_ehci_hcd { |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 55 | struct tegra_usb_phy *phy; |
| 56 | struct clk *clk; |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 57 | struct reset_control *rst; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 58 | int port_resuming; |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 59 | bool needs_double_reset; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 60 | enum tegra_usb_phy_port_speed port_speed; |
| 61 | }; |
| 62 | |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 63 | static int tegra_ehci_internal_port_reset( |
| 64 | struct ehci_hcd *ehci, |
| 65 | u32 __iomem *portsc_reg |
| 66 | ) |
| 67 | { |
| 68 | u32 temp; |
| 69 | unsigned long flags; |
| 70 | int retval = 0; |
| 71 | int i, tries; |
| 72 | u32 saved_usbintr; |
| 73 | |
| 74 | spin_lock_irqsave(&ehci->lock, flags); |
| 75 | saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable); |
| 76 | /* disable USB interrupt */ |
| 77 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
| 78 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 79 | |
| 80 | /* |
| 81 | * Here we have to do Port Reset at most twice for |
| 82 | * Port Enable bit to be set. |
| 83 | */ |
| 84 | for (i = 0; i < 2; i++) { |
| 85 | temp = ehci_readl(ehci, portsc_reg); |
| 86 | temp |= PORT_RESET; |
| 87 | ehci_writel(ehci, temp, portsc_reg); |
| 88 | mdelay(10); |
| 89 | temp &= ~PORT_RESET; |
| 90 | ehci_writel(ehci, temp, portsc_reg); |
| 91 | mdelay(1); |
| 92 | tries = 100; |
| 93 | do { |
| 94 | mdelay(1); |
| 95 | /* |
| 96 | * Up to this point, Port Enable bit is |
| 97 | * expected to be set after 2 ms waiting. |
| 98 | * USB1 usually takes extra 45 ms, for safety, |
| 99 | * we take 100 ms as timeout. |
| 100 | */ |
| 101 | temp = ehci_readl(ehci, portsc_reg); |
| 102 | } while (!(temp & PORT_PE) && tries--); |
| 103 | if (temp & PORT_PE) |
| 104 | break; |
| 105 | } |
| 106 | if (i == 2) |
| 107 | retval = -ETIMEDOUT; |
| 108 | |
| 109 | /* |
| 110 | * Clear Connect Status Change bit if it's set. |
| 111 | * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared. |
| 112 | */ |
| 113 | if (temp & PORT_CSC) |
| 114 | ehci_writel(ehci, PORT_CSC, portsc_reg); |
| 115 | |
| 116 | /* |
| 117 | * Write to clear any interrupt status bits that might be set |
| 118 | * during port reset. |
| 119 | */ |
| 120 | temp = ehci_readl(ehci, &ehci->regs->status); |
| 121 | ehci_writel(ehci, temp, &ehci->regs->status); |
| 122 | |
| 123 | /* restore original interrupt enable bits */ |
| 124 | ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable); |
| 125 | return retval; |
| 126 | } |
| 127 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 128 | static int tegra_ehci_hub_control( |
| 129 | struct usb_hcd *hcd, |
| 130 | u16 typeReq, |
| 131 | u16 wValue, |
| 132 | u16 wIndex, |
| 133 | char *buf, |
| 134 | u16 wLength |
| 135 | ) |
| 136 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 137 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 138 | struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 139 | u32 __iomem *status_reg; |
| 140 | u32 temp; |
| 141 | unsigned long flags; |
| 142 | int retval = 0; |
| 143 | |
| 144 | status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; |
| 145 | |
| 146 | spin_lock_irqsave(&ehci->lock, flags); |
| 147 | |
Stephen Warren | 6d5f89c | 2012-04-18 15:32:46 -0600 | [diff] [blame] | 148 | if (typeReq == GetPortStatus) { |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 149 | temp = ehci_readl(ehci, status_reg); |
| 150 | if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { |
| 151 | /* Resume completed, re-enable disconnect detection */ |
| 152 | tegra->port_resuming = 0; |
Venu Byravarasu | ab137d0 | 2013-01-24 15:57:03 +0530 | [diff] [blame] | 153 | tegra_usb_phy_postresume(hcd->phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | |
| 157 | else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { |
| 158 | temp = ehci_readl(ehci, status_reg); |
| 159 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { |
| 160 | retval = -EPIPE; |
| 161 | goto done; |
| 162 | } |
| 163 | |
Stephen Warren | b087657 | 2012-04-25 12:31:10 -0600 | [diff] [blame] | 164 | temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 165 | temp |= PORT_WKDISC_E | PORT_WKOC_E; |
| 166 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); |
| 167 | |
| 168 | /* |
| 169 | * If a transaction is in progress, there may be a delay in |
| 170 | * suspending the port. Poll until the port is suspended. |
| 171 | */ |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 172 | if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 173 | PORT_SUSPEND, 5000)) |
| 174 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); |
| 175 | |
| 176 | set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); |
| 177 | goto done; |
| 178 | } |
| 179 | |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 180 | /* For USB1 port we need to issue Port Reset twice internally */ |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 181 | if (tegra->needs_double_reset && |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 182 | (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { |
| 183 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 184 | return tegra_ehci_internal_port_reset(ehci, status_reg); |
| 185 | } |
| 186 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 187 | /* |
| 188 | * Tegra host controller will time the resume operation to clear the bit |
| 189 | * when the port control state switches to HS or FS Idle. This behavior |
| 190 | * is different from EHCI where the host controller driver is required |
| 191 | * to set this bit to a zero after the resume duration is timed in the |
| 192 | * driver. |
| 193 | */ |
| 194 | else if (typeReq == ClearPortFeature && |
| 195 | wValue == USB_PORT_FEAT_SUSPEND) { |
| 196 | temp = ehci_readl(ehci, status_reg); |
| 197 | if ((temp & PORT_RESET) || !(temp & PORT_PE)) { |
| 198 | retval = -EPIPE; |
| 199 | goto done; |
| 200 | } |
| 201 | |
| 202 | if (!(temp & PORT_SUSPEND)) |
| 203 | goto done; |
| 204 | |
| 205 | /* Disable disconnect detection during port resume */ |
Venu Byravarasu | ab137d0 | 2013-01-24 15:57:03 +0530 | [diff] [blame] | 206 | tegra_usb_phy_preresume(hcd->phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 207 | |
| 208 | ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); |
| 209 | |
| 210 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
| 211 | /* start resume signalling */ |
| 212 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
Alan Stern | a448e4d | 2012-04-03 15:24:30 -0400 | [diff] [blame] | 213 | set_bit(wIndex-1, &ehci->resuming_ports); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 214 | |
| 215 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 216 | msleep(20); |
| 217 | spin_lock_irqsave(&ehci->lock, flags); |
| 218 | |
| 219 | /* Poll until the controller clears RESUME and SUSPEND */ |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 220 | if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000)) |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 221 | pr_err("%s: timeout waiting for RESUME\n", __func__); |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 222 | if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 223 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); |
| 224 | |
| 225 | ehci->reset_done[wIndex-1] = 0; |
Alan Stern | a448e4d | 2012-04-03 15:24:30 -0400 | [diff] [blame] | 226 | clear_bit(wIndex-1, &ehci->resuming_ports); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 227 | |
| 228 | tegra->port_resuming = 1; |
| 229 | goto done; |
| 230 | } |
| 231 | |
| 232 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 233 | |
| 234 | /* Handle the hub control events here */ |
Laurent Pinchart | 3776993 | 2014-04-16 18:00:10 +0200 | [diff] [blame^] | 235 | return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 236 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 237 | done: |
| 238 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 239 | return retval; |
| 240 | } |
| 241 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 242 | struct dma_aligned_buffer { |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 243 | void *kmalloc_ptr; |
| 244 | void *old_xfer_buffer; |
| 245 | u8 data[0]; |
| 246 | }; |
| 247 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 248 | static void free_dma_aligned_buffer(struct urb *urb) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 249 | { |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 250 | struct dma_aligned_buffer *temp; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 251 | |
| 252 | if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) |
| 253 | return; |
| 254 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 255 | temp = container_of(urb->transfer_buffer, |
| 256 | struct dma_aligned_buffer, data); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 257 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 258 | if (usb_urb_dir_in(urb)) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 259 | memcpy(temp->old_xfer_buffer, temp->data, |
| 260 | urb->transfer_buffer_length); |
| 261 | urb->transfer_buffer = temp->old_xfer_buffer; |
| 262 | kfree(temp->kmalloc_ptr); |
| 263 | |
| 264 | urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; |
| 265 | } |
| 266 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 267 | static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 268 | { |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 269 | struct dma_aligned_buffer *temp, *kmalloc_ptr; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 270 | size_t kmalloc_size; |
| 271 | |
| 272 | if (urb->num_sgs || urb->sg || |
| 273 | urb->transfer_buffer_length == 0 || |
| 274 | !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) |
| 275 | return 0; |
| 276 | |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 277 | /* Allocate a buffer with enough padding for alignment */ |
| 278 | kmalloc_size = urb->transfer_buffer_length + |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 279 | sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 280 | |
| 281 | kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); |
| 282 | if (!kmalloc_ptr) |
| 283 | return -ENOMEM; |
| 284 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 285 | /* Position our struct dma_aligned_buffer such that data is aligned */ |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 286 | temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 287 | temp->kmalloc_ptr = kmalloc_ptr; |
| 288 | temp->old_xfer_buffer = urb->transfer_buffer; |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 289 | if (usb_urb_dir_out(urb)) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 290 | memcpy(temp->data, urb->transfer_buffer, |
| 291 | urb->transfer_buffer_length); |
| 292 | urb->transfer_buffer = temp->data; |
| 293 | |
| 294 | urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; |
| 295 | |
| 296 | return 0; |
| 297 | } |
| 298 | |
| 299 | static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, |
| 300 | gfp_t mem_flags) |
| 301 | { |
| 302 | int ret; |
| 303 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 304 | ret = alloc_dma_aligned_buffer(urb, mem_flags); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 305 | if (ret) |
| 306 | return ret; |
| 307 | |
| 308 | ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); |
| 309 | if (ret) |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 310 | free_dma_aligned_buffer(urb); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 311 | |
| 312 | return ret; |
| 313 | } |
| 314 | |
| 315 | static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) |
| 316 | { |
| 317 | usb_hcd_unmap_urb_for_dma(hcd, urb); |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 318 | free_dma_aligned_buffer(urb); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 319 | } |
| 320 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 321 | static const struct tegra_ehci_soc_config tegra30_soc_config = { |
| 322 | .has_hostpc = true, |
| 323 | }; |
| 324 | |
| 325 | static const struct tegra_ehci_soc_config tegra20_soc_config = { |
| 326 | .has_hostpc = false, |
| 327 | }; |
| 328 | |
| 329 | static struct of_device_id tegra_ehci_of_match[] = { |
| 330 | { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config }, |
| 331 | { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config }, |
| 332 | { }, |
| 333 | }; |
| 334 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 335 | static int tegra_ehci_probe(struct platform_device *pdev) |
| 336 | { |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 337 | const struct of_device_id *match; |
| 338 | const struct tegra_ehci_soc_config *soc_config; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 339 | struct resource *res; |
| 340 | struct usb_hcd *hcd; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 341 | struct ehci_hcd *ehci; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 342 | struct tegra_ehci_hcd *tegra; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 343 | int err = 0; |
| 344 | int irq; |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 345 | struct usb_phy *u_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 346 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 347 | match = of_match_device(tegra_ehci_of_match, &pdev->dev); |
| 348 | if (!match) { |
| 349 | dev_err(&pdev->dev, "Error: No device match found\n"); |
| 350 | return -ENODEV; |
| 351 | } |
| 352 | soc_config = match->data; |
| 353 | |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 354 | /* Right now device-tree probed devices don't get dma_mask set. |
| 355 | * Since shared usb code relies on it, set it here for now. |
| 356 | * Once we have dma capability bindings this can go away. |
| 357 | */ |
Russell King | e1fd734 | 2013-06-27 12:36:37 +0100 | [diff] [blame] | 358 | err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
Russell King | 22d9d8e | 2013-06-10 16:28:49 +0100 | [diff] [blame] | 359 | if (err) |
| 360 | return err; |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 361 | |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 362 | hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, |
| 363 | dev_name(&pdev->dev)); |
| 364 | if (!hcd) { |
| 365 | dev_err(&pdev->dev, "Unable to create HCD\n"); |
Mikko Perttunen | f5b8c8b | 2013-07-17 10:37:49 +0300 | [diff] [blame] | 366 | return -ENOMEM; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 367 | } |
| 368 | platform_set_drvdata(pdev, hcd); |
| 369 | ehci = hcd_to_ehci(hcd); |
| 370 | tegra = (struct tegra_ehci_hcd *)ehci->priv; |
| 371 | |
| 372 | hcd->has_tt = 1; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 373 | |
Julia Lawall | bc2ff98 | 2012-07-30 16:43:41 +0200 | [diff] [blame] | 374 | tegra->clk = devm_clk_get(&pdev->dev, NULL); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 375 | if (IS_ERR(tegra->clk)) { |
| 376 | dev_err(&pdev->dev, "Can't get ehci clock\n"); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 377 | err = PTR_ERR(tegra->clk); |
| 378 | goto cleanup_hcd_create; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 379 | } |
| 380 | |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 381 | tegra->rst = devm_reset_control_get(&pdev->dev, "usb"); |
| 382 | if (IS_ERR(tegra->rst)) { |
| 383 | dev_err(&pdev->dev, "Can't get ehci reset\n"); |
| 384 | err = PTR_ERR(tegra->rst); |
| 385 | goto cleanup_hcd_create; |
| 386 | } |
| 387 | |
Prashant Gaikwad | 20de12c | 2012-06-05 09:59:38 +0530 | [diff] [blame] | 388 | err = clk_prepare_enable(tegra->clk); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 389 | if (err) |
Wei Yongjun | dafbe92 | 2013-09-27 16:22:08 +0800 | [diff] [blame] | 390 | goto cleanup_hcd_create; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 391 | |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 392 | reset_control_assert(tegra->rst); |
Venu Byravarasu | eb5369e | 2013-04-03 16:11:12 +0530 | [diff] [blame] | 393 | udelay(1); |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 394 | reset_control_deassert(tegra->rst); |
Venu Byravarasu | eb5369e | 2013-04-03 16:11:12 +0530 | [diff] [blame] | 395 | |
Tuomas Tynkkynen | 7db71a9 | 2013-07-25 21:38:06 +0300 | [diff] [blame] | 396 | u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 397 | if (IS_ERR(u_phy)) { |
| 398 | err = PTR_ERR(u_phy); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 399 | goto cleanup_clk_en; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 400 | } |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 401 | hcd->phy = u_phy; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 402 | |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 403 | tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node, |
| 404 | "nvidia,needs-double-reset"); |
| 405 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 406 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 407 | if (!res) { |
| 408 | dev_err(&pdev->dev, "Failed to get I/O memory\n"); |
| 409 | err = -ENXIO; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 410 | goto cleanup_clk_en; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 411 | } |
| 412 | hcd->rsrc_start = res->start; |
| 413 | hcd->rsrc_len = resource_size(res); |
Julia Lawall | bc2ff98 | 2012-07-30 16:43:41 +0200 | [diff] [blame] | 414 | hcd->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 415 | if (!hcd->regs) { |
| 416 | dev_err(&pdev->dev, "Failed to remap I/O memory\n"); |
| 417 | err = -ENOMEM; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 418 | goto cleanup_clk_en; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 419 | } |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 420 | ehci->caps = hcd->regs + 0x100; |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 421 | ehci->has_hostpc = soc_config->has_hostpc; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 422 | |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 423 | err = usb_phy_init(hcd->phy); |
| 424 | if (err) { |
| 425 | dev_err(&pdev->dev, "Failed to initialize phy\n"); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 426 | goto cleanup_clk_en; |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 427 | } |
| 428 | |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 429 | u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), |
| 430 | GFP_KERNEL); |
| 431 | if (!u_phy->otg) { |
| 432 | dev_err(&pdev->dev, "Failed to alloc memory for otg\n"); |
| 433 | err = -ENOMEM; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 434 | goto cleanup_phy; |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 435 | } |
| 436 | u_phy->otg->host = hcd_to_bus(hcd); |
| 437 | |
Venu Byravarasu | ab137d0 | 2013-01-24 15:57:03 +0530 | [diff] [blame] | 438 | err = usb_phy_set_suspend(hcd->phy, 0); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 439 | if (err) { |
| 440 | dev_err(&pdev->dev, "Failed to power on the phy\n"); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 441 | goto cleanup_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 442 | } |
| 443 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 444 | irq = platform_get_irq(pdev, 0); |
| 445 | if (!irq) { |
| 446 | dev_err(&pdev->dev, "Failed to get IRQ\n"); |
| 447 | err = -ENODEV; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 448 | goto cleanup_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 449 | } |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 450 | |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 451 | otg_set_host(u_phy->otg, &hcd->self); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 452 | |
Yong Zhang | b5dd18d | 2011-09-07 16:10:52 +0800 | [diff] [blame] | 453 | err = usb_add_hcd(hcd, irq, IRQF_SHARED); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 454 | if (err) { |
| 455 | dev_err(&pdev->dev, "Failed to add USB HCD\n"); |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 456 | goto cleanup_otg_set_host; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 457 | } |
Peter Chen | 3c9740a | 2013-11-05 10:46:02 +0800 | [diff] [blame] | 458 | device_wakeup_enable(hcd->self.controller); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 459 | |
| 460 | return err; |
| 461 | |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 462 | cleanup_otg_set_host: |
| 463 | otg_set_host(u_phy->otg, NULL); |
Thierry Reding | 8fefcfd | 2013-06-14 13:21:21 +0200 | [diff] [blame] | 464 | cleanup_phy: |
Venu Byravarasu | ab137d0 | 2013-01-24 15:57:03 +0530 | [diff] [blame] | 465 | usb_phy_shutdown(hcd->phy); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 466 | cleanup_clk_en: |
| 467 | clk_disable_unprepare(tegra->clk); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 468 | cleanup_hcd_create: |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 469 | usb_put_hcd(hcd); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 470 | return err; |
| 471 | } |
| 472 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 473 | static int tegra_ehci_remove(struct platform_device *pdev) |
| 474 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 475 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
| 476 | struct tegra_ehci_hcd *tegra = |
| 477 | (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 478 | |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 479 | otg_set_host(hcd->phy->otg, NULL); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 480 | |
Venu Byravarasu | ab137d0 | 2013-01-24 15:57:03 +0530 | [diff] [blame] | 481 | usb_phy_shutdown(hcd->phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 482 | usb_remove_hcd(hcd); |
Venu Byravarasu | ecc8a0c | 2012-08-10 11:42:43 +0530 | [diff] [blame] | 483 | usb_put_hcd(hcd); |
| 484 | |
Prashant Gaikwad | 20de12c | 2012-06-05 09:59:38 +0530 | [diff] [blame] | 485 | clk_disable_unprepare(tegra->clk); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 486 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 487 | return 0; |
| 488 | } |
| 489 | |
| 490 | static void tegra_ehci_hcd_shutdown(struct platform_device *pdev) |
| 491 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 492 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 493 | |
| 494 | if (hcd->driver->shutdown) |
| 495 | hcd->driver->shutdown(hcd); |
| 496 | } |
| 497 | |
| 498 | static struct platform_driver tegra_ehci_driver = { |
| 499 | .probe = tegra_ehci_probe, |
| 500 | .remove = tegra_ehci_remove, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 501 | .shutdown = tegra_ehci_hcd_shutdown, |
| 502 | .driver = { |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 503 | .name = DRV_NAME, |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 504 | .of_match_table = tegra_ehci_of_match, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 505 | } |
| 506 | }; |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 507 | |
Stephen Warren | 4f2fe2d | 2014-04-14 15:21:23 -0600 | [diff] [blame] | 508 | static int tegra_ehci_reset(struct usb_hcd *hcd) |
| 509 | { |
| 510 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 511 | int retval; |
| 512 | int txfifothresh; |
| 513 | |
| 514 | retval = ehci_setup(hcd); |
| 515 | if (retval) |
| 516 | return retval; |
| 517 | |
| 518 | /* |
| 519 | * We should really pull this value out of tegra_ehci_soc_config, but |
| 520 | * to avoid needing access to it, make use of the fact that Tegra20 is |
| 521 | * the only one so far that needs a value of 10, and Tegra20 is the |
| 522 | * only one which doesn't set has_hostpc. |
| 523 | */ |
| 524 | txfifothresh = ehci->has_hostpc ? 0x10 : 10; |
| 525 | ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning); |
| 526 | |
| 527 | return 0; |
| 528 | } |
| 529 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 530 | static const struct ehci_driver_overrides tegra_overrides __initconst = { |
| 531 | .extra_priv_size = sizeof(struct tegra_ehci_hcd), |
Stephen Warren | 4f2fe2d | 2014-04-14 15:21:23 -0600 | [diff] [blame] | 532 | .reset = tegra_ehci_reset, |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 533 | }; |
| 534 | |
| 535 | static int __init ehci_tegra_init(void) |
| 536 | { |
| 537 | if (usb_disabled()) |
| 538 | return -ENODEV; |
| 539 | |
| 540 | pr_info(DRV_NAME ": " DRIVER_DESC "\n"); |
| 541 | |
| 542 | ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides); |
| 543 | |
| 544 | /* |
| 545 | * The Tegra HW has some unusual quirks, which require Tegra-specific |
| 546 | * workarounds. We override certain hc_driver functions here to |
| 547 | * achieve that. We explicitly do not enhance ehci_driver_overrides to |
| 548 | * allow this more easily, since this is an unusual case, and we don't |
| 549 | * want to encourage others to override these functions by making it |
| 550 | * too easy. |
| 551 | */ |
| 552 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 553 | tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma; |
| 554 | tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma; |
| 555 | tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control; |
| 556 | |
| 557 | return platform_driver_register(&tegra_ehci_driver); |
| 558 | } |
| 559 | module_init(ehci_tegra_init); |
| 560 | |
| 561 | static void __exit ehci_tegra_cleanup(void) |
| 562 | { |
| 563 | platform_driver_unregister(&tegra_ehci_driver); |
| 564 | } |
| 565 | module_exit(ehci_tegra_cleanup); |
| 566 | |
| 567 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 568 | MODULE_LICENSE("GPL"); |
| 569 | MODULE_ALIAS("platform:" DRV_NAME); |
| 570 | MODULE_DEVICE_TABLE(of, tegra_ehci_of_match); |