Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * gpmc-nand.c |
| 3 | * |
| 4 | * Copyright (C) 2009 Texas Instruments |
| 5 | * Vimal Singh <vimalsingh@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/io.h> |
Sukumar Ghorai | d5ce2b6 | 2011-01-28 15:42:03 +0530 | [diff] [blame] | 15 | #include <linux/mtd/nand.h> |
Arnd Bergmann | 2203747 | 2012-08-24 15:21:06 +0200 | [diff] [blame] | 16 | #include <linux/platform_data/mtd-nand-omap2.h> |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 17 | |
| 18 | #include <asm/mach/flash.h> |
| 19 | |
Afzal Mohammed | 3ef5d00 | 2012-10-05 10:37:27 +0530 | [diff] [blame] | 20 | #include "gpmc.h" |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 21 | #include "soc.h" |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 22 | #include "gpmc-nand.h" |
| 23 | |
| 24 | /* minimum size for IO mapping */ |
| 25 | #define NAND_IO_SIZE 4 |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 26 | |
Afzal Mohammed | 2ee30f0 | 2012-08-30 12:53:24 -0700 | [diff] [blame] | 27 | static struct resource gpmc_nand_resource[] = { |
| 28 | { |
| 29 | .flags = IORESOURCE_MEM, |
| 30 | }, |
| 31 | { |
| 32 | .flags = IORESOURCE_IRQ, |
| 33 | }, |
| 34 | { |
| 35 | .flags = IORESOURCE_IRQ, |
| 36 | }, |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | static struct platform_device gpmc_nand_device = { |
| 40 | .name = "omap2-nand", |
| 41 | .id = 0, |
Afzal Mohammed | 2ee30f0 | 2012-08-30 12:53:24 -0700 | [diff] [blame] | 42 | .num_resources = ARRAY_SIZE(gpmc_nand_resource), |
| 43 | .resource = gpmc_nand_resource, |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 44 | }; |
| 45 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 46 | static int omap2_nand_gpmc_retime( |
| 47 | struct omap_nand_platform_data *gpmc_nand_data, |
| 48 | struct gpmc_timings *gpmc_t) |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 49 | { |
| 50 | struct gpmc_timings t; |
| 51 | int err; |
| 52 | |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 53 | memset(&t, 0, sizeof(t)); |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 54 | t.sync_clk = gpmc_t->sync_clk; |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 55 | t.cs_on = gpmc_t->cs_on; |
| 56 | t.adv_on = gpmc_t->adv_on; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 57 | |
| 58 | /* Read */ |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 59 | t.adv_rd_off = gpmc_t->adv_rd_off; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 60 | t.oe_on = t.adv_on; |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 61 | t.access = gpmc_t->access; |
| 62 | t.oe_off = gpmc_t->oe_off; |
| 63 | t.cs_rd_off = gpmc_t->cs_rd_off; |
| 64 | t.rd_cycle = gpmc_t->rd_cycle; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 65 | |
| 66 | /* Write */ |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 67 | t.adv_wr_off = gpmc_t->adv_wr_off; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 68 | t.we_on = t.oe_on; |
| 69 | if (cpu_is_omap34xx()) { |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 70 | t.wr_data_mux_bus = gpmc_t->wr_data_mux_bus; |
| 71 | t.wr_access = gpmc_t->wr_access; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 72 | } |
Afzal Mohammed | a1bfdc6 | 2012-09-18 14:43:37 +0530 | [diff] [blame] | 73 | t.we_off = gpmc_t->we_off; |
| 74 | t.cs_wr_off = gpmc_t->cs_wr_off; |
| 75 | t.wr_cycle = gpmc_t->wr_cycle; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 76 | |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 77 | err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); |
| 78 | if (err) |
| 79 | return err; |
| 80 | |
| 81 | return 0; |
| 82 | } |
| 83 | |
Daniel Mack | 504f3c6 | 2012-12-14 11:36:42 +0100 | [diff] [blame] | 84 | static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) |
Afzal Mohammed | 3852ccd | 2012-10-01 02:47:28 +0530 | [diff] [blame] | 85 | { |
| 86 | /* support only OMAP3 class */ |
Daniel Mack | f50a038 | 2012-12-14 11:36:43 +0100 | [diff] [blame] | 87 | if (!cpu_is_omap34xx() && !soc_is_am33xx()) { |
Afzal Mohammed | 3852ccd | 2012-10-01 02:47:28 +0530 | [diff] [blame] | 88 | pr_err("BCH ecc is not supported on this CPU\n"); |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | /* |
Daniel Mack | f50a038 | 2012-12-14 11:36:43 +0100 | [diff] [blame] | 93 | * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1 |
| 94 | * and AM33xx derivates. Other chips may be added if confirmed to work. |
Afzal Mohammed | 3852ccd | 2012-10-01 02:47:28 +0530 | [diff] [blame] | 95 | */ |
| 96 | if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) && |
Daniel Mack | f50a038 | 2012-12-14 11:36:43 +0100 | [diff] [blame] | 97 | (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) && |
| 98 | (!soc_is_am33xx())) { |
Afzal Mohammed | 3852ccd | 2012-10-01 02:47:28 +0530 | [diff] [blame] | 99 | pr_err("BCH 4-bit mode is not supported on this CPU\n"); |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | return 1; |
| 104 | } |
| 105 | |
Daniel Mack | 504f3c6 | 2012-12-14 11:36:42 +0100 | [diff] [blame] | 106 | int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, |
| 107 | struct gpmc_timings *gpmc_t) |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 108 | { |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 109 | int err = 0; |
Jon Hunter | 24db7ec | 2013-02-21 15:43:08 -0600 | [diff] [blame] | 110 | struct gpmc_settings s; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 111 | struct device *dev = &gpmc_nand_device.dev; |
| 112 | |
Jon Hunter | 24db7ec | 2013-02-21 15:43:08 -0600 | [diff] [blame] | 113 | memset(&s, 0, sizeof(struct gpmc_settings)); |
| 114 | |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 115 | gpmc_nand_device.dev.platform_data = gpmc_nand_data; |
| 116 | |
| 117 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, |
Afzal Mohammed | 2ee30f0 | 2012-08-30 12:53:24 -0700 | [diff] [blame] | 118 | (unsigned long *)&gpmc_nand_resource[0].start); |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 119 | if (err < 0) { |
Ezequiel Garcia | 097c9da | 2013-02-12 16:22:20 -0300 | [diff] [blame] | 120 | dev_err(dev, "Cannot request GPMC CS %d, error %d\n", |
| 121 | gpmc_nand_data->cs, err); |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 122 | return err; |
| 123 | } |
| 124 | |
Afzal Mohammed | 2ee30f0 | 2012-08-30 12:53:24 -0700 | [diff] [blame] | 125 | gpmc_nand_resource[0].end = gpmc_nand_resource[0].start + |
| 126 | NAND_IO_SIZE - 1; |
Afzal Mohammed | 9222e3a | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 127 | |
Afzal Mohammed | 2ee30f0 | 2012-08-30 12:53:24 -0700 | [diff] [blame] | 128 | gpmc_nand_resource[1].start = |
| 129 | gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); |
| 130 | gpmc_nand_resource[2].start = |
| 131 | gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 132 | |
| 133 | if (gpmc_t) { |
| 134 | err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t); |
| 135 | if (err < 0) { |
| 136 | dev_err(dev, "Unable to set gpmc timings: %d\n", err); |
| 137 | return err; |
| 138 | } |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 139 | |
Jon Hunter | acc7998 | 2013-02-25 11:36:47 -0600 | [diff] [blame] | 140 | if (gpmc_nand_data->of_node) { |
| 141 | gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); |
| 142 | } else { |
| 143 | s.device_nand = true; |
Jon Hunter | 24db7ec | 2013-02-21 15:43:08 -0600 | [diff] [blame] | 144 | |
Jon Hunter | acc7998 | 2013-02-25 11:36:47 -0600 | [diff] [blame] | 145 | /* Enable RD PIN Monitoring Reg */ |
| 146 | if (gpmc_nand_data->dev_ready) { |
| 147 | s.wait_on_read = true; |
| 148 | s.wait_on_write = true; |
| 149 | } |
Jon Hunter | 24db7ec | 2013-02-21 15:43:08 -0600 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) |
| 153 | s.device_width = GPMC_DEVWIDTH_16BIT; |
| 154 | else |
| 155 | s.device_width = GPMC_DEVWIDTH_8BIT; |
| 156 | |
| 157 | err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); |
| 158 | if (err < 0) |
| 159 | goto out_free_cs; |
| 160 | |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 161 | err = gpmc_configure(GPMC_CONFIG_WP, 0); |
Jon Hunter | 24db7ec | 2013-02-21 15:43:08 -0600 | [diff] [blame] | 162 | if (err < 0) |
| 163 | goto out_free_cs; |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 164 | } |
| 165 | |
Afzal Mohammed | d126d01 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 166 | gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); |
| 167 | |
Afzal Mohammed | 3852ccd | 2012-10-01 02:47:28 +0530 | [diff] [blame] | 168 | if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) |
| 169 | return -EINVAL; |
| 170 | |
Vimal Singh | 2f70a1e | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 171 | err = platform_device_register(&gpmc_nand_device); |
| 172 | if (err < 0) { |
| 173 | dev_err(dev, "Unable to register NAND device\n"); |
| 174 | goto out_free_cs; |
| 175 | } |
| 176 | |
| 177 | return 0; |
| 178 | |
| 179 | out_free_cs: |
| 180 | gpmc_cs_free(gpmc_nand_data->cs); |
| 181 | |
| 182 | return err; |
| 183 | } |