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Ingo Molnar9f4c8152008-01-30 13:33:41 +01001/*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Thanks to Ben LaHaise for precious feedback.
Ingo Molnar9f4c8152008-01-30 13:33:41 +01004 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/highmem.h>
Ingo Molnar81922062008-01-30 13:34:04 +01006#include <linux/bootmem.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01007#include <linux/sched.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01008#include <linux/mm.h>
Thomas Gleixner76ebd052008-02-09 23:24:09 +01009#include <linux/interrupt.h>
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +020010#include <linux/seq_file.h>
11#include <linux/debugfs.h>
Tejun Heoe59a1bb2009-06-22 11:56:24 +090012#include <linux/pfn.h>
Tejun Heo8c4bfc62009-07-04 08:10:59 +090013#include <linux/percpu.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090014#include <linux/gfp.h>
Matthieu Castet5bd5a452010-11-16 22:31:26 +010015#include <linux/pci.h>
Stephen Rothwelld6472302015-06-02 19:01:38 +100016#include <linux/vmalloc.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010017
Thomas Gleixner950f9d92008-01-30 13:34:06 +010018#include <asm/e820.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/processor.h>
20#include <asm/tlbflush.h>
Dave Jonesf8af0952006-01-06 00:12:10 -080021#include <asm/sections.h>
Jeremy Fitzhardinge93dbda72009-02-26 17:35:44 -080022#include <asm/setup.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010023#include <asm/uaccess.h>
24#include <asm/pgalloc.h>
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010025#include <asm/proto.h>
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -070026#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Ingo Molnar9df84992008-02-04 16:48:09 +010028/*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
Thomas Gleixner72e458d2008-02-04 16:48:07 +010031struct cpa_data {
Shaohua Lid75586a2008-08-21 10:46:06 +080032 unsigned long *vaddr;
Borislav Petkov0fd64c22013-10-31 17:25:00 +010033 pgd_t *pgd;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010034 pgprot_t mask_set;
35 pgprot_t mask_clr;
Matt Fleming74256372016-01-29 11:36:10 +000036 unsigned long numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +080037 int flags;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010038 unsigned long pfn;
Andi Kleenc9caa022008-03-12 03:53:29 +010039 unsigned force_split : 1;
Shaohua Lid75586a2008-08-21 10:46:06 +080040 int curpage;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070041 struct page **pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010042};
43
Suresh Siddhaad5ca552008-09-23 14:00:42 -070044/*
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
49 */
50static DEFINE_SPINLOCK(cpa_lock);
51
Shaohua Lid75586a2008-08-21 10:46:06 +080052#define CPA_FLUSHTLB 1
53#define CPA_ARRAY 2
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070054#define CPA_PAGES_ARRAY 4
Shaohua Lid75586a2008-08-21 10:46:06 +080055
Thomas Gleixner65280e62008-05-05 16:35:21 +020056#ifdef CONFIG_PROC_FS
Andi Kleence0c0e52008-05-02 11:46:49 +020057static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
Thomas Gleixner65280e62008-05-05 16:35:21 +020059void update_page_count(int level, unsigned long pages)
Andi Kleence0c0e52008-05-02 11:46:49 +020060{
Andi Kleence0c0e52008-05-02 11:46:49 +020061 /* Protect against CPA */
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080062 spin_lock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020063 direct_pages_count[level] += pages;
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080064 spin_unlock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020065}
66
Thomas Gleixner65280e62008-05-05 16:35:21 +020067static void split_page_count(int level)
68{
Dave Jonesc9e0d392016-01-11 12:04:28 -050069 if (direct_pages_count[level] == 0)
70 return;
71
Thomas Gleixner65280e62008-05-05 16:35:21 +020072 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
74}
75
Alexey Dobriyane1759c22008-10-15 23:50:22 +040076void arch_report_meminfo(struct seq_file *m)
Thomas Gleixner65280e62008-05-05 16:35:21 +020077{
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000078 seq_printf(m, "DirectMap4k: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010079 direct_pages_count[PG_LEVEL_4K] << 2);
80#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000081 seq_printf(m, "DirectMap2M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010082 direct_pages_count[PG_LEVEL_2M] << 11);
83#else
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000084 seq_printf(m, "DirectMap4M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010085 direct_pages_count[PG_LEVEL_2M] << 12);
86#endif
Hugh Dickinsa06de632008-08-15 13:58:32 +010087 if (direct_gbpages)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000088 seq_printf(m, "DirectMap1G: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010089 direct_pages_count[PG_LEVEL_1G] << 20);
Thomas Gleixner65280e62008-05-05 16:35:21 +020090}
91#else
92static inline void split_page_count(int level) { }
93#endif
94
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010095#ifdef CONFIG_X86_64
96
97static inline unsigned long highmap_start_pfn(void)
98{
Alexander Duyckfc8d7822012-11-16 13:57:13 -080099 return __pa_symbol(_text) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100100}
101
102static inline unsigned long highmap_end_pfn(void)
103{
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800104 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100105}
106
107#endif
108
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100109#ifdef CONFIG_DEBUG_PAGEALLOC
110# define debug_pagealloc 1
111#else
112# define debug_pagealloc 0
113#endif
114
Arjan van de Vened724be2008-01-30 13:34:04 +0100115static inline int
116within(unsigned long addr, unsigned long start, unsigned long end)
Ingo Molnar687c4822008-01-30 13:34:04 +0100117{
Arjan van de Vened724be2008-01-30 13:34:04 +0100118 return addr >= start && addr < end;
119}
120
121/*
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100122 * Flushing functions
123 */
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100124
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100125/**
126 * clflush_cache_range - flush a cache range with clflush
Wanpeng Li9efc31b2012-06-10 10:50:52 +0800127 * @vaddr: virtual start address
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100128 * @size: number of bytes to flush
129 *
Ross Zwisler8b80fd82014-02-26 12:06:50 -0700130 * clflushopt is an unordered instruction which needs fencing with mfence or
131 * sfence to avoid ordering issues.
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100132 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100133void clflush_cache_range(void *vaddr, unsigned int size)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100134{
Chris Wilson1f1a89a2016-01-08 09:55:33 +0000135 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
136 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
Ross Zwisler6c434d62015-05-11 10:15:49 +0200137 void *vend = vaddr + size;
Chris Wilson1f1a89a2016-01-08 09:55:33 +0000138
139 if (p >= vend)
140 return;
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100141
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100142 mb();
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100143
Chris Wilson1f1a89a2016-01-08 09:55:33 +0000144 for (; p < vend; p += clflush_size)
Ross Zwisler6c434d62015-05-11 10:15:49 +0200145 clflushopt(p);
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100146
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100147 mb();
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100148}
Eric Anholte517a5e2009-09-10 17:48:48 -0700149EXPORT_SYMBOL_GPL(clflush_cache_range);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100150
Thomas Gleixneraf1e6842008-01-30 13:34:08 +0100151static void __cpa_flush_all(void *arg)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100152{
Andi Kleen6bb83832008-02-04 16:48:06 +0100153 unsigned long cache = (unsigned long)arg;
154
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100155 /*
156 * Flush all to work around Errata in early athlons regarding
157 * large page flushing.
158 */
159 __flush_tlb_all();
160
venkatesh.pallipadi@intel.com0b827532009-05-22 13:23:37 -0700161 if (cache && boot_cpu_data.x86 >= 4)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100162 wbinvd();
163}
164
Andi Kleen6bb83832008-02-04 16:48:06 +0100165static void cpa_flush_all(unsigned long cache)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100166{
167 BUG_ON(irqs_disabled());
168
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200169 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100170}
171
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100172static void __cpa_flush_range(void *arg)
173{
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100174 /*
175 * We could optimize that further and do individual per page
176 * tlb invalidates for a low number of pages. Caveat: we must
177 * flush the high aliases on 64bit as well.
178 */
179 __flush_tlb_all();
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100180}
181
Andi Kleen6bb83832008-02-04 16:48:06 +0100182static void cpa_flush_range(unsigned long start, int numpages, int cache)
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100183{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100184 unsigned int i, level;
185 unsigned long addr;
186
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100187 BUG_ON(irqs_disabled());
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100188 WARN_ON(PAGE_ALIGN(start) != start);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100189
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200190 on_each_cpu(__cpa_flush_range, NULL, 1);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100191
Andi Kleen6bb83832008-02-04 16:48:06 +0100192 if (!cache)
193 return;
194
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100195 /*
196 * We only need to flush on one CPU,
197 * clflush is a MESI-coherent instruction that
198 * will cause all other CPUs to flush the same
199 * cachelines:
200 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100201 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
202 pte_t *pte = lookup_address(addr, &level);
203
204 /*
205 * Only flush present addresses:
206 */
Thomas Gleixner7bfb72e2008-02-04 16:48:08 +0100207 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100208 clflush_cache_range((void *) addr, PAGE_SIZE);
209 }
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100210}
211
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700212static void cpa_flush_array(unsigned long *start, int numpages, int cache,
213 int in_flags, struct page **pages)
Shaohua Lid75586a2008-08-21 10:46:06 +0800214{
215 unsigned int i, level;
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700216 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
Shaohua Lid75586a2008-08-21 10:46:06 +0800217
218 BUG_ON(irqs_disabled());
219
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700220 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
Shaohua Lid75586a2008-08-21 10:46:06 +0800221
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700222 if (!cache || do_wbinvd)
Shaohua Lid75586a2008-08-21 10:46:06 +0800223 return;
224
Shaohua Lid75586a2008-08-21 10:46:06 +0800225 /*
226 * We only need to flush on one CPU,
227 * clflush is a MESI-coherent instruction that
228 * will cause all other CPUs to flush the same
229 * cachelines:
230 */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700231 for (i = 0; i < numpages; i++) {
232 unsigned long addr;
233 pte_t *pte;
234
235 if (in_flags & CPA_PAGES_ARRAY)
236 addr = (unsigned long)page_address(pages[i]);
237 else
238 addr = start[i];
239
240 pte = lookup_address(addr, &level);
Shaohua Lid75586a2008-08-21 10:46:06 +0800241
242 /*
243 * Only flush present addresses:
244 */
245 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700246 clflush_cache_range((void *)addr, PAGE_SIZE);
Shaohua Lid75586a2008-08-21 10:46:06 +0800247 }
248}
249
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100250/*
Arjan van de Vened724be2008-01-30 13:34:04 +0100251 * Certain areas of memory on x86 require very specific protection flags,
252 * for example the BIOS area or kernel text. Callers don't always get this
253 * right (again, ioremap() on BIOS memory is not uncommon) so this function
254 * checks and fixes these known static required protection bits.
255 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100256static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 unsigned long pfn)
Arjan van de Vened724be2008-01-30 13:34:04 +0100258{
259 pgprot_t forbidden = __pgprot(0);
260
Ingo Molnar687c4822008-01-30 13:34:04 +0100261 /*
Arjan van de Vened724be2008-01-30 13:34:04 +0100262 * The BIOS area between 640k and 1Mb needs to be executable for
263 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
Ingo Molnar687c4822008-01-30 13:34:04 +0100264 */
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100265#ifdef CONFIG_PCI_BIOS
266 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
Arjan van de Vened724be2008-01-30 13:34:04 +0100267 pgprot_val(forbidden) |= _PAGE_NX;
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100268#endif
Arjan van de Vened724be2008-01-30 13:34:04 +0100269
270 /*
271 * The kernel text needs to be executable for obvious reasons
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100272 * Does not cover __inittext since that is gone later on. On
273 * 64bit we do not enforce !NX on the low mapping
Arjan van de Vened724be2008-01-30 13:34:04 +0100274 */
275 if (within(address, (unsigned long)_text, (unsigned long)_etext))
276 pgprot_val(forbidden) |= _PAGE_NX;
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100277
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100278 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100279 * The .rodata section needs to be read-only. Using the pfn
280 * catches all aliases.
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100281 */
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800282 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
283 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100284 pgprot_val(forbidden) |= _PAGE_RW;
Arjan van de Vened724be2008-01-30 13:34:04 +0100285
Suresh Siddha55ca3cc2009-10-28 18:46:57 -0800286#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
Suresh Siddha74e08172009-10-14 14:46:56 -0700287 /*
Suresh Siddha502f6602009-10-28 18:46:56 -0800288 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
289 * kernel text mappings for the large page aligned text, rodata sections
290 * will be always read-only. For the kernel identity mappings covering
291 * the holes caused by this alignment can be anything that user asks.
Suresh Siddha74e08172009-10-14 14:46:56 -0700292 *
293 * This will preserve the large page mappings for kernel text/data
294 * at no extra cost.
295 */
Suresh Siddha502f6602009-10-28 18:46:56 -0800296 if (kernel_set_to_readonly &&
297 within(address, (unsigned long)_text,
Suresh Siddha281ff332010-02-18 11:51:40 -0800298 (unsigned long)__end_rodata_hpage_align)) {
299 unsigned int level;
300
301 /*
302 * Don't enforce the !RW mapping for the kernel text mapping,
303 * if the current mapping is already using small page mapping.
304 * No need to work hard to preserve large page mappings in this
305 * case.
306 *
307 * This also fixes the Linux Xen paravirt guest boot failure
308 * (because of unexpected read-only mappings for kernel identity
309 * mappings). In this paravirt guest case, the kernel text
310 * mapping and the kernel identity mapping share the same
311 * page-table pages. Thus we can't really use different
312 * protections for the kernel text and identity mappings. Also,
313 * these shared mappings are made of small page mappings.
314 * Thus this don't enforce !RW mapping for small page kernel
315 * text mapping logic will help Linux Xen parvirt guest boot
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300316 * as well.
Suresh Siddha281ff332010-02-18 11:51:40 -0800317 */
318 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
319 pgprot_val(forbidden) |= _PAGE_RW;
320 }
Suresh Siddha74e08172009-10-14 14:46:56 -0700321#endif
322
Arjan van de Vened724be2008-01-30 13:34:04 +0100323 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
Ingo Molnar687c4822008-01-30 13:34:04 +0100324
325 return prot;
326}
327
Matt Fleming426e34c2013-12-06 21:13:04 +0000328/*
329 * Lookup the page table entry for a virtual address in a specific pgd.
330 * Return a pointer to the entry and the level of the mapping.
331 */
332pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
333 unsigned int *level)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100334{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 pud_t *pud;
336 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100337
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100338 *level = PG_LEVEL_NONE;
339
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340 if (pgd_none(*pgd))
341 return NULL;
Ingo Molnar9df84992008-02-04 16:48:09 +0100342
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 pud = pud_offset(pgd, address);
344 if (pud_none(*pud))
345 return NULL;
Andi Kleenc2f71ee2008-02-04 16:48:09 +0100346
347 *level = PG_LEVEL_1G;
348 if (pud_large(*pud) || !pud_present(*pud))
349 return (pte_t *)pud;
350
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351 pmd = pmd_offset(pud, address);
352 if (pmd_none(*pmd))
353 return NULL;
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100354
355 *level = PG_LEVEL_2M;
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100356 if (pmd_large(*pmd) || !pmd_present(*pmd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 return (pte_t *)pmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100359 *level = PG_LEVEL_4K;
Ingo Molnar9df84992008-02-04 16:48:09 +0100360
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100361 return pte_offset_kernel(pmd, address);
362}
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100363
364/*
365 * Lookup the page table entry for a virtual address. Return a pointer
366 * to the entry and the level of the mapping.
367 *
368 * Note: We return pud and pmd either when the entry is marked large
369 * or when the present bit is not set. Otherwise we would return a
370 * pointer to a nonexisting mapping.
371 */
372pte_t *lookup_address(unsigned long address, unsigned int *level)
373{
Matt Fleming426e34c2013-12-06 21:13:04 +0000374 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100375}
Pekka Paalanen75bb8832008-05-12 21:20:56 +0200376EXPORT_SYMBOL_GPL(lookup_address);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100377
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100378static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
379 unsigned int *level)
380{
381 if (cpa->pgd)
Matt Fleming426e34c2013-12-06 21:13:04 +0000382 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100383 address, level);
384
385 return lookup_address(address, level);
386}
387
Ingo Molnar9df84992008-02-04 16:48:09 +0100388/*
Juergen Gross792230c2014-11-28 11:53:56 +0100389 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
390 * or NULL if not present.
391 */
392pmd_t *lookup_pmd_address(unsigned long address)
393{
394 pgd_t *pgd;
395 pud_t *pud;
396
397 pgd = pgd_offset_k(address);
398 if (pgd_none(*pgd))
399 return NULL;
400
401 pud = pud_offset(pgd, address);
402 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
403 return NULL;
404
405 return pmd_offset(pud, address);
406}
407
408/*
Dave Hansend7656532013-01-22 13:24:33 -0800409 * This is necessary because __pa() does not work on some
410 * kinds of memory, like vmalloc() or the alloc_remap()
411 * areas on 32-bit NUMA systems. The percpu areas can
412 * end up in this kind of memory, for instance.
413 *
414 * This could be optimized, but it is only intended to be
415 * used at inititalization time, and keeping it
416 * unoptimized should increase the testing coverage for
417 * the more obscure platforms.
418 */
419phys_addr_t slow_virt_to_phys(void *__virt_addr)
420{
421 unsigned long virt_addr = (unsigned long)__virt_addr;
Toshi Kani34437e62015-09-17 12:24:20 -0600422 unsigned long phys_addr, offset;
Dave Hansend7656532013-01-22 13:24:33 -0800423 enum pg_level level;
Dave Hansend7656532013-01-22 13:24:33 -0800424 pte_t *pte;
425
426 pte = lookup_address(virt_addr, &level);
427 BUG_ON(!pte);
Toshi Kani34437e62015-09-17 12:24:20 -0600428
429 switch (level) {
430 case PG_LEVEL_1G:
431 phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
432 offset = virt_addr & ~PUD_PAGE_MASK;
433 break;
434 case PG_LEVEL_2M:
435 phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
436 offset = virt_addr & ~PMD_PAGE_MASK;
437 break;
438 default:
439 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
440 offset = virt_addr & ~PAGE_MASK;
441 }
442
443 return (phys_addr_t)(phys_addr | offset);
Dave Hansend7656532013-01-22 13:24:33 -0800444}
445EXPORT_SYMBOL_GPL(slow_virt_to_phys);
446
447/*
Ingo Molnar9df84992008-02-04 16:48:09 +0100448 * Set the new pmd in all the pgds we know about:
449 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100450static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100451{
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100452 /* change init_mm */
453 set_pte_atomic(kpte, pte);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100454#ifdef CONFIG_X86_32
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100455 if (!SHARED_KERNEL_PMD) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100456 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
Jeremy Fitzhardingee3ed9102008-01-30 13:34:11 +0100458 list_for_each_entry(page, &pgd_list, lru) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100459 pgd_t *pgd;
460 pud_t *pud;
461 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100462
Ingo Molnar44af6c42008-01-30 13:34:03 +0100463 pgd = (pgd_t *)page_address(page) + pgd_index(address);
464 pud = pud_offset(pgd, address);
465 pmd = pmd_offset(pud, address);
466 set_pte_atomic((pte_t *)pmd, pte);
467 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100469#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470}
471
Ingo Molnar9df84992008-02-04 16:48:09 +0100472static int
473try_preserve_large_page(pte_t *kpte, unsigned long address,
474 struct cpa_data *cpa)
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100475{
Toshi Kani3a191092015-09-17 12:24:22 -0600476 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100477 pte_t new_pte, old_pte, *tmp;
matthieu castet64edc8e2010-11-16 22:30:27 +0100478 pgprot_t old_prot, new_prot, req_prot;
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100479 int i, do_split = 1;
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800480 enum pg_level level;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100481
Andi Kleenc9caa022008-03-12 03:53:29 +0100482 if (cpa->force_split)
483 return 1;
484
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800485 spin_lock(&pgd_lock);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100486 /*
487 * Check for races, another CPU might have split this page
488 * up already:
489 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100490 tmp = _lookup_address_cpa(cpa, address, &level);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100491 if (tmp != kpte)
492 goto out_unlock;
493
494 switch (level) {
495 case PG_LEVEL_2M:
Toshi Kani3a191092015-09-17 12:24:22 -0600496 old_prot = pmd_pgprot(*(pmd_t *)kpte);
497 old_pfn = pmd_pfn(*(pmd_t *)kpte);
498 break;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100499 case PG_LEVEL_1G:
Toshi Kani3a191092015-09-17 12:24:22 -0600500 old_prot = pud_pgprot(*(pud_t *)kpte);
501 old_pfn = pud_pfn(*(pud_t *)kpte);
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800502 break;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100503 default:
Ingo Molnarbeaff632008-02-04 16:48:09 +0100504 do_split = -EINVAL;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100505 goto out_unlock;
506 }
507
Toshi Kani3a191092015-09-17 12:24:22 -0600508 psize = page_level_size(level);
509 pmask = page_level_mask(level);
510
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100511 /*
512 * Calculate the number of pages, which fit into this large
513 * page starting at address:
514 */
515 nextpage_addr = (address + psize) & pmask;
516 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100517 if (numpages < cpa->numpages)
518 cpa->numpages = numpages;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100519
520 /*
521 * We are safe now. Check whether the new pgprot is the same:
Juergen Grossf5b28312014-11-03 14:02:02 +0100522 * Convert protection attributes to 4k-format, as cpa->mask* are set
523 * up accordingly.
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100524 */
525 old_pte = *kpte;
Toshi Kani55696b12015-09-17 12:24:24 -0600526 req_prot = pgprot_large_2_4k(old_prot);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100527
matthieu castet64edc8e2010-11-16 22:30:27 +0100528 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
529 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100530
531 /*
Juergen Grossf5b28312014-11-03 14:02:02 +0100532 * req_prot is in format of 4k pages. It must be converted to large
533 * page format: the caching mode includes the PAT bit located at
534 * different bit positions in the two formats.
535 */
536 req_prot = pgprot_4k_2_large(req_prot);
537
538 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800539 * Set the PSE and GLOBAL flags only if the PRESENT flag is
540 * set otherwise pmd_present/pmd_huge will return true even on
541 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
542 * for the ancient hardware that doesn't support it.
543 */
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200544 if (pgprot_val(req_prot) & _PAGE_PRESENT)
545 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800546 else
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200547 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800548
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200549 req_prot = canon_pgprot(req_prot);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800550
551 /*
Toshi Kani3a191092015-09-17 12:24:22 -0600552 * old_pfn points to the large page base pfn. So we need
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100553 * to add the offset of the virtual address:
554 */
Toshi Kani3a191092015-09-17 12:24:22 -0600555 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100556 cpa->pfn = pfn;
557
matthieu castet64edc8e2010-11-16 22:30:27 +0100558 new_prot = static_protections(req_prot, address, pfn);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100559
560 /*
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100561 * We need to check the full range, whether
562 * static_protection() requires a different pgprot for one of
563 * the pages in the range we try to preserve:
564 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100565 addr = address & pmask;
Toshi Kani3a191092015-09-17 12:24:22 -0600566 pfn = old_pfn;
matthieu castet64edc8e2010-11-16 22:30:27 +0100567 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
568 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100569
570 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
571 goto out_unlock;
572 }
573
574 /*
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100575 * If there are no changes, return. maxpages has been updated
576 * above:
577 */
578 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
Ingo Molnarbeaff632008-02-04 16:48:09 +0100579 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100580 goto out_unlock;
581 }
582
583 /*
584 * We need to change the attributes. Check, whether we can
585 * change the large page in one go. We request a split, when
586 * the address is not aligned and the number of pages is
587 * smaller than the number of pages in the large page. Note
588 * that we limited the number of possible pages already to
589 * the number of pages in the large page.
590 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100591 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100592 /*
593 * The address is aligned and the number of pages
594 * covers the full page.
595 */
Toshi Kani3a191092015-09-17 12:24:22 -0600596 new_pte = pfn_pte(old_pfn, new_prot);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100597 __set_pmd_pte(kpte, address, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +0800598 cpa->flags |= CPA_FLUSHTLB;
Ingo Molnarbeaff632008-02-04 16:48:09 +0100599 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100600 }
601
602out_unlock:
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800603 spin_unlock(&pgd_lock);
Ingo Molnar9df84992008-02-04 16:48:09 +0100604
Ingo Molnarbeaff632008-02-04 16:48:09 +0100605 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100606}
607
Borislav Petkov59528862013-03-21 18:16:57 +0100608static int
Borislav Petkov82f07122013-10-31 17:25:07 +0100609__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
610 struct page *base)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100611{
Borislav Petkov59528862013-03-21 18:16:57 +0100612 pte_t *pbase = (pte_t *)page_address(base);
Toshi Kanid551aaa2015-09-17 12:24:23 -0600613 unsigned long ref_pfn, pfn, pfninc = 1;
Ingo Molnar86f03982008-01-30 13:34:09 +0100614 unsigned int i, level;
Wen Congyangae9aae92013-02-22 16:33:04 -0800615 pte_t *tmp;
Ingo Molnar9df84992008-02-04 16:48:09 +0100616 pgprot_t ref_prot;
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100617
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800618 spin_lock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100619 /*
620 * Check for races, another CPU might have split this page
621 * up for us already:
622 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100623 tmp = _lookup_address_cpa(cpa, address, &level);
Wen Congyangae9aae92013-02-22 16:33:04 -0800624 if (tmp != kpte) {
625 spin_unlock(&pgd_lock);
626 return 1;
627 }
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100628
Jeremy Fitzhardinge6944a9c2008-03-17 16:37:01 -0700629 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
Juergen Grossf5b28312014-11-03 14:02:02 +0100630
Toshi Kanid551aaa2015-09-17 12:24:23 -0600631 switch (level) {
632 case PG_LEVEL_2M:
633 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
634 /* clear PSE and promote PAT bit to correct position */
Juergen Grossf5b28312014-11-03 14:02:02 +0100635 ref_prot = pgprot_large_2_4k(ref_prot);
Toshi Kanid551aaa2015-09-17 12:24:23 -0600636 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
637 break;
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100638
Toshi Kanid551aaa2015-09-17 12:24:23 -0600639 case PG_LEVEL_1G:
640 ref_prot = pud_pgprot(*(pud_t *)kpte);
641 ref_pfn = pud_pfn(*(pud_t *)kpte);
Andi Kleenf07333f2008-02-04 16:48:09 +0100642 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
Toshi Kanid551aaa2015-09-17 12:24:23 -0600643
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800644 /*
Toshi Kanid551aaa2015-09-17 12:24:23 -0600645 * Clear the PSE flags if the PRESENT flag is not set
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800646 * otherwise pmd_present/pmd_huge will return true
647 * even on a non present pmd.
648 */
Toshi Kanid551aaa2015-09-17 12:24:23 -0600649 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800650 pgprot_val(ref_prot) &= ~_PAGE_PSE;
Toshi Kanid551aaa2015-09-17 12:24:23 -0600651 break;
652
653 default:
654 spin_unlock(&pgd_lock);
655 return 1;
Andi Kleenf07333f2008-02-04 16:48:09 +0100656 }
Andi Kleenf07333f2008-02-04 16:48:09 +0100657
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100658 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800659 * Set the GLOBAL flags only if the PRESENT flag is set
660 * otherwise pmd/pte_present will return true even on a non
661 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
662 * for the ancient hardware that doesn't support it.
663 */
664 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
665 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
666 else
667 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
668
669 /*
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100670 * Get the target pfn from the original entry:
671 */
Toshi Kanid551aaa2015-09-17 12:24:23 -0600672 pfn = ref_pfn;
Andi Kleenf07333f2008-02-04 16:48:09 +0100673 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800674 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100675
Sai Praneeth2c66e24d2015-10-16 16:20:27 -0700676 if (virt_addr_valid(address)) {
677 unsigned long pfn = PFN_DOWN(__pa(address));
678
679 if (pfn_range_is_mapped(pfn, pfn + 1))
680 split_page_count(level);
681 }
Yinghai Luf361a452008-07-10 20:38:26 -0700682
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100683 /*
Ingo Molnar07a66d72009-02-20 08:04:13 +0100684 * Install the new, split up pagetable.
Huang, Ying4c881ca2008-01-30 13:34:04 +0100685 *
Ingo Molnar07a66d72009-02-20 08:04:13 +0100686 * We use the standard kernel pagetable protections for the new
687 * pagetable protections, the actual ptes set above control the
688 * primary protection behavior:
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100689 */
Ingo Molnar07a66d72009-02-20 08:04:13 +0100690 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
Ingo Molnar211b3d02009-03-10 22:31:03 +0100691
692 /*
693 * Intel Atom errata AAH41 workaround.
694 *
695 * The real fix should be in hw or in a microcode update, but
696 * we also probabilistically try to reduce the window of having
697 * a large TLB mixed with 4K TLBs while instruction fetches are
698 * going on.
699 */
700 __flush_tlb_all();
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800701 spin_unlock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100702
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100703 return 0;
704}
705
Borislav Petkov82f07122013-10-31 17:25:07 +0100706static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
707 unsigned long address)
Wen Congyangae9aae92013-02-22 16:33:04 -0800708{
Wen Congyangae9aae92013-02-22 16:33:04 -0800709 struct page *base;
710
711 if (!debug_pagealloc)
712 spin_unlock(&cpa_lock);
713 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
714 if (!debug_pagealloc)
715 spin_lock(&cpa_lock);
716 if (!base)
717 return -ENOMEM;
718
Borislav Petkov82f07122013-10-31 17:25:07 +0100719 if (__split_large_page(cpa, kpte, address, base))
Wen Congyangae9aae92013-02-22 16:33:04 -0800720 __free_page(base);
721
722 return 0;
723}
724
Borislav Petkov52a628f2013-10-31 17:25:06 +0100725static bool try_to_free_pte_page(pte_t *pte)
726{
727 int i;
728
729 for (i = 0; i < PTRS_PER_PTE; i++)
730 if (!pte_none(pte[i]))
731 return false;
732
733 free_page((unsigned long)pte);
734 return true;
735}
736
737static bool try_to_free_pmd_page(pmd_t *pmd)
738{
739 int i;
740
741 for (i = 0; i < PTRS_PER_PMD; i++)
742 if (!pmd_none(pmd[i]))
743 return false;
744
745 free_page((unsigned long)pmd);
746 return true;
747}
748
Borislav Petkov42a54772014-01-18 12:48:16 +0100749static bool try_to_free_pud_page(pud_t *pud)
750{
751 int i;
752
753 for (i = 0; i < PTRS_PER_PUD; i++)
754 if (!pud_none(pud[i]))
755 return false;
756
757 free_page((unsigned long)pud);
758 return true;
759}
760
Borislav Petkov52a628f2013-10-31 17:25:06 +0100761static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
762{
763 pte_t *pte = pte_offset_kernel(pmd, start);
764
765 while (start < end) {
766 set_pte(pte, __pte(0));
767
768 start += PAGE_SIZE;
769 pte++;
770 }
771
772 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
773 pmd_clear(pmd);
774 return true;
775 }
776 return false;
777}
778
779static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
780 unsigned long start, unsigned long end)
781{
782 if (unmap_pte_range(pmd, start, end))
783 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
784 pud_clear(pud);
785}
786
787static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
788{
789 pmd_t *pmd = pmd_offset(pud, start);
790
791 /*
792 * Not on a 2MB page boundary?
793 */
794 if (start & (PMD_SIZE - 1)) {
795 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
796 unsigned long pre_end = min_t(unsigned long, end, next_page);
797
798 __unmap_pmd_range(pud, pmd, start, pre_end);
799
800 start = pre_end;
801 pmd++;
802 }
803
804 /*
805 * Try to unmap in 2M chunks.
806 */
807 while (end - start >= PMD_SIZE) {
808 if (pmd_large(*pmd))
809 pmd_clear(pmd);
810 else
811 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
812
813 start += PMD_SIZE;
814 pmd++;
815 }
816
817 /*
818 * 4K leftovers?
819 */
820 if (start < end)
821 return __unmap_pmd_range(pud, pmd, start, end);
822
823 /*
824 * Try again to free the PMD page if haven't succeeded above.
825 */
826 if (!pud_none(*pud))
827 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
828 pud_clear(pud);
829}
Borislav Petkov0bb8aee2013-10-31 17:25:05 +0100830
831static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
832{
833 pud_t *pud = pud_offset(pgd, start);
834
835 /*
836 * Not on a GB page boundary?
837 */
838 if (start & (PUD_SIZE - 1)) {
839 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
840 unsigned long pre_end = min_t(unsigned long, end, next_page);
841
842 unmap_pmd_range(pud, start, pre_end);
843
844 start = pre_end;
845 pud++;
846 }
847
848 /*
849 * Try to unmap in 1G chunks?
850 */
851 while (end - start >= PUD_SIZE) {
852
853 if (pud_large(*pud))
854 pud_clear(pud);
855 else
856 unmap_pmd_range(pud, start, start + PUD_SIZE);
857
858 start += PUD_SIZE;
859 pud++;
860 }
861
862 /*
863 * 2M leftovers?
864 */
865 if (start < end)
866 unmap_pmd_range(pud, start, end);
867
868 /*
869 * No need to try to free the PUD page because we'll free it in
870 * populate_pgd's error path
871 */
872}
873
Borislav Petkov42a54772014-01-18 12:48:16 +0100874static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
875{
876 pgd_t *pgd_entry = root + pgd_index(addr);
877
878 unmap_pud_range(pgd_entry, addr, end);
879
880 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
881 pgd_clear(pgd_entry);
882}
883
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100884static int alloc_pte_page(pmd_t *pmd)
885{
886 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
887 if (!pte)
888 return -1;
889
890 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
891 return 0;
892}
893
Borislav Petkov4b235382013-10-31 17:25:02 +0100894static int alloc_pmd_page(pud_t *pud)
895{
896 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
897 if (!pmd)
898 return -1;
899
900 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
901 return 0;
902}
903
Borislav Petkovc6b6f362013-10-31 17:25:04 +0100904static void populate_pte(struct cpa_data *cpa,
905 unsigned long start, unsigned long end,
906 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
907{
908 pte_t *pte;
909
910 pte = pte_offset_kernel(pmd, start);
911
912 while (num_pages-- && start < end) {
913
914 /* deal with the NX bit */
915 if (!(pgprot_val(pgprot) & _PAGE_NX))
916 cpa->pfn &= ~_PAGE_NX;
917
918 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
919
920 start += PAGE_SIZE;
921 cpa->pfn += PAGE_SIZE;
922 pte++;
923 }
924}
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100925
926static int populate_pmd(struct cpa_data *cpa,
927 unsigned long start, unsigned long end,
928 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
929{
930 unsigned int cur_pages = 0;
931 pmd_t *pmd;
Juergen Grossf5b28312014-11-03 14:02:02 +0100932 pgprot_t pmd_pgprot;
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100933
934 /*
935 * Not on a 2M boundary?
936 */
937 if (start & (PMD_SIZE - 1)) {
938 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
939 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
940
941 pre_end = min_t(unsigned long, pre_end, next_page);
942 cur_pages = (pre_end - start) >> PAGE_SHIFT;
943 cur_pages = min_t(unsigned int, num_pages, cur_pages);
944
945 /*
946 * Need a PTE page?
947 */
948 pmd = pmd_offset(pud, start);
949 if (pmd_none(*pmd))
950 if (alloc_pte_page(pmd))
951 return -1;
952
953 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
954
955 start = pre_end;
956 }
957
958 /*
959 * We mapped them all?
960 */
961 if (num_pages == cur_pages)
962 return cur_pages;
963
Juergen Grossf5b28312014-11-03 14:02:02 +0100964 pmd_pgprot = pgprot_4k_2_large(pgprot);
965
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100966 while (end - start >= PMD_SIZE) {
967
968 /*
969 * We cannot use a 1G page so allocate a PMD page if needed.
970 */
971 if (pud_none(*pud))
972 if (alloc_pmd_page(pud))
973 return -1;
974
975 pmd = pmd_offset(pud, start);
976
Juergen Grossf5b28312014-11-03 14:02:02 +0100977 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
978 massage_pgprot(pmd_pgprot)));
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100979
980 start += PMD_SIZE;
981 cpa->pfn += PMD_SIZE;
982 cur_pages += PMD_SIZE >> PAGE_SHIFT;
983 }
984
985 /*
986 * Map trailing 4K pages.
987 */
988 if (start < end) {
989 pmd = pmd_offset(pud, start);
990 if (pmd_none(*pmd))
991 if (alloc_pte_page(pmd))
992 return -1;
993
994 populate_pte(cpa, start, end, num_pages - cur_pages,
995 pmd, pgprot);
996 }
997 return num_pages;
998}
Borislav Petkov4b235382013-10-31 17:25:02 +0100999
1000static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1001 pgprot_t pgprot)
1002{
1003 pud_t *pud;
1004 unsigned long end;
1005 int cur_pages = 0;
Juergen Grossf5b28312014-11-03 14:02:02 +01001006 pgprot_t pud_pgprot;
Borislav Petkov4b235382013-10-31 17:25:02 +01001007
1008 end = start + (cpa->numpages << PAGE_SHIFT);
1009
1010 /*
1011 * Not on a Gb page boundary? => map everything up to it with
1012 * smaller pages.
1013 */
1014 if (start & (PUD_SIZE - 1)) {
1015 unsigned long pre_end;
1016 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1017
1018 pre_end = min_t(unsigned long, end, next_page);
1019 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1020 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1021
1022 pud = pud_offset(pgd, start);
1023
1024 /*
1025 * Need a PMD page?
1026 */
1027 if (pud_none(*pud))
1028 if (alloc_pmd_page(pud))
1029 return -1;
1030
1031 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1032 pud, pgprot);
1033 if (cur_pages < 0)
1034 return cur_pages;
1035
1036 start = pre_end;
1037 }
1038
1039 /* We mapped them all? */
1040 if (cpa->numpages == cur_pages)
1041 return cur_pages;
1042
1043 pud = pud_offset(pgd, start);
Juergen Grossf5b28312014-11-03 14:02:02 +01001044 pud_pgprot = pgprot_4k_2_large(pgprot);
Borislav Petkov4b235382013-10-31 17:25:02 +01001045
1046 /*
1047 * Map everything starting from the Gb boundary, possibly with 1G pages
1048 */
1049 while (end - start >= PUD_SIZE) {
Juergen Grossf5b28312014-11-03 14:02:02 +01001050 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1051 massage_pgprot(pud_pgprot)));
Borislav Petkov4b235382013-10-31 17:25:02 +01001052
1053 start += PUD_SIZE;
1054 cpa->pfn += PUD_SIZE;
1055 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1056 pud++;
1057 }
1058
1059 /* Map trailing leftover */
1060 if (start < end) {
1061 int tmp;
1062
1063 pud = pud_offset(pgd, start);
1064 if (pud_none(*pud))
1065 if (alloc_pmd_page(pud))
1066 return -1;
1067
1068 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1069 pud, pgprot);
1070 if (tmp < 0)
1071 return cur_pages;
1072
1073 cur_pages += tmp;
1074 }
1075 return cur_pages;
1076}
Borislav Petkovf3f72962013-10-31 17:25:01 +01001077
1078/*
1079 * Restrictions for kernel page table do not necessarily apply when mapping in
1080 * an alternate PGD.
1081 */
1082static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1083{
1084 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
Borislav Petkovf3f72962013-10-31 17:25:01 +01001085 pud_t *pud = NULL; /* shut up gcc */
Borislav Petkov42a54772014-01-18 12:48:16 +01001086 pgd_t *pgd_entry;
Borislav Petkovf3f72962013-10-31 17:25:01 +01001087 int ret;
1088
1089 pgd_entry = cpa->pgd + pgd_index(addr);
1090
1091 /*
1092 * Allocate a PUD page and hand it down for mapping.
1093 */
1094 if (pgd_none(*pgd_entry)) {
1095 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1096 if (!pud)
1097 return -1;
1098
1099 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
Borislav Petkovf3f72962013-10-31 17:25:01 +01001100 }
1101
1102 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1103 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1104
1105 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001106 if (ret < 0) {
Borislav Petkov42a54772014-01-18 12:48:16 +01001107 unmap_pgd_range(cpa->pgd, addr,
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001108 addr + (cpa->numpages << PAGE_SHIFT));
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001109 return ret;
1110 }
Borislav Petkov42a54772014-01-18 12:48:16 +01001111
Borislav Petkovf3f72962013-10-31 17:25:01 +01001112 cpa->numpages = ret;
1113 return 0;
1114}
1115
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001116static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1117 int primary)
1118{
Borislav Petkov82f07122013-10-31 17:25:07 +01001119 if (cpa->pgd)
1120 return populate_pgd(cpa, vaddr);
1121
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001122 /*
1123 * Ignore all non primary paths.
1124 */
1125 if (!primary)
1126 return 0;
1127
1128 /*
1129 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1130 * to have holes.
1131 * Also set numpages to '1' indicating that we processed cpa req for
1132 * one virtual address page and its pfn. TBD: numpages can be set based
1133 * on the initial value and the level returned by lookup_address().
1134 */
1135 if (within(vaddr, PAGE_OFFSET,
1136 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1137 cpa->numpages = 1;
1138 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1139 return 0;
1140 } else {
1141 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1142 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1143 *cpa->vaddr);
1144
1145 return -EFAULT;
1146 }
1147}
1148
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001149static int __change_page_attr(struct cpa_data *cpa, int primary)
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001150{
Shaohua Lid75586a2008-08-21 10:46:06 +08001151 unsigned long address;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +01001152 int do_split, err;
1153 unsigned int level;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001154 pte_t *kpte, old_pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001155
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001156 if (cpa->flags & CPA_PAGES_ARRAY) {
1157 struct page *page = cpa->pages[cpa->curpage];
1158 if (unlikely(PageHighMem(page)))
1159 return 0;
1160 address = (unsigned long)page_address(page);
1161 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001162 address = cpa->vaddr[cpa->curpage];
1163 else
1164 address = *cpa->vaddr;
Ingo Molnar97f99fe2008-01-30 13:33:55 +01001165repeat:
Borislav Petkov82f07122013-10-31 17:25:07 +01001166 kpte = _lookup_address_cpa(cpa, address, &level);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 if (!kpte)
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001168 return __cpa_process_fault(cpa, address, primary);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001169
1170 old_pte = *kpte;
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001171 if (!pte_val(old_pte))
1172 return __cpa_process_fault(cpa, address, primary);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001173
Thomas Gleixner30551bb2008-01-30 13:34:04 +01001174 if (level == PG_LEVEL_4K) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001175 pte_t new_pte;
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001176 pgprot_t new_prot = pte_pgprot(old_pte);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001177 unsigned long pfn = pte_pfn(old_pte);
Thomas Gleixnera72a08a2008-01-30 13:34:07 +01001178
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001179 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1180 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Ingo Molnar86f03982008-01-30 13:34:09 +01001181
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001182 new_prot = static_protections(new_prot, address, pfn);
Ingo Molnar86f03982008-01-30 13:34:09 +01001183
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001184 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -08001185 * Set the GLOBAL flags only if the PRESENT flag is
1186 * set otherwise pte_present will return true even on
1187 * a non present pte. The canon_pgprot will clear
1188 * _PAGE_GLOBAL for the ancient hardware that doesn't
1189 * support it.
1190 */
1191 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1192 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1193 else
1194 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1195
1196 /*
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001197 * We need to keep the pfn from the existing PTE,
1198 * after all we're only going to change it's attributes
1199 * not the memory it points to
1200 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001201 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1202 cpa->pfn = pfn;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001203 /*
1204 * Do we really change anything ?
1205 */
1206 if (pte_val(old_pte) != pte_val(new_pte)) {
1207 set_pte_atomic(kpte, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +08001208 cpa->flags |= CPA_FLUSHTLB;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001209 }
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001210 cpa->numpages = 1;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001211 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 }
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001213
1214 /*
1215 * Check, whether we can keep the large page intact
1216 * and just change the pte:
1217 */
Ingo Molnarbeaff632008-02-04 16:48:09 +01001218 do_split = try_preserve_large_page(kpte, address, cpa);
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001219 /*
1220 * When the range fits into the existing large page,
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001221 * return. cp->numpages and cpa->tlbflush have been updated in
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001222 * try_large_page:
1223 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001224 if (do_split <= 0)
1225 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001226
1227 /*
1228 * We have to split the large page:
1229 */
Borislav Petkov82f07122013-10-31 17:25:07 +01001230 err = split_large_page(cpa, kpte, address);
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001231 if (!err) {
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001232 /*
1233 * Do a global flush tlb after splitting the large page
1234 * and before we do the actual change page attribute in the PTE.
1235 *
1236 * With out this, we violate the TLB application note, that says
1237 * "The TLBs may contain both ordinary and large-page
1238 * translations for a 4-KByte range of linear addresses. This
1239 * may occur if software modifies the paging structures so that
1240 * the page size used for the address range changes. If the two
1241 * translations differ with respect to page frame or attributes
1242 * (e.g., permissions), processor behavior is undefined and may
1243 * be implementation-specific."
1244 *
1245 * We do this global tlb flush inside the cpa_lock, so that we
1246 * don't allow any other cpu, with stale tlb entries change the
1247 * page attribute in parallel, that also falls into the
1248 * just split large page entry.
1249 */
1250 flush_tlb_all();
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001251 goto repeat;
1252 }
Ingo Molnarbeaff632008-02-04 16:48:09 +01001253
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001254 return err;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001255}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001257static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1258
1259static int cpa_process_alias(struct cpa_data *cpa)
Ingo Molnar44af6c42008-01-30 13:34:03 +01001260{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001261 struct cpa_data alias_cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001262 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
Tejun Heoe933a732009-08-14 15:00:53 +09001263 unsigned long vaddr;
Tejun Heo992f4c12009-06-22 11:56:24 +09001264 int ret;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001265
Yinghai Lu8eb57792012-11-16 19:38:49 -08001266 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001267 return 0;
1268
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001269 /*
1270 * No need to redo, when the primary call touched the direct
1271 * mapping already:
1272 */
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001273 if (cpa->flags & CPA_PAGES_ARRAY) {
1274 struct page *page = cpa->pages[cpa->curpage];
1275 if (unlikely(PageHighMem(page)))
1276 return 0;
1277 vaddr = (unsigned long)page_address(page);
1278 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001279 vaddr = cpa->vaddr[cpa->curpage];
1280 else
1281 vaddr = *cpa->vaddr;
1282
1283 if (!(within(vaddr, PAGE_OFFSET,
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001284 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001285
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001286 alias_cpa = *cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001287 alias_cpa.vaddr = &laddr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001288 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Shaohua Lid75586a2008-08-21 10:46:06 +08001289
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001290 ret = __change_page_attr_set_clr(&alias_cpa, 0);
Tejun Heo992f4c12009-06-22 11:56:24 +09001291 if (ret)
1292 return ret;
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001293 }
Ingo Molnar44af6c42008-01-30 13:34:03 +01001294
Arjan van de Ven488fd992008-01-30 13:34:07 +01001295#ifdef CONFIG_X86_64
Thomas Gleixner08797502008-01-30 13:34:09 +01001296 /*
Tejun Heo992f4c12009-06-22 11:56:24 +09001297 * If the primary call didn't touch the high mapping already
1298 * and the physical address is inside the kernel map, we need
Thomas Gleixner08797502008-01-30 13:34:09 +01001299 * to touch the high mapped kernel as well:
1300 */
Tejun Heo992f4c12009-06-22 11:56:24 +09001301 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1302 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1303 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1304 __START_KERNEL_map - phys_base;
1305 alias_cpa = *cpa;
1306 alias_cpa.vaddr = &temp_cpa_vaddr;
1307 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Thomas Gleixner08797502008-01-30 13:34:09 +01001308
Tejun Heo992f4c12009-06-22 11:56:24 +09001309 /*
1310 * The high mapping range is imprecise, so ignore the
1311 * return value.
1312 */
1313 __change_page_attr_set_clr(&alias_cpa, 0);
1314 }
Thomas Gleixner08797502008-01-30 13:34:09 +01001315#endif
Tejun Heo992f4c12009-06-22 11:56:24 +09001316
1317 return 0;
Ingo Molnar44af6c42008-01-30 13:34:03 +01001318}
1319
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001320static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001321{
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001322 int ret, numpages = cpa->numpages;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001323
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001324 while (numpages) {
1325 /*
1326 * Store the remaining nr of pages for the large page
1327 * preservation check.
1328 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001329 cpa->numpages = numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +08001330 /* for array changes, we can't use large page */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001331 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001332 cpa->numpages = 1;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001333
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001334 if (!debug_pagealloc)
1335 spin_lock(&cpa_lock);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001336 ret = __change_page_attr(cpa, checkalias);
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001337 if (!debug_pagealloc)
1338 spin_unlock(&cpa_lock);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001339 if (ret)
1340 return ret;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001341
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001342 if (checkalias) {
1343 ret = cpa_process_alias(cpa);
1344 if (ret)
1345 return ret;
1346 }
1347
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001348 /*
1349 * Adjust the number of pages with the result of the
1350 * CPA operation. Either a large page has been
1351 * preserved or a single page update happened.
1352 */
Matt Fleming74256372016-01-29 11:36:10 +00001353 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001354 numpages -= cpa->numpages;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001355 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001356 cpa->curpage++;
1357 else
1358 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1359
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001360 }
Thomas Gleixnerff314522008-01-30 13:34:08 +01001361 return 0;
1362}
1363
Shaohua Lid75586a2008-08-21 10:46:06 +08001364static int change_page_attr_set_clr(unsigned long *addr, int numpages,
Andi Kleenc9caa022008-03-12 03:53:29 +01001365 pgprot_t mask_set, pgprot_t mask_clr,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001366 int force_split, int in_flag,
1367 struct page **pages)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001368{
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001369 struct cpa_data cpa;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001370 int ret, cache, checkalias;
Jack Steinerfa526d02009-09-03 12:56:02 -05001371 unsigned long baddr = 0;
Thomas Gleixner331e4062008-02-04 16:48:06 +01001372
Borislav Petkov82f07122013-10-31 17:25:07 +01001373 memset(&cpa, 0, sizeof(cpa));
1374
Thomas Gleixner331e4062008-02-04 16:48:06 +01001375 /*
1376 * Check, if we are requested to change a not supported
1377 * feature:
1378 */
1379 mask_set = canon_pgprot(mask_set);
1380 mask_clr = canon_pgprot(mask_clr);
Andi Kleenc9caa022008-03-12 03:53:29 +01001381 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
Thomas Gleixner331e4062008-02-04 16:48:06 +01001382 return 0;
1383
Thomas Gleixner69b14152008-02-13 11:04:50 +01001384 /* Ensure we are PAGE_SIZE aligned */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001385 if (in_flag & CPA_ARRAY) {
Shaohua Lid75586a2008-08-21 10:46:06 +08001386 int i;
1387 for (i = 0; i < numpages; i++) {
1388 if (addr[i] & ~PAGE_MASK) {
1389 addr[i] &= PAGE_MASK;
1390 WARN_ON_ONCE(1);
1391 }
1392 }
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001393 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1394 /*
1395 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1396 * No need to cehck in that case
1397 */
1398 if (*addr & ~PAGE_MASK) {
1399 *addr &= PAGE_MASK;
1400 /*
1401 * People should not be passing in unaligned addresses:
1402 */
1403 WARN_ON_ONCE(1);
1404 }
Jack Steinerfa526d02009-09-03 12:56:02 -05001405 /*
1406 * Save address for cache flush. *addr is modified in the call
1407 * to __change_page_attr_set_clr() below.
1408 */
1409 baddr = *addr;
Thomas Gleixner69b14152008-02-13 11:04:50 +01001410 }
1411
Nick Piggin5843d9a2008-08-01 03:15:21 +02001412 /* Must avoid aliasing mappings in the highmem code */
1413 kmap_flush_unused();
1414
Nick Piggindb64fe02008-10-18 20:27:03 -07001415 vm_unmap_aliases();
1416
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001417 cpa.vaddr = addr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001418 cpa.pages = pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001419 cpa.numpages = numpages;
1420 cpa.mask_set = mask_set;
1421 cpa.mask_clr = mask_clr;
Shaohua Lid75586a2008-08-21 10:46:06 +08001422 cpa.flags = 0;
1423 cpa.curpage = 0;
Andi Kleenc9caa022008-03-12 03:53:29 +01001424 cpa.force_split = force_split;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001425
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001426 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1427 cpa.flags |= in_flag;
Shaohua Lid75586a2008-08-21 10:46:06 +08001428
Thomas Gleixneraf96e442008-02-15 21:49:46 +01001429 /* No alias checking for _NX bit modifications */
1430 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1431
1432 ret = __change_page_attr_set_clr(&cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001433
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001434 /*
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001435 * Check whether we really changed something:
1436 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001437 if (!(cpa.flags & CPA_FLUSHTLB))
Shaohua Li1ac2f7d2008-08-04 14:51:24 +08001438 goto out;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001439
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001440 /*
Andi Kleen6bb83832008-02-04 16:48:06 +01001441 * No need to flush, when we did not set any of the caching
1442 * attributes:
1443 */
Juergen Grossc06814d2014-11-03 14:01:57 +01001444 cache = !!pgprot2cachemode(mask_set);
Andi Kleen6bb83832008-02-04 16:48:06 +01001445
1446 /*
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001447 * On success we use CLFLUSH, when the CPU supports it to
1448 * avoid the WBINVD. If the CPU does not support it and in the
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001449 * error case we fall back to cpa_flush_all (which uses
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001450 * WBINVD):
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001451 */
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001452 if (!ret && cpu_has_clflush) {
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001453 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1454 cpa_flush_array(addr, numpages, cache,
1455 cpa.flags, pages);
1456 } else
Jack Steinerfa526d02009-09-03 12:56:02 -05001457 cpa_flush_range(baddr, numpages, cache);
Shaohua Lid75586a2008-08-21 10:46:06 +08001458 } else
Andi Kleen6bb83832008-02-04 16:48:06 +01001459 cpa_flush_all(cache);
Ingo Molnarcacf8902008-08-21 13:46:33 +02001460
Thomas Gleixner76ebd052008-02-09 23:24:09 +01001461out:
Thomas Gleixnerff314522008-01-30 13:34:08 +01001462 return ret;
1463}
1464
Shaohua Lid75586a2008-08-21 10:46:06 +08001465static inline int change_page_attr_set(unsigned long *addr, int numpages,
1466 pgprot_t mask, int array)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001467{
Shaohua Lid75586a2008-08-21 10:46:06 +08001468 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001469 (array ? CPA_ARRAY : 0), NULL);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001470}
1471
Shaohua Lid75586a2008-08-21 10:46:06 +08001472static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1473 pgprot_t mask, int array)
Thomas Gleixner72932c72008-01-30 13:34:08 +01001474{
Shaohua Lid75586a2008-08-21 10:46:06 +08001475 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001476 (array ? CPA_ARRAY : 0), NULL);
Thomas Gleixner72932c72008-01-30 13:34:08 +01001477}
1478
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001479static inline int cpa_set_pages_array(struct page **pages, int numpages,
1480 pgprot_t mask)
1481{
1482 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1483 CPA_PAGES_ARRAY, pages);
1484}
1485
1486static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1487 pgprot_t mask)
1488{
1489 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1490 CPA_PAGES_ARRAY, pages);
1491}
1492
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001493int _set_memory_uc(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001494{
Suresh Siddhade33c442008-04-25 17:07:22 -07001495 /*
1496 * for now UC MINUS. see comments in ioremap_nocache()
Luis R. Rodrigueze4b6be332015-05-11 10:15:53 +02001497 * If you really need strong UC use ioremap_uc(), but note
1498 * that you cannot override IO areas with set_memory_*() as
1499 * these helpers cannot work with IO memory.
Suresh Siddhade33c442008-04-25 17:07:22 -07001500 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001501 return change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001502 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1503 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001504}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001505
1506int set_memory_uc(unsigned long addr, int numpages)
1507{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001508 int ret;
1509
Suresh Siddhade33c442008-04-25 17:07:22 -07001510 /*
1511 * for now UC MINUS. see comments in ioremap_nocache()
1512 */
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001513 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001514 _PAGE_CACHE_MODE_UC_MINUS, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001515 if (ret)
1516 goto out_err;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001517
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001518 ret = _set_memory_uc(addr, numpages);
1519 if (ret)
1520 goto out_free;
1521
1522 return 0;
1523
1524out_free:
1525 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1526out_err:
1527 return ret;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001528}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001529EXPORT_SYMBOL(set_memory_uc);
1530
H Hartley Sweeten2d070ef2011-11-15 14:49:00 -08001531static int _set_memory_array(unsigned long *addr, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001532 enum page_cache_mode new_type)
Shaohua Lid75586a2008-08-21 10:46:06 +08001533{
Toshi Kani623dffb2015-06-04 18:55:20 +02001534 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001535 int i, j;
1536 int ret;
1537
Shaohua Lid75586a2008-08-21 10:46:06 +08001538 for (i = 0; i < addrinarray; i++) {
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001539 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
Pauli Nieminen4f646252010-04-01 12:45:01 +00001540 new_type, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001541 if (ret)
1542 goto out_free;
Shaohua Lid75586a2008-08-21 10:46:06 +08001543 }
1544
Toshi Kani623dffb2015-06-04 18:55:20 +02001545 /* If WC, set to UC- first and then WC */
1546 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1547 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1548
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001549 ret = change_page_attr_set(addr, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001550 cachemode2pgprot(set_type), 1);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001551
Juergen Grossc06814d2014-11-03 14:01:57 +01001552 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001553 ret = change_page_attr_set_clr(addr, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001554 cachemode2pgprot(
1555 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001556 __pgprot(_PAGE_CACHE_MASK),
1557 0, CPA_ARRAY, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001558 if (ret)
1559 goto out_free;
Rene Hermanc5e147c2008-08-22 01:02:20 +02001560
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001561 return 0;
1562
1563out_free:
1564 for (j = 0; j < i; j++)
1565 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1566
1567 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001568}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001569
1570int set_memory_array_uc(unsigned long *addr, int addrinarray)
1571{
Juergen Grossc06814d2014-11-03 14:01:57 +01001572 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001573}
Shaohua Lid75586a2008-08-21 10:46:06 +08001574EXPORT_SYMBOL(set_memory_array_uc);
1575
Pauli Nieminen4f646252010-04-01 12:45:01 +00001576int set_memory_array_wc(unsigned long *addr, int addrinarray)
1577{
Juergen Grossc06814d2014-11-03 14:01:57 +01001578 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001579}
1580EXPORT_SYMBOL(set_memory_array_wc);
1581
Toshi Kani623dffb2015-06-04 18:55:20 +02001582int set_memory_array_wt(unsigned long *addr, int addrinarray)
1583{
1584 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1585}
1586EXPORT_SYMBOL_GPL(set_memory_array_wt);
1587
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001588int _set_memory_wc(unsigned long addr, int numpages)
1589{
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001590 int ret;
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001591 unsigned long addr_copy = addr;
1592
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001593 ret = change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001594 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1595 0);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001596 if (!ret) {
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001597 ret = change_page_attr_set_clr(&addr_copy, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001598 cachemode2pgprot(
1599 _PAGE_CACHE_MODE_WC),
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001600 __pgprot(_PAGE_CACHE_MASK),
1601 0, 0, NULL);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001602 }
1603 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001604}
1605
1606int set_memory_wc(unsigned long addr, int numpages)
1607{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001608 int ret;
1609
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001610 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001611 _PAGE_CACHE_MODE_WC, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001612 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001613 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001614
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001615 ret = _set_memory_wc(addr, numpages);
1616 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001617 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001618
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001619 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001620}
1621EXPORT_SYMBOL(set_memory_wc);
1622
Toshi Kani623dffb2015-06-04 18:55:20 +02001623int _set_memory_wt(unsigned long addr, int numpages)
1624{
1625 return change_page_attr_set(&addr, numpages,
1626 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1627}
1628
1629int set_memory_wt(unsigned long addr, int numpages)
1630{
1631 int ret;
1632
1633 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1634 _PAGE_CACHE_MODE_WT, NULL);
1635 if (ret)
1636 return ret;
1637
1638 ret = _set_memory_wt(addr, numpages);
1639 if (ret)
1640 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1641
1642 return ret;
1643}
1644EXPORT_SYMBOL_GPL(set_memory_wt);
1645
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001646int _set_memory_wb(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001647{
Juergen Grossc06814d2014-11-03 14:01:57 +01001648 /* WB cache mode is hard wired to all cache attribute bits being 0 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001649 return change_page_attr_clear(&addr, numpages,
1650 __pgprot(_PAGE_CACHE_MASK), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001651}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001652
1653int set_memory_wb(unsigned long addr, int numpages)
1654{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001655 int ret;
1656
1657 ret = _set_memory_wb(addr, numpages);
1658 if (ret)
1659 return ret;
1660
venkatesh.pallipadi@intel.comc15238d2008-08-20 16:45:51 -07001661 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001662 return 0;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001663}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001664EXPORT_SYMBOL(set_memory_wb);
1665
Shaohua Lid75586a2008-08-21 10:46:06 +08001666int set_memory_array_wb(unsigned long *addr, int addrinarray)
1667{
1668 int i;
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001669 int ret;
1670
Juergen Grossc06814d2014-11-03 14:01:57 +01001671 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001672 ret = change_page_attr_clear(addr, addrinarray,
1673 __pgprot(_PAGE_CACHE_MASK), 1);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001674 if (ret)
1675 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001676
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001677 for (i = 0; i < addrinarray; i++)
1678 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
Rene Hermanc5e147c2008-08-22 01:02:20 +02001679
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001680 return 0;
Shaohua Lid75586a2008-08-21 10:46:06 +08001681}
1682EXPORT_SYMBOL(set_memory_array_wb);
1683
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001684int set_memory_x(unsigned long addr, int numpages)
1685{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001686 if (!(__supported_pte_mask & _PAGE_NX))
1687 return 0;
1688
Shaohua Lid75586a2008-08-21 10:46:06 +08001689 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001690}
1691EXPORT_SYMBOL(set_memory_x);
1692
1693int set_memory_nx(unsigned long addr, int numpages)
1694{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001695 if (!(__supported_pte_mask & _PAGE_NX))
1696 return 0;
1697
Shaohua Lid75586a2008-08-21 10:46:06 +08001698 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001699}
1700EXPORT_SYMBOL(set_memory_nx);
1701
1702int set_memory_ro(unsigned long addr, int numpages)
1703{
Shaohua Lid75586a2008-08-21 10:46:06 +08001704 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001705}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001706
1707int set_memory_rw(unsigned long addr, int numpages)
1708{
Shaohua Lid75586a2008-08-21 10:46:06 +08001709 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001710}
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001711
1712int set_memory_np(unsigned long addr, int numpages)
1713{
Shaohua Lid75586a2008-08-21 10:46:06 +08001714 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001715}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001716
Andi Kleenc9caa022008-03-12 03:53:29 +01001717int set_memory_4k(unsigned long addr, int numpages)
1718{
Shaohua Lid75586a2008-08-21 10:46:06 +08001719 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001720 __pgprot(0), 1, 0, NULL);
Andi Kleenc9caa022008-03-12 03:53:29 +01001721}
1722
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001723int set_pages_uc(struct page *page, int numpages)
1724{
1725 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001726
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001727 return set_memory_uc(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001728}
1729EXPORT_SYMBOL(set_pages_uc);
1730
Pauli Nieminen4f646252010-04-01 12:45:01 +00001731static int _set_pages_array(struct page **pages, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001732 enum page_cache_mode new_type)
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001733{
1734 unsigned long start;
1735 unsigned long end;
Toshi Kani623dffb2015-06-04 18:55:20 +02001736 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001737 int i;
1738 int free_idx;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001739 int ret;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001740
1741 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001742 if (PageHighMem(pages[i]))
1743 continue;
1744 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001745 end = start + PAGE_SIZE;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001746 if (reserve_memtype(start, end, new_type, NULL))
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001747 goto err_out;
1748 }
1749
Toshi Kani623dffb2015-06-04 18:55:20 +02001750 /* If WC, set to UC- first and then WC */
1751 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1752 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1753
Pauli Nieminen4f646252010-04-01 12:45:01 +00001754 ret = cpa_set_pages_array(pages, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001755 cachemode2pgprot(set_type));
Juergen Grossc06814d2014-11-03 14:01:57 +01001756 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001757 ret = change_page_attr_set_clr(NULL, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001758 cachemode2pgprot(
1759 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001760 __pgprot(_PAGE_CACHE_MASK),
1761 0, CPA_PAGES_ARRAY, pages);
1762 if (ret)
1763 goto err_out;
1764 return 0; /* Success */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001765err_out:
1766 free_idx = i;
1767 for (i = 0; i < free_idx; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001768 if (PageHighMem(pages[i]))
1769 continue;
1770 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001771 end = start + PAGE_SIZE;
1772 free_memtype(start, end);
1773 }
1774 return -EINVAL;
1775}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001776
1777int set_pages_array_uc(struct page **pages, int addrinarray)
1778{
Juergen Grossc06814d2014-11-03 14:01:57 +01001779 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001780}
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001781EXPORT_SYMBOL(set_pages_array_uc);
1782
Pauli Nieminen4f646252010-04-01 12:45:01 +00001783int set_pages_array_wc(struct page **pages, int addrinarray)
1784{
Juergen Grossc06814d2014-11-03 14:01:57 +01001785 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001786}
1787EXPORT_SYMBOL(set_pages_array_wc);
1788
Toshi Kani623dffb2015-06-04 18:55:20 +02001789int set_pages_array_wt(struct page **pages, int addrinarray)
1790{
1791 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1792}
1793EXPORT_SYMBOL_GPL(set_pages_array_wt);
1794
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001795int set_pages_wb(struct page *page, int numpages)
1796{
1797 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001798
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001799 return set_memory_wb(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001800}
1801EXPORT_SYMBOL(set_pages_wb);
1802
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001803int set_pages_array_wb(struct page **pages, int addrinarray)
1804{
1805 int retval;
1806 unsigned long start;
1807 unsigned long end;
1808 int i;
1809
Juergen Grossc06814d2014-11-03 14:01:57 +01001810 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001811 retval = cpa_clear_pages_array(pages, addrinarray,
1812 __pgprot(_PAGE_CACHE_MASK));
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001813 if (retval)
1814 return retval;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001815
1816 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001817 if (PageHighMem(pages[i]))
1818 continue;
1819 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001820 end = start + PAGE_SIZE;
1821 free_memtype(start, end);
1822 }
1823
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001824 return 0;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001825}
1826EXPORT_SYMBOL(set_pages_array_wb);
1827
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001828int set_pages_x(struct page *page, int numpages)
1829{
1830 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001831
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001832 return set_memory_x(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001833}
1834EXPORT_SYMBOL(set_pages_x);
1835
1836int set_pages_nx(struct page *page, int numpages)
1837{
1838 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001839
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001840 return set_memory_nx(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001841}
1842EXPORT_SYMBOL(set_pages_nx);
1843
1844int set_pages_ro(struct page *page, int numpages)
1845{
1846 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001847
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001848 return set_memory_ro(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001849}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001850
1851int set_pages_rw(struct page *page, int numpages)
1852{
1853 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001854
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001855 return set_memory_rw(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001856}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001857
Linus Torvalds1da177e2005-04-16 15:20:36 -07001858#ifdef CONFIG_DEBUG_PAGEALLOC
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001859
1860static int __set_pages_p(struct page *page, int numpages)
1861{
Shaohua Lid75586a2008-08-21 10:46:06 +08001862 unsigned long tempaddr = (unsigned long) page_address(page);
1863 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001864 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001865 .numpages = numpages,
1866 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
Shaohua Lid75586a2008-08-21 10:46:06 +08001867 .mask_clr = __pgprot(0),
1868 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001869
Suresh Siddha55121b42008-09-23 14:00:40 -07001870 /*
1871 * No alias checking needed for setting present flag. otherwise,
1872 * we may need to break large pages for 64-bit kernel text
1873 * mappings (this adds to complexity if we want to do this from
1874 * atomic context especially). Let's keep it simple!
1875 */
1876 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001877}
1878
1879static int __set_pages_np(struct page *page, int numpages)
1880{
Shaohua Lid75586a2008-08-21 10:46:06 +08001881 unsigned long tempaddr = (unsigned long) page_address(page);
1882 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001883 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001884 .numpages = numpages,
1885 .mask_set = __pgprot(0),
Shaohua Lid75586a2008-08-21 10:46:06 +08001886 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1887 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001888
Suresh Siddha55121b42008-09-23 14:00:40 -07001889 /*
1890 * No alias checking needed for setting not present flag. otherwise,
1891 * we may need to break large pages for 64-bit kernel text
1892 * mappings (this adds to complexity if we want to do this from
1893 * atomic context especially). Let's keep it simple!
1894 */
1895 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001896}
1897
Joonsoo Kim031bc572014-12-12 16:55:52 -08001898void __kernel_map_pages(struct page *page, int numpages, int enable)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001899{
1900 if (PageHighMem(page))
1901 return;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001902 if (!enable) {
Ingo Molnarf9b84042006-06-27 02:54:49 -07001903 debug_check_no_locks_freed(page_address(page),
1904 numpages * PAGE_SIZE);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001905 }
Ingo Molnarde5097c2006-01-09 15:59:21 -08001906
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001907 /*
Ingo Molnarf8d84062008-02-13 14:09:53 +01001908 * The return value is ignored as the calls cannot fail.
Suresh Siddha55121b42008-09-23 14:00:40 -07001909 * Large pages for identity mappings are not used at boot time
1910 * and hence no memory allocations during large page split.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001911 */
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001912 if (enable)
1913 __set_pages_p(page, numpages);
1914 else
1915 __set_pages_np(page, numpages);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001916
1917 /*
Ingo Molnare4b71dc2008-01-30 13:34:04 +01001918 * We should perform an IPI and flush all tlbs,
1919 * but that can deadlock->flush only current cpu:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001920 */
1921 __flush_tlb_all();
Boris Ostrovsky26564602013-04-11 13:59:52 -04001922
1923 arch_flush_lazy_mmu_mode();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001924}
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +01001925
1926#ifdef CONFIG_HIBERNATION
1927
1928bool kernel_page_present(struct page *page)
1929{
1930 unsigned int level;
1931 pte_t *pte;
1932
1933 if (PageHighMem(page))
1934 return false;
1935
1936 pte = lookup_address((unsigned long)page_address(page), &level);
1937 return (pte_val(*pte) & _PAGE_PRESENT);
1938}
1939
1940#endif /* CONFIG_HIBERNATION */
1941
1942#endif /* CONFIG_DEBUG_PAGEALLOC */
Arjan van de Vend1028a12008-01-30 13:34:07 +01001943
Borislav Petkov82f07122013-10-31 17:25:07 +01001944int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1945 unsigned numpages, unsigned long page_flags)
1946{
1947 int retval = -EINVAL;
1948
1949 struct cpa_data cpa = {
1950 .vaddr = &address,
1951 .pfn = pfn,
1952 .pgd = pgd,
1953 .numpages = numpages,
1954 .mask_set = __pgprot(0),
1955 .mask_clr = __pgprot(0),
1956 .flags = 0,
1957 };
1958
1959 if (!(__supported_pte_mask & _PAGE_NX))
1960 goto out;
1961
1962 if (!(page_flags & _PAGE_NX))
1963 cpa.mask_clr = __pgprot(_PAGE_NX);
1964
1965 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1966
1967 retval = __change_page_attr_set_clr(&cpa, 0);
1968 __flush_tlb_all();
1969
1970out:
1971 return retval;
1972}
1973
Borislav Petkov42a54772014-01-18 12:48:16 +01001974void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1975 unsigned numpages)
1976{
1977 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1978}
1979
Arjan van de Vend1028a12008-01-30 13:34:07 +01001980/*
1981 * The testcases use internal knowledge of the implementation that shouldn't
1982 * be exposed to the rest of the kernel. Include these directly here.
1983 */
1984#ifdef CONFIG_CPA_DEBUG
1985#include "pageattr-test.c"
1986#endif