Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 1 | /* |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 2 | * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 3 | * |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 5 | * Copyright (C) 2012 Texas Instruments, Inc. |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 6 | * Paul Walmsley |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * XXX handle crossbar/shared link difference for L3? |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 13 | * XXX these should be marked initdata for multi-OMAP kernels |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 14 | */ |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 15 | #include <plat/omap_hwmod.h> |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 16 | #include <mach/irqs.h> |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 17 | #include <plat/cpu.h> |
| 18 | #include <plat/dma.h> |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 19 | #include <plat/serial.h> |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 20 | #include <plat/i2c.h> |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 21 | #include <plat/gpio.h> |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 22 | #include <plat/mcspi.h> |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 23 | #include <plat/dmtimer.h> |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 24 | #include <plat/l3_2xxx.h> |
| 25 | #include <plat/l4_2xxx.h> |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 26 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 27 | #include "omap_hwmod_common_data.h" |
| 28 | |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 29 | #include "cm-regbits-24xx.h" |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 30 | #include "prm-regbits-24xx.h" |
Paul Walmsley | ff2516f | 2010-12-21 15:39:15 -0700 | [diff] [blame] | 31 | #include "wd_timer.h" |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 32 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 33 | /* |
| 34 | * OMAP2420 hardware module integration data |
| 35 | * |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 36 | * All of the data in this section should be autogeneratable from the |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 37 | * TI hardware database or other technical documentation. Data that |
| 38 | * is driver-specific or driver-kernel integration-specific belongs |
| 39 | * elsewhere. |
| 40 | */ |
| 41 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 42 | /* |
| 43 | * IP blocks |
| 44 | */ |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 45 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 46 | /* IVA2 (IVA2) */ |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 47 | static struct omap_hwmod omap2420_iva_hwmod = { |
| 48 | .name = "iva", |
| 49 | .class = &iva_hwmod_class, |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 50 | }; |
| 51 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 52 | /* I2C common */ |
| 53 | static struct omap_hwmod_class_sysconfig i2c_sysc = { |
| 54 | .rev_offs = 0x00, |
| 55 | .sysc_offs = 0x20, |
| 56 | .syss_offs = 0x10, |
Avinash.H.M | d73d65f | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 57 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 58 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 59 | }; |
| 60 | |
| 61 | static struct omap_hwmod_class i2c_class = { |
| 62 | .name = "i2c", |
| 63 | .sysc = &i2c_sysc, |
Andy Green | db791a7 | 2011-07-10 05:27:15 -0600 | [diff] [blame] | 64 | .rev = OMAP_I2C_IP_VERSION_1, |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 65 | .reset = &omap_i2c_reset, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 66 | }; |
| 67 | |
Andy Green | 4d4441a | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 68 | static struct omap_i2c_dev_attr i2c_dev_attr = { |
| 69 | .flags = OMAP_I2C_FLAG_NO_FIFO | |
| 70 | OMAP_I2C_FLAG_SIMPLE_CLOCK | |
| 71 | OMAP_I2C_FLAG_16BIT_DATA_REG | |
| 72 | OMAP_I2C_FLAG_BUS_SHIFT_2, |
| 73 | }; |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 74 | |
| 75 | /* I2C1 */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 76 | static struct omap_hwmod omap2420_i2c1_hwmod = { |
| 77 | .name = "i2c1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 78 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 79 | .sdma_reqs = omap2_i2c1_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 80 | .main_clk = "i2c1_fck", |
| 81 | .prcm = { |
| 82 | .omap2 = { |
| 83 | .module_offs = CORE_MOD, |
| 84 | .prcm_reg_id = 1, |
| 85 | .module_bit = OMAP2420_EN_I2C1_SHIFT, |
| 86 | .idlest_reg_id = 1, |
| 87 | .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT, |
| 88 | }, |
| 89 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 90 | .class = &i2c_class, |
| 91 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 92 | .flags = HWMOD_16BIT_REG, |
| 93 | }; |
| 94 | |
| 95 | /* I2C2 */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 96 | static struct omap_hwmod omap2420_i2c2_hwmod = { |
| 97 | .name = "i2c2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 98 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 99 | .sdma_reqs = omap2_i2c2_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 100 | .main_clk = "i2c2_fck", |
| 101 | .prcm = { |
| 102 | .omap2 = { |
| 103 | .module_offs = CORE_MOD, |
| 104 | .prcm_reg_id = 1, |
| 105 | .module_bit = OMAP2420_EN_I2C2_SHIFT, |
| 106 | .idlest_reg_id = 1, |
| 107 | .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT, |
| 108 | }, |
| 109 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 110 | .class = &i2c_class, |
| 111 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 112 | .flags = HWMOD_16BIT_REG, |
| 113 | }; |
| 114 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 115 | /* dma attributes */ |
| 116 | static struct omap_dma_dev_attr dma_dev_attr = { |
| 117 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | |
| 118 | IS_CSSA_32 | IS_CDSA_32, |
| 119 | .lch_count = 32, |
| 120 | }; |
| 121 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 122 | static struct omap_hwmod omap2420_dma_system_hwmod = { |
| 123 | .name = "dma", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 124 | .class = &omap2xxx_dma_hwmod_class, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 125 | .mpu_irqs = omap2_dma_system_irqs, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 126 | .main_clk = "core_l3_ck", |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 127 | .dev_attr = &dma_dev_attr, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 128 | .flags = HWMOD_NO_IDLEST, |
| 129 | }; |
| 130 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 131 | /* mailbox */ |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 132 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { |
| 133 | { .name = "dsp", .irq = 26 }, |
| 134 | { .name = "iva", .irq = 34 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 135 | { .irq = -1 } |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 136 | }; |
| 137 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 138 | static struct omap_hwmod omap2420_mailbox_hwmod = { |
| 139 | .name = "mailbox", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 140 | .class = &omap2xxx_mailbox_hwmod_class, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 141 | .mpu_irqs = omap2420_mailbox_irqs, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 142 | .main_clk = "mailboxes_ick", |
| 143 | .prcm = { |
| 144 | .omap2 = { |
| 145 | .prcm_reg_id = 1, |
| 146 | .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, |
| 147 | .module_offs = CORE_MOD, |
| 148 | .idlest_reg_id = 1, |
| 149 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, |
| 150 | }, |
| 151 | }, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 152 | }; |
| 153 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 154 | /* |
| 155 | * 'mcbsp' class |
| 156 | * multi channel buffered serial port controller |
| 157 | */ |
| 158 | |
| 159 | static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { |
| 160 | .name = "mcbsp", |
| 161 | }; |
| 162 | |
| 163 | /* mcbsp1 */ |
| 164 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { |
| 165 | { .name = "tx", .irq = 59 }, |
| 166 | { .name = "rx", .irq = 60 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 167 | { .irq = -1 } |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 168 | }; |
| 169 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 170 | static struct omap_hwmod omap2420_mcbsp1_hwmod = { |
| 171 | .name = "mcbsp1", |
| 172 | .class = &omap2420_mcbsp_hwmod_class, |
| 173 | .mpu_irqs = omap2420_mcbsp1_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 174 | .sdma_reqs = omap2_mcbsp1_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 175 | .main_clk = "mcbsp1_fck", |
| 176 | .prcm = { |
| 177 | .omap2 = { |
| 178 | .prcm_reg_id = 1, |
| 179 | .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, |
| 180 | .module_offs = CORE_MOD, |
| 181 | .idlest_reg_id = 1, |
| 182 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, |
| 183 | }, |
| 184 | }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 185 | }; |
| 186 | |
| 187 | /* mcbsp2 */ |
| 188 | static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { |
| 189 | { .name = "tx", .irq = 62 }, |
| 190 | { .name = "rx", .irq = 63 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 191 | { .irq = -1 } |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 192 | }; |
| 193 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 194 | static struct omap_hwmod omap2420_mcbsp2_hwmod = { |
| 195 | .name = "mcbsp2", |
| 196 | .class = &omap2420_mcbsp_hwmod_class, |
| 197 | .mpu_irqs = omap2420_mcbsp2_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 198 | .sdma_reqs = omap2_mcbsp2_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 199 | .main_clk = "mcbsp2_fck", |
| 200 | .prcm = { |
| 201 | .omap2 = { |
| 202 | .prcm_reg_id = 1, |
| 203 | .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, |
| 204 | .module_offs = CORE_MOD, |
| 205 | .idlest_reg_id = 1, |
| 206 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, |
| 207 | }, |
| 208 | }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 209 | }; |
| 210 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 211 | /* |
| 212 | * interfaces |
| 213 | */ |
| 214 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 215 | /* L4 CORE -> I2C1 interface */ |
| 216 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 217 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 218 | .slave = &omap2420_i2c1_hwmod, |
| 219 | .clk = "i2c1_ick", |
| 220 | .addr = omap2_i2c1_addr_space, |
| 221 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 222 | }; |
| 223 | |
| 224 | /* L4 CORE -> I2C2 interface */ |
| 225 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 226 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 227 | .slave = &omap2420_i2c2_hwmod, |
| 228 | .clk = "i2c2_ick", |
| 229 | .addr = omap2_i2c2_addr_space, |
| 230 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 231 | }; |
| 232 | |
| 233 | /* IVA <- L3 interface */ |
| 234 | static struct omap_hwmod_ocp_if omap2420_l3__iva = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 235 | .master = &omap2xxx_l3_main_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 236 | .slave = &omap2420_iva_hwmod, |
| 237 | .clk = "iva1_ifck", |
| 238 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 239 | }; |
| 240 | |
| 241 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { |
| 242 | { |
| 243 | .pa_start = 0x48028000, |
| 244 | .pa_end = 0x48028000 + SZ_1K - 1, |
| 245 | .flags = ADDR_TYPE_RT |
| 246 | }, |
| 247 | { } |
| 248 | }; |
| 249 | |
| 250 | /* l4_wkup -> timer1 */ |
| 251 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 252 | .master = &omap2xxx_l4_wkup_hwmod, |
| 253 | .slave = &omap2xxx_timer1_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 254 | .clk = "gpt1_ick", |
| 255 | .addr = omap2420_timer1_addrs, |
| 256 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 257 | }; |
| 258 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 259 | /* l4_wkup -> wd_timer2 */ |
| 260 | static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { |
| 261 | { |
| 262 | .pa_start = 0x48022000, |
| 263 | .pa_end = 0x4802207f, |
| 264 | .flags = ADDR_TYPE_RT |
| 265 | }, |
| 266 | { } |
| 267 | }; |
| 268 | |
| 269 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 270 | .master = &omap2xxx_l4_wkup_hwmod, |
| 271 | .slave = &omap2xxx_wd_timer2_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 272 | .clk = "mpu_wdt_ick", |
| 273 | .addr = omap2420_wd_timer2_addrs, |
| 274 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 275 | }; |
| 276 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 277 | /* l4_wkup -> gpio1 */ |
| 278 | static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { |
| 279 | { |
| 280 | .pa_start = 0x48018000, |
| 281 | .pa_end = 0x480181ff, |
| 282 | .flags = ADDR_TYPE_RT |
| 283 | }, |
| 284 | { } |
| 285 | }; |
| 286 | |
| 287 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 288 | .master = &omap2xxx_l4_wkup_hwmod, |
| 289 | .slave = &omap2xxx_gpio1_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 290 | .clk = "gpios_ick", |
| 291 | .addr = omap2420_gpio1_addr_space, |
| 292 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 293 | }; |
| 294 | |
| 295 | /* l4_wkup -> gpio2 */ |
| 296 | static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { |
| 297 | { |
| 298 | .pa_start = 0x4801a000, |
| 299 | .pa_end = 0x4801a1ff, |
| 300 | .flags = ADDR_TYPE_RT |
| 301 | }, |
| 302 | { } |
| 303 | }; |
| 304 | |
| 305 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 306 | .master = &omap2xxx_l4_wkup_hwmod, |
| 307 | .slave = &omap2xxx_gpio2_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 308 | .clk = "gpios_ick", |
| 309 | .addr = omap2420_gpio2_addr_space, |
| 310 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 311 | }; |
| 312 | |
| 313 | /* l4_wkup -> gpio3 */ |
| 314 | static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { |
| 315 | { |
| 316 | .pa_start = 0x4801c000, |
| 317 | .pa_end = 0x4801c1ff, |
| 318 | .flags = ADDR_TYPE_RT |
| 319 | }, |
| 320 | { } |
| 321 | }; |
| 322 | |
| 323 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 324 | .master = &omap2xxx_l4_wkup_hwmod, |
| 325 | .slave = &omap2xxx_gpio3_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 326 | .clk = "gpios_ick", |
| 327 | .addr = omap2420_gpio3_addr_space, |
| 328 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 329 | }; |
| 330 | |
| 331 | /* l4_wkup -> gpio4 */ |
| 332 | static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { |
| 333 | { |
| 334 | .pa_start = 0x4801e000, |
| 335 | .pa_end = 0x4801e1ff, |
| 336 | .flags = ADDR_TYPE_RT |
| 337 | }, |
| 338 | { } |
| 339 | }; |
| 340 | |
| 341 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 342 | .master = &omap2xxx_l4_wkup_hwmod, |
| 343 | .slave = &omap2xxx_gpio4_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 344 | .clk = "gpios_ick", |
| 345 | .addr = omap2420_gpio4_addr_space, |
| 346 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 347 | }; |
| 348 | |
| 349 | /* dma_system -> L3 */ |
| 350 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { |
| 351 | .master = &omap2420_dma_system_hwmod, |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 352 | .slave = &omap2xxx_l3_main_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 353 | .clk = "core_l3_ck", |
| 354 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 355 | }; |
| 356 | |
| 357 | /* l4_core -> dma_system */ |
| 358 | static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 359 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 360 | .slave = &omap2420_dma_system_hwmod, |
| 361 | .clk = "sdma_ick", |
| 362 | .addr = omap2_dma_system_addrs, |
| 363 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 364 | }; |
| 365 | |
| 366 | /* l4_core -> mailbox */ |
| 367 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 368 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 369 | .slave = &omap2420_mailbox_hwmod, |
| 370 | .addr = omap2_mailbox_addrs, |
| 371 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 372 | }; |
| 373 | |
| 374 | /* l4_core -> mcbsp1 */ |
| 375 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 376 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 377 | .slave = &omap2420_mcbsp1_hwmod, |
| 378 | .clk = "mcbsp1_ick", |
| 379 | .addr = omap2_mcbsp1_addrs, |
| 380 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 381 | }; |
| 382 | |
| 383 | /* l4_core -> mcbsp2 */ |
| 384 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 385 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 386 | .slave = &omap2420_mcbsp2_hwmod, |
| 387 | .clk = "mcbsp2_ick", |
| 388 | .addr = omap2xxx_mcbsp2_addrs, |
| 389 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 390 | }; |
| 391 | |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 392 | static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 393 | &omap2xxx_l3_main__l4_core, |
| 394 | &omap2xxx_mpu__l3_main, |
| 395 | &omap2xxx_dss__l3, |
| 396 | &omap2xxx_l4_core__mcspi1, |
| 397 | &omap2xxx_l4_core__mcspi2, |
| 398 | &omap2xxx_l4_core__l4_wkup, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 399 | &omap2_l4_core__uart1, |
| 400 | &omap2_l4_core__uart2, |
| 401 | &omap2_l4_core__uart3, |
| 402 | &omap2420_l4_core__i2c1, |
| 403 | &omap2420_l4_core__i2c2, |
| 404 | &omap2420_l3__iva, |
| 405 | &omap2420_l4_wkup__timer1, |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 406 | &omap2xxx_l4_core__timer2, |
| 407 | &omap2xxx_l4_core__timer3, |
| 408 | &omap2xxx_l4_core__timer4, |
| 409 | &omap2xxx_l4_core__timer5, |
| 410 | &omap2xxx_l4_core__timer6, |
| 411 | &omap2xxx_l4_core__timer7, |
| 412 | &omap2xxx_l4_core__timer8, |
| 413 | &omap2xxx_l4_core__timer9, |
| 414 | &omap2xxx_l4_core__timer10, |
| 415 | &omap2xxx_l4_core__timer11, |
| 416 | &omap2xxx_l4_core__timer12, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 417 | &omap2420_l4_wkup__wd_timer2, |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 418 | &omap2xxx_l4_core__dss, |
| 419 | &omap2xxx_l4_core__dss_dispc, |
| 420 | &omap2xxx_l4_core__dss_rfbi, |
| 421 | &omap2xxx_l4_core__dss_venc, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 422 | &omap2420_l4_wkup__gpio1, |
| 423 | &omap2420_l4_wkup__gpio2, |
| 424 | &omap2420_l4_wkup__gpio3, |
| 425 | &omap2420_l4_wkup__gpio4, |
| 426 | &omap2420_dma_system__l3, |
| 427 | &omap2420_l4_core__dma_system, |
| 428 | &omap2420_l4_core__mailbox, |
| 429 | &omap2420_l4_core__mcbsp1, |
| 430 | &omap2420_l4_core__mcbsp2, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 431 | NULL, |
| 432 | }; |
| 433 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 434 | int __init omap2420_hwmod_init(void) |
| 435 | { |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 436 | return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 437 | } |