blob: 26a9f7dadfbcefee47b599b1dc309674c2380384 [file] [log] [blame]
Magnus Damm9570ef22009-05-01 06:51:00 +00001/*
2 * SuperH Timer Support - TMU
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/io.h>
27#include <linux/clk.h>
28#include <linux/irq.h>
29#include <linux/err.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
Paul Mundt46a12f72009-05-03 17:57:17 +090032#include <linux/sh_timer.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090033#include <linux/slab.h>
Paul Gortmaker7deeab52011-07-03 13:36:22 -040034#include <linux/module.h>
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +010035#include <linux/pm_domain.h>
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020036#include <linux/pm_runtime.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000037
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010038struct sh_tmu_device;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010039
40struct sh_tmu_channel {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010041 struct sh_tmu_device *tmu;
Laurent Pinchartfe68eb82014-01-27 22:04:17 +010042 unsigned int index;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010043
Laurent Pinchartde693462014-01-27 22:04:17 +010044 void __iomem *base;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +010045 int irq;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010046
Magnus Damm9570ef22009-05-01 06:51:00 +000047 unsigned long rate;
48 unsigned long periodic;
49 struct clock_event_device ced;
50 struct clocksource cs;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020051 bool cs_enabled;
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +020052 unsigned int enable_count;
Magnus Damm9570ef22009-05-01 06:51:00 +000053};
54
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010055struct sh_tmu_device {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010056 struct platform_device *pdev;
57
58 void __iomem *mapbase;
59 struct clk *clk;
60
61 struct sh_tmu_channel channel;
62};
63
Paul Mundtc2225a52012-05-25 13:39:09 +090064static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
Magnus Damm9570ef22009-05-01 06:51:00 +000065
66#define TSTR -1 /* shared register */
67#define TCOR 0 /* channel register */
68#define TCNT 1 /* channel register */
69#define TCR 2 /* channel register */
70
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010071static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
Magnus Damm9570ef22009-05-01 06:51:00 +000072{
Magnus Damm9570ef22009-05-01 06:51:00 +000073 unsigned long offs;
74
75 if (reg_nr == TSTR)
Laurent Pinchartde693462014-01-27 22:04:17 +010076 return ioread8(ch->tmu->mapbase);
Magnus Damm9570ef22009-05-01 06:51:00 +000077
78 offs = reg_nr << 2;
79
80 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +010081 return ioread16(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +000082 else
Laurent Pinchartde693462014-01-27 22:04:17 +010083 return ioread32(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +000084}
85
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010086static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
Magnus Damm9570ef22009-05-01 06:51:00 +000087 unsigned long value)
88{
Magnus Damm9570ef22009-05-01 06:51:00 +000089 unsigned long offs;
90
91 if (reg_nr == TSTR) {
Laurent Pinchartde693462014-01-27 22:04:17 +010092 iowrite8(value, ch->tmu->mapbase);
Magnus Damm9570ef22009-05-01 06:51:00 +000093 return;
94 }
95
96 offs = reg_nr << 2;
97
98 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +010099 iowrite16(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000100 else
Laurent Pinchartde693462014-01-27 22:04:17 +0100101 iowrite32(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000102}
103
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100104static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
Magnus Damm9570ef22009-05-01 06:51:00 +0000105{
Magnus Damm9570ef22009-05-01 06:51:00 +0000106 unsigned long flags, value;
107
108 /* start stop register shared by multiple timer channels */
Paul Mundtc2225a52012-05-25 13:39:09 +0900109 raw_spin_lock_irqsave(&sh_tmu_lock, flags);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100110 value = sh_tmu_read(ch, TSTR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000111
112 if (start)
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100113 value |= 1 << ch->index;
Magnus Damm9570ef22009-05-01 06:51:00 +0000114 else
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100115 value &= ~(1 << ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000116
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100117 sh_tmu_write(ch, TSTR, value);
Paul Mundtc2225a52012-05-25 13:39:09 +0900118 raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
Magnus Damm9570ef22009-05-01 06:51:00 +0000119}
120
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100121static int __sh_tmu_enable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000122{
Magnus Damm9570ef22009-05-01 06:51:00 +0000123 int ret;
124
Paul Mundtd4905ce2011-05-31 15:23:20 +0900125 /* enable clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100126 ret = clk_enable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000127 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100128 dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n",
129 ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000130 return ret;
131 }
132
133 /* make sure channel is disabled */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100134 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000135
136 /* maximum timeout */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100137 sh_tmu_write(ch, TCOR, 0xffffffff);
138 sh_tmu_write(ch, TCNT, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000139
140 /* configure channel to parent clock / 4, irq off */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100141 ch->rate = clk_get_rate(ch->tmu->clk) / 4;
142 sh_tmu_write(ch, TCR, 0x0000);
Magnus Damm9570ef22009-05-01 06:51:00 +0000143
144 /* enable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100145 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000146
147 return 0;
148}
149
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100150static int sh_tmu_enable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200151{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100152 if (ch->enable_count++ > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200153 return 0;
154
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100155 pm_runtime_get_sync(&ch->tmu->pdev->dev);
156 dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200157
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100158 return __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200159}
160
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100161static void __sh_tmu_disable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000162{
163 /* disable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100164 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000165
Magnus Dammbe890a12009-06-17 05:04:04 +0000166 /* disable interrupts in TMU block */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100167 sh_tmu_write(ch, TCR, 0x0000);
Magnus Dammbe890a12009-06-17 05:04:04 +0000168
Paul Mundtd4905ce2011-05-31 15:23:20 +0900169 /* stop clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100170 clk_disable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000171}
172
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100173static void sh_tmu_disable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200174{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100175 if (WARN_ON(ch->enable_count == 0))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200176 return;
177
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100178 if (--ch->enable_count > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200179 return;
180
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100181 __sh_tmu_disable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200182
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100183 dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
184 pm_runtime_put(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200185}
186
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100187static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
Magnus Damm9570ef22009-05-01 06:51:00 +0000188 int periodic)
189{
190 /* stop timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100191 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000192
193 /* acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100194 sh_tmu_read(ch, TCR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000195
196 /* enable interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100197 sh_tmu_write(ch, TCR, 0x0020);
Magnus Damm9570ef22009-05-01 06:51:00 +0000198
199 /* reload delta value in case of periodic timer */
200 if (periodic)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100201 sh_tmu_write(ch, TCOR, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000202 else
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100203 sh_tmu_write(ch, TCOR, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000204
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100205 sh_tmu_write(ch, TCNT, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000206
207 /* start timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100208 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000209}
210
211static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
212{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100213 struct sh_tmu_channel *ch = dev_id;
Magnus Damm9570ef22009-05-01 06:51:00 +0000214
215 /* disable or acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100216 if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT)
217 sh_tmu_write(ch, TCR, 0x0000);
Magnus Damm9570ef22009-05-01 06:51:00 +0000218 else
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100219 sh_tmu_write(ch, TCR, 0x0020);
Magnus Damm9570ef22009-05-01 06:51:00 +0000220
221 /* notify clockevent layer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100222 ch->ced.event_handler(&ch->ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000223 return IRQ_HANDLED;
224}
225
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100226static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
Magnus Damm9570ef22009-05-01 06:51:00 +0000227{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100228 return container_of(cs, struct sh_tmu_channel, cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000229}
230
231static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
232{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100233 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000234
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100235 return sh_tmu_read(ch, TCNT) ^ 0xffffffff;
Magnus Damm9570ef22009-05-01 06:51:00 +0000236}
237
238static int sh_tmu_clocksource_enable(struct clocksource *cs)
239{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100240 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm0aeac452011-04-25 22:38:37 +0900241 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000242
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100243 if (WARN_ON(ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200244 return 0;
245
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100246 ret = sh_tmu_enable(ch);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200247 if (!ret) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100248 __clocksource_updatefreq_hz(cs, ch->rate);
249 ch->cs_enabled = true;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200250 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200251
Magnus Damm0aeac452011-04-25 22:38:37 +0900252 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000253}
254
255static void sh_tmu_clocksource_disable(struct clocksource *cs)
256{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100257 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200258
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100259 if (WARN_ON(!ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200260 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200261
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100262 sh_tmu_disable(ch);
263 ch->cs_enabled = false;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200264}
265
266static void sh_tmu_clocksource_suspend(struct clocksource *cs)
267{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100268 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200269
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100270 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200271 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200272
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100273 if (--ch->enable_count == 0) {
274 __sh_tmu_disable(ch);
275 pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200276 }
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200277}
278
279static void sh_tmu_clocksource_resume(struct clocksource *cs)
280{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100281 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200282
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100283 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200284 return;
285
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100286 if (ch->enable_count++ == 0) {
287 pm_genpd_syscore_poweron(&ch->tmu->pdev->dev);
288 __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200289 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000290}
291
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100292static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
Laurent Pinchart84876d02014-02-17 16:04:16 +0100293 const char *name, unsigned long rating)
Magnus Damm9570ef22009-05-01 06:51:00 +0000294{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100295 struct clocksource *cs = &ch->cs;
Magnus Damm9570ef22009-05-01 06:51:00 +0000296
297 cs->name = name;
298 cs->rating = rating;
299 cs->read = sh_tmu_clocksource_read;
300 cs->enable = sh_tmu_clocksource_enable;
301 cs->disable = sh_tmu_clocksource_disable;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200302 cs->suspend = sh_tmu_clocksource_suspend;
303 cs->resume = sh_tmu_clocksource_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000304 cs->mask = CLOCKSOURCE_MASK(32);
305 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
Aurelien Jarno66f49122010-05-31 21:45:48 +0000306
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100307 dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
308 ch->index);
Magnus Damm0aeac452011-04-25 22:38:37 +0900309
310 /* Register with dummy 1 Hz value, gets updated in ->enable() */
311 clocksource_register_hz(cs, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000312 return 0;
313}
314
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100315static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
Magnus Damm9570ef22009-05-01 06:51:00 +0000316{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100317 return container_of(ced, struct sh_tmu_channel, ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000318}
319
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100320static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic)
Magnus Damm9570ef22009-05-01 06:51:00 +0000321{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100322 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000323
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100324 sh_tmu_enable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000325
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100326 clockevents_config(ced, ch->rate);
Magnus Damm9570ef22009-05-01 06:51:00 +0000327
328 if (periodic) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100329 ch->periodic = (ch->rate + HZ/2) / HZ;
330 sh_tmu_set_next(ch, ch->periodic, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000331 }
332}
333
334static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
335 struct clock_event_device *ced)
336{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100337 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000338 int disabled = 0;
339
340 /* deal with old setting first */
341 switch (ced->mode) {
342 case CLOCK_EVT_MODE_PERIODIC:
343 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100344 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000345 disabled = 1;
346 break;
347 default:
348 break;
349 }
350
351 switch (mode) {
352 case CLOCK_EVT_MODE_PERIODIC:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100353 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100354 "ch%u: used for periodic clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100355 sh_tmu_clock_event_start(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000356 break;
357 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100358 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100359 "ch%u: used for oneshot clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100360 sh_tmu_clock_event_start(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000361 break;
362 case CLOCK_EVT_MODE_UNUSED:
363 if (!disabled)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100364 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000365 break;
366 case CLOCK_EVT_MODE_SHUTDOWN:
367 default:
368 break;
369 }
370}
371
372static int sh_tmu_clock_event_next(unsigned long delta,
373 struct clock_event_device *ced)
374{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100375 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000376
377 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
378
379 /* program new delta value */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100380 sh_tmu_set_next(ch, delta, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000381 return 0;
382}
383
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200384static void sh_tmu_clock_event_suspend(struct clock_event_device *ced)
385{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100386 pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200387}
388
389static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
390{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100391 pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200392}
393
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100394static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
Laurent Pinchart84876d02014-02-17 16:04:16 +0100395 const char *name, unsigned long rating)
Magnus Damm9570ef22009-05-01 06:51:00 +0000396{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100397 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000398 int ret;
399
Magnus Damm9570ef22009-05-01 06:51:00 +0000400 ced->name = name;
401 ced->features = CLOCK_EVT_FEAT_PERIODIC;
402 ced->features |= CLOCK_EVT_FEAT_ONESHOT;
403 ced->rating = rating;
404 ced->cpumask = cpumask_of(0);
405 ced->set_next_event = sh_tmu_clock_event_next;
406 ced->set_mode = sh_tmu_clock_event_mode;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200407 ced->suspend = sh_tmu_clock_event_suspend;
408 ced->resume = sh_tmu_clock_event_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000409
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100410 dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
411 ch->index);
Paul Mundt39774072012-06-11 17:10:16 +0900412
413 clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
Paul Mundtda64c2a2010-02-25 16:37:46 +0900414
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100415 ret = request_irq(ch->irq, sh_tmu_interrupt,
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100416 IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100417 dev_name(&ch->tmu->pdev->dev), ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000418 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100419 dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n",
420 ch->index, ch->irq);
Magnus Damm9570ef22009-05-01 06:51:00 +0000421 return;
422 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000423}
424
Laurent Pinchart84876d02014-02-17 16:04:16 +0100425static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
Magnus Damm9570ef22009-05-01 06:51:00 +0000426 unsigned long clockevent_rating,
427 unsigned long clocksource_rating)
428{
429 if (clockevent_rating)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100430 sh_tmu_register_clockevent(ch, name, clockevent_rating);
Magnus Damm9570ef22009-05-01 06:51:00 +0000431 else if (clocksource_rating)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100432 sh_tmu_register_clocksource(ch, name, clocksource_rating);
Magnus Damm9570ef22009-05-01 06:51:00 +0000433
434 return 0;
435}
436
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100437static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
438 struct sh_tmu_device *tmu)
439{
440 struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
441
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100442 ch->tmu = tmu;
443
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100444 /*
445 * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps channel
446 * registers blocks at base + 2 + 12 * index, while all other variants
447 * map them at base + 4 + 12 * index. We can compute the index by just
448 * dividing by 12, the 2 bytes or 4 bytes offset being hidden by the
449 * integer division.
450 */
451 ch->index = cfg->channel_offset / 12;
452
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100453 ch->irq = platform_get_irq(tmu->pdev, 0);
454 if (ch->irq < 0) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100455 dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
456 ch->index);
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100457 return ch->irq;
458 }
459
460 ch->cs_enabled = false;
461 ch->enable_count = 0;
462
Laurent Pinchart84876d02014-02-17 16:04:16 +0100463 return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100464 cfg->clockevent_rating,
465 cfg->clocksource_rating);
466}
467
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100468static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000469{
Paul Mundt46a12f72009-05-03 17:57:17 +0900470 struct sh_timer_config *cfg = pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +0000471 struct resource *res;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100472 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000473 ret = -ENXIO;
474
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100475 tmu->pdev = pdev;
Magnus Damm9570ef22009-05-01 06:51:00 +0000476
477 if (!cfg) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100478 dev_err(&tmu->pdev->dev, "missing platform data\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000479 goto err0;
480 }
481
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100482 platform_set_drvdata(pdev, tmu);
Magnus Damm9570ef22009-05-01 06:51:00 +0000483
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100484 res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000485 if (!res) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100486 dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000487 goto err0;
488 }
489
Laurent Pinchartde693462014-01-27 22:04:17 +0100490 /*
491 * Map memory, let channel.base point to our channel and mapbase to the
492 * start/stop shared register.
493 */
494 tmu->channel.base = ioremap_nocache(res->start, resource_size(res));
495 if (tmu->channel.base == NULL) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100496 dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000497 goto err0;
498 }
499
Laurent Pinchartde693462014-01-27 22:04:17 +0100500 tmu->mapbase = tmu->channel.base - cfg->channel_offset;
501
Magnus Damm9570ef22009-05-01 06:51:00 +0000502 /* get hold of clock */
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100503 tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
504 if (IS_ERR(tmu->clk)) {
505 dev_err(&tmu->pdev->dev, "cannot get clock\n");
506 ret = PTR_ERR(tmu->clk);
Magnus Damm03ff8582010-10-13 07:36:38 +0000507 goto err1;
Magnus Damm9570ef22009-05-01 06:51:00 +0000508 }
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100509
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100510 ret = clk_prepare(tmu->clk);
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100511 if (ret < 0)
512 goto err2;
513
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100514 ret = sh_tmu_channel_setup(&tmu->channel, tmu);
Laurent Pinchart394a4482013-11-08 11:07:59 +0100515 if (ret < 0)
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100516 goto err3;
Laurent Pinchart394a4482013-11-08 11:07:59 +0100517
518 return 0;
519
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100520 err3:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100521 clk_unprepare(tmu->clk);
Laurent Pinchart394a4482013-11-08 11:07:59 +0100522 err2:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100523 clk_put(tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000524 err1:
Laurent Pinchartde693462014-01-27 22:04:17 +0100525 iounmap(tmu->channel.base);
Magnus Damm9570ef22009-05-01 06:51:00 +0000526 err0:
527 return ret;
528}
529
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800530static int sh_tmu_probe(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000531{
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100532 struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200533 struct sh_timer_config *cfg = pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +0000534 int ret;
535
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200536 if (!is_early_platform_device(pdev)) {
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200537 pm_runtime_set_active(&pdev->dev);
538 pm_runtime_enable(&pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200539 }
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +0100540
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100541 if (tmu) {
Paul Mundt214a6072010-03-10 16:26:25 +0900542 dev_info(&pdev->dev, "kept as earlytimer\n");
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200543 goto out;
Magnus Damm9570ef22009-05-01 06:51:00 +0000544 }
545
Laurent Pinchart3b77a832014-01-27 22:04:17 +0100546 tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100547 if (tmu == NULL) {
Magnus Damm9570ef22009-05-01 06:51:00 +0000548 dev_err(&pdev->dev, "failed to allocate driver data\n");
549 return -ENOMEM;
550 }
551
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100552 ret = sh_tmu_setup(tmu, pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000553 if (ret) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100554 kfree(tmu);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200555 pm_runtime_idle(&pdev->dev);
556 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000557 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200558 if (is_early_platform_device(pdev))
559 return 0;
560
561 out:
562 if (cfg->clockevent_rating || cfg->clocksource_rating)
563 pm_runtime_irq_safe(&pdev->dev);
564 else
565 pm_runtime_idle(&pdev->dev);
566
567 return 0;
Magnus Damm9570ef22009-05-01 06:51:00 +0000568}
569
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800570static int sh_tmu_remove(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000571{
572 return -EBUSY; /* cannot unregister clockevent and clocksource */
573}
574
575static struct platform_driver sh_tmu_device_driver = {
576 .probe = sh_tmu_probe,
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800577 .remove = sh_tmu_remove,
Magnus Damm9570ef22009-05-01 06:51:00 +0000578 .driver = {
579 .name = "sh_tmu",
580 }
581};
582
583static int __init sh_tmu_init(void)
584{
585 return platform_driver_register(&sh_tmu_device_driver);
586}
587
588static void __exit sh_tmu_exit(void)
589{
590 platform_driver_unregister(&sh_tmu_device_driver);
591}
592
593early_platform_init("earlytimer", &sh_tmu_device_driver);
Simon Hormanb9773c32013-03-05 15:40:42 +0900594subsys_initcall(sh_tmu_init);
Magnus Damm9570ef22009-05-01 06:51:00 +0000595module_exit(sh_tmu_exit);
596
597MODULE_AUTHOR("Magnus Damm");
598MODULE_DESCRIPTION("SuperH TMU Timer Driver");
599MODULE_LICENSE("GPL v2");