Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SuperH Timer Support - TMU |
| 3 | * |
| 4 | * Copyright (C) 2009 Magnus Damm |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/io.h> |
| 27 | #include <linux/clk.h> |
| 28 | #include <linux/irq.h> |
| 29 | #include <linux/err.h> |
| 30 | #include <linux/clocksource.h> |
| 31 | #include <linux/clockchips.h> |
Paul Mundt | 46a12f7 | 2009-05-03 17:57:17 +0900 | [diff] [blame] | 32 | #include <linux/sh_timer.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Paul Gortmaker | 7deeab5 | 2011-07-03 13:36:22 -0400 | [diff] [blame] | 34 | #include <linux/module.h> |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 35 | #include <linux/pm_domain.h> |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 36 | #include <linux/pm_runtime.h> |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 37 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 38 | struct sh_tmu_device; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 39 | |
| 40 | struct sh_tmu_channel { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 41 | struct sh_tmu_device *tmu; |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 42 | unsigned int index; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 43 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 44 | void __iomem *base; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 45 | int irq; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 46 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 47 | unsigned long rate; |
| 48 | unsigned long periodic; |
| 49 | struct clock_event_device ced; |
| 50 | struct clocksource cs; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 51 | bool cs_enabled; |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 52 | unsigned int enable_count; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 53 | }; |
| 54 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 55 | struct sh_tmu_device { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 56 | struct platform_device *pdev; |
| 57 | |
| 58 | void __iomem *mapbase; |
| 59 | struct clk *clk; |
| 60 | |
| 61 | struct sh_tmu_channel channel; |
| 62 | }; |
| 63 | |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 64 | static DEFINE_RAW_SPINLOCK(sh_tmu_lock); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 65 | |
| 66 | #define TSTR -1 /* shared register */ |
| 67 | #define TCOR 0 /* channel register */ |
| 68 | #define TCNT 1 /* channel register */ |
| 69 | #define TCR 2 /* channel register */ |
| 70 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 71 | static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 72 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 73 | unsigned long offs; |
| 74 | |
| 75 | if (reg_nr == TSTR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 76 | return ioread8(ch->tmu->mapbase); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 77 | |
| 78 | offs = reg_nr << 2; |
| 79 | |
| 80 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 81 | return ioread16(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 82 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 83 | return ioread32(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 84 | } |
| 85 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 86 | static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 87 | unsigned long value) |
| 88 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 89 | unsigned long offs; |
| 90 | |
| 91 | if (reg_nr == TSTR) { |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 92 | iowrite8(value, ch->tmu->mapbase); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 93 | return; |
| 94 | } |
| 95 | |
| 96 | offs = reg_nr << 2; |
| 97 | |
| 98 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 99 | iowrite16(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 100 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 101 | iowrite32(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 102 | } |
| 103 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 104 | static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 105 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 106 | unsigned long flags, value; |
| 107 | |
| 108 | /* start stop register shared by multiple timer channels */ |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 109 | raw_spin_lock_irqsave(&sh_tmu_lock, flags); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 110 | value = sh_tmu_read(ch, TSTR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 111 | |
| 112 | if (start) |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 113 | value |= 1 << ch->index; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 114 | else |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 115 | value &= ~(1 << ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 116 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 117 | sh_tmu_write(ch, TSTR, value); |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 118 | raw_spin_unlock_irqrestore(&sh_tmu_lock, flags); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 119 | } |
| 120 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 121 | static int __sh_tmu_enable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 122 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 123 | int ret; |
| 124 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 125 | /* enable clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 126 | ret = clk_enable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 127 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 128 | dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", |
| 129 | ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 130 | return ret; |
| 131 | } |
| 132 | |
| 133 | /* make sure channel is disabled */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 134 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 135 | |
| 136 | /* maximum timeout */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 137 | sh_tmu_write(ch, TCOR, 0xffffffff); |
| 138 | sh_tmu_write(ch, TCNT, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 139 | |
| 140 | /* configure channel to parent clock / 4, irq off */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 141 | ch->rate = clk_get_rate(ch->tmu->clk) / 4; |
| 142 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 143 | |
| 144 | /* enable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 145 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 150 | static int sh_tmu_enable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 151 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 152 | if (ch->enable_count++ > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 153 | return 0; |
| 154 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 155 | pm_runtime_get_sync(&ch->tmu->pdev->dev); |
| 156 | dev_pm_syscore_device(&ch->tmu->pdev->dev, true); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 157 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 158 | return __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 159 | } |
| 160 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 161 | static void __sh_tmu_disable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 162 | { |
| 163 | /* disable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 164 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 165 | |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 166 | /* disable interrupts in TMU block */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 167 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 168 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 169 | /* stop clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 170 | clk_disable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 171 | } |
| 172 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 173 | static void sh_tmu_disable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 174 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 175 | if (WARN_ON(ch->enable_count == 0)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 176 | return; |
| 177 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 178 | if (--ch->enable_count > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 179 | return; |
| 180 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 181 | __sh_tmu_disable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 182 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 183 | dev_pm_syscore_device(&ch->tmu->pdev->dev, false); |
| 184 | pm_runtime_put(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 185 | } |
| 186 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 187 | static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 188 | int periodic) |
| 189 | { |
| 190 | /* stop timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 191 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 192 | |
| 193 | /* acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 194 | sh_tmu_read(ch, TCR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 195 | |
| 196 | /* enable interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 197 | sh_tmu_write(ch, TCR, 0x0020); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 198 | |
| 199 | /* reload delta value in case of periodic timer */ |
| 200 | if (periodic) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 201 | sh_tmu_write(ch, TCOR, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 202 | else |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 203 | sh_tmu_write(ch, TCOR, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 204 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 205 | sh_tmu_write(ch, TCNT, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 206 | |
| 207 | /* start timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 208 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 209 | } |
| 210 | |
| 211 | static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id) |
| 212 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 213 | struct sh_tmu_channel *ch = dev_id; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 214 | |
| 215 | /* disable or acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 216 | if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT) |
| 217 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 218 | else |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 219 | sh_tmu_write(ch, TCR, 0x0020); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 220 | |
| 221 | /* notify clockevent layer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 222 | ch->ced.event_handler(&ch->ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 223 | return IRQ_HANDLED; |
| 224 | } |
| 225 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 226 | static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 227 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 228 | return container_of(cs, struct sh_tmu_channel, cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 229 | } |
| 230 | |
| 231 | static cycle_t sh_tmu_clocksource_read(struct clocksource *cs) |
| 232 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 233 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 234 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 235 | return sh_tmu_read(ch, TCNT) ^ 0xffffffff; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | static int sh_tmu_clocksource_enable(struct clocksource *cs) |
| 239 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 240 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 241 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 242 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 243 | if (WARN_ON(ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 244 | return 0; |
| 245 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 246 | ret = sh_tmu_enable(ch); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 247 | if (!ret) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 248 | __clocksource_updatefreq_hz(cs, ch->rate); |
| 249 | ch->cs_enabled = true; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 250 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 251 | |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 252 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | static void sh_tmu_clocksource_disable(struct clocksource *cs) |
| 256 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 257 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 258 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 259 | if (WARN_ON(!ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 260 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 261 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 262 | sh_tmu_disable(ch); |
| 263 | ch->cs_enabled = false; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | static void sh_tmu_clocksource_suspend(struct clocksource *cs) |
| 267 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 268 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 269 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 270 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 271 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 272 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 273 | if (--ch->enable_count == 0) { |
| 274 | __sh_tmu_disable(ch); |
| 275 | pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 276 | } |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | static void sh_tmu_clocksource_resume(struct clocksource *cs) |
| 280 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 281 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 282 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 283 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 284 | return; |
| 285 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 286 | if (ch->enable_count++ == 0) { |
| 287 | pm_genpd_syscore_poweron(&ch->tmu->pdev->dev); |
| 288 | __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 289 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 290 | } |
| 291 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 292 | static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch, |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 293 | const char *name, unsigned long rating) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 294 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 295 | struct clocksource *cs = &ch->cs; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 296 | |
| 297 | cs->name = name; |
| 298 | cs->rating = rating; |
| 299 | cs->read = sh_tmu_clocksource_read; |
| 300 | cs->enable = sh_tmu_clocksource_enable; |
| 301 | cs->disable = sh_tmu_clocksource_disable; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 302 | cs->suspend = sh_tmu_clocksource_suspend; |
| 303 | cs->resume = sh_tmu_clocksource_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 304 | cs->mask = CLOCKSOURCE_MASK(32); |
| 305 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; |
Aurelien Jarno | 66f4912 | 2010-05-31 21:45:48 +0000 | [diff] [blame] | 306 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 307 | dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", |
| 308 | ch->index); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 309 | |
| 310 | /* Register with dummy 1 Hz value, gets updated in ->enable() */ |
| 311 | clocksource_register_hz(cs, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 312 | return 0; |
| 313 | } |
| 314 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 315 | static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 316 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 317 | return container_of(ced, struct sh_tmu_channel, ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 318 | } |
| 319 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 320 | static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 321 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 322 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 323 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 324 | sh_tmu_enable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 325 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 326 | clockevents_config(ced, ch->rate); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 327 | |
| 328 | if (periodic) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 329 | ch->periodic = (ch->rate + HZ/2) / HZ; |
| 330 | sh_tmu_set_next(ch, ch->periodic, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 331 | } |
| 332 | } |
| 333 | |
| 334 | static void sh_tmu_clock_event_mode(enum clock_event_mode mode, |
| 335 | struct clock_event_device *ced) |
| 336 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 337 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 338 | int disabled = 0; |
| 339 | |
| 340 | /* deal with old setting first */ |
| 341 | switch (ced->mode) { |
| 342 | case CLOCK_EVT_MODE_PERIODIC: |
| 343 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 344 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 345 | disabled = 1; |
| 346 | break; |
| 347 | default: |
| 348 | break; |
| 349 | } |
| 350 | |
| 351 | switch (mode) { |
| 352 | case CLOCK_EVT_MODE_PERIODIC: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 353 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 354 | "ch%u: used for periodic clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 355 | sh_tmu_clock_event_start(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 356 | break; |
| 357 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 358 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 359 | "ch%u: used for oneshot clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 360 | sh_tmu_clock_event_start(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 361 | break; |
| 362 | case CLOCK_EVT_MODE_UNUSED: |
| 363 | if (!disabled) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 364 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 365 | break; |
| 366 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 367 | default: |
| 368 | break; |
| 369 | } |
| 370 | } |
| 371 | |
| 372 | static int sh_tmu_clock_event_next(unsigned long delta, |
| 373 | struct clock_event_device *ced) |
| 374 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 375 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 376 | |
| 377 | BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT); |
| 378 | |
| 379 | /* program new delta value */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 380 | sh_tmu_set_next(ch, delta, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 381 | return 0; |
| 382 | } |
| 383 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 384 | static void sh_tmu_clock_event_suspend(struct clock_event_device *ced) |
| 385 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 386 | pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | static void sh_tmu_clock_event_resume(struct clock_event_device *ced) |
| 390 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 391 | pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 392 | } |
| 393 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 394 | static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 395 | const char *name, unsigned long rating) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 396 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 397 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 398 | int ret; |
| 399 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 400 | ced->name = name; |
| 401 | ced->features = CLOCK_EVT_FEAT_PERIODIC; |
| 402 | ced->features |= CLOCK_EVT_FEAT_ONESHOT; |
| 403 | ced->rating = rating; |
| 404 | ced->cpumask = cpumask_of(0); |
| 405 | ced->set_next_event = sh_tmu_clock_event_next; |
| 406 | ced->set_mode = sh_tmu_clock_event_mode; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 407 | ced->suspend = sh_tmu_clock_event_suspend; |
| 408 | ced->resume = sh_tmu_clock_event_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 409 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 410 | dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", |
| 411 | ch->index); |
Paul Mundt | 3977407 | 2012-06-11 17:10:16 +0900 | [diff] [blame] | 412 | |
| 413 | clockevents_config_and_register(ced, 1, 0x300, 0xffffffff); |
Paul Mundt | da64c2a | 2010-02-25 16:37:46 +0900 | [diff] [blame] | 414 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 415 | ret = request_irq(ch->irq, sh_tmu_interrupt, |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 416 | IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 417 | dev_name(&ch->tmu->pdev->dev), ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 418 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 419 | dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", |
| 420 | ch->index, ch->irq); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 421 | return; |
| 422 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 423 | } |
| 424 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 425 | static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 426 | unsigned long clockevent_rating, |
| 427 | unsigned long clocksource_rating) |
| 428 | { |
| 429 | if (clockevent_rating) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 430 | sh_tmu_register_clockevent(ch, name, clockevent_rating); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 431 | else if (clocksource_rating) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 432 | sh_tmu_register_clocksource(ch, name, clocksource_rating); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 433 | |
| 434 | return 0; |
| 435 | } |
| 436 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 437 | static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, |
| 438 | struct sh_tmu_device *tmu) |
| 439 | { |
| 440 | struct sh_timer_config *cfg = tmu->pdev->dev.platform_data; |
| 441 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 442 | ch->tmu = tmu; |
| 443 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 444 | /* |
| 445 | * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps channel |
| 446 | * registers blocks at base + 2 + 12 * index, while all other variants |
| 447 | * map them at base + 4 + 12 * index. We can compute the index by just |
| 448 | * dividing by 12, the 2 bytes or 4 bytes offset being hidden by the |
| 449 | * integer division. |
| 450 | */ |
| 451 | ch->index = cfg->channel_offset / 12; |
| 452 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 453 | ch->irq = platform_get_irq(tmu->pdev, 0); |
| 454 | if (ch->irq < 0) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 455 | dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n", |
| 456 | ch->index); |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 457 | return ch->irq; |
| 458 | } |
| 459 | |
| 460 | ch->cs_enabled = false; |
| 461 | ch->enable_count = 0; |
| 462 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 463 | return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 464 | cfg->clockevent_rating, |
| 465 | cfg->clocksource_rating); |
| 466 | } |
| 467 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 468 | static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 469 | { |
Paul Mundt | 46a12f7 | 2009-05-03 17:57:17 +0900 | [diff] [blame] | 470 | struct sh_timer_config *cfg = pdev->dev.platform_data; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 471 | struct resource *res; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 472 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 473 | ret = -ENXIO; |
| 474 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 475 | tmu->pdev = pdev; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 476 | |
| 477 | if (!cfg) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 478 | dev_err(&tmu->pdev->dev, "missing platform data\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 479 | goto err0; |
| 480 | } |
| 481 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 482 | platform_set_drvdata(pdev, tmu); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 483 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 484 | res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 485 | if (!res) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 486 | dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 487 | goto err0; |
| 488 | } |
| 489 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 490 | /* |
| 491 | * Map memory, let channel.base point to our channel and mapbase to the |
| 492 | * start/stop shared register. |
| 493 | */ |
| 494 | tmu->channel.base = ioremap_nocache(res->start, resource_size(res)); |
| 495 | if (tmu->channel.base == NULL) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 496 | dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 497 | goto err0; |
| 498 | } |
| 499 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 500 | tmu->mapbase = tmu->channel.base - cfg->channel_offset; |
| 501 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 502 | /* get hold of clock */ |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 503 | tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck"); |
| 504 | if (IS_ERR(tmu->clk)) { |
| 505 | dev_err(&tmu->pdev->dev, "cannot get clock\n"); |
| 506 | ret = PTR_ERR(tmu->clk); |
Magnus Damm | 03ff858 | 2010-10-13 07:36:38 +0000 | [diff] [blame] | 507 | goto err1; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 508 | } |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 509 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 510 | ret = clk_prepare(tmu->clk); |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 511 | if (ret < 0) |
| 512 | goto err2; |
| 513 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 514 | ret = sh_tmu_channel_setup(&tmu->channel, tmu); |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 515 | if (ret < 0) |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 516 | goto err3; |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 517 | |
| 518 | return 0; |
| 519 | |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 520 | err3: |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 521 | clk_unprepare(tmu->clk); |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 522 | err2: |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 523 | clk_put(tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 524 | err1: |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 525 | iounmap(tmu->channel.base); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 526 | err0: |
| 527 | return ret; |
| 528 | } |
| 529 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 530 | static int sh_tmu_probe(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 531 | { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 532 | struct sh_tmu_device *tmu = platform_get_drvdata(pdev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 533 | struct sh_timer_config *cfg = pdev->dev.platform_data; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 534 | int ret; |
| 535 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 536 | if (!is_early_platform_device(pdev)) { |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 537 | pm_runtime_set_active(&pdev->dev); |
| 538 | pm_runtime_enable(&pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 539 | } |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 540 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 541 | if (tmu) { |
Paul Mundt | 214a607 | 2010-03-10 16:26:25 +0900 | [diff] [blame] | 542 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 543 | goto out; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 544 | } |
| 545 | |
Laurent Pinchart | 3b77a83 | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 546 | tmu = kzalloc(sizeof(*tmu), GFP_KERNEL); |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 547 | if (tmu == NULL) { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 548 | dev_err(&pdev->dev, "failed to allocate driver data\n"); |
| 549 | return -ENOMEM; |
| 550 | } |
| 551 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 552 | ret = sh_tmu_setup(tmu, pdev); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 553 | if (ret) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 554 | kfree(tmu); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 555 | pm_runtime_idle(&pdev->dev); |
| 556 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 557 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 558 | if (is_early_platform_device(pdev)) |
| 559 | return 0; |
| 560 | |
| 561 | out: |
| 562 | if (cfg->clockevent_rating || cfg->clocksource_rating) |
| 563 | pm_runtime_irq_safe(&pdev->dev); |
| 564 | else |
| 565 | pm_runtime_idle(&pdev->dev); |
| 566 | |
| 567 | return 0; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 568 | } |
| 569 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 570 | static int sh_tmu_remove(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 571 | { |
| 572 | return -EBUSY; /* cannot unregister clockevent and clocksource */ |
| 573 | } |
| 574 | |
| 575 | static struct platform_driver sh_tmu_device_driver = { |
| 576 | .probe = sh_tmu_probe, |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 577 | .remove = sh_tmu_remove, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 578 | .driver = { |
| 579 | .name = "sh_tmu", |
| 580 | } |
| 581 | }; |
| 582 | |
| 583 | static int __init sh_tmu_init(void) |
| 584 | { |
| 585 | return platform_driver_register(&sh_tmu_device_driver); |
| 586 | } |
| 587 | |
| 588 | static void __exit sh_tmu_exit(void) |
| 589 | { |
| 590 | platform_driver_unregister(&sh_tmu_device_driver); |
| 591 | } |
| 592 | |
| 593 | early_platform_init("earlytimer", &sh_tmu_device_driver); |
Simon Horman | b9773c3 | 2013-03-05 15:40:42 +0900 | [diff] [blame] | 594 | subsys_initcall(sh_tmu_init); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 595 | module_exit(sh_tmu_exit); |
| 596 | |
| 597 | MODULE_AUTHOR("Magnus Damm"); |
| 598 | MODULE_DESCRIPTION("SuperH TMU Timer Driver"); |
| 599 | MODULE_LICENSE("GPL v2"); |