Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/drivers/mtd/nand/s3c2410.c |
| 2 | * |
Ben Dooks | 7e74a50 | 2008-05-20 17:32:27 +0100 | [diff] [blame] | 3 | * Copyright © 2004-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 5 | * Ben Dooks <ben@simtec.co.uk> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * |
Ben Dooks | 7e74a50 | 2008-05-20 17:32:27 +0100 | [diff] [blame] | 7 | * Samsung S3C2410/S3C2440/S3C2412 NAND driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | */ |
| 23 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #ifdef CONFIG_MTD_NAND_S3C2410_DEBUG |
| 25 | #define DEBUG |
| 26 | #endif |
| 27 | |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/types.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/kernel.h> |
| 32 | #include <linux/string.h> |
| 33 | #include <linux/ioport.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 34 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/err.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 37 | #include <linux/slab.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 38 | #include <linux/clk.h> |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 39 | #include <linux/cpufreq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | #include <linux/mtd/mtd.h> |
| 42 | #include <linux/mtd/nand.h> |
| 43 | #include <linux/mtd/nand_ecc.h> |
| 44 | #include <linux/mtd/partitions.h> |
| 45 | |
| 46 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
Ben Dooks | b7a7018 | 2007-07-24 13:37:27 +0100 | [diff] [blame] | 48 | #include <asm/plat-s3c/regs-nand.h> |
| 49 | #include <asm/plat-s3c/nand.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | #ifdef CONFIG_MTD_NAND_S3C2410_HWECC |
| 52 | static int hardware_ecc = 1; |
| 53 | #else |
| 54 | static int hardware_ecc = 0; |
| 55 | #endif |
| 56 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 57 | #ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP |
| 58 | static int clock_stop = 1; |
| 59 | #else |
| 60 | static const int clock_stop = 0; |
| 61 | #endif |
| 62 | |
| 63 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | /* new oob placement block for use with hardware ecc generation |
| 65 | */ |
| 66 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 67 | static struct nand_ecclayout nand_hw_eccoob = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 68 | .eccbytes = 3, |
| 69 | .eccpos = {0, 1, 2}, |
| 70 | .oobfree = {{8, 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | /* controller and mtd information */ |
| 74 | |
| 75 | struct s3c2410_nand_info; |
| 76 | |
| 77 | struct s3c2410_nand_mtd { |
| 78 | struct mtd_info mtd; |
| 79 | struct nand_chip chip; |
| 80 | struct s3c2410_nand_set *set; |
| 81 | struct s3c2410_nand_info *info; |
| 82 | int scan_res; |
| 83 | }; |
| 84 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 85 | enum s3c_cpu_type { |
| 86 | TYPE_S3C2410, |
| 87 | TYPE_S3C2412, |
| 88 | TYPE_S3C2440, |
| 89 | }; |
| 90 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | /* overview of the s3c2410 nand state */ |
| 92 | |
| 93 | struct s3c2410_nand_info { |
| 94 | /* mtd info */ |
| 95 | struct nand_hw_control controller; |
| 96 | struct s3c2410_nand_mtd *mtds; |
| 97 | struct s3c2410_platform_nand *platform; |
| 98 | |
| 99 | /* device info */ |
| 100 | struct device *device; |
| 101 | struct resource *area; |
| 102 | struct clk *clk; |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 103 | void __iomem *regs; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 104 | void __iomem *sel_reg; |
| 105 | int sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | int mtd_count; |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 107 | unsigned long save_sel; |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 108 | unsigned long clk_rate; |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 109 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 110 | enum s3c_cpu_type cpu_type; |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 111 | |
| 112 | #ifdef CONFIG_CPU_FREQ |
| 113 | struct notifier_block freq_transition; |
| 114 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | /* conversion functions */ |
| 118 | |
| 119 | static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd) |
| 120 | { |
| 121 | return container_of(mtd, struct s3c2410_nand_mtd, mtd); |
| 122 | } |
| 123 | |
| 124 | static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd) |
| 125 | { |
| 126 | return s3c2410_nand_mtd_toours(mtd)->info; |
| 127 | } |
| 128 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 129 | static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 131 | return platform_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | } |
| 133 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 134 | static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 136 | return dev->dev.platform_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | } |
| 138 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 139 | static inline int allow_clk_stop(struct s3c2410_nand_info *info) |
| 140 | { |
| 141 | return clock_stop; |
| 142 | } |
| 143 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | /* timing calculations */ |
| 145 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 146 | #define NS_IN_KHZ 1000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 148 | static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | { |
| 150 | int result; |
| 151 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 152 | result = (wanted * clk) / NS_IN_KHZ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | result++; |
| 154 | |
| 155 | pr_debug("result %d from %ld, %d\n", result, clk, wanted); |
| 156 | |
| 157 | if (result > max) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 158 | printk("%d ns is too big for current clock rate %ld\n", wanted, clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | return -1; |
| 160 | } |
| 161 | |
| 162 | if (result < 1) |
| 163 | result = 1; |
| 164 | |
| 165 | return result; |
| 166 | } |
| 167 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 168 | #define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | |
| 170 | /* controller setup */ |
| 171 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 172 | static int s3c2410_nand_setrate(struct s3c2410_nand_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | { |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 174 | struct s3c2410_platform_nand *plat = info->platform; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 175 | int tacls_max = (info->cpu_type == TYPE_S3C2412) ? 8 : 4; |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 176 | int tacls, twrph0, twrph1; |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 177 | unsigned long clkrate = clk_get_rate(info->clk); |
| 178 | unsigned long set, cfg, mask; |
| 179 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | |
| 181 | /* calculate the timing information for the controller */ |
| 182 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 183 | info->clk_rate = clkrate; |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 184 | clkrate /= 1000; /* turn clock into kHz for ease of use */ |
| 185 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | if (plat != NULL) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 187 | tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); |
| 188 | twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); |
| 189 | twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | } else { |
| 191 | /* default timings */ |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 192 | tacls = tacls_max; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | twrph0 = 8; |
| 194 | twrph1 = 8; |
| 195 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 196 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | if (tacls < 0 || twrph0 < 0 || twrph1 < 0) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 198 | dev_err(info->device, "cannot get suitable timings\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | return -EINVAL; |
| 200 | } |
| 201 | |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 202 | dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 203 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 205 | switch (info->cpu_type) { |
| 206 | case TYPE_S3C2410: |
| 207 | mask = (S3C2410_NFCONF_TACLS(3) | |
| 208 | S3C2410_NFCONF_TWRPH0(7) | |
| 209 | S3C2410_NFCONF_TWRPH1(7)); |
| 210 | set = S3C2410_NFCONF_EN; |
| 211 | set |= S3C2410_NFCONF_TACLS(tacls - 1); |
| 212 | set |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); |
| 213 | set |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); |
| 214 | break; |
| 215 | |
| 216 | case TYPE_S3C2440: |
| 217 | case TYPE_S3C2412: |
| 218 | mask = (S3C2410_NFCONF_TACLS(tacls_max - 1) | |
| 219 | S3C2410_NFCONF_TWRPH0(7) | |
| 220 | S3C2410_NFCONF_TWRPH1(7)); |
| 221 | |
| 222 | set = S3C2440_NFCONF_TACLS(tacls - 1); |
| 223 | set |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); |
| 224 | set |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); |
| 225 | break; |
| 226 | |
| 227 | default: |
| 228 | /* keep compiler happy */ |
| 229 | mask = 0; |
| 230 | set = 0; |
| 231 | BUG(); |
| 232 | } |
| 233 | |
| 234 | dev_dbg(info->device, "NF_CONF is 0x%lx\n", cfg); |
| 235 | |
| 236 | local_irq_save(flags); |
| 237 | |
| 238 | cfg = readl(info->regs + S3C2410_NFCONF); |
| 239 | cfg &= ~mask; |
| 240 | cfg |= set; |
| 241 | writel(cfg, info->regs + S3C2410_NFCONF); |
| 242 | |
| 243 | local_irq_restore(flags); |
| 244 | |
| 245 | return 0; |
| 246 | } |
| 247 | |
| 248 | static int s3c2410_nand_inithw(struct s3c2410_nand_info *info) |
| 249 | { |
| 250 | int ret; |
| 251 | |
| 252 | ret = s3c2410_nand_setrate(info); |
| 253 | if (ret < 0) |
| 254 | return ret; |
| 255 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 256 | switch (info->cpu_type) { |
| 257 | case TYPE_S3C2410: |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 258 | default: |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 259 | break; |
| 260 | |
| 261 | case TYPE_S3C2440: |
| 262 | case TYPE_S3C2412: |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 263 | /* enable the controller and de-assert nFCE */ |
| 264 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 265 | writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 266 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | return 0; |
| 269 | } |
| 270 | |
| 271 | /* select chip */ |
| 272 | |
| 273 | static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) |
| 274 | { |
| 275 | struct s3c2410_nand_info *info; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 276 | struct s3c2410_nand_mtd *nmtd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | struct nand_chip *this = mtd->priv; |
| 278 | unsigned long cur; |
| 279 | |
| 280 | nmtd = this->priv; |
| 281 | info = nmtd->info; |
| 282 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 283 | if (chip != -1 && allow_clk_stop(info)) |
| 284 | clk_enable(info->clk); |
| 285 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 286 | cur = readl(info->sel_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | |
| 288 | if (chip == -1) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 289 | cur |= info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | } else { |
Ben Dooks | fb8d82a | 2005-07-06 21:05:10 +0100 | [diff] [blame] | 291 | if (nmtd->set != NULL && chip > nmtd->set->nr_chips) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 292 | dev_err(info->device, "invalid chip %d\n", chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | return; |
| 294 | } |
| 295 | |
| 296 | if (info->platform != NULL) { |
| 297 | if (info->platform->select_chip != NULL) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 298 | (info->platform->select_chip) (nmtd->set, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | } |
| 300 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 301 | cur &= ~info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | } |
| 303 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 304 | writel(cur, info->sel_reg); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 305 | |
| 306 | if (chip == -1 && allow_clk_stop(info)) |
| 307 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | } |
| 309 | |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 310 | /* s3c2410_nand_hwcontrol |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 311 | * |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 312 | * Issue command and address cycles to the chip |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 313 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 315 | static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 316 | unsigned int ctrl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | { |
| 318 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
David Woodhouse | c9ac597 | 2006-11-30 08:17:38 +0000 | [diff] [blame] | 319 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 320 | if (cmd == NAND_CMD_NONE) |
| 321 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 323 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 324 | writeb(cmd, info->regs + S3C2410_NFCMD); |
| 325 | else |
| 326 | writeb(cmd, info->regs + S3C2410_NFADDR); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | /* command and control functions */ |
| 330 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 331 | static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
| 332 | unsigned int ctrl) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 333 | { |
| 334 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 335 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 336 | if (cmd == NAND_CMD_NONE) |
| 337 | return; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 338 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 339 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 340 | writeb(cmd, info->regs + S3C2440_NFCMD); |
| 341 | else |
| 342 | writeb(cmd, info->regs + S3C2440_NFADDR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | } |
| 344 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | /* s3c2410_nand_devready() |
| 346 | * |
| 347 | * returns 0 if the nand is busy, 1 if it is ready |
| 348 | */ |
| 349 | |
| 350 | static int s3c2410_nand_devready(struct mtd_info *mtd) |
| 351 | { |
| 352 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; |
| 354 | } |
| 355 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 356 | static int s3c2440_nand_devready(struct mtd_info *mtd) |
| 357 | { |
| 358 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 359 | return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY; |
| 360 | } |
| 361 | |
| 362 | static int s3c2412_nand_devready(struct mtd_info *mtd) |
| 363 | { |
| 364 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 365 | return readb(info->regs + S3C2412_NFSTAT) & S3C2412_NFSTAT_READY; |
| 366 | } |
| 367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | /* ECC handling functions */ |
| 369 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 370 | static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, |
| 371 | u_char *read_ecc, u_char *calc_ecc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | { |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 373 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 374 | unsigned int diff0, diff1, diff2; |
| 375 | unsigned int bit, byte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 377 | pr_debug("%s(%p,%p,%p,%p)\n", __func__, mtd, dat, read_ecc, calc_ecc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 379 | diff0 = read_ecc[0] ^ calc_ecc[0]; |
| 380 | diff1 = read_ecc[1] ^ calc_ecc[1]; |
| 381 | diff2 = read_ecc[2] ^ calc_ecc[2]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 383 | pr_debug("%s: rd %02x%02x%02x calc %02x%02x%02x diff %02x%02x%02x\n", |
| 384 | __func__, |
| 385 | read_ecc[0], read_ecc[1], read_ecc[2], |
| 386 | calc_ecc[0], calc_ecc[1], calc_ecc[2], |
| 387 | diff0, diff1, diff2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 389 | if (diff0 == 0 && diff1 == 0 && diff2 == 0) |
| 390 | return 0; /* ECC is ok */ |
| 391 | |
Ben Dooks | c45c6c6 | 2008-04-15 11:36:20 +0100 | [diff] [blame] | 392 | /* sometimes people do not think about using the ECC, so check |
| 393 | * to see if we have an 0xff,0xff,0xff read ECC and then ignore |
| 394 | * the error, on the assumption that this is an un-eccd page. |
| 395 | */ |
| 396 | if (read_ecc[0] == 0xff && read_ecc[1] == 0xff && read_ecc[2] == 0xff |
| 397 | && info->platform->ignore_unset_ecc) |
| 398 | return 0; |
| 399 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 400 | /* Can we correct this ECC (ie, one row and column change). |
| 401 | * Note, this is similar to the 256 error code on smartmedia */ |
| 402 | |
| 403 | if (((diff0 ^ (diff0 >> 1)) & 0x55) == 0x55 && |
| 404 | ((diff1 ^ (diff1 >> 1)) & 0x55) == 0x55 && |
| 405 | ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) { |
| 406 | /* calculate the bit position of the error */ |
| 407 | |
Matt Reimer | d0bf379 | 2007-10-18 18:02:43 -0700 | [diff] [blame] | 408 | bit = ((diff2 >> 3) & 1) | |
| 409 | ((diff2 >> 4) & 2) | |
| 410 | ((diff2 >> 5) & 4); |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 411 | |
| 412 | /* calculate the byte position of the error */ |
| 413 | |
Matt Reimer | d0bf379 | 2007-10-18 18:02:43 -0700 | [diff] [blame] | 414 | byte = ((diff2 << 7) & 0x100) | |
| 415 | ((diff1 << 0) & 0x80) | |
| 416 | ((diff1 << 1) & 0x40) | |
| 417 | ((diff1 << 2) & 0x20) | |
| 418 | ((diff1 << 3) & 0x10) | |
| 419 | ((diff0 >> 4) & 0x08) | |
| 420 | ((diff0 >> 3) & 0x04) | |
| 421 | ((diff0 >> 2) & 0x02) | |
| 422 | ((diff0 >> 1) & 0x01); |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 423 | |
| 424 | dev_dbg(info->device, "correcting error bit %d, byte %d\n", |
| 425 | bit, byte); |
| 426 | |
| 427 | dat[byte] ^= (1 << bit); |
| 428 | return 1; |
| 429 | } |
| 430 | |
| 431 | /* if there is only one bit difference in the ECC, then |
| 432 | * one of only a row or column parity has changed, which |
| 433 | * means the error is most probably in the ECC itself */ |
| 434 | |
| 435 | diff0 |= (diff1 << 8); |
| 436 | diff0 |= (diff2 << 16); |
| 437 | |
| 438 | if ((diff0 & ~(1<<fls(diff0))) == 0) |
| 439 | return 1; |
| 440 | |
Matt Reimer | 4fac9f6 | 2007-10-18 18:02:44 -0700 | [diff] [blame] | 441 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | } |
| 443 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 444 | /* ECC functions |
| 445 | * |
| 446 | * These allow the s3c2410 and s3c2440 to use the controller's ECC |
| 447 | * generator block to ECC the data as it passes through] |
| 448 | */ |
| 449 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 451 | { |
| 452 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 453 | unsigned long ctrl; |
| 454 | |
| 455 | ctrl = readl(info->regs + S3C2410_NFCONF); |
| 456 | ctrl |= S3C2410_NFCONF_INITECC; |
| 457 | writel(ctrl, info->regs + S3C2410_NFCONF); |
| 458 | } |
| 459 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 460 | static void s3c2412_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 461 | { |
| 462 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 463 | unsigned long ctrl; |
| 464 | |
| 465 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 466 | writel(ctrl | S3C2412_NFCONT_INIT_MAIN_ECC, info->regs + S3C2440_NFCONT); |
| 467 | } |
| 468 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 469 | static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 470 | { |
| 471 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 472 | unsigned long ctrl; |
| 473 | |
| 474 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 475 | writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); |
| 476 | } |
| 477 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 478 | static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | { |
| 480 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 481 | |
| 482 | ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0); |
| 483 | ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); |
| 484 | ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); |
| 485 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 486 | pr_debug("%s: returning ecc %02x%02x%02x\n", __func__, |
| 487 | ecc_code[0], ecc_code[1], ecc_code[2]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | |
| 489 | return 0; |
| 490 | } |
| 491 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 492 | static int s3c2412_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
| 493 | { |
| 494 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 495 | unsigned long ecc = readl(info->regs + S3C2412_NFMECC0); |
| 496 | |
| 497 | ecc_code[0] = ecc; |
| 498 | ecc_code[1] = ecc >> 8; |
| 499 | ecc_code[2] = ecc >> 16; |
| 500 | |
| 501 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]); |
| 502 | |
| 503 | return 0; |
| 504 | } |
| 505 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 506 | static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 507 | { |
| 508 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 509 | unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); |
| 510 | |
| 511 | ecc_code[0] = ecc; |
| 512 | ecc_code[1] = ecc >> 8; |
| 513 | ecc_code[2] = ecc >> 16; |
| 514 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 515 | pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 516 | |
| 517 | return 0; |
| 518 | } |
| 519 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 520 | /* over-ride the standard functions for a little more speed. We can |
| 521 | * use read/write block to move the data buffers to/from the controller |
| 522 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | |
| 524 | static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 525 | { |
| 526 | struct nand_chip *this = mtd->priv; |
| 527 | readsb(this->IO_ADDR_R, buf, len); |
| 528 | } |
| 529 | |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 530 | static void s3c2440_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 531 | { |
| 532 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 533 | readsl(info->regs + S3C2440_NFDATA, buf, len / 4); |
| 534 | } |
| 535 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 536 | static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | { |
| 538 | struct nand_chip *this = mtd->priv; |
| 539 | writesb(this->IO_ADDR_W, buf, len); |
| 540 | } |
| 541 | |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 542 | static void s3c2440_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 543 | { |
| 544 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 545 | writesl(info->regs + S3C2440_NFDATA, buf, len / 4); |
| 546 | } |
| 547 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 548 | /* cpufreq driver support */ |
| 549 | |
| 550 | #ifdef CONFIG_CPU_FREQ |
| 551 | |
| 552 | static int s3c2410_nand_cpufreq_transition(struct notifier_block *nb, |
| 553 | unsigned long val, void *data) |
| 554 | { |
| 555 | struct s3c2410_nand_info *info; |
| 556 | unsigned long newclk; |
| 557 | |
| 558 | info = container_of(nb, struct s3c2410_nand_info, freq_transition); |
| 559 | newclk = clk_get_rate(info->clk); |
| 560 | |
| 561 | if ((val == CPUFREQ_POSTCHANGE && newclk < info->clk_rate) || |
| 562 | (val == CPUFREQ_PRECHANGE && newclk > info->clk_rate)) { |
| 563 | s3c2410_nand_setrate(info); |
| 564 | } |
| 565 | |
| 566 | return 0; |
| 567 | } |
| 568 | |
| 569 | static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info) |
| 570 | { |
| 571 | info->freq_transition.notifier_call = s3c2410_nand_cpufreq_transition; |
| 572 | |
| 573 | return cpufreq_register_notifier(&info->freq_transition, |
| 574 | CPUFREQ_TRANSITION_NOTIFIER); |
| 575 | } |
| 576 | |
| 577 | static inline void s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info) |
| 578 | { |
| 579 | cpufreq_unregister_notifier(&info->freq_transition, |
| 580 | CPUFREQ_TRANSITION_NOTIFIER); |
| 581 | } |
| 582 | |
| 583 | #else |
| 584 | static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info) |
| 585 | { |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | static inline void s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info) |
| 590 | { |
| 591 | } |
| 592 | #endif |
| 593 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | /* device management functions */ |
| 595 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 596 | static int s3c2410_nand_remove(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 598 | struct s3c2410_nand_info *info = to_nand_info(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 600 | platform_set_drvdata(pdev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 602 | if (info == NULL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | return 0; |
| 604 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 605 | s3c2410_nand_cpufreq_deregister(info); |
| 606 | |
| 607 | /* Release all our mtds and their partitions, then go through |
| 608 | * freeing the resources used |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 610 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | if (info->mtds != NULL) { |
| 612 | struct s3c2410_nand_mtd *ptr = info->mtds; |
| 613 | int mtdno; |
| 614 | |
| 615 | for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) { |
| 616 | pr_debug("releasing mtd %d (%p)\n", mtdno, ptr); |
| 617 | nand_release(&ptr->mtd); |
| 618 | } |
| 619 | |
| 620 | kfree(info->mtds); |
| 621 | } |
| 622 | |
| 623 | /* free the common resources */ |
| 624 | |
| 625 | if (info->clk != NULL && !IS_ERR(info->clk)) { |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 626 | if (!allow_clk_stop(info)) |
| 627 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | clk_put(info->clk); |
| 629 | } |
| 630 | |
| 631 | if (info->regs != NULL) { |
| 632 | iounmap(info->regs); |
| 633 | info->regs = NULL; |
| 634 | } |
| 635 | |
| 636 | if (info->area != NULL) { |
| 637 | release_resource(info->area); |
| 638 | kfree(info->area); |
| 639 | info->area = NULL; |
| 640 | } |
| 641 | |
| 642 | kfree(info); |
| 643 | |
| 644 | return 0; |
| 645 | } |
| 646 | |
| 647 | #ifdef CONFIG_MTD_PARTITIONS |
| 648 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 649 | struct s3c2410_nand_mtd *mtd, |
| 650 | struct s3c2410_nand_set *set) |
| 651 | { |
| 652 | if (set == NULL) |
| 653 | return add_mtd_device(&mtd->mtd); |
| 654 | |
| 655 | if (set->nr_partitions > 0 && set->partitions != NULL) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 656 | return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | } |
| 658 | |
| 659 | return add_mtd_device(&mtd->mtd); |
| 660 | } |
| 661 | #else |
| 662 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 663 | struct s3c2410_nand_mtd *mtd, |
| 664 | struct s3c2410_nand_set *set) |
| 665 | { |
| 666 | return add_mtd_device(&mtd->mtd); |
| 667 | } |
| 668 | #endif |
| 669 | |
| 670 | /* s3c2410_nand_init_chip |
| 671 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 672 | * init a single instance of an chip |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | */ |
| 674 | |
| 675 | static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, |
| 676 | struct s3c2410_nand_mtd *nmtd, |
| 677 | struct s3c2410_nand_set *set) |
| 678 | { |
| 679 | struct nand_chip *chip = &nmtd->chip; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 680 | void __iomem *regs = info->regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | chip->write_buf = s3c2410_nand_write_buf; |
| 683 | chip->read_buf = s3c2410_nand_read_buf; |
| 684 | chip->select_chip = s3c2410_nand_select_chip; |
| 685 | chip->chip_delay = 50; |
| 686 | chip->priv = nmtd; |
| 687 | chip->options = 0; |
| 688 | chip->controller = &info->controller; |
| 689 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 690 | switch (info->cpu_type) { |
| 691 | case TYPE_S3C2410: |
| 692 | chip->IO_ADDR_W = regs + S3C2410_NFDATA; |
| 693 | info->sel_reg = regs + S3C2410_NFCONF; |
| 694 | info->sel_bit = S3C2410_NFCONF_nFCE; |
| 695 | chip->cmd_ctrl = s3c2410_nand_hwcontrol; |
| 696 | chip->dev_ready = s3c2410_nand_devready; |
| 697 | break; |
| 698 | |
| 699 | case TYPE_S3C2440: |
| 700 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 701 | info->sel_reg = regs + S3C2440_NFCONT; |
| 702 | info->sel_bit = S3C2440_NFCONT_nFCE; |
| 703 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 704 | chip->dev_ready = s3c2440_nand_devready; |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 705 | chip->read_buf = s3c2440_nand_read_buf; |
| 706 | chip->write_buf = s3c2440_nand_write_buf; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 707 | break; |
| 708 | |
| 709 | case TYPE_S3C2412: |
| 710 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 711 | info->sel_reg = regs + S3C2440_NFCONT; |
| 712 | info->sel_bit = S3C2412_NFCONT_nFCE0; |
| 713 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 714 | chip->dev_ready = s3c2412_nand_devready; |
| 715 | |
| 716 | if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT) |
| 717 | dev_info(info->device, "System booted from NAND\n"); |
| 718 | |
| 719 | break; |
| 720 | } |
| 721 | |
| 722 | chip->IO_ADDR_R = chip->IO_ADDR_W; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 723 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | nmtd->info = info; |
| 725 | nmtd->mtd.priv = chip; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 726 | nmtd->mtd.owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | nmtd->set = set; |
| 728 | |
| 729 | if (hardware_ecc) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 730 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 731 | chip->ecc.correct = s3c2410_nand_correct_data; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 732 | chip->ecc.mode = NAND_ECC_HW; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 733 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 734 | switch (info->cpu_type) { |
| 735 | case TYPE_S3C2410: |
| 736 | chip->ecc.hwctl = s3c2410_nand_enable_hwecc; |
| 737 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
| 738 | break; |
| 739 | |
| 740 | case TYPE_S3C2412: |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 741 | chip->ecc.hwctl = s3c2412_nand_enable_hwecc; |
| 742 | chip->ecc.calculate = s3c2412_nand_calculate_ecc; |
| 743 | break; |
| 744 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 745 | case TYPE_S3C2440: |
| 746 | chip->ecc.hwctl = s3c2440_nand_enable_hwecc; |
| 747 | chip->ecc.calculate = s3c2440_nand_calculate_ecc; |
| 748 | break; |
| 749 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 750 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | } else { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 752 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | } |
Ben Dooks | 1c21ab6 | 2008-04-15 11:36:21 +0100 | [diff] [blame] | 754 | |
| 755 | if (set->ecc_layout != NULL) |
| 756 | chip->ecc.layout = set->ecc_layout; |
Ben Dooks | 37e5ffa | 2008-04-15 11:36:22 +0100 | [diff] [blame] | 757 | |
| 758 | if (set->disable_ecc) |
| 759 | chip->ecc.mode = NAND_ECC_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | } |
| 761 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 762 | /* s3c2410_nand_update_chip |
| 763 | * |
| 764 | * post-probe chip update, to change any items, such as the |
| 765 | * layout for large page nand |
| 766 | */ |
| 767 | |
| 768 | static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info, |
| 769 | struct s3c2410_nand_mtd *nmtd) |
| 770 | { |
| 771 | struct nand_chip *chip = &nmtd->chip; |
| 772 | |
Ben Dooks | 451d339 | 2008-05-20 17:32:14 +0100 | [diff] [blame] | 773 | dev_dbg(info->device, "chip %p => page shift %d\n", |
| 774 | chip, chip->page_shift); |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 775 | |
| 776 | if (hardware_ecc) { |
| 777 | /* change the behaviour depending on wether we are using |
| 778 | * the large or small page nand device */ |
| 779 | |
| 780 | if (chip->page_shift > 10) { |
| 781 | chip->ecc.size = 256; |
| 782 | chip->ecc.bytes = 3; |
| 783 | } else { |
| 784 | chip->ecc.size = 512; |
| 785 | chip->ecc.bytes = 3; |
| 786 | chip->ecc.layout = &nand_hw_eccoob; |
| 787 | } |
| 788 | } |
| 789 | } |
| 790 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | /* s3c2410_nand_probe |
| 792 | * |
| 793 | * called by device layer when it finds a device matching |
| 794 | * one our driver can handled. This code checks to see if |
| 795 | * it can allocate all necessary resources then calls the |
| 796 | * nand layer to look for devices |
| 797 | */ |
| 798 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 799 | static int s3c24xx_nand_probe(struct platform_device *pdev, |
| 800 | enum s3c_cpu_type cpu_type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 802 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | struct s3c2410_nand_info *info; |
| 804 | struct s3c2410_nand_mtd *nmtd; |
| 805 | struct s3c2410_nand_set *sets; |
| 806 | struct resource *res; |
| 807 | int err = 0; |
| 808 | int size; |
| 809 | int nr_sets; |
| 810 | int setno; |
| 811 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 812 | pr_debug("s3c2410_nand_probe(%p)\n", pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | |
| 814 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
| 815 | if (info == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 816 | dev_err(&pdev->dev, "no memory for flash info\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | err = -ENOMEM; |
| 818 | goto exit_error; |
| 819 | } |
| 820 | |
| 821 | memzero(info, sizeof(*info)); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 822 | platform_set_drvdata(pdev, info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | |
| 824 | spin_lock_init(&info->controller.lock); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 825 | init_waitqueue_head(&info->controller.wq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | |
| 827 | /* get the clock source and enable it */ |
| 828 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 829 | info->clk = clk_get(&pdev->dev, "nand"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | if (IS_ERR(info->clk)) { |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 831 | dev_err(&pdev->dev, "failed to get clock\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | err = -ENOENT; |
| 833 | goto exit_error; |
| 834 | } |
| 835 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | clk_enable(info->clk); |
| 837 | |
| 838 | /* allocate and map the resource */ |
| 839 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 840 | /* currently we assume we have the one resource */ |
| 841 | res = pdev->resource; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | size = res->end - res->start + 1; |
| 843 | |
| 844 | info->area = request_mem_region(res->start, size, pdev->name); |
| 845 | |
| 846 | if (info->area == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 847 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | err = -ENOENT; |
| 849 | goto exit_error; |
| 850 | } |
| 851 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 852 | info->device = &pdev->dev; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 853 | info->platform = plat; |
| 854 | info->regs = ioremap(res->start, size); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 855 | info->cpu_type = cpu_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | |
| 857 | if (info->regs == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 858 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | err = -EIO; |
| 860 | goto exit_error; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 861 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 863 | dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 864 | |
| 865 | /* initialise the hardware */ |
| 866 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 867 | err = s3c2410_nand_inithw(info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | if (err != 0) |
| 869 | goto exit_error; |
| 870 | |
| 871 | sets = (plat != NULL) ? plat->sets : NULL; |
| 872 | nr_sets = (plat != NULL) ? plat->nr_sets : 1; |
| 873 | |
| 874 | info->mtd_count = nr_sets; |
| 875 | |
| 876 | /* allocate our information */ |
| 877 | |
| 878 | size = nr_sets * sizeof(*info->mtds); |
| 879 | info->mtds = kmalloc(size, GFP_KERNEL); |
| 880 | if (info->mtds == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 881 | dev_err(&pdev->dev, "failed to allocate mtd storage\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | err = -ENOMEM; |
| 883 | goto exit_error; |
| 884 | } |
| 885 | |
| 886 | memzero(info->mtds, size); |
| 887 | |
| 888 | /* initialise all possible chips */ |
| 889 | |
| 890 | nmtd = info->mtds; |
| 891 | |
| 892 | for (setno = 0; setno < nr_sets; setno++, nmtd++) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 893 | pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 894 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | s3c2410_nand_init_chip(info, nmtd, sets); |
| 896 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 897 | nmtd->scan_res = nand_scan_ident(&nmtd->mtd, |
| 898 | (sets) ? sets->nr_chips : 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 899 | |
| 900 | if (nmtd->scan_res == 0) { |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 901 | s3c2410_nand_update_chip(info, nmtd); |
| 902 | nand_scan_tail(&nmtd->mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 903 | s3c2410_nand_add_partition(info, nmtd, sets); |
| 904 | } |
| 905 | |
| 906 | if (sets != NULL) |
| 907 | sets++; |
| 908 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 909 | |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 910 | err = s3c2410_nand_cpufreq_register(info); |
| 911 | if (err < 0) { |
| 912 | dev_err(&pdev->dev, "failed to init cpufreq support\n"); |
| 913 | goto exit_error; |
| 914 | } |
| 915 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 916 | if (allow_clk_stop(info)) { |
| 917 | dev_info(&pdev->dev, "clock idle support enabled\n"); |
| 918 | clk_disable(info->clk); |
| 919 | } |
| 920 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 921 | pr_debug("initialised ok\n"); |
| 922 | return 0; |
| 923 | |
| 924 | exit_error: |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 925 | s3c2410_nand_remove(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 926 | |
| 927 | if (err == 0) |
| 928 | err = -EINVAL; |
| 929 | return err; |
| 930 | } |
| 931 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 932 | /* PM Support */ |
| 933 | #ifdef CONFIG_PM |
| 934 | |
| 935 | static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm) |
| 936 | { |
| 937 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
| 938 | |
| 939 | if (info) { |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 940 | info->save_sel = readl(info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 941 | |
| 942 | /* For the moment, we must ensure nFCE is high during |
| 943 | * the time we are suspended. This really should be |
| 944 | * handled by suspending the MTDs we are using, but |
| 945 | * that is currently not the case. */ |
| 946 | |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 947 | writel(info->save_sel | info->sel_bit, info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 948 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 949 | if (!allow_clk_stop(info)) |
| 950 | clk_disable(info->clk); |
| 951 | } |
| 952 | |
| 953 | return 0; |
| 954 | } |
| 955 | |
| 956 | static int s3c24xx_nand_resume(struct platform_device *dev) |
| 957 | { |
| 958 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 959 | unsigned long sel; |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 960 | |
| 961 | if (info) { |
| 962 | clk_enable(info->clk); |
Ben Dooks | 30821fe | 2008-07-15 11:58:31 +0100 | [diff] [blame] | 963 | s3c2410_nand_inithw(info); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 964 | |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 965 | /* Restore the state of the nFCE line. */ |
| 966 | |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 967 | sel = readl(info->sel_reg); |
| 968 | sel &= ~info->sel_bit; |
| 969 | sel |= info->save_sel & info->sel_bit; |
| 970 | writel(sel, info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 971 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 972 | if (allow_clk_stop(info)) |
| 973 | clk_disable(info->clk); |
| 974 | } |
| 975 | |
| 976 | return 0; |
| 977 | } |
| 978 | |
| 979 | #else |
| 980 | #define s3c24xx_nand_suspend NULL |
| 981 | #define s3c24xx_nand_resume NULL |
| 982 | #endif |
| 983 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 984 | /* driver device registration */ |
| 985 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 986 | static int s3c2410_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 987 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 988 | return s3c24xx_nand_probe(dev, TYPE_S3C2410); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 989 | } |
| 990 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 991 | static int s3c2440_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 992 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 993 | return s3c24xx_nand_probe(dev, TYPE_S3C2440); |
| 994 | } |
| 995 | |
| 996 | static int s3c2412_nand_probe(struct platform_device *dev) |
| 997 | { |
| 998 | return s3c24xx_nand_probe(dev, TYPE_S3C2412); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 999 | } |
| 1000 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1001 | static struct platform_driver s3c2410_nand_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | .probe = s3c2410_nand_probe, |
| 1003 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 1004 | .suspend = s3c24xx_nand_suspend, |
| 1005 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1006 | .driver = { |
| 1007 | .name = "s3c2410-nand", |
| 1008 | .owner = THIS_MODULE, |
| 1009 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | }; |
| 1011 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1012 | static struct platform_driver s3c2440_nand_driver = { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 1013 | .probe = s3c2440_nand_probe, |
| 1014 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 1015 | .suspend = s3c24xx_nand_suspend, |
| 1016 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1017 | .driver = { |
| 1018 | .name = "s3c2440-nand", |
| 1019 | .owner = THIS_MODULE, |
| 1020 | }, |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 1021 | }; |
| 1022 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 1023 | static struct platform_driver s3c2412_nand_driver = { |
| 1024 | .probe = s3c2412_nand_probe, |
| 1025 | .remove = s3c2410_nand_remove, |
| 1026 | .suspend = s3c24xx_nand_suspend, |
| 1027 | .resume = s3c24xx_nand_resume, |
| 1028 | .driver = { |
| 1029 | .name = "s3c2412-nand", |
| 1030 | .owner = THIS_MODULE, |
| 1031 | }, |
| 1032 | }; |
| 1033 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | static int __init s3c2410_nand_init(void) |
| 1035 | { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 1036 | printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n"); |
| 1037 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 1038 | platform_driver_register(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1039 | platform_driver_register(&s3c2440_nand_driver); |
| 1040 | return platform_driver_register(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1041 | } |
| 1042 | |
| 1043 | static void __exit s3c2410_nand_exit(void) |
| 1044 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 1045 | platform_driver_unregister(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1046 | platform_driver_unregister(&s3c2440_nand_driver); |
| 1047 | platform_driver_unregister(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1048 | } |
| 1049 | |
| 1050 | module_init(s3c2410_nand_init); |
| 1051 | module_exit(s3c2410_nand_exit); |
| 1052 | |
| 1053 | MODULE_LICENSE("GPL"); |
| 1054 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 1055 | MODULE_DESCRIPTION("S3C24XX MTD NAND driver"); |
Kay Sievers | 1ff1842 | 2008-04-18 13:44:27 -0700 | [diff] [blame] | 1056 | MODULE_ALIAS("platform:s3c2410-nand"); |
| 1057 | MODULE_ALIAS("platform:s3c2412-nand"); |
| 1058 | MODULE_ALIAS("platform:s3c2440-nand"); |