Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 1992 Ross Biro |
| 7 | * Copyright (C) Linus Torvalds |
| 8 | * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle |
| 9 | * Copyright (C) 1996 David S. Miller |
| 10 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com |
| 11 | * Copyright (C) 1999 MIPS Technologies, Inc. |
| 12 | * Copyright (C) 2000 Ulf Carlsson |
| 13 | * |
| 14 | * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit |
| 15 | * binaries. |
| 16 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/compiler.h> |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 18 | #include <linux/context_tracking.h> |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 19 | #include <linux/elf.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <linux/kernel.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/mm.h> |
| 23 | #include <linux/errno.h> |
| 24 | #include <linux/ptrace.h> |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 25 | #include <linux/regset.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/security.h> |
Ralf Baechle | 40e084a | 2015-07-29 22:44:53 +0200 | [diff] [blame^] | 28 | #include <linux/stddef.h> |
Ralf Baechle | bc3d22c | 2012-07-17 19:43:58 +0200 | [diff] [blame] | 29 | #include <linux/tracehook.h> |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 30 | #include <linux/audit.h> |
| 31 | #include <linux/seccomp.h> |
Ralf Baechle | 1d7bf99 | 2013-09-06 20:24:48 +0200 | [diff] [blame] | 32 | #include <linux/ftrace.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Ralf Baechle | f8280c8 | 2005-05-19 12:08:04 +0000 | [diff] [blame] | 34 | #include <asm/byteorder.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/cpu.h> |
Maciej W. Rozycki | 9b26616 | 2015-04-03 23:27:48 +0100 | [diff] [blame] | 36 | #include <asm/cpu-info.h> |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 37 | #include <asm/dsp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <asm/fpu.h> |
| 39 | #include <asm/mipsregs.h> |
Ralf Baechle | 101b353 | 2005-10-06 17:39:32 +0100 | [diff] [blame] | 40 | #include <asm/mipsmtregs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <asm/pgtable.h> |
| 42 | #include <asm/page.h> |
Ralf Baechle | bec9b2b | 2012-09-26 20:16:47 +0200 | [diff] [blame] | 43 | #include <asm/syscall.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <asm/uaccess.h> |
| 45 | #include <asm/bootinfo.h> |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 46 | #include <asm/reg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
Ralf Baechle | 1d7bf99 | 2013-09-06 20:24:48 +0200 | [diff] [blame] | 48 | #define CREATE_TRACE_POINTS |
| 49 | #include <trace/events/syscalls.h> |
| 50 | |
Paul Burton | ac9ad83 | 2015-01-30 12:09:36 +0000 | [diff] [blame] | 51 | static void init_fp_ctx(struct task_struct *target) |
| 52 | { |
| 53 | /* If FP has been used then the target already has context */ |
| 54 | if (tsk_used_math(target)) |
| 55 | return; |
| 56 | |
| 57 | /* Begin with data registers set to all 1s... */ |
| 58 | memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); |
| 59 | |
| 60 | /* ...and FCSR zeroed */ |
| 61 | target->thread.fpu.fcr31 = 0; |
| 62 | |
| 63 | /* |
| 64 | * Record that the target has "used" math, such that the context |
| 65 | * just initialised, and any modifications made by the caller, |
| 66 | * aren't discarded. |
| 67 | */ |
| 68 | set_stopped_child_used_math(target); |
| 69 | } |
| 70 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | /* |
| 72 | * Called by kernel/ptrace.c when detaching.. |
| 73 | * |
| 74 | * Make sure single step bits etc are not set. |
| 75 | */ |
| 76 | void ptrace_disable(struct task_struct *child) |
| 77 | { |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 78 | /* Don't load the watchpoint registers for the ex-child. */ |
| 79 | clear_tsk_thread_flag(child, TIF_LOAD_WATCH); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | } |
| 81 | |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 82 | /* |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 83 | * Read a general register set. We always use the 64-bit format, even |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 84 | * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. |
| 85 | * Registers are sign extended to fill the available space. |
| 86 | */ |
Alex Smith | a79ebea | 2014-07-23 14:40:13 +0100 | [diff] [blame] | 87 | int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 88 | { |
| 89 | struct pt_regs *regs; |
| 90 | int i; |
| 91 | |
| 92 | if (!access_ok(VERIFY_WRITE, data, 38 * 8)) |
| 93 | return -EIO; |
| 94 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 95 | regs = task_pt_regs(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 96 | |
| 97 | for (i = 0; i < 32; i++) |
Alex Smith | a79ebea | 2014-07-23 14:40:13 +0100 | [diff] [blame] | 98 | __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]); |
| 99 | __put_user((long)regs->lo, (__s64 __user *)&data->lo); |
| 100 | __put_user((long)regs->hi, (__s64 __user *)&data->hi); |
| 101 | __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc); |
| 102 | __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr); |
| 103 | __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status); |
| 104 | __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | /* |
| 110 | * Write a general register set. As for PTRACE_GETREGS, we always use |
| 111 | * the 64-bit format. On a 32-bit kernel only the lower order half |
| 112 | * (according to endianness) will be used. |
| 113 | */ |
Alex Smith | a79ebea | 2014-07-23 14:40:13 +0100 | [diff] [blame] | 114 | int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 115 | { |
| 116 | struct pt_regs *regs; |
| 117 | int i; |
| 118 | |
| 119 | if (!access_ok(VERIFY_READ, data, 38 * 8)) |
| 120 | return -EIO; |
| 121 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 122 | regs = task_pt_regs(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 123 | |
| 124 | for (i = 0; i < 32; i++) |
Alex Smith | a79ebea | 2014-07-23 14:40:13 +0100 | [diff] [blame] | 125 | __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]); |
| 126 | __get_user(regs->lo, (__s64 __user *)&data->lo); |
| 127 | __get_user(regs->hi, (__s64 __user *)&data->hi); |
| 128 | __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 129 | |
| 130 | /* badvaddr, status, and cause may not be written. */ |
| 131 | |
| 132 | return 0; |
| 133 | } |
| 134 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 135 | int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 136 | { |
| 137 | int i; |
| 138 | |
| 139 | if (!access_ok(VERIFY_WRITE, data, 33 * 8)) |
| 140 | return -EIO; |
| 141 | |
| 142 | if (tsk_used_math(child)) { |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 143 | union fpureg *fregs = get_fpu_regs(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 144 | for (i = 0; i < 32; i++) |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 145 | __put_user(get_fpr64(&fregs[i], 0), |
| 146 | i + (__u64 __user *)data); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 147 | } else { |
| 148 | for (i = 0; i < 32; i++) |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 149 | __put_user((__u64) -1, i + (__u64 __user *) data); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 150 | } |
| 151 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 152 | __put_user(child->thread.fpu.fcr31, data + 64); |
Alex Smith | 656ff9b | 2014-07-23 14:40:06 +0100 | [diff] [blame] | 153 | __put_user(boot_cpu_data.fpu_id, data + 65); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 158 | int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 159 | { |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 160 | union fpureg *fregs; |
| 161 | u64 fpr_val; |
Maciej W. Rozycki | 9b26616 | 2015-04-03 23:27:48 +0100 | [diff] [blame] | 162 | u32 fcr31; |
| 163 | u32 value; |
| 164 | u32 mask; |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 165 | int i; |
| 166 | |
| 167 | if (!access_ok(VERIFY_READ, data, 33 * 8)) |
| 168 | return -EIO; |
| 169 | |
Paul Burton | ac9ad83 | 2015-01-30 12:09:36 +0000 | [diff] [blame] | 170 | init_fp_ctx(child); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 171 | fregs = get_fpu_regs(child); |
| 172 | |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 173 | for (i = 0; i < 32; i++) { |
| 174 | __get_user(fpr_val, i + (__u64 __user *)data); |
| 175 | set_fpr64(&fregs[i], 0, fpr_val); |
| 176 | } |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 177 | |
Maciej W. Rozycki | 9b26616 | 2015-04-03 23:27:48 +0100 | [diff] [blame] | 178 | __get_user(value, data + 64); |
| 179 | fcr31 = child->thread.fpu.fcr31; |
Maciej W. Rozycki | 03dce59 | 2015-05-12 15:20:57 +0100 | [diff] [blame] | 180 | mask = boot_cpu_data.fpu_msk31; |
Maciej W. Rozycki | 9b26616 | 2015-04-03 23:27:48 +0100 | [diff] [blame] | 181 | child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 182 | |
| 183 | /* FIR may not be written. */ |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 188 | int ptrace_get_watch_regs(struct task_struct *child, |
| 189 | struct pt_watch_regs __user *addr) |
| 190 | { |
| 191 | enum pt_watch_style style; |
| 192 | int i; |
| 193 | |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 194 | if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 195 | return -EIO; |
| 196 | if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) |
| 197 | return -EIO; |
| 198 | |
| 199 | #ifdef CONFIG_32BIT |
| 200 | style = pt_watch_style_mips32; |
| 201 | #define WATCH_STYLE mips32 |
| 202 | #else |
| 203 | style = pt_watch_style_mips64; |
| 204 | #define WATCH_STYLE mips64 |
| 205 | #endif |
| 206 | |
| 207 | __put_user(style, &addr->style); |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 208 | __put_user(boot_cpu_data.watch_reg_use_cnt, |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 209 | &addr->WATCH_STYLE.num_valid); |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 210 | for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 211 | __put_user(child->thread.watch.mips3264.watchlo[i], |
| 212 | &addr->WATCH_STYLE.watchlo[i]); |
| 213 | __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff, |
| 214 | &addr->WATCH_STYLE.watchhi[i]); |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 215 | __put_user(boot_cpu_data.watch_reg_masks[i], |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 216 | &addr->WATCH_STYLE.watch_masks[i]); |
| 217 | } |
| 218 | for (; i < 8; i++) { |
| 219 | __put_user(0, &addr->WATCH_STYLE.watchlo[i]); |
| 220 | __put_user(0, &addr->WATCH_STYLE.watchhi[i]); |
| 221 | __put_user(0, &addr->WATCH_STYLE.watch_masks[i]); |
| 222 | } |
| 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | int ptrace_set_watch_regs(struct task_struct *child, |
| 228 | struct pt_watch_regs __user *addr) |
| 229 | { |
| 230 | int i; |
| 231 | int watch_active = 0; |
| 232 | unsigned long lt[NUM_WATCH_REGS]; |
| 233 | u16 ht[NUM_WATCH_REGS]; |
| 234 | |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 235 | if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 236 | return -EIO; |
| 237 | if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) |
| 238 | return -EIO; |
| 239 | /* Check the values. */ |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 240 | for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 241 | __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); |
| 242 | #ifdef CONFIG_32BIT |
| 243 | if (lt[i] & __UA_LIMIT) |
| 244 | return -EINVAL; |
| 245 | #else |
| 246 | if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) { |
| 247 | if (lt[i] & 0xffffffff80000000UL) |
| 248 | return -EINVAL; |
| 249 | } else { |
| 250 | if (lt[i] & __UA_LIMIT) |
| 251 | return -EINVAL; |
| 252 | } |
| 253 | #endif |
| 254 | __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]); |
| 255 | if (ht[i] & ~0xff8) |
| 256 | return -EINVAL; |
| 257 | } |
| 258 | /* Install them. */ |
Alex Smith | 57c7ea5 | 2014-05-01 12:51:19 +0100 | [diff] [blame] | 259 | for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 260 | if (lt[i] & 7) |
| 261 | watch_active = 1; |
| 262 | child->thread.watch.mips3264.watchlo[i] = lt[i]; |
| 263 | /* Set the G bit. */ |
| 264 | child->thread.watch.mips3264.watchhi[i] = ht[i]; |
| 265 | } |
| 266 | |
| 267 | if (watch_active) |
| 268 | set_tsk_thread_flag(child, TIF_LOAD_WATCH); |
| 269 | else |
| 270 | clear_tsk_thread_flag(child, TIF_LOAD_WATCH); |
| 271 | |
| 272 | return 0; |
| 273 | } |
| 274 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 275 | /* regset get/set implementations */ |
| 276 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 277 | #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) |
| 278 | |
| 279 | static int gpr32_get(struct task_struct *target, |
| 280 | const struct user_regset *regset, |
| 281 | unsigned int pos, unsigned int count, |
| 282 | void *kbuf, void __user *ubuf) |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 283 | { |
| 284 | struct pt_regs *regs = task_pt_regs(target); |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 285 | u32 uregs[ELF_NGREG] = {}; |
| 286 | unsigned i; |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 287 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 288 | for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) { |
| 289 | /* k0/k1 are copied as zero. */ |
| 290 | if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27) |
| 291 | continue; |
| 292 | |
| 293 | uregs[i] = regs->regs[i - MIPS32_EF_R0]; |
| 294 | } |
| 295 | |
| 296 | uregs[MIPS32_EF_LO] = regs->lo; |
| 297 | uregs[MIPS32_EF_HI] = regs->hi; |
| 298 | uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc; |
| 299 | uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr; |
| 300 | uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status; |
| 301 | uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause; |
| 302 | |
| 303 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, |
| 304 | sizeof(uregs)); |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 305 | } |
| 306 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 307 | static int gpr32_set(struct task_struct *target, |
| 308 | const struct user_regset *regset, |
| 309 | unsigned int pos, unsigned int count, |
| 310 | const void *kbuf, const void __user *ubuf) |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 311 | { |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 312 | struct pt_regs *regs = task_pt_regs(target); |
| 313 | u32 uregs[ELF_NGREG]; |
| 314 | unsigned start, num_regs, i; |
| 315 | int err; |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 316 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 317 | start = pos / sizeof(u32); |
| 318 | num_regs = count / sizeof(u32); |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 319 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 320 | if (start + num_regs > ELF_NGREG) |
| 321 | return -EIO; |
| 322 | |
| 323 | err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0, |
| 324 | sizeof(uregs)); |
| 325 | if (err) |
| 326 | return err; |
| 327 | |
| 328 | for (i = start; i < num_regs; i++) { |
| 329 | /* |
| 330 | * Cast all values to signed here so that if this is a 64-bit |
| 331 | * kernel, the supplied 32-bit values will be sign extended. |
| 332 | */ |
| 333 | switch (i) { |
| 334 | case MIPS32_EF_R1 ... MIPS32_EF_R25: |
| 335 | /* k0/k1 are ignored. */ |
| 336 | case MIPS32_EF_R28 ... MIPS32_EF_R31: |
| 337 | regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i]; |
| 338 | break; |
| 339 | case MIPS32_EF_LO: |
| 340 | regs->lo = (s32)uregs[i]; |
| 341 | break; |
| 342 | case MIPS32_EF_HI: |
| 343 | regs->hi = (s32)uregs[i]; |
| 344 | break; |
| 345 | case MIPS32_EF_CP0_EPC: |
| 346 | regs->cp0_epc = (s32)uregs[i]; |
| 347 | break; |
| 348 | } |
| 349 | } |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 350 | |
| 351 | return 0; |
| 352 | } |
| 353 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 354 | #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ |
| 355 | |
| 356 | #ifdef CONFIG_64BIT |
| 357 | |
| 358 | static int gpr64_get(struct task_struct *target, |
| 359 | const struct user_regset *regset, |
| 360 | unsigned int pos, unsigned int count, |
| 361 | void *kbuf, void __user *ubuf) |
| 362 | { |
| 363 | struct pt_regs *regs = task_pt_regs(target); |
| 364 | u64 uregs[ELF_NGREG] = {}; |
| 365 | unsigned i; |
| 366 | |
| 367 | for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) { |
| 368 | /* k0/k1 are copied as zero. */ |
| 369 | if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27) |
| 370 | continue; |
| 371 | |
| 372 | uregs[i] = regs->regs[i - MIPS64_EF_R0]; |
| 373 | } |
| 374 | |
| 375 | uregs[MIPS64_EF_LO] = regs->lo; |
| 376 | uregs[MIPS64_EF_HI] = regs->hi; |
| 377 | uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc; |
| 378 | uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr; |
| 379 | uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status; |
| 380 | uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause; |
| 381 | |
| 382 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, |
| 383 | sizeof(uregs)); |
| 384 | } |
| 385 | |
| 386 | static int gpr64_set(struct task_struct *target, |
| 387 | const struct user_regset *regset, |
| 388 | unsigned int pos, unsigned int count, |
| 389 | const void *kbuf, const void __user *ubuf) |
| 390 | { |
| 391 | struct pt_regs *regs = task_pt_regs(target); |
| 392 | u64 uregs[ELF_NGREG]; |
| 393 | unsigned start, num_regs, i; |
| 394 | int err; |
| 395 | |
| 396 | start = pos / sizeof(u64); |
| 397 | num_regs = count / sizeof(u64); |
| 398 | |
| 399 | if (start + num_regs > ELF_NGREG) |
| 400 | return -EIO; |
| 401 | |
| 402 | err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0, |
| 403 | sizeof(uregs)); |
| 404 | if (err) |
| 405 | return err; |
| 406 | |
| 407 | for (i = start; i < num_regs; i++) { |
| 408 | switch (i) { |
| 409 | case MIPS64_EF_R1 ... MIPS64_EF_R25: |
| 410 | /* k0/k1 are ignored. */ |
| 411 | case MIPS64_EF_R28 ... MIPS64_EF_R31: |
| 412 | regs->regs[i - MIPS64_EF_R0] = uregs[i]; |
| 413 | break; |
| 414 | case MIPS64_EF_LO: |
| 415 | regs->lo = uregs[i]; |
| 416 | break; |
| 417 | case MIPS64_EF_HI: |
| 418 | regs->hi = uregs[i]; |
| 419 | break; |
| 420 | case MIPS64_EF_CP0_EPC: |
| 421 | regs->cp0_epc = uregs[i]; |
| 422 | break; |
| 423 | } |
| 424 | } |
| 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | #endif /* CONFIG_64BIT */ |
| 430 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 431 | static int fpr_get(struct task_struct *target, |
| 432 | const struct user_regset *regset, |
| 433 | unsigned int pos, unsigned int count, |
| 434 | void *kbuf, void __user *ubuf) |
| 435 | { |
Paul Burton | 72b22bb | 2014-01-27 15:23:07 +0000 | [diff] [blame] | 436 | unsigned i; |
| 437 | int err; |
| 438 | u64 fpr_val; |
| 439 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 440 | /* XXX fcr31 */ |
Paul Burton | 72b22bb | 2014-01-27 15:23:07 +0000 | [diff] [blame] | 441 | |
| 442 | if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t)) |
| 443 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
| 444 | &target->thread.fpu, |
| 445 | 0, sizeof(elf_fpregset_t)); |
| 446 | |
| 447 | for (i = 0; i < NUM_FPU_REGS; i++) { |
| 448 | fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0); |
| 449 | err = user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
| 450 | &fpr_val, i * sizeof(elf_fpreg_t), |
| 451 | (i + 1) * sizeof(elf_fpreg_t)); |
| 452 | if (err) |
| 453 | return err; |
| 454 | } |
| 455 | |
| 456 | return 0; |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | static int fpr_set(struct task_struct *target, |
| 460 | const struct user_regset *regset, |
| 461 | unsigned int pos, unsigned int count, |
| 462 | const void *kbuf, const void __user *ubuf) |
| 463 | { |
Paul Burton | 72b22bb | 2014-01-27 15:23:07 +0000 | [diff] [blame] | 464 | unsigned i; |
| 465 | int err; |
| 466 | u64 fpr_val; |
| 467 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 468 | /* XXX fcr31 */ |
Paul Burton | 72b22bb | 2014-01-27 15:23:07 +0000 | [diff] [blame] | 469 | |
Paul Burton | ac9ad83 | 2015-01-30 12:09:36 +0000 | [diff] [blame] | 470 | init_fp_ctx(target); |
| 471 | |
Paul Burton | 72b22bb | 2014-01-27 15:23:07 +0000 | [diff] [blame] | 472 | if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t)) |
| 473 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
| 474 | &target->thread.fpu, |
| 475 | 0, sizeof(elf_fpregset_t)); |
| 476 | |
| 477 | for (i = 0; i < NUM_FPU_REGS; i++) { |
| 478 | err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
| 479 | &fpr_val, i * sizeof(elf_fpreg_t), |
| 480 | (i + 1) * sizeof(elf_fpreg_t)); |
| 481 | if (err) |
| 482 | return err; |
| 483 | set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val); |
| 484 | } |
| 485 | |
| 486 | return 0; |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | enum mips_regset { |
| 490 | REGSET_GPR, |
| 491 | REGSET_FPR, |
| 492 | }; |
| 493 | |
Ralf Baechle | 40e084a | 2015-07-29 22:44:53 +0200 | [diff] [blame^] | 494 | struct pt_regs_offset { |
| 495 | const char *name; |
| 496 | int offset; |
| 497 | }; |
| 498 | |
| 499 | #define REG_OFFSET_NAME(reg, r) { \ |
| 500 | .name = #reg, \ |
| 501 | .offset = offsetof(struct pt_regs, r) \ |
| 502 | } |
| 503 | |
| 504 | #define REG_OFFSET_END { \ |
| 505 | .name = NULL, \ |
| 506 | .offset = 0 \ |
| 507 | } |
| 508 | |
| 509 | static const struct pt_regs_offset regoffset_table[] = { |
| 510 | REG_OFFSET_NAME(r0, regs[0]), |
| 511 | REG_OFFSET_NAME(r1, regs[1]), |
| 512 | REG_OFFSET_NAME(r2, regs[2]), |
| 513 | REG_OFFSET_NAME(r3, regs[3]), |
| 514 | REG_OFFSET_NAME(r4, regs[4]), |
| 515 | REG_OFFSET_NAME(r5, regs[5]), |
| 516 | REG_OFFSET_NAME(r6, regs[6]), |
| 517 | REG_OFFSET_NAME(r7, regs[7]), |
| 518 | REG_OFFSET_NAME(r8, regs[8]), |
| 519 | REG_OFFSET_NAME(r9, regs[9]), |
| 520 | REG_OFFSET_NAME(r10, regs[10]), |
| 521 | REG_OFFSET_NAME(r11, regs[11]), |
| 522 | REG_OFFSET_NAME(r12, regs[12]), |
| 523 | REG_OFFSET_NAME(r13, regs[13]), |
| 524 | REG_OFFSET_NAME(r14, regs[14]), |
| 525 | REG_OFFSET_NAME(r15, regs[15]), |
| 526 | REG_OFFSET_NAME(r16, regs[16]), |
| 527 | REG_OFFSET_NAME(r17, regs[17]), |
| 528 | REG_OFFSET_NAME(r18, regs[18]), |
| 529 | REG_OFFSET_NAME(r19, regs[19]), |
| 530 | REG_OFFSET_NAME(r20, regs[20]), |
| 531 | REG_OFFSET_NAME(r21, regs[21]), |
| 532 | REG_OFFSET_NAME(r22, regs[22]), |
| 533 | REG_OFFSET_NAME(r23, regs[23]), |
| 534 | REG_OFFSET_NAME(r24, regs[24]), |
| 535 | REG_OFFSET_NAME(r25, regs[25]), |
| 536 | REG_OFFSET_NAME(r26, regs[26]), |
| 537 | REG_OFFSET_NAME(r27, regs[27]), |
| 538 | REG_OFFSET_NAME(r28, regs[28]), |
| 539 | REG_OFFSET_NAME(r29, regs[29]), |
| 540 | REG_OFFSET_NAME(r30, regs[30]), |
| 541 | REG_OFFSET_NAME(r31, regs[31]), |
| 542 | REG_OFFSET_NAME(c0_status, cp0_status), |
| 543 | REG_OFFSET_NAME(hi, hi), |
| 544 | REG_OFFSET_NAME(lo, lo), |
| 545 | #ifdef CONFIG_CPU_HAS_SMARTMIPS |
| 546 | REG_OFFSET_NAME(acx, acx), |
| 547 | #endif |
| 548 | REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr), |
| 549 | REG_OFFSET_NAME(c0_cause, cp0_cause), |
| 550 | REG_OFFSET_NAME(c0_epc, cp0_epc), |
| 551 | #ifdef CONFIG_MIPS_MT_SMTC |
| 552 | REG_OFFSET_NAME(c0_tcstatus, cp0_tcstatus), |
| 553 | #endif |
| 554 | #ifdef CONFIG_CPU_CAVIUM_OCTEON |
| 555 | REG_OFFSET_NAME(mpl0, mpl[0]), |
| 556 | REG_OFFSET_NAME(mpl1, mpl[1]), |
| 557 | REG_OFFSET_NAME(mpl2, mpl[2]), |
| 558 | REG_OFFSET_NAME(mtp0, mtp[0]), |
| 559 | REG_OFFSET_NAME(mtp1, mtp[1]), |
| 560 | REG_OFFSET_NAME(mtp2, mtp[2]), |
| 561 | #endif |
| 562 | REG_OFFSET_END, |
| 563 | }; |
| 564 | |
| 565 | /** |
| 566 | * regs_query_register_offset() - query register offset from its name |
| 567 | * @name: the name of a register |
| 568 | * |
| 569 | * regs_query_register_offset() returns the offset of a register in struct |
| 570 | * pt_regs from its name. If the name is invalid, this returns -EINVAL; |
| 571 | */ |
| 572 | int regs_query_register_offset(const char *name) |
| 573 | { |
| 574 | const struct pt_regs_offset *roff; |
| 575 | for (roff = regoffset_table; roff->name != NULL; roff++) |
| 576 | if (!strcmp(roff->name, name)) |
| 577 | return roff->offset; |
| 578 | return -EINVAL; |
| 579 | } |
| 580 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 581 | #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) |
| 582 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 583 | static const struct user_regset mips_regsets[] = { |
| 584 | [REGSET_GPR] = { |
| 585 | .core_note_type = NT_PRSTATUS, |
| 586 | .n = ELF_NGREG, |
| 587 | .size = sizeof(unsigned int), |
| 588 | .align = sizeof(unsigned int), |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 589 | .get = gpr32_get, |
| 590 | .set = gpr32_set, |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 591 | }, |
| 592 | [REGSET_FPR] = { |
| 593 | .core_note_type = NT_PRFPREG, |
| 594 | .n = ELF_NFPREG, |
| 595 | .size = sizeof(elf_fpreg_t), |
| 596 | .align = sizeof(elf_fpreg_t), |
| 597 | .get = fpr_get, |
| 598 | .set = fpr_set, |
| 599 | }, |
| 600 | }; |
| 601 | |
| 602 | static const struct user_regset_view user_mips_view = { |
| 603 | .name = "mips", |
| 604 | .e_machine = ELF_ARCH, |
| 605 | .ei_osabi = ELF_OSABI, |
| 606 | .regsets = mips_regsets, |
| 607 | .n = ARRAY_SIZE(mips_regsets), |
| 608 | }; |
| 609 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 610 | #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ |
| 611 | |
| 612 | #ifdef CONFIG_64BIT |
| 613 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 614 | static const struct user_regset mips64_regsets[] = { |
| 615 | [REGSET_GPR] = { |
| 616 | .core_note_type = NT_PRSTATUS, |
| 617 | .n = ELF_NGREG, |
| 618 | .size = sizeof(unsigned long), |
| 619 | .align = sizeof(unsigned long), |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 620 | .get = gpr64_get, |
| 621 | .set = gpr64_set, |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 622 | }, |
| 623 | [REGSET_FPR] = { |
| 624 | .core_note_type = NT_PRFPREG, |
| 625 | .n = ELF_NFPREG, |
| 626 | .size = sizeof(elf_fpreg_t), |
| 627 | .align = sizeof(elf_fpreg_t), |
| 628 | .get = fpr_get, |
| 629 | .set = fpr_set, |
| 630 | }, |
| 631 | }; |
| 632 | |
| 633 | static const struct user_regset_view user_mips64_view = { |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 634 | .name = "mips64", |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 635 | .e_machine = ELF_ARCH, |
| 636 | .ei_osabi = ELF_OSABI, |
| 637 | .regsets = mips64_regsets, |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 638 | .n = ARRAY_SIZE(mips64_regsets), |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 639 | }; |
| 640 | |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 641 | #endif /* CONFIG_64BIT */ |
| 642 | |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 643 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) |
| 644 | { |
| 645 | #ifdef CONFIG_32BIT |
| 646 | return &user_mips_view; |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 647 | #else |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 648 | #ifdef CONFIG_MIPS32_O32 |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 649 | if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) |
| 650 | return &user_mips_view; |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 651 | #endif |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 652 | return &user_mips64_view; |
Alex Smith | c23b3d1a | 2014-07-23 14:40:09 +0100 | [diff] [blame] | 653 | #endif |
Ralf Baechle | 7aeb753 | 2012-08-02 14:44:11 +0200 | [diff] [blame] | 654 | } |
| 655 | |
Namhyung Kim | 9b05a69 | 2010-10-27 15:33:47 -0700 | [diff] [blame] | 656 | long arch_ptrace(struct task_struct *child, long request, |
| 657 | unsigned long addr, unsigned long data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | int ret; |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 660 | void __user *addrp = (void __user *) addr; |
| 661 | void __user *datavp = (void __user *) data; |
| 662 | unsigned long __user *datalp = (void __user *) data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | switch (request) { |
| 665 | /* when I and D space are separate, these will need to be fixed. */ |
| 666 | case PTRACE_PEEKTEXT: /* read word at location addr. */ |
Alexey Dobriyan | 7664732 | 2007-07-17 04:03:43 -0700 | [diff] [blame] | 667 | case PTRACE_PEEKDATA: |
| 668 | ret = generic_ptrace_peekdata(child, addr, data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | |
| 671 | /* Read the word at location addr in the USER area. */ |
| 672 | case PTRACE_PEEKUSR: { |
| 673 | struct pt_regs *regs; |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 674 | union fpureg *fregs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | unsigned long tmp = 0; |
| 676 | |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 677 | regs = task_pt_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | ret = 0; /* Default return value. */ |
| 679 | |
| 680 | switch (addr) { |
| 681 | case 0 ... 31: |
| 682 | tmp = regs->regs[addr]; |
| 683 | break; |
| 684 | case FPR_BASE ... FPR_BASE + 31: |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 685 | if (!tsk_used_math(child)) { |
| 686 | /* FP not yet used */ |
| 687 | tmp = -1; |
| 688 | break; |
| 689 | } |
| 690 | fregs = get_fpu_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 692 | #ifdef CONFIG_32BIT |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 693 | if (test_thread_flag(TIF_32BIT_FPREGS)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | /* |
| 695 | * The odd registers are actually the high |
| 696 | * order bits of the values stored in the even |
| 697 | * registers - unless we're using r2k_switch.S. |
| 698 | */ |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 699 | tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 700 | addr & 1); |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 701 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | } |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 703 | #endif |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 704 | tmp = get_fpr32(&fregs[addr - FPR_BASE], 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | break; |
| 706 | case PC: |
| 707 | tmp = regs->cp0_epc; |
| 708 | break; |
| 709 | case CAUSE: |
| 710 | tmp = regs->cp0_cause; |
| 711 | break; |
| 712 | case BADVADDR: |
| 713 | tmp = regs->cp0_badvaddr; |
| 714 | break; |
| 715 | case MMHI: |
| 716 | tmp = regs->hi; |
| 717 | break; |
| 718 | case MMLO: |
| 719 | tmp = regs->lo; |
| 720 | break; |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 721 | #ifdef CONFIG_CPU_HAS_SMARTMIPS |
| 722 | case ACX: |
| 723 | tmp = regs->acx; |
| 724 | break; |
| 725 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | case FPC_CSR: |
Atsushi Nemoto | eae8907 | 2006-05-16 01:26:03 +0900 | [diff] [blame] | 727 | tmp = child->thread.fpu.fcr31; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | break; |
Paul Burton | 3351047 | 2013-11-19 17:30:35 +0000 | [diff] [blame] | 729 | case FPC_EIR: |
| 730 | /* implementation / version register */ |
Alex Smith | 656ff9b | 2014-07-23 14:40:06 +0100 | [diff] [blame] | 731 | tmp = boot_cpu_data.fpu_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 733 | case DSP_BASE ... DSP_BASE + 5: { |
| 734 | dspreg_t *dregs; |
| 735 | |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 736 | if (!cpu_has_dsp) { |
| 737 | tmp = 0; |
| 738 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 739 | goto out; |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 740 | } |
Ralf Baechle | 6c35585 | 2005-12-05 13:47:25 +0000 | [diff] [blame] | 741 | dregs = __get_dsp_regs(child); |
| 742 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 743 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 744 | } |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 745 | case DSP_CONTROL: |
| 746 | if (!cpu_has_dsp) { |
| 747 | tmp = 0; |
| 748 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 749 | goto out; |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 750 | } |
| 751 | tmp = child->thread.dsp.dspcontrol; |
| 752 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | default: |
| 754 | tmp = 0; |
| 755 | ret = -EIO; |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 756 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | } |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 758 | ret = put_user(tmp, datalp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | break; |
| 760 | } |
| 761 | |
| 762 | /* when I and D space are separate, this will have to be fixed. */ |
| 763 | case PTRACE_POKETEXT: /* write the word at location addr. */ |
| 764 | case PTRACE_POKEDATA: |
Alexey Dobriyan | f284ce7 | 2007-07-17 04:03:44 -0700 | [diff] [blame] | 765 | ret = generic_ptrace_pokedata(child, addr, data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | break; |
| 767 | |
| 768 | case PTRACE_POKEUSR: { |
| 769 | struct pt_regs *regs; |
| 770 | ret = 0; |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 771 | regs = task_pt_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 772 | |
| 773 | switch (addr) { |
| 774 | case 0 ... 31: |
| 775 | regs->regs[addr] = data; |
| 776 | break; |
| 777 | case FPR_BASE ... FPR_BASE + 31: { |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 778 | union fpureg *fregs = get_fpu_regs(child); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | |
Paul Burton | ac9ad83 | 2015-01-30 12:09:36 +0000 | [diff] [blame] | 780 | init_fp_ctx(child); |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 781 | #ifdef CONFIG_32BIT |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 782 | if (test_thread_flag(TIF_32BIT_FPREGS)) { |
| 783 | /* |
| 784 | * The odd registers are actually the high |
| 785 | * order bits of the values stored in the even |
| 786 | * registers - unless we're using r2k_switch.S. |
| 787 | */ |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 788 | set_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 789 | addr & 1, data); |
Paul Burton | 597ce17 | 2013-11-22 13:12:07 +0000 | [diff] [blame] | 790 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | } |
| 792 | #endif |
Paul Burton | bbd426f | 2014-02-13 11:26:41 +0000 | [diff] [blame] | 793 | set_fpr64(&fregs[addr - FPR_BASE], 0, data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | break; |
| 795 | } |
| 796 | case PC: |
| 797 | regs->cp0_epc = data; |
| 798 | break; |
| 799 | case MMHI: |
| 800 | regs->hi = data; |
| 801 | break; |
| 802 | case MMLO: |
| 803 | regs->lo = data; |
| 804 | break; |
Franck Bui-Huu | 9693a85 | 2007-02-02 17:41:47 +0100 | [diff] [blame] | 805 | #ifdef CONFIG_CPU_HAS_SMARTMIPS |
| 806 | case ACX: |
| 807 | regs->acx = data; |
| 808 | break; |
| 809 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | case FPC_CSR: |
Paul Burton | b1442d3 | 2014-07-22 14:21:21 +0100 | [diff] [blame] | 811 | child->thread.fpu.fcr31 = data & ~FPU_CSR_ALL_X; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 812 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 813 | case DSP_BASE ... DSP_BASE + 5: { |
| 814 | dspreg_t *dregs; |
| 815 | |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 816 | if (!cpu_has_dsp) { |
| 817 | ret = -EIO; |
| 818 | break; |
| 819 | } |
| 820 | |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 821 | dregs = __get_dsp_regs(child); |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 822 | dregs[addr - DSP_BASE] = data; |
| 823 | break; |
Ralf Baechle | c134a5e | 2005-06-30 09:42:00 +0000 | [diff] [blame] | 824 | } |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 825 | case DSP_CONTROL: |
| 826 | if (!cpu_has_dsp) { |
| 827 | ret = -EIO; |
| 828 | break; |
| 829 | } |
| 830 | child->thread.dsp.dspcontrol = data; |
| 831 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | default: |
| 833 | /* The rest are not allowed. */ |
| 834 | ret = -EIO; |
| 835 | break; |
| 836 | } |
| 837 | break; |
| 838 | } |
| 839 | |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 840 | case PTRACE_GETREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 841 | ret = ptrace_getregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 842 | break; |
| 843 | |
| 844 | case PTRACE_SETREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 845 | ret = ptrace_setregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 846 | break; |
| 847 | |
| 848 | case PTRACE_GETFPREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 849 | ret = ptrace_getfpregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 850 | break; |
| 851 | |
| 852 | case PTRACE_SETFPREGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 853 | ret = ptrace_setfpregs(child, datavp); |
Daniel Jacobowitz | ea3d710 | 2005-09-28 18:11:15 -0400 | [diff] [blame] | 854 | break; |
| 855 | |
Ralf Baechle | 3c37026 | 2005-04-13 17:43:59 +0000 | [diff] [blame] | 856 | case PTRACE_GET_THREAD_AREA: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 857 | ret = put_user(task_thread_info(child)->tp_value, datalp); |
Ralf Baechle | 3c37026 | 2005-04-13 17:43:59 +0000 | [diff] [blame] | 858 | break; |
| 859 | |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 860 | case PTRACE_GET_WATCH_REGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 861 | ret = ptrace_get_watch_regs(child, addrp); |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 862 | break; |
| 863 | |
| 864 | case PTRACE_SET_WATCH_REGS: |
Namhyung Kim | fb67113 | 2010-10-27 15:33:58 -0700 | [diff] [blame] | 865 | ret = ptrace_set_watch_regs(child, addrp); |
David Daney | 0926bf9 | 2008-09-23 00:11:26 -0700 | [diff] [blame] | 866 | break; |
| 867 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | default: |
| 869 | ret = ptrace_request(child, request, addr, data); |
| 870 | break; |
| 871 | } |
Christoph Hellwig | 481bed4 | 2005-11-07 00:59:47 -0800 | [diff] [blame] | 872 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | return ret; |
| 874 | } |
| 875 | |
| 876 | /* |
| 877 | * Notification of system call entry/exit |
| 878 | * - triggered by current->work.syscall_trace |
| 879 | */ |
Markos Chandras | 4c21b8f | 2014-01-22 14:40:03 +0000 | [diff] [blame] | 880 | asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 881 | { |
Ralf Baechle | 0dfa95a | 2012-09-26 21:30:47 +0200 | [diff] [blame] | 882 | long ret = 0; |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 883 | user_exit(); |
| 884 | |
Lars Persson | c2d9f17 | 2015-02-03 17:08:17 +0100 | [diff] [blame] | 885 | current_thread_info()->syscall = syscall; |
| 886 | |
Andy Lutomirski | a4412fc | 2014-07-21 18:49:14 -0700 | [diff] [blame] | 887 | if (secure_computing() == -1) |
Markos Chandras | 1225eb8 | 2014-01-22 14:40:01 +0000 | [diff] [blame] | 888 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | |
Ralf Baechle | 0dfa95a | 2012-09-26 21:30:47 +0200 | [diff] [blame] | 890 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
| 891 | tracehook_report_syscall_entry(regs)) |
| 892 | ret = -1; |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 893 | |
Ralf Baechle | 1d7bf99 | 2013-09-06 20:24:48 +0200 | [diff] [blame] | 894 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
| 895 | trace_sys_enter(regs, regs->regs[2]); |
| 896 | |
Eric Paris | 9139740 | 2014-03-11 13:29:28 -0400 | [diff] [blame] | 897 | audit_syscall_entry(syscall, regs->regs[4], regs->regs[5], |
Eric Paris | b05d844 | 2012-01-03 14:23:06 -0500 | [diff] [blame] | 898 | regs->regs[6], regs->regs[7]); |
Markos Chandras | 1225eb8 | 2014-01-22 14:40:01 +0000 | [diff] [blame] | 899 | return syscall; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | } |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 901 | |
| 902 | /* |
| 903 | * Notification of system call entry/exit |
| 904 | * - triggered by current->work.syscall_trace |
| 905 | */ |
| 906 | asmlinkage void syscall_trace_leave(struct pt_regs *regs) |
| 907 | { |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 908 | /* |
| 909 | * We may come here right after calling schedule_user() |
| 910 | * or do_notify_resume(), in which case we can be in RCU |
| 911 | * user mode. |
| 912 | */ |
| 913 | user_exit(); |
| 914 | |
Eric Paris | d7e7528 | 2012-01-03 14:23:06 -0500 | [diff] [blame] | 915 | audit_syscall_exit(regs); |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 916 | |
Ralf Baechle | 1d7bf99 | 2013-09-06 20:24:48 +0200 | [diff] [blame] | 917 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
| 918 | trace_sys_exit(regs, regs->regs[2]); |
| 919 | |
Ralf Baechle | bc3d22c | 2012-07-17 19:43:58 +0200 | [diff] [blame] | 920 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 921 | tracehook_report_syscall_exit(regs, 0); |
Ralf Baechle | c3fc5cd | 2013-05-29 01:07:19 +0200 | [diff] [blame] | 922 | |
| 923 | user_enter(); |
Ralf Baechle | 8b659a3 | 2011-05-19 09:21:29 +0100 | [diff] [blame] | 924 | } |