Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Clarence Ip | c475b08 | 2016-06-26 09:27:23 -0400 | [diff] [blame] | 13 | #ifndef _SDE_HW_CTL_H |
| 14 | #define _SDE_HW_CTL_H |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 15 | |
| 16 | #include "sde_hw_mdss.h" |
Clarence Ip | c475b08 | 2016-06-26 09:27:23 -0400 | [diff] [blame] | 17 | #include "sde_hw_util.h" |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 18 | #include "sde_hw_catalog.h" |
| 19 | |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 20 | /** |
| 21 | * sde_ctl_mode_sel: Interface mode selection |
| 22 | * SDE_CTL_MODE_SEL_VID: Video mode interface |
| 23 | * SDE_CTL_MODE_SEL_CMD: Command mode interface |
| 24 | */ |
| 25 | enum sde_ctl_mode_sel { |
| 26 | SDE_CTL_MODE_SEL_VID = 0, |
| 27 | SDE_CTL_MODE_SEL_CMD |
| 28 | }; |
| 29 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 30 | struct sde_hw_ctl; |
| 31 | /** |
| 32 | * struct sde_hw_stage_cfg - blending stage cfg |
| 33 | * @stage |
| 34 | * @border_enable |
| 35 | */ |
| 36 | struct sde_hw_stage_cfg { |
Dhaval Patel | 44f1247 | 2016-08-29 12:19:47 -0700 | [diff] [blame^] | 37 | enum sde_sspp stage[SDE_STAGE_MAX][SDE_MAX_PIPES_PER_STAGE]; |
| 38 | u8 border_enable[CRTC_DUAL_MIXERS]; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | /** |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 42 | * struct sde_hw_intf_cfg :Describes how the SDE writes data to output interface |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 43 | * @intf : Interface id |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 44 | * @wb: Writeback id |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 45 | * @mode_3d: 3d mux configuration |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 46 | * @intf_mode_sel: Interface mode, cmd / vid |
| 47 | * @stream_sel: Stream selection for multi-stream interfaces |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 48 | */ |
| 49 | struct sde_hw_intf_cfg { |
| 50 | enum sde_intf intf; |
| 51 | enum sde_wb wb; |
| 52 | enum sde_3d_blend_mode mode_3d; |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 53 | enum sde_ctl_mode_sel intf_mode_sel; |
| 54 | int stream_sel; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 55 | }; |
| 56 | |
| 57 | /** |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 58 | * struct sde_hw_ctl_ops - Interface to the wb Hw driver functions |
| 59 | * Assumption is these functions will be called after clocks are enabled |
| 60 | */ |
| 61 | struct sde_hw_ctl_ops { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 62 | /** |
| 63 | * kickoff hw operation for Sw controlled interfaces |
| 64 | * DSI cmd mode and WB interface are SW controlled |
| 65 | * @ctx : ctl path ctx pointer |
| 66 | */ |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 67 | void (*trigger_start)(struct sde_hw_ctl *ctx); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 68 | |
| 69 | /** |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 70 | * Clear the value of the cached pending_flush_mask |
| 71 | * No effect on hardware |
| 72 | * @ctx : ctl path ctx pointer |
| 73 | */ |
| 74 | void (*clear_pending_flush)(struct sde_hw_ctl *ctx); |
| 75 | |
| 76 | /** |
| 77 | * OR in the given flushbits to the cached pending_flush_mask |
| 78 | * No effect on hardware |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 79 | * @ctx : ctl path ctx pointer |
| 80 | * @flushbits : module flushmask |
| 81 | */ |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 82 | void (*update_pending_flush)(struct sde_hw_ctl *ctx, |
| 83 | u32 flushbits); |
| 84 | |
| 85 | /** |
| 86 | * Write the value of the pending_flush_mask to hardware |
| 87 | * @ctx : ctl path ctx pointer |
| 88 | */ |
| 89 | void (*trigger_flush)(struct sde_hw_ctl *ctx); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 90 | |
| 91 | /** |
| 92 | * Setup ctl_path interface config |
| 93 | * @ctx |
| 94 | * @cfg : interface config structure pointer |
| 95 | */ |
| 96 | void (*setup_intf_cfg)(struct sde_hw_ctl *ctx, |
| 97 | struct sde_hw_intf_cfg *cfg); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 98 | |
| 99 | int (*reset)(struct sde_hw_ctl *c); |
| 100 | |
| 101 | int (*get_bitmask_sspp)(struct sde_hw_ctl *ctx, |
| 102 | u32 *flushbits, |
| 103 | enum sde_sspp blk); |
| 104 | |
| 105 | int (*get_bitmask_mixer)(struct sde_hw_ctl *ctx, |
| 106 | u32 *flushbits, |
| 107 | enum sde_lm blk); |
| 108 | |
| 109 | int (*get_bitmask_dspp)(struct sde_hw_ctl *ctx, |
| 110 | u32 *flushbits, |
| 111 | enum sde_dspp blk); |
| 112 | |
| 113 | int (*get_bitmask_intf)(struct sde_hw_ctl *ctx, |
| 114 | u32 *flushbits, |
| 115 | enum sde_intf blk); |
| 116 | |
| 117 | int (*get_bitmask_cdm)(struct sde_hw_ctl *ctx, |
| 118 | u32 *flushbits, |
| 119 | enum sde_cdm blk); |
| 120 | |
Alan Kwong | 3232ca5 | 2016-07-29 02:27:47 -0400 | [diff] [blame] | 121 | int (*get_bitmask_wb)(struct sde_hw_ctl *ctx, |
| 122 | u32 *flushbits, |
| 123 | enum sde_wb blk); |
| 124 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 125 | void (*setup_blendstage)(struct sde_hw_ctl *ctx, |
Dhaval Patel | 44f1247 | 2016-08-29 12:19:47 -0700 | [diff] [blame^] | 126 | enum sde_lm lm, struct sde_hw_stage_cfg *cfg, u32 index); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | /** |
| 130 | * struct sde_hw_ctl : CTL PATH driver object |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 131 | * @hw: block register map object |
| 132 | * @idx: control path index |
| 133 | * @ctl_hw_caps: control path capabilities |
| 134 | * @mixer_count: number of mixers |
| 135 | * @mixer_hw_caps: mixer hardware capabilities |
| 136 | * @pending_flush_mask: storage for pending ctl_flush managed via ops |
| 137 | * @ops: operation list |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 138 | */ |
| 139 | struct sde_hw_ctl { |
| 140 | /* base */ |
| 141 | struct sde_hw_blk_reg_map hw; |
| 142 | |
| 143 | /* ctl path */ |
| 144 | int idx; |
| 145 | const struct sde_ctl_cfg *caps; |
| 146 | int mixer_count; |
| 147 | const struct sde_lm_cfg *mixer_hw_caps; |
Lloyd Atkinson | 5d72278 | 2016-05-30 14:09:41 -0400 | [diff] [blame] | 148 | u32 pending_flush_mask; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 149 | |
| 150 | /* ops */ |
| 151 | struct sde_hw_ctl_ops ops; |
| 152 | }; |
| 153 | |
| 154 | /** |
| 155 | * sde_hw_ctl_init(): Initializes the ctl_path hw driver object. |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 156 | * should be called before accessing every ctl path registers. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 157 | * @idx: ctl_path index for which driver object is required |
| 158 | * @addr: mapped register io address of MDP |
| 159 | * @m : pointer to mdss catalog data |
| 160 | */ |
| 161 | struct sde_hw_ctl *sde_hw_ctl_init(enum sde_ctl idx, |
| 162 | void __iomem *addr, |
| 163 | struct sde_mdss_cfg *m); |
| 164 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 165 | /** |
| 166 | * sde_hw_ctl_destroy(): Destroys ctl driver context |
| 167 | * should be called to free the context |
| 168 | */ |
| 169 | void sde_hw_ctl_destroy(struct sde_hw_ctl *ctx); |
| 170 | |
Clarence Ip | c475b08 | 2016-06-26 09:27:23 -0400 | [diff] [blame] | 171 | #endif /*_SDE_HW_CTL_H */ |