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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090038#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039
40#include "libata.h"
41
Tejun Heo624d5c52008-03-25 22:16:41 +090042const struct ata_port_operations ata_sff_port_ops = {
43 .inherits = &ata_base_port_ops,
44
Tejun Heo9363c382008-04-07 22:47:16 +090045 .qc_prep = ata_sff_qc_prep,
46 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090047 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090048
Tejun Heo9363c382008-04-07 22:47:16 +090049 .freeze = ata_sff_freeze,
50 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090051 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090052 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090053 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090054 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090055 .error_handler = ata_sff_error_handler,
56 .post_internal_cmd = ata_sff_post_internal_cmd,
Tejun Heo624d5c52008-03-25 22:16:41 +090057
Tejun Heo5682ed32008-04-07 22:47:16 +090058 .sff_dev_select = ata_sff_dev_select,
59 .sff_check_status = ata_sff_check_status,
60 .sff_tf_load = ata_sff_tf_load,
61 .sff_tf_read = ata_sff_tf_read,
62 .sff_exec_command = ata_sff_exec_command,
63 .sff_data_xfer = ata_sff_data_xfer,
64 .sff_irq_on = ata_sff_irq_on,
Tejun Heo288623a2008-04-07 22:47:17 +090065 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo624d5c52008-03-25 22:16:41 +090066
67 .port_start = ata_sff_port_start,
68};
69
70const struct ata_port_operations ata_bmdma_port_ops = {
71 .inherits = &ata_sff_port_ops,
72
Tejun Heo9363c382008-04-07 22:47:16 +090073 .mode_filter = ata_bmdma_mode_filter,
Tejun Heo624d5c52008-03-25 22:16:41 +090074
75 .bmdma_setup = ata_bmdma_setup,
76 .bmdma_start = ata_bmdma_start,
77 .bmdma_stop = ata_bmdma_stop,
78 .bmdma_status = ata_bmdma_status,
Tejun Heo624d5c52008-03-25 22:16:41 +090079};
80
81/**
82 * ata_fill_sg - Fill PCI IDE PRD table
83 * @qc: Metadata associated with taskfile to be transferred
84 *
85 * Fill PCI IDE PRD (scatter-gather) table with segments
86 * associated with the current disk command.
87 *
88 * LOCKING:
89 * spin_lock_irqsave(host lock)
90 *
91 */
92static void ata_fill_sg(struct ata_queued_cmd *qc)
93{
94 struct ata_port *ap = qc->ap;
95 struct scatterlist *sg;
96 unsigned int si, pi;
97
98 pi = 0;
99 for_each_sg(qc->sg, sg, qc->n_elem, si) {
100 u32 addr, offset;
101 u32 sg_len, len;
102
103 /* determine if physical DMA addr spans 64K boundary.
104 * Note h/w doesn't support 64-bit, so we unconditionally
105 * truncate dma_addr_t to u32.
106 */
107 addr = (u32) sg_dma_address(sg);
108 sg_len = sg_dma_len(sg);
109
110 while (sg_len) {
111 offset = addr & 0xffff;
112 len = sg_len;
113 if ((offset + sg_len) > 0x10000)
114 len = 0x10000 - offset;
115
116 ap->prd[pi].addr = cpu_to_le32(addr);
117 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
118 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
119
120 pi++;
121 sg_len -= len;
122 addr += len;
123 }
124 }
125
126 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
127}
128
129/**
130 * ata_fill_sg_dumb - Fill PCI IDE PRD table
131 * @qc: Metadata associated with taskfile to be transferred
132 *
133 * Fill PCI IDE PRD (scatter-gather) table with segments
134 * associated with the current disk command. Perform the fill
135 * so that we avoid writing any length 64K records for
136 * controllers that don't follow the spec.
137 *
138 * LOCKING:
139 * spin_lock_irqsave(host lock)
140 *
141 */
142static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
143{
144 struct ata_port *ap = qc->ap;
145 struct scatterlist *sg;
146 unsigned int si, pi;
147
148 pi = 0;
149 for_each_sg(qc->sg, sg, qc->n_elem, si) {
150 u32 addr, offset;
151 u32 sg_len, len, blen;
152
153 /* determine if physical DMA addr spans 64K boundary.
154 * Note h/w doesn't support 64-bit, so we unconditionally
155 * truncate dma_addr_t to u32.
156 */
157 addr = (u32) sg_dma_address(sg);
158 sg_len = sg_dma_len(sg);
159
160 while (sg_len) {
161 offset = addr & 0xffff;
162 len = sg_len;
163 if ((offset + sg_len) > 0x10000)
164 len = 0x10000 - offset;
165
166 blen = len & 0xffff;
167 ap->prd[pi].addr = cpu_to_le32(addr);
168 if (blen == 0) {
169 /* Some PATA chipsets like the CS5530 can't
170 cope with 0x0000 meaning 64K as the spec says */
171 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
172 blen = 0x8000;
173 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
174 }
175 ap->prd[pi].flags_len = cpu_to_le32(blen);
176 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
177
178 pi++;
179 sg_len -= len;
180 addr += len;
181 }
182 }
183
184 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
185}
186
187/**
Tejun Heo9363c382008-04-07 22:47:16 +0900188 * ata_sff_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900189 * @qc: Metadata associated with taskfile to be prepared
190 *
191 * Prepare ATA taskfile for submission.
192 *
193 * LOCKING:
194 * spin_lock_irqsave(host lock)
195 */
Tejun Heo9363c382008-04-07 22:47:16 +0900196void ata_sff_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900197{
198 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
199 return;
200
201 ata_fill_sg(qc);
202}
203
204/**
Tejun Heo9363c382008-04-07 22:47:16 +0900205 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900206 * @qc: Metadata associated with taskfile to be prepared
207 *
208 * Prepare ATA taskfile for submission.
209 *
210 * LOCKING:
211 * spin_lock_irqsave(host lock)
212 */
Tejun Heo9363c382008-04-07 22:47:16 +0900213void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900214{
215 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
216 return;
217
218 ata_fill_sg_dumb(qc);
219}
220
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500221/**
Tejun Heo9363c382008-04-07 22:47:16 +0900222 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +0900223 * @ap: port where the device is
224 *
225 * Reads ATA taskfile status register for currently-selected device
226 * and return its value. This also clears pending interrupts
227 * from this device
228 *
229 * LOCKING:
230 * Inherited from caller.
231 */
Tejun Heo9363c382008-04-07 22:47:16 +0900232u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900233{
234 return ioread8(ap->ioaddr.status_addr);
235}
236
237/**
Tejun Heo9363c382008-04-07 22:47:16 +0900238 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +0900239 * @ap: port where the device is
240 *
241 * Reads ATA taskfile alternate status register for
242 * currently-selected device and return its value.
243 *
244 * Note: may NOT be used as the check_altstatus() entry in
245 * ata_port_operations.
246 *
247 * LOCKING:
248 * Inherited from caller.
249 */
Tejun Heo9363c382008-04-07 22:47:16 +0900250u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900251{
Tejun Heo5682ed32008-04-07 22:47:16 +0900252 if (ap->ops->sff_check_altstatus)
253 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900254
255 return ioread8(ap->ioaddr.altstatus_addr);
256}
257
258/**
Tejun Heo9363c382008-04-07 22:47:16 +0900259 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900260 * @ap: port containing status register to be polled
261 * @tmout_pat: impatience timeout
262 * @tmout: overall timeout
263 *
264 * Sleep until ATA Status register bit BSY clears,
265 * or a timeout occurs.
266 *
267 * LOCKING:
268 * Kernel thread context (may sleep).
269 *
270 * RETURNS:
271 * 0 on success, -errno otherwise.
272 */
Tejun Heo9363c382008-04-07 22:47:16 +0900273int ata_sff_busy_sleep(struct ata_port *ap,
274 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900275{
276 unsigned long timer_start, timeout;
277 u8 status;
278
Tejun Heo9363c382008-04-07 22:47:16 +0900279 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900280 timer_start = jiffies;
281 timeout = timer_start + tmout_pat;
282 while (status != 0xff && (status & ATA_BUSY) &&
283 time_before(jiffies, timeout)) {
284 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900285 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900286 }
287
288 if (status != 0xff && (status & ATA_BUSY))
289 ata_port_printk(ap, KERN_WARNING,
290 "port is slow to respond, please be patient "
291 "(Status 0x%x)\n", status);
292
293 timeout = timer_start + tmout;
294 while (status != 0xff && (status & ATA_BUSY) &&
295 time_before(jiffies, timeout)) {
296 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900297 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900298 }
299
300 if (status == 0xff)
301 return -ENODEV;
302
303 if (status & ATA_BUSY) {
304 ata_port_printk(ap, KERN_ERR, "port failed to respond "
305 "(%lu secs, Status 0x%x)\n",
306 tmout / HZ, status);
307 return -EBUSY;
308 }
309
310 return 0;
311}
312
Tejun Heoaa2731a2008-04-07 22:47:19 +0900313static int ata_sff_check_ready(struct ata_link *link)
314{
315 u8 status = link->ap->ops->sff_check_status(link->ap);
316
317 if (!(status & ATA_BUSY))
318 return 1;
319 if (status == 0xff)
320 return -ENODEV;
321 return 0;
322}
323
Tejun Heo624d5c52008-03-25 22:16:41 +0900324/**
Tejun Heo9363c382008-04-07 22:47:16 +0900325 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900326 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900327 * @deadline: deadline jiffies for the operation
328 *
329 * Sleep until ATA Status register bit BSY clears, or timeout
330 * occurs.
331 *
332 * LOCKING:
333 * Kernel thread context (may sleep).
334 *
335 * RETURNS:
336 * 0 on success, -errno otherwise.
337 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900338int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900339{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900340 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900341}
342
343/**
Tejun Heo9363c382008-04-07 22:47:16 +0900344 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900345 * @ap: ATA channel to manipulate
346 * @device: ATA device (numbered from zero) to select
347 *
348 * Use the method defined in the ATA specification to
349 * make either device 0, or device 1, active on the
350 * ATA channel. Works with both PIO and MMIO.
351 *
352 * May be used as the dev_select() entry in ata_port_operations.
353 *
354 * LOCKING:
355 * caller.
356 */
Tejun Heo9363c382008-04-07 22:47:16 +0900357void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900358{
359 u8 tmp;
360
361 if (device == 0)
362 tmp = ATA_DEVICE_OBS;
363 else
364 tmp = ATA_DEVICE_OBS | ATA_DEV1;
365
366 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900367 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900368}
369
370/**
371 * ata_dev_select - Select device 0/1 on ATA bus
372 * @ap: ATA channel to manipulate
373 * @device: ATA device (numbered from zero) to select
374 * @wait: non-zero to wait for Status register BSY bit to clear
375 * @can_sleep: non-zero if context allows sleeping
376 *
377 * Use the method defined in the ATA specification to
378 * make either device 0, or device 1, active on the
379 * ATA channel.
380 *
Tejun Heo9363c382008-04-07 22:47:16 +0900381 * This is a high-level version of ata_sff_dev_select(), which
382 * additionally provides the services of inserting the proper
383 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900384 *
385 * LOCKING:
386 * caller.
387 */
388void ata_dev_select(struct ata_port *ap, unsigned int device,
389 unsigned int wait, unsigned int can_sleep)
390{
391 if (ata_msg_probe(ap))
392 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
393 "device %u, wait %u\n", device, wait);
394
395 if (wait)
396 ata_wait_idle(ap);
397
Tejun Heo5682ed32008-04-07 22:47:16 +0900398 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900399
400 if (wait) {
401 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
402 msleep(150);
403 ata_wait_idle(ap);
404 }
405}
406
407/**
Tejun Heo9363c382008-04-07 22:47:16 +0900408 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900409 * @ap: Port on which interrupts are enabled.
410 *
411 * Enable interrupts on a legacy IDE device using MMIO or PIO,
412 * wait for idle, clear any pending interrupts.
413 *
414 * LOCKING:
415 * Inherited from caller.
416 */
Tejun Heo9363c382008-04-07 22:47:16 +0900417u8 ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900418{
419 struct ata_ioports *ioaddr = &ap->ioaddr;
420 u8 tmp;
421
422 ap->ctl &= ~ATA_NIEN;
423 ap->last_ctl = ap->ctl;
424
Tejun Heof659f0e42008-03-06 13:12:54 +0900425 if (ioaddr->ctl_addr)
426 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +0900427 tmp = ata_wait_idle(ap);
428
Tejun Heo5682ed32008-04-07 22:47:16 +0900429 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900430
431 return tmp;
432}
433
434/**
Tejun Heo9363c382008-04-07 22:47:16 +0900435 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900436 * @ap: Port associated with this ATA transaction.
437 *
438 * Clear interrupt and error flags in DMA status register.
439 *
440 * May be used as the irq_clear() entry in ata_port_operations.
441 *
442 * LOCKING:
443 * spin_lock_irqsave(host lock)
444 */
Tejun Heo9363c382008-04-07 22:47:16 +0900445void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900446{
447 void __iomem *mmio = ap->ioaddr.bmdma_addr;
448
449 if (!mmio)
450 return;
451
452 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
453}
454
455/**
Tejun Heo9363c382008-04-07 22:47:16 +0900456 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500457 * @ap: Port to which output is sent
458 * @tf: ATA taskfile register set
459 *
460 * Outputs ATA taskfile to standard ATA host controller.
461 *
462 * LOCKING:
463 * Inherited from caller.
464 */
Tejun Heo9363c382008-04-07 22:47:16 +0900465void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500466{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900467 struct ata_ioports *ioaddr = &ap->ioaddr;
468 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
469
470 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900471 if (ioaddr->ctl_addr)
472 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900473 ap->last_ctl = tf->ctl;
474 ata_wait_idle(ap);
475 }
476
477 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900478 WARN_ON(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900479 iowrite8(tf->hob_feature, ioaddr->feature_addr);
480 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
481 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
482 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
483 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
484 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
485 tf->hob_feature,
486 tf->hob_nsect,
487 tf->hob_lbal,
488 tf->hob_lbam,
489 tf->hob_lbah);
490 }
491
492 if (is_addr) {
493 iowrite8(tf->feature, ioaddr->feature_addr);
494 iowrite8(tf->nsect, ioaddr->nsect_addr);
495 iowrite8(tf->lbal, ioaddr->lbal_addr);
496 iowrite8(tf->lbam, ioaddr->lbam_addr);
497 iowrite8(tf->lbah, ioaddr->lbah_addr);
498 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
499 tf->feature,
500 tf->nsect,
501 tf->lbal,
502 tf->lbam,
503 tf->lbah);
504 }
505
506 if (tf->flags & ATA_TFLAG_DEVICE) {
507 iowrite8(tf->device, ioaddr->device_addr);
508 VPRINTK("device 0x%X\n", tf->device);
509 }
510
511 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500512}
513
514/**
Tejun Heo9363c382008-04-07 22:47:16 +0900515 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500516 * @ap: Port from which input is read
517 * @tf: ATA taskfile register set for storing input
518 *
519 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000520 * into @tf. Assumes the device has a fully SFF compliant task file
521 * layout and behaviour. If you device does not (eg has a different
522 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500523 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500524 * LOCKING:
525 * Inherited from caller.
526 */
Tejun Heo9363c382008-04-07 22:47:16 +0900527void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500528{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900529 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500530
Tejun Heo9363c382008-04-07 22:47:16 +0900531 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900532 tf->feature = ioread8(ioaddr->error_addr);
533 tf->nsect = ioread8(ioaddr->nsect_addr);
534 tf->lbal = ioread8(ioaddr->lbal_addr);
535 tf->lbam = ioread8(ioaddr->lbam_addr);
536 tf->lbah = ioread8(ioaddr->lbah_addr);
537 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500538
Tejun Heo0d5ff562007-02-01 15:06:36 +0900539 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900540 if (likely(ioaddr->ctl_addr)) {
541 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
542 tf->hob_feature = ioread8(ioaddr->error_addr);
543 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
544 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
545 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
546 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
547 iowrite8(tf->ctl, ioaddr->ctl_addr);
548 ap->last_ctl = tf->ctl;
549 } else
550 WARN_ON(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900551 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500552}
553
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500554/**
Tejun Heo9363c382008-04-07 22:47:16 +0900555 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900556 * @ap: port to which command is being issued
557 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500558 *
Tejun Heo272f7882008-03-25 22:16:40 +0900559 * Issues ATA command, with proper synchronization with interrupt
560 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500561 *
562 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400563 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500564 */
Tejun Heo9363c382008-04-07 22:47:16 +0900565void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500566{
Tejun Heo272f7882008-03-25 22:16:40 +0900567 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500568
Tejun Heo272f7882008-03-25 22:16:40 +0900569 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900570 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500571}
572
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900573/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900574 * ata_tf_to_host - issue ATA taskfile to host controller
575 * @ap: port to which command is being issued
576 * @tf: ATA taskfile register set
577 *
578 * Issues ATA taskfile register set to ATA host controller,
579 * with proper synchronization with interrupt handler and
580 * other threads.
581 *
582 * LOCKING:
583 * spin_lock_irqsave(host lock)
584 */
585static inline void ata_tf_to_host(struct ata_port *ap,
586 const struct ata_taskfile *tf)
587{
Tejun Heo5682ed32008-04-07 22:47:16 +0900588 ap->ops->sff_tf_load(ap, tf);
589 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900590}
591
592/**
Tejun Heo9363c382008-04-07 22:47:16 +0900593 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900594 * @dev: device to target
595 * @buf: data buffer
596 * @buflen: buffer length
597 * @rw: read/write
598 *
599 * Transfer data from/to the device data register by PIO.
600 *
601 * LOCKING:
602 * Inherited from caller.
603 *
604 * RETURNS:
605 * Bytes consumed.
606 */
Tejun Heo9363c382008-04-07 22:47:16 +0900607unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
608 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900609{
610 struct ata_port *ap = dev->link->ap;
611 void __iomem *data_addr = ap->ioaddr.data_addr;
612 unsigned int words = buflen >> 1;
613
614 /* Transfer multiple of 2 bytes */
615 if (rw == READ)
616 ioread16_rep(data_addr, buf, words);
617 else
618 iowrite16_rep(data_addr, buf, words);
619
620 /* Transfer trailing 1 byte, if any. */
621 if (unlikely(buflen & 0x01)) {
622 __le16 align_buf[1] = { 0 };
623 unsigned char *trailing_buf = buf + buflen - 1;
624
625 if (rw == READ) {
626 align_buf[0] = cpu_to_le16(ioread16(data_addr));
627 memcpy(trailing_buf, align_buf, 1);
628 } else {
629 memcpy(align_buf, trailing_buf, 1);
630 iowrite16(le16_to_cpu(align_buf[0]), data_addr);
631 }
632 words++;
633 }
634
635 return words << 1;
636}
637
638/**
Tejun Heo9363c382008-04-07 22:47:16 +0900639 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900640 * @dev: device to target
641 * @buf: data buffer
642 * @buflen: buffer length
643 * @rw: read/write
644 *
645 * Transfer data from/to the device data register by PIO. Do the
646 * transfer with interrupts disabled.
647 *
648 * LOCKING:
649 * Inherited from caller.
650 *
651 * RETURNS:
652 * Bytes consumed.
653 */
Tejun Heo9363c382008-04-07 22:47:16 +0900654unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
655 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900656{
657 unsigned long flags;
658 unsigned int consumed;
659
660 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900661 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900662 local_irq_restore(flags);
663
664 return consumed;
665}
666
667/**
668 * ata_pio_sector - Transfer a sector of data.
669 * @qc: Command on going
670 *
671 * Transfer qc->sect_size bytes of data from/to the ATA device.
672 *
673 * LOCKING:
674 * Inherited from caller.
675 */
676static void ata_pio_sector(struct ata_queued_cmd *qc)
677{
678 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
679 struct ata_port *ap = qc->ap;
680 struct page *page;
681 unsigned int offset;
682 unsigned char *buf;
683
684 if (qc->curbytes == qc->nbytes - qc->sect_size)
685 ap->hsm_task_state = HSM_ST_LAST;
686
687 page = sg_page(qc->cursg);
688 offset = qc->cursg->offset + qc->cursg_ofs;
689
690 /* get the current page and offset */
691 page = nth_page(page, (offset >> PAGE_SHIFT));
692 offset %= PAGE_SIZE;
693
694 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
695
696 if (PageHighMem(page)) {
697 unsigned long flags;
698
699 /* FIXME: use a bounce buffer */
700 local_irq_save(flags);
701 buf = kmap_atomic(page, KM_IRQ0);
702
703 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900704 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
705 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900706
707 kunmap_atomic(buf, KM_IRQ0);
708 local_irq_restore(flags);
709 } else {
710 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900711 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
712 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900713 }
714
715 qc->curbytes += qc->sect_size;
716 qc->cursg_ofs += qc->sect_size;
717
718 if (qc->cursg_ofs == qc->cursg->length) {
719 qc->cursg = sg_next(qc->cursg);
720 qc->cursg_ofs = 0;
721 }
722}
723
724/**
725 * ata_pio_sectors - Transfer one or many sectors.
726 * @qc: Command on going
727 *
728 * Transfer one or many sectors of data from/to the
729 * ATA device for the DRQ request.
730 *
731 * LOCKING:
732 * Inherited from caller.
733 */
734static void ata_pio_sectors(struct ata_queued_cmd *qc)
735{
736 if (is_multi_taskfile(&qc->tf)) {
737 /* READ/WRITE MULTIPLE */
738 unsigned int nsect;
739
740 WARN_ON(qc->dev->multi_count == 0);
741
742 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
743 qc->dev->multi_count);
744 while (nsect--)
745 ata_pio_sector(qc);
746 } else
747 ata_pio_sector(qc);
748
Tejun Heo9363c382008-04-07 22:47:16 +0900749 ata_sff_altstatus(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900750}
751
752/**
753 * atapi_send_cdb - Write CDB bytes to hardware
754 * @ap: Port to which ATAPI device is attached.
755 * @qc: Taskfile currently active
756 *
757 * When device has indicated its readiness to accept
758 * a CDB, this function is called. Send the CDB.
759 *
760 * LOCKING:
761 * caller.
762 */
763static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
764{
765 /* send SCSI cdb */
766 DPRINTK("send cdb\n");
767 WARN_ON(qc->dev->cdb_len < 12);
768
Tejun Heo5682ed32008-04-07 22:47:16 +0900769 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Tejun Heo9363c382008-04-07 22:47:16 +0900770 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900771
772 switch (qc->tf.protocol) {
773 case ATAPI_PROT_PIO:
774 ap->hsm_task_state = HSM_ST;
775 break;
776 case ATAPI_PROT_NODATA:
777 ap->hsm_task_state = HSM_ST_LAST;
778 break;
779 case ATAPI_PROT_DMA:
780 ap->hsm_task_state = HSM_ST_LAST;
781 /* initiate bmdma */
782 ap->ops->bmdma_start(qc);
783 break;
784 }
785}
786
787/**
788 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
789 * @qc: Command on going
790 * @bytes: number of bytes
791 *
792 * Transfer Transfer data from/to the ATAPI device.
793 *
794 * LOCKING:
795 * Inherited from caller.
796 *
797 */
798static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
799{
800 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
801 struct ata_port *ap = qc->ap;
802 struct ata_device *dev = qc->dev;
803 struct ata_eh_info *ehi = &dev->link->eh_info;
804 struct scatterlist *sg;
805 struct page *page;
806 unsigned char *buf;
807 unsigned int offset, count, consumed;
808
809next_sg:
810 sg = qc->cursg;
811 if (unlikely(!sg)) {
812 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
813 "buf=%u cur=%u bytes=%u",
814 qc->nbytes, qc->curbytes, bytes);
815 return -1;
816 }
817
818 page = sg_page(sg);
819 offset = sg->offset + qc->cursg_ofs;
820
821 /* get the current page and offset */
822 page = nth_page(page, (offset >> PAGE_SHIFT));
823 offset %= PAGE_SIZE;
824
825 /* don't overrun current sg */
826 count = min(sg->length - qc->cursg_ofs, bytes);
827
828 /* don't cross page boundaries */
829 count = min(count, (unsigned int)PAGE_SIZE - offset);
830
831 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
832
833 if (PageHighMem(page)) {
834 unsigned long flags;
835
836 /* FIXME: use bounce buffer */
837 local_irq_save(flags);
838 buf = kmap_atomic(page, KM_IRQ0);
839
840 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900841 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900842
843 kunmap_atomic(buf, KM_IRQ0);
844 local_irq_restore(flags);
845 } else {
846 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900847 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900848 }
849
850 bytes -= min(bytes, consumed);
851 qc->curbytes += count;
852 qc->cursg_ofs += count;
853
854 if (qc->cursg_ofs == sg->length) {
855 qc->cursg = sg_next(qc->cursg);
856 qc->cursg_ofs = 0;
857 }
858
859 /* consumed can be larger than count only for the last transfer */
860 WARN_ON(qc->cursg && count != consumed);
861
862 if (bytes)
863 goto next_sg;
864 return 0;
865}
866
867/**
868 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
869 * @qc: Command on going
870 *
871 * Transfer Transfer data from/to the ATAPI device.
872 *
873 * LOCKING:
874 * Inherited from caller.
875 */
876static void atapi_pio_bytes(struct ata_queued_cmd *qc)
877{
878 struct ata_port *ap = qc->ap;
879 struct ata_device *dev = qc->dev;
880 struct ata_eh_info *ehi = &dev->link->eh_info;
881 unsigned int ireason, bc_lo, bc_hi, bytes;
882 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
883
884 /* Abuse qc->result_tf for temp storage of intermediate TF
885 * here to save some kernel stack usage.
886 * For normal completion, qc->result_tf is not relevant. For
887 * error, qc->result_tf is later overwritten by ata_qc_complete().
888 * So, the correctness of qc->result_tf is not affected.
889 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900890 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900891 ireason = qc->result_tf.nsect;
892 bc_lo = qc->result_tf.lbam;
893 bc_hi = qc->result_tf.lbah;
894 bytes = (bc_hi << 8) | bc_lo;
895
896 /* shall be cleared to zero, indicating xfer of data */
897 if (unlikely(ireason & (1 << 0)))
898 goto atapi_check;
899
900 /* make sure transfer direction matches expected */
901 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
902 if (unlikely(do_write != i_write))
903 goto atapi_check;
904
905 if (unlikely(!bytes))
906 goto atapi_check;
907
908 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
909
910 if (unlikely(__atapi_pio_bytes(qc, bytes)))
911 goto err_out;
Tejun Heo9363c382008-04-07 22:47:16 +0900912 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900913
914 return;
915
916 atapi_check:
917 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
918 ireason, bytes);
919 err_out:
920 qc->err_mask |= AC_ERR_HSM;
921 ap->hsm_task_state = HSM_ST_ERR;
922}
923
924/**
925 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
926 * @ap: the target ata_port
927 * @qc: qc on going
928 *
929 * RETURNS:
930 * 1 if ok in workqueue, 0 otherwise.
931 */
932static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
933{
934 if (qc->tf.flags & ATA_TFLAG_POLLING)
935 return 1;
936
937 if (ap->hsm_task_state == HSM_ST_FIRST) {
938 if (qc->tf.protocol == ATA_PROT_PIO &&
939 (qc->tf.flags & ATA_TFLAG_WRITE))
940 return 1;
941
942 if (ata_is_atapi(qc->tf.protocol) &&
943 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
944 return 1;
945 }
946
947 return 0;
948}
949
950/**
951 * ata_hsm_qc_complete - finish a qc running on standard HSM
952 * @qc: Command to complete
953 * @in_wq: 1 if called from workqueue, 0 otherwise
954 *
955 * Finish @qc which is running on standard HSM.
956 *
957 * LOCKING:
958 * If @in_wq is zero, spin_lock_irqsave(host lock).
959 * Otherwise, none on entry and grabs host lock.
960 */
961static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
962{
963 struct ata_port *ap = qc->ap;
964 unsigned long flags;
965
966 if (ap->ops->error_handler) {
967 if (in_wq) {
968 spin_lock_irqsave(ap->lock, flags);
969
970 /* EH might have kicked in while host lock is
971 * released.
972 */
973 qc = ata_qc_from_tag(ap, qc->tag);
974 if (qc) {
975 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Tejun Heo5682ed32008-04-07 22:47:16 +0900976 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900977 ata_qc_complete(qc);
978 } else
979 ata_port_freeze(ap);
980 }
981
982 spin_unlock_irqrestore(ap->lock, flags);
983 } else {
984 if (likely(!(qc->err_mask & AC_ERR_HSM)))
985 ata_qc_complete(qc);
986 else
987 ata_port_freeze(ap);
988 }
989 } else {
990 if (in_wq) {
991 spin_lock_irqsave(ap->lock, flags);
Tejun Heo5682ed32008-04-07 22:47:16 +0900992 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900993 ata_qc_complete(qc);
994 spin_unlock_irqrestore(ap->lock, flags);
995 } else
996 ata_qc_complete(qc);
997 }
998}
999
1000/**
Tejun Heo9363c382008-04-07 22:47:16 +09001001 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001002 * @ap: the target ata_port
1003 * @qc: qc on going
1004 * @status: current device status
1005 * @in_wq: 1 if called from workqueue, 0 otherwise
1006 *
1007 * RETURNS:
1008 * 1 when poll next status needed, 0 otherwise.
1009 */
Tejun Heo9363c382008-04-07 22:47:16 +09001010int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1011 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001012{
1013 unsigned long flags = 0;
1014 int poll_next;
1015
1016 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
1017
Tejun Heo9363c382008-04-07 22:47:16 +09001018 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001019 * like DMA polling into the workqueue. Notice that
1020 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1021 */
1022 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
1023
1024fsm_start:
1025 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1026 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1027
1028 switch (ap->hsm_task_state) {
1029 case HSM_ST_FIRST:
1030 /* Send first data block or PACKET CDB */
1031
1032 /* If polling, we will stay in the work queue after
1033 * sending the data. Otherwise, interrupt handler
1034 * takes over after sending the data.
1035 */
1036 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1037
1038 /* check device status */
1039 if (unlikely((status & ATA_DRQ) == 0)) {
1040 /* handle BSY=0, DRQ=0 as error */
1041 if (likely(status & (ATA_ERR | ATA_DF)))
1042 /* device stops HSM for abort/error */
1043 qc->err_mask |= AC_ERR_DEV;
1044 else
1045 /* HSM violation. Let EH handle this */
1046 qc->err_mask |= AC_ERR_HSM;
1047
1048 ap->hsm_task_state = HSM_ST_ERR;
1049 goto fsm_start;
1050 }
1051
1052 /* Device should not ask for data transfer (DRQ=1)
1053 * when it finds something wrong.
1054 * We ignore DRQ here and stop the HSM by
1055 * changing hsm_task_state to HSM_ST_ERR and
1056 * let the EH abort the command or reset the device.
1057 */
1058 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1059 /* Some ATAPI tape drives forget to clear the ERR bit
1060 * when doing the next command (mostly request sense).
1061 * We ignore ERR here to workaround and proceed sending
1062 * the CDB.
1063 */
1064 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
1065 ata_port_printk(ap, KERN_WARNING,
1066 "DRQ=1 with device error, "
1067 "dev_stat 0x%X\n", status);
1068 qc->err_mask |= AC_ERR_HSM;
1069 ap->hsm_task_state = HSM_ST_ERR;
1070 goto fsm_start;
1071 }
1072 }
1073
1074 /* Send the CDB (atapi) or the first data block (ata pio out).
1075 * During the state transition, interrupt handler shouldn't
1076 * be invoked before the data transfer is complete and
1077 * hsm_task_state is changed. Hence, the following locking.
1078 */
1079 if (in_wq)
1080 spin_lock_irqsave(ap->lock, flags);
1081
1082 if (qc->tf.protocol == ATA_PROT_PIO) {
1083 /* PIO data out protocol.
1084 * send first data block.
1085 */
1086
1087 /* ata_pio_sectors() might change the state
1088 * to HSM_ST_LAST. so, the state is changed here
1089 * before ata_pio_sectors().
1090 */
1091 ap->hsm_task_state = HSM_ST;
1092 ata_pio_sectors(qc);
1093 } else
1094 /* send CDB */
1095 atapi_send_cdb(ap, qc);
1096
1097 if (in_wq)
1098 spin_unlock_irqrestore(ap->lock, flags);
1099
1100 /* if polling, ata_pio_task() handles the rest.
1101 * otherwise, interrupt handler takes over from here.
1102 */
1103 break;
1104
1105 case HSM_ST:
1106 /* complete command or read/write the data register */
1107 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1108 /* ATAPI PIO protocol */
1109 if ((status & ATA_DRQ) == 0) {
1110 /* No more data to transfer or device error.
1111 * Device error will be tagged in HSM_ST_LAST.
1112 */
1113 ap->hsm_task_state = HSM_ST_LAST;
1114 goto fsm_start;
1115 }
1116
1117 /* Device should not ask for data transfer (DRQ=1)
1118 * when it finds something wrong.
1119 * We ignore DRQ here and stop the HSM by
1120 * changing hsm_task_state to HSM_ST_ERR and
1121 * let the EH abort the command or reset the device.
1122 */
1123 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1124 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
1125 "device error, dev_stat 0x%X\n",
1126 status);
1127 qc->err_mask |= AC_ERR_HSM;
1128 ap->hsm_task_state = HSM_ST_ERR;
1129 goto fsm_start;
1130 }
1131
1132 atapi_pio_bytes(qc);
1133
1134 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1135 /* bad ireason reported by device */
1136 goto fsm_start;
1137
1138 } else {
1139 /* ATA PIO protocol */
1140 if (unlikely((status & ATA_DRQ) == 0)) {
1141 /* handle BSY=0, DRQ=0 as error */
1142 if (likely(status & (ATA_ERR | ATA_DF)))
1143 /* device stops HSM for abort/error */
1144 qc->err_mask |= AC_ERR_DEV;
1145 else
1146 /* HSM violation. Let EH handle this.
1147 * Phantom devices also trigger this
1148 * condition. Mark hint.
1149 */
1150 qc->err_mask |= AC_ERR_HSM |
1151 AC_ERR_NODEV_HINT;
1152
1153 ap->hsm_task_state = HSM_ST_ERR;
1154 goto fsm_start;
1155 }
1156
1157 /* For PIO reads, some devices may ask for
1158 * data transfer (DRQ=1) alone with ERR=1.
1159 * We respect DRQ here and transfer one
1160 * block of junk data before changing the
1161 * hsm_task_state to HSM_ST_ERR.
1162 *
1163 * For PIO writes, ERR=1 DRQ=1 doesn't make
1164 * sense since the data block has been
1165 * transferred to the device.
1166 */
1167 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1168 /* data might be corrputed */
1169 qc->err_mask |= AC_ERR_DEV;
1170
1171 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1172 ata_pio_sectors(qc);
1173 status = ata_wait_idle(ap);
1174 }
1175
1176 if (status & (ATA_BUSY | ATA_DRQ))
1177 qc->err_mask |= AC_ERR_HSM;
1178
1179 /* ata_pio_sectors() might change the
1180 * state to HSM_ST_LAST. so, the state
1181 * is changed after ata_pio_sectors().
1182 */
1183 ap->hsm_task_state = HSM_ST_ERR;
1184 goto fsm_start;
1185 }
1186
1187 ata_pio_sectors(qc);
1188
1189 if (ap->hsm_task_state == HSM_ST_LAST &&
1190 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1191 /* all data read */
1192 status = ata_wait_idle(ap);
1193 goto fsm_start;
1194 }
1195 }
1196
1197 poll_next = 1;
1198 break;
1199
1200 case HSM_ST_LAST:
1201 if (unlikely(!ata_ok(status))) {
1202 qc->err_mask |= __ac_err_mask(status);
1203 ap->hsm_task_state = HSM_ST_ERR;
1204 goto fsm_start;
1205 }
1206
1207 /* no more data to transfer */
1208 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1209 ap->print_id, qc->dev->devno, status);
1210
1211 WARN_ON(qc->err_mask);
1212
1213 ap->hsm_task_state = HSM_ST_IDLE;
1214
1215 /* complete taskfile transaction */
1216 ata_hsm_qc_complete(qc, in_wq);
1217
1218 poll_next = 0;
1219 break;
1220
1221 case HSM_ST_ERR:
1222 /* make sure qc->err_mask is available to
1223 * know what's wrong and recover
1224 */
1225 WARN_ON(qc->err_mask == 0);
1226
1227 ap->hsm_task_state = HSM_ST_IDLE;
1228
1229 /* complete taskfile transaction */
1230 ata_hsm_qc_complete(qc, in_wq);
1231
1232 poll_next = 0;
1233 break;
1234 default:
1235 poll_next = 0;
1236 BUG();
1237 }
1238
1239 return poll_next;
1240}
1241
1242void ata_pio_task(struct work_struct *work)
1243{
1244 struct ata_port *ap =
1245 container_of(work, struct ata_port, port_task.work);
1246 struct ata_queued_cmd *qc = ap->port_task_data;
1247 u8 status;
1248 int poll_next;
1249
1250fsm_start:
1251 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
1252
1253 /*
1254 * This is purely heuristic. This is a fast path.
1255 * Sometimes when we enter, BSY will be cleared in
1256 * a chk-status or two. If not, the drive is probably seeking
1257 * or something. Snooze for a couple msecs, then
1258 * chk-status again. If still busy, queue delayed work.
1259 */
Tejun Heo9363c382008-04-07 22:47:16 +09001260 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001261 if (status & ATA_BUSY) {
1262 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001263 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001264 if (status & ATA_BUSY) {
1265 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1266 return;
1267 }
1268 }
1269
1270 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001271 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001272
1273 /* another command or interrupt handler
1274 * may be running at this point.
1275 */
1276 if (poll_next)
1277 goto fsm_start;
1278}
1279
1280/**
Tejun Heo9363c382008-04-07 22:47:16 +09001281 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
Tejun Heo624d5c52008-03-25 22:16:41 +09001282 * @qc: command to issue to device
1283 *
1284 * Using various libata functions and hooks, this function
1285 * starts an ATA command. ATA commands are grouped into
1286 * classes called "protocols", and issuing each type of protocol
1287 * is slightly different.
1288 *
1289 * May be used as the qc_issue() entry in ata_port_operations.
1290 *
1291 * LOCKING:
1292 * spin_lock_irqsave(host lock)
1293 *
1294 * RETURNS:
1295 * Zero on success, AC_ERR_* mask on failure
1296 */
Tejun Heo9363c382008-04-07 22:47:16 +09001297unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001298{
1299 struct ata_port *ap = qc->ap;
1300
1301 /* Use polling pio if the LLD doesn't handle
1302 * interrupt driven pio and atapi CDB interrupt.
1303 */
1304 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1305 switch (qc->tf.protocol) {
1306 case ATA_PROT_PIO:
1307 case ATA_PROT_NODATA:
1308 case ATAPI_PROT_PIO:
1309 case ATAPI_PROT_NODATA:
1310 qc->tf.flags |= ATA_TFLAG_POLLING;
1311 break;
1312 case ATAPI_PROT_DMA:
1313 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1314 /* see ata_dma_blacklisted() */
1315 BUG();
1316 break;
1317 default:
1318 break;
1319 }
1320 }
1321
1322 /* select the device */
1323 ata_dev_select(ap, qc->dev->devno, 1, 0);
1324
1325 /* start the command */
1326 switch (qc->tf.protocol) {
1327 case ATA_PROT_NODATA:
1328 if (qc->tf.flags & ATA_TFLAG_POLLING)
1329 ata_qc_set_polling(qc);
1330
1331 ata_tf_to_host(ap, &qc->tf);
1332 ap->hsm_task_state = HSM_ST_LAST;
1333
1334 if (qc->tf.flags & ATA_TFLAG_POLLING)
1335 ata_pio_queue_task(ap, qc, 0);
1336
1337 break;
1338
1339 case ATA_PROT_DMA:
1340 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1341
Tejun Heo5682ed32008-04-07 22:47:16 +09001342 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001343 ap->ops->bmdma_setup(qc); /* set up bmdma */
1344 ap->ops->bmdma_start(qc); /* initiate bmdma */
1345 ap->hsm_task_state = HSM_ST_LAST;
1346 break;
1347
1348 case ATA_PROT_PIO:
1349 if (qc->tf.flags & ATA_TFLAG_POLLING)
1350 ata_qc_set_polling(qc);
1351
1352 ata_tf_to_host(ap, &qc->tf);
1353
1354 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1355 /* PIO data out protocol */
1356 ap->hsm_task_state = HSM_ST_FIRST;
1357 ata_pio_queue_task(ap, qc, 0);
1358
1359 /* always send first data block using
1360 * the ata_pio_task() codepath.
1361 */
1362 } else {
1363 /* PIO data in protocol */
1364 ap->hsm_task_state = HSM_ST;
1365
1366 if (qc->tf.flags & ATA_TFLAG_POLLING)
1367 ata_pio_queue_task(ap, qc, 0);
1368
1369 /* if polling, ata_pio_task() handles the rest.
1370 * otherwise, interrupt handler takes over from here.
1371 */
1372 }
1373
1374 break;
1375
1376 case ATAPI_PROT_PIO:
1377 case ATAPI_PROT_NODATA:
1378 if (qc->tf.flags & ATA_TFLAG_POLLING)
1379 ata_qc_set_polling(qc);
1380
1381 ata_tf_to_host(ap, &qc->tf);
1382
1383 ap->hsm_task_state = HSM_ST_FIRST;
1384
1385 /* send cdb by polling if no cdb interrupt */
1386 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1387 (qc->tf.flags & ATA_TFLAG_POLLING))
1388 ata_pio_queue_task(ap, qc, 0);
1389 break;
1390
1391 case ATAPI_PROT_DMA:
1392 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1393
Tejun Heo5682ed32008-04-07 22:47:16 +09001394 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001395 ap->ops->bmdma_setup(qc); /* set up bmdma */
1396 ap->hsm_task_state = HSM_ST_FIRST;
1397
1398 /* send cdb by polling if no cdb interrupt */
1399 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1400 ata_pio_queue_task(ap, qc, 0);
1401 break;
1402
1403 default:
1404 WARN_ON(1);
1405 return AC_ERR_SYSTEM;
1406 }
1407
1408 return 0;
1409}
1410
1411/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001412 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1413 * @qc: qc to fill result TF for
1414 *
1415 * @qc is finished and result TF needs to be filled. Fill it
1416 * using ->sff_tf_read.
1417 *
1418 * LOCKING:
1419 * spin_lock_irqsave(host lock)
1420 *
1421 * RETURNS:
1422 * true indicating that result TF is successfully filled.
1423 */
1424bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1425{
1426 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1427 return true;
1428}
1429
1430/**
Tejun Heo9363c382008-04-07 22:47:16 +09001431 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001432 * @ap: Port on which interrupt arrived (possibly...)
1433 * @qc: Taskfile currently active in engine
1434 *
1435 * Handle host interrupt for given queued command. Currently,
1436 * only DMA interrupts are handled. All other commands are
1437 * handled via polling with interrupts disabled (nIEN bit).
1438 *
1439 * LOCKING:
1440 * spin_lock_irqsave(host lock)
1441 *
1442 * RETURNS:
1443 * One if interrupt was handled, zero if not (shared irq).
1444 */
Tejun Heo9363c382008-04-07 22:47:16 +09001445inline unsigned int ata_sff_host_intr(struct ata_port *ap,
1446 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001447{
1448 struct ata_eh_info *ehi = &ap->link.eh_info;
1449 u8 status, host_stat = 0;
1450
1451 VPRINTK("ata%u: protocol %d task_state %d\n",
1452 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1453
1454 /* Check whether we are expecting interrupt in this state */
1455 switch (ap->hsm_task_state) {
1456 case HSM_ST_FIRST:
1457 /* Some pre-ATAPI-4 devices assert INTRQ
1458 * at this state when ready to receive CDB.
1459 */
1460
1461 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1462 * The flag was turned on only for atapi devices. No
1463 * need to check ata_is_atapi(qc->tf.protocol) again.
1464 */
1465 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1466 goto idle_irq;
1467 break;
1468 case HSM_ST_LAST:
1469 if (qc->tf.protocol == ATA_PROT_DMA ||
1470 qc->tf.protocol == ATAPI_PROT_DMA) {
1471 /* check status of DMA engine */
1472 host_stat = ap->ops->bmdma_status(ap);
1473 VPRINTK("ata%u: host_stat 0x%X\n",
1474 ap->print_id, host_stat);
1475
1476 /* if it's not our irq... */
1477 if (!(host_stat & ATA_DMA_INTR))
1478 goto idle_irq;
1479
1480 /* before we do anything else, clear DMA-Start bit */
1481 ap->ops->bmdma_stop(qc);
1482
1483 if (unlikely(host_stat & ATA_DMA_ERR)) {
1484 /* error when transfering data to/from memory */
1485 qc->err_mask |= AC_ERR_HOST_BUS;
1486 ap->hsm_task_state = HSM_ST_ERR;
1487 }
1488 }
1489 break;
1490 case HSM_ST:
1491 break;
1492 default:
1493 goto idle_irq;
1494 }
1495
1496 /* check altstatus */
Tejun Heo9363c382008-04-07 22:47:16 +09001497 status = ata_sff_altstatus(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001498 if (status & ATA_BUSY)
1499 goto idle_irq;
1500
1501 /* check main status, clearing INTRQ */
Tejun Heo5682ed32008-04-07 22:47:16 +09001502 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001503 if (unlikely(status & ATA_BUSY))
1504 goto idle_irq;
1505
1506 /* ack bmdma irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001507 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001508
Tejun Heo9363c382008-04-07 22:47:16 +09001509 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001510
1511 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1512 qc->tf.protocol == ATAPI_PROT_DMA))
1513 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1514
1515 return 1; /* irq handled */
1516
1517idle_irq:
1518 ap->stats.idle_irq++;
1519
1520#ifdef ATA_IRQ_TRAP
1521 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001522 ap->ops->sff_check_status(ap);
1523 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001524 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1525 return 1;
1526 }
1527#endif
1528 return 0; /* irq not handled */
1529}
1530
1531/**
Tejun Heo9363c382008-04-07 22:47:16 +09001532 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001533 * @irq: irq line (unused)
1534 * @dev_instance: pointer to our ata_host information structure
1535 *
1536 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001537 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001538 *
1539 * LOCKING:
1540 * Obtains host lock during operation.
1541 *
1542 * RETURNS:
1543 * IRQ_NONE or IRQ_HANDLED.
1544 */
Tejun Heo9363c382008-04-07 22:47:16 +09001545irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001546{
1547 struct ata_host *host = dev_instance;
1548 unsigned int i;
1549 unsigned int handled = 0;
1550 unsigned long flags;
1551
1552 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1553 spin_lock_irqsave(&host->lock, flags);
1554
1555 for (i = 0; i < host->n_ports; i++) {
1556 struct ata_port *ap;
1557
1558 ap = host->ports[i];
1559 if (ap &&
1560 !(ap->flags & ATA_FLAG_DISABLED)) {
1561 struct ata_queued_cmd *qc;
1562
1563 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1564 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
1565 (qc->flags & ATA_QCFLAG_ACTIVE))
Tejun Heo9363c382008-04-07 22:47:16 +09001566 handled |= ata_sff_host_intr(ap, qc);
Tejun Heo624d5c52008-03-25 22:16:41 +09001567 }
1568 }
1569
1570 spin_unlock_irqrestore(&host->lock, flags);
1571
1572 return IRQ_RETVAL(handled);
1573}
1574
1575/**
Tejun Heo9363c382008-04-07 22:47:16 +09001576 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001577 * @ap: port to freeze
1578 *
1579 * Freeze BMDMA controller port.
1580 *
1581 * LOCKING:
1582 * Inherited from caller.
1583 */
Tejun Heo9363c382008-04-07 22:47:16 +09001584void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001585{
1586 struct ata_ioports *ioaddr = &ap->ioaddr;
1587
1588 ap->ctl |= ATA_NIEN;
1589 ap->last_ctl = ap->ctl;
1590
Tejun Heof659f0e42008-03-06 13:12:54 +09001591 if (ioaddr->ctl_addr)
1592 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001593
1594 /* Under certain circumstances, some controllers raise IRQ on
1595 * ATA_NIEN manipulation. Also, many controllers fail to mask
1596 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1597 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001598 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001599
Tejun Heo5682ed32008-04-07 22:47:16 +09001600 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001601}
1602
1603/**
Tejun Heo9363c382008-04-07 22:47:16 +09001604 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001605 * @ap: port to thaw
1606 *
Tejun Heo9363c382008-04-07 22:47:16 +09001607 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001608 *
1609 * LOCKING:
1610 * Inherited from caller.
1611 */
Tejun Heo9363c382008-04-07 22:47:16 +09001612void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001613{
1614 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001615 ap->ops->sff_check_status(ap);
1616 ap->ops->sff_irq_clear(ap);
1617 ap->ops->sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001618}
1619
1620/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001621 * ata_sff_prereset - prepare SFF link for reset
1622 * @link: SFF link to be reset
1623 * @deadline: deadline jiffies for the operation
1624 *
1625 * SFF link @link is about to be reset. Initialize it. It first
1626 * calls ata_std_prereset() and wait for !BSY if the port is
1627 * being softreset.
1628 *
1629 * LOCKING:
1630 * Kernel thread context (may sleep)
1631 *
1632 * RETURNS:
1633 * 0 on success, -errno otherwise.
1634 */
1635int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1636{
Tejun Heo0aa11132008-04-07 22:47:18 +09001637 struct ata_eh_context *ehc = &link->eh_context;
1638 int rc;
1639
1640 rc = ata_std_prereset(link, deadline);
1641 if (rc)
1642 return rc;
1643
1644 /* if we're about to do hardreset, nothing more to do */
1645 if (ehc->i.action & ATA_EH_HARDRESET)
1646 return 0;
1647
1648 /* wait for !BSY if we don't know that no device is attached */
1649 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001650 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001651 if (rc && rc != -ENODEV) {
1652 ata_link_printk(link, KERN_WARNING, "device not ready "
1653 "(errno=%d), forcing hardreset\n", rc);
1654 ehc->i.action |= ATA_EH_HARDRESET;
1655 }
1656 }
1657
1658 return 0;
1659}
1660
1661/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001662 * ata_devchk - PATA device presence detection
1663 * @ap: ATA channel to examine
1664 * @device: Device to examine (starting at zero)
1665 *
1666 * This technique was originally described in
1667 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1668 * later found its way into the ATA/ATAPI spec.
1669 *
1670 * Write a pattern to the ATA shadow registers,
1671 * and if a device is present, it will respond by
1672 * correctly storing and echoing back the
1673 * ATA shadow register contents.
1674 *
1675 * LOCKING:
1676 * caller.
1677 */
1678static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1679{
1680 struct ata_ioports *ioaddr = &ap->ioaddr;
1681 u8 nsect, lbal;
1682
Tejun Heo5682ed32008-04-07 22:47:16 +09001683 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001684
1685 iowrite8(0x55, ioaddr->nsect_addr);
1686 iowrite8(0xaa, ioaddr->lbal_addr);
1687
1688 iowrite8(0xaa, ioaddr->nsect_addr);
1689 iowrite8(0x55, ioaddr->lbal_addr);
1690
1691 iowrite8(0x55, ioaddr->nsect_addr);
1692 iowrite8(0xaa, ioaddr->lbal_addr);
1693
1694 nsect = ioread8(ioaddr->nsect_addr);
1695 lbal = ioread8(ioaddr->lbal_addr);
1696
1697 if ((nsect == 0x55) && (lbal == 0xaa))
1698 return 1; /* we found a device */
1699
1700 return 0; /* nothing found */
1701}
1702
1703/**
Tejun Heo9363c382008-04-07 22:47:16 +09001704 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001705 * @dev: ATA device to classify (starting at zero)
1706 * @present: device seems present
1707 * @r_err: Value of error register on completion
1708 *
1709 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1710 * an ATA/ATAPI-defined set of values is placed in the ATA
1711 * shadow registers, indicating the results of device detection
1712 * and diagnostics.
1713 *
1714 * Select the ATA device, and read the values from the ATA shadow
1715 * registers. Then parse according to the Error register value,
1716 * and the spec-defined values examined by ata_dev_classify().
1717 *
1718 * LOCKING:
1719 * caller.
1720 *
1721 * RETURNS:
1722 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1723 */
Tejun Heo9363c382008-04-07 22:47:16 +09001724unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001725 u8 *r_err)
1726{
1727 struct ata_port *ap = dev->link->ap;
1728 struct ata_taskfile tf;
1729 unsigned int class;
1730 u8 err;
1731
Tejun Heo5682ed32008-04-07 22:47:16 +09001732 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001733
1734 memset(&tf, 0, sizeof(tf));
1735
Tejun Heo5682ed32008-04-07 22:47:16 +09001736 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001737 err = tf.feature;
1738 if (r_err)
1739 *r_err = err;
1740
1741 /* see if device passed diags: continue and warn later */
1742 if (err == 0)
1743 /* diagnostic fail : do nothing _YET_ */
1744 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1745 else if (err == 1)
1746 /* do nothing */ ;
1747 else if ((dev->devno == 0) && (err == 0x81))
1748 /* do nothing */ ;
1749 else
1750 return ATA_DEV_NONE;
1751
1752 /* determine if device is ATA or ATAPI */
1753 class = ata_dev_classify(&tf);
1754
1755 if (class == ATA_DEV_UNKNOWN) {
1756 /* If the device failed diagnostic, it's likely to
1757 * have reported incorrect device signature too.
1758 * Assume ATA device if the device seems present but
1759 * device signature is invalid with diagnostic
1760 * failure.
1761 */
1762 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1763 class = ATA_DEV_ATA;
1764 else
1765 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001766 } else if ((class == ATA_DEV_ATA) &&
1767 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001768 class = ATA_DEV_NONE;
1769
1770 return class;
1771}
1772
Tejun Heo705e76b2008-04-07 22:47:19 +09001773/**
1774 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1775 * @link: SFF link which is just reset
1776 * @devmask: mask of present devices
1777 * @deadline: deadline jiffies for the operation
1778 *
1779 * Wait devices attached to SFF @link to become ready after
1780 * reset. It contains preceding 150ms wait to avoid accessing TF
1781 * status register too early.
1782 *
1783 * LOCKING:
1784 * Kernel thread context (may sleep).
1785 *
1786 * RETURNS:
1787 * 0 on success, -ENODEV if some or all of devices in @devmask
1788 * don't seem to exist. -errno on other errors.
1789 */
1790int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1791 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001792{
Tejun Heo705e76b2008-04-07 22:47:19 +09001793 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001794 struct ata_ioports *ioaddr = &ap->ioaddr;
1795 unsigned int dev0 = devmask & (1 << 0);
1796 unsigned int dev1 = devmask & (1 << 1);
1797 int rc, ret = 0;
1798
Tejun Heo705e76b2008-04-07 22:47:19 +09001799 msleep(ATA_WAIT_AFTER_RESET_MSECS);
1800
1801 /* always check readiness of the master device */
1802 rc = ata_sff_wait_ready(link, deadline);
1803 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1804 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001805 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001806 if (rc)
1807 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001808
1809 /* if device 1 was found in ata_devchk, wait for register
1810 * access briefly, then wait for BSY to clear.
1811 */
1812 if (dev1) {
1813 int i;
1814
Tejun Heo5682ed32008-04-07 22:47:16 +09001815 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001816
1817 /* Wait for register access. Some ATAPI devices fail
1818 * to set nsect/lbal after reset, so don't waste too
1819 * much time on it. We're gonna wait for !BSY anyway.
1820 */
1821 for (i = 0; i < 2; i++) {
1822 u8 nsect, lbal;
1823
1824 nsect = ioread8(ioaddr->nsect_addr);
1825 lbal = ioread8(ioaddr->lbal_addr);
1826 if ((nsect == 1) && (lbal == 1))
1827 break;
1828 msleep(50); /* give drive a breather */
1829 }
1830
Tejun Heo705e76b2008-04-07 22:47:19 +09001831 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001832 if (rc) {
1833 if (rc != -ENODEV)
1834 return rc;
1835 ret = rc;
1836 }
1837 }
1838
1839 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001840 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001841 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001842 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001843 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001844 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001845
1846 return ret;
1847}
1848
Tejun Heo624d5c52008-03-25 22:16:41 +09001849static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1850 unsigned long deadline)
1851{
1852 struct ata_ioports *ioaddr = &ap->ioaddr;
1853
1854 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
1855
1856 /* software reset. causes dev0 to be selected */
1857 iowrite8(ap->ctl, ioaddr->ctl_addr);
1858 udelay(20); /* FIXME: flush */
1859 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1860 udelay(20); /* FIXME: flush */
1861 iowrite8(ap->ctl, ioaddr->ctl_addr);
1862
Tejun Heo705e76b2008-04-07 22:47:19 +09001863 /* wait the port to become ready */
1864 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001865}
1866
1867/**
Tejun Heo9363c382008-04-07 22:47:16 +09001868 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09001869 * @link: ATA link to reset
1870 * @classes: resulting classes of attached devices
1871 * @deadline: deadline jiffies for the operation
1872 *
1873 * Reset host port using ATA SRST.
1874 *
1875 * LOCKING:
1876 * Kernel thread context (may sleep)
1877 *
1878 * RETURNS:
1879 * 0 on success, -errno otherwise.
1880 */
Tejun Heo9363c382008-04-07 22:47:16 +09001881int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09001882 unsigned long deadline)
1883{
1884 struct ata_port *ap = link->ap;
1885 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1886 unsigned int devmask = 0;
1887 int rc;
1888 u8 err;
1889
1890 DPRINTK("ENTER\n");
1891
1892 if (ata_link_offline(link)) {
1893 classes[0] = ATA_DEV_NONE;
1894 goto out;
1895 }
1896
1897 /* determine if device 0/1 are present */
1898 if (ata_devchk(ap, 0))
1899 devmask |= (1 << 0);
1900 if (slave_possible && ata_devchk(ap, 1))
1901 devmask |= (1 << 1);
1902
1903 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09001904 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001905
1906 /* issue bus reset */
1907 DPRINTK("about to softreset, devmask=%x\n", devmask);
1908 rc = ata_bus_softreset(ap, devmask, deadline);
1909 /* if link is occupied, -ENODEV too is an error */
1910 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
1911 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
1912 return rc;
1913 }
1914
1915 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09001916 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09001917 devmask & (1 << 0), &err);
1918 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09001919 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09001920 devmask & (1 << 1), &err);
1921
1922 out:
1923 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
1924 return 0;
1925}
1926
1927/**
Tejun Heo9363c382008-04-07 22:47:16 +09001928 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09001929 * @link: link to reset
1930 * @class: resulting class of attached device
1931 * @deadline: deadline jiffies for the operation
1932 *
1933 * SATA phy-reset host port using DET bits of SControl register,
1934 * wait for !BSY and classify the attached device.
1935 *
1936 * LOCKING:
1937 * Kernel thread context (may sleep)
1938 *
1939 * RETURNS:
1940 * 0 on success, -errno otherwise.
1941 */
Tejun Heo9363c382008-04-07 22:47:16 +09001942int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09001943 unsigned long deadline)
1944{
Tejun Heo9dadd452008-04-07 22:47:19 +09001945 struct ata_eh_context *ehc = &link->eh_context;
1946 const unsigned long *timing = sata_ehc_deb_timing(ehc);
1947 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09001948 int rc;
1949
Tejun Heo9dadd452008-04-07 22:47:19 +09001950 rc = sata_link_hardreset(link, timing, deadline, &online,
1951 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09001952 if (online)
1953 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09001954
1955 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09001956 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001957}
1958
1959/**
Tejun Heo203c75b2008-04-07 22:47:18 +09001960 * ata_sff_postreset - SFF postreset callback
1961 * @link: the target SFF ata_link
1962 * @classes: classes of attached devices
1963 *
1964 * This function is invoked after a successful reset. It first
1965 * calls ata_std_postreset() and performs SFF specific postreset
1966 * processing.
1967 *
1968 * LOCKING:
1969 * Kernel thread context (may sleep)
1970 */
1971void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
1972{
1973 struct ata_port *ap = link->ap;
1974
1975 ata_std_postreset(link, classes);
1976
1977 /* is double-select really necessary? */
1978 if (classes[0] != ATA_DEV_NONE)
1979 ap->ops->sff_dev_select(ap, 1);
1980 if (classes[1] != ATA_DEV_NONE)
1981 ap->ops->sff_dev_select(ap, 0);
1982
1983 /* bail out if no device is present */
1984 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
1985 DPRINTK("EXIT, no device\n");
1986 return;
1987 }
1988
1989 /* set up device control */
1990 if (ap->ioaddr.ctl_addr)
1991 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
1992}
1993
1994/**
Tejun Heo9363c382008-04-07 22:47:16 +09001995 * ata_sff_error_handler - Stock error handler for BMDMA controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001996 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001997 *
Tejun Heo9363c382008-04-07 22:47:16 +09001998 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001999 * PATA and SATA controllers. Many controllers should be able to
2000 * use this EH as-is or with some added handling before and
2001 * after.
2002 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002003 * LOCKING:
2004 * Kernel thread context (may sleep)
2005 */
Tejun Heo9363c382008-04-07 22:47:16 +09002006void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002007{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002008 ata_reset_fn_t softreset = ap->ops->softreset;
2009 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002010 struct ata_queued_cmd *qc;
2011 unsigned long flags;
2012 int thaw = 0;
2013
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002014 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002015 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2016 qc = NULL;
2017
2018 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -04002019 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002020
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002021 ap->hsm_task_state = HSM_ST_IDLE;
2022
Tejun Heoed82f962008-03-25 21:34:39 +09002023 if (ap->ioaddr.bmdma_addr &&
2024 qc && (qc->tf.protocol == ATA_PROT_DMA ||
Tejun Heo0dc36882007-12-18 16:34:43 -05002025 qc->tf.protocol == ATAPI_PROT_DMA)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002026 u8 host_stat;
2027
Robert Hancockfbbb2622006-10-27 19:08:41 -07002028 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002029
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002030 /* BMDMA controllers indicate host bus error by
2031 * setting DMA_ERR bit and timing out. As it wasn't
2032 * really a timeout event, adjust error mask and
2033 * cancel frozen state.
2034 */
Alan18d90de2007-01-24 11:42:38 +00002035 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002036 qc->err_mask = AC_ERR_HOST_BUS;
2037 thaw = 1;
2038 }
2039
2040 ap->ops->bmdma_stop(qc);
2041 }
2042
Tejun Heo9363c382008-04-07 22:47:16 +09002043 ata_sff_altstatus(ap);
Tejun Heo5682ed32008-04-07 22:47:16 +09002044 ap->ops->sff_check_status(ap);
2045 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002046
Jeff Garzikba6a1302006-06-22 23:46:10 -04002047 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002048
2049 if (thaw)
2050 ata_eh_thaw_port(ap);
2051
2052 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002053
Tejun Heo57c9efd2008-04-07 22:47:19 +09002054 /* Ignore ata_sff_softreset if ctl isn't accessible and
2055 * built-in hardresets if SCR access isn't available.
Tejun Heoa1efdab2008-03-25 12:22:50 +09002056 */
Tejun Heo9363c382008-04-07 22:47:16 +09002057 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002058 softreset = NULL;
Tejun Heo57c9efd2008-04-07 22:47:19 +09002059 if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002060 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002061
Tejun Heoa1efdab2008-03-25 12:22:50 +09002062 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2063 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002064}
2065
2066/**
Tejun Heo9363c382008-04-07 22:47:16 +09002067 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002068 * @qc: internal command to clean up
2069 *
2070 * LOCKING:
2071 * Kernel thread context (may sleep)
2072 */
Tejun Heo9363c382008-04-07 22:47:16 +09002073void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002074{
Alan61dd08c2007-01-25 15:09:05 +00002075 if (qc->ap->ioaddr.bmdma_addr)
2076 ata_bmdma_stop(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002077}
2078
Alan Coxd92e74d2007-06-07 16:19:15 +01002079/**
2080 * ata_sff_port_start - Set port up for dma.
2081 * @ap: Port to initialize
2082 *
2083 * Called just after data structures for each port are
2084 * initialized. Allocates space for PRD table if the device
2085 * is DMA capable SFF.
2086 *
2087 * May be used as the port_start() entry in ata_port_operations.
2088 *
2089 * LOCKING:
2090 * Inherited from caller.
2091 */
Alan Coxd92e74d2007-06-07 16:19:15 +01002092int ata_sff_port_start(struct ata_port *ap)
2093{
2094 if (ap->ioaddr.bmdma_addr)
2095 return ata_port_start(ap);
2096 return 0;
2097}
2098
Tejun Heo272f7882008-03-25 22:16:40 +09002099/**
Tejun Heo9363c382008-04-07 22:47:16 +09002100 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002101 * @ioaddr: IO address structure to be initialized
2102 *
2103 * Utility function which initializes data_addr, error_addr,
2104 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2105 * device_addr, status_addr, and command_addr to standard offsets
2106 * relative to cmd_addr.
2107 *
2108 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2109 */
Tejun Heo9363c382008-04-07 22:47:16 +09002110void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002111{
2112 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2113 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2114 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2115 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2116 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2117 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2118 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2119 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2120 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2121 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2122}
2123
Tejun Heo9363c382008-04-07 22:47:16 +09002124unsigned long ata_bmdma_mode_filter(struct ata_device *adev,
2125 unsigned long xfer_mask)
Tejun Heo071ce342008-03-25 22:16:42 +09002126{
2127 /* Filter out DMA modes if the device has been configured by
2128 the BIOS as PIO only */
2129
2130 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
2131 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2132 return xfer_mask;
2133}
2134
Tejun Heo624d5c52008-03-25 22:16:41 +09002135/**
Tejun Heo272f7882008-03-25 22:16:40 +09002136 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2137 * @qc: Info associated with this ATA transaction.
2138 *
2139 * LOCKING:
2140 * spin_lock_irqsave(host lock)
2141 */
2142void ata_bmdma_setup(struct ata_queued_cmd *qc)
2143{
2144 struct ata_port *ap = qc->ap;
2145 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2146 u8 dmactl;
2147
2148 /* load PRD table addr. */
2149 mb(); /* make sure PRD table writes are visible to controller */
2150 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2151
2152 /* specify data direction, triple-check start bit is clear */
2153 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2154 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2155 if (!rw)
2156 dmactl |= ATA_DMA_WR;
2157 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2158
2159 /* issue r/w command */
Tejun Heo5682ed32008-04-07 22:47:16 +09002160 ap->ops->sff_exec_command(ap, &qc->tf);
Tejun Heo272f7882008-03-25 22:16:40 +09002161}
2162
2163/**
2164 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2165 * @qc: Info associated with this ATA transaction.
2166 *
2167 * LOCKING:
2168 * spin_lock_irqsave(host lock)
2169 */
2170void ata_bmdma_start(struct ata_queued_cmd *qc)
2171{
2172 struct ata_port *ap = qc->ap;
2173 u8 dmactl;
2174
2175 /* start host DMA transaction */
2176 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2177 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2178
2179 /* Strictly, one may wish to issue an ioread8() here, to
2180 * flush the mmio write. However, control also passes
2181 * to the hardware at this point, and it will interrupt
2182 * us when we are to resume control. So, in effect,
2183 * we don't care when the mmio write flushes.
2184 * Further, a read of the DMA status register _immediately_
2185 * following the write may not be what certain flaky hardware
2186 * is expected, so I think it is best to not add a readb()
2187 * without first all the MMIO ATA cards/mobos.
2188 * Or maybe I'm just being paranoid.
2189 *
2190 * FIXME: The posting of this write means I/O starts are
2191 * unneccessarily delayed for MMIO
2192 */
2193}
2194
2195/**
2196 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2197 * @qc: Command we are ending DMA for
2198 *
2199 * Clears the ATA_DMA_START flag in the dma control register
2200 *
2201 * May be used as the bmdma_stop() entry in ata_port_operations.
2202 *
2203 * LOCKING:
2204 * spin_lock_irqsave(host lock)
2205 */
2206void ata_bmdma_stop(struct ata_queued_cmd *qc)
2207{
2208 struct ata_port *ap = qc->ap;
2209 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2210
2211 /* clear start/stop bit */
2212 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2213 mmio + ATA_DMA_CMD);
2214
2215 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
Tejun Heo9363c382008-04-07 22:47:16 +09002216 ata_sff_altstatus(ap); /* dummy read */
Tejun Heo272f7882008-03-25 22:16:40 +09002217}
2218
2219/**
2220 * ata_bmdma_status - Read PCI IDE BMDMA status
2221 * @ap: Port associated with this ATA transaction.
2222 *
2223 * Read and return BMDMA status register.
2224 *
2225 * May be used as the bmdma_status() entry in ata_port_operations.
2226 *
2227 * LOCKING:
2228 * spin_lock_irqsave(host lock)
2229 */
2230u8 ata_bmdma_status(struct ata_port *ap)
2231{
2232 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2233}
2234
2235/**
Tejun Heo624d5c52008-03-25 22:16:41 +09002236 * ata_bus_reset - reset host port and associated ATA channel
2237 * @ap: port to reset
2238 *
2239 * This is typically the first time we actually start issuing
2240 * commands to the ATA channel. We wait for BSY to clear, then
2241 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2242 * result. Determine what devices, if any, are on the channel
2243 * by looking at the device 0/1 error register. Look at the signature
2244 * stored in each device's taskfile registers, to determine if
2245 * the device is ATA or ATAPI.
2246 *
2247 * LOCKING:
2248 * PCI/etc. bus probe sem.
2249 * Obtains host lock.
2250 *
2251 * SIDE EFFECTS:
2252 * Sets ATA_FLAG_DISABLED if bus reset fails.
2253 *
2254 * DEPRECATED:
2255 * This function is only for drivers which still use old EH and
2256 * will be removed soon.
Tejun Heo272f7882008-03-25 22:16:40 +09002257 */
Tejun Heo624d5c52008-03-25 22:16:41 +09002258void ata_bus_reset(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +09002259{
Tejun Heo624d5c52008-03-25 22:16:41 +09002260 struct ata_device *device = ap->link.device;
2261 struct ata_ioports *ioaddr = &ap->ioaddr;
2262 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2263 u8 err;
2264 unsigned int dev0, dev1 = 0, devmask = 0;
2265 int rc;
2266
2267 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2268
2269 /* determine if device 0/1 are present */
2270 if (ap->flags & ATA_FLAG_SATA_RESET)
2271 dev0 = 1;
2272 else {
2273 dev0 = ata_devchk(ap, 0);
2274 if (slave_possible)
2275 dev1 = ata_devchk(ap, 1);
2276 }
2277
2278 if (dev0)
2279 devmask |= (1 << 0);
2280 if (dev1)
2281 devmask |= (1 << 1);
2282
2283 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002284 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002285
2286 /* issue bus reset */
2287 if (ap->flags & ATA_FLAG_SRST) {
2288 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
2289 if (rc && rc != -ENODEV)
2290 goto err_out;
2291 }
2292
2293 /*
2294 * determine by signature whether we have ATA or ATAPI devices
2295 */
Tejun Heo9363c382008-04-07 22:47:16 +09002296 device[0].class = ata_sff_dev_classify(&device[0], dev0, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002297 if ((slave_possible) && (err != 0x81))
Tejun Heo9363c382008-04-07 22:47:16 +09002298 device[1].class = ata_sff_dev_classify(&device[1], dev1, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002299
2300 /* is double-select really necessary? */
2301 if (device[1].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002302 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002303 if (device[0].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002304 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002305
2306 /* if no devices were detected, disable this port */
2307 if ((device[0].class == ATA_DEV_NONE) &&
2308 (device[1].class == ATA_DEV_NONE))
2309 goto err_out;
2310
2311 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2312 /* set up device control for ATA_FLAG_SATA_RESET */
2313 iowrite8(ap->ctl, ioaddr->ctl_addr);
2314 }
2315
2316 DPRINTK("EXIT\n");
2317 return;
2318
2319err_out:
2320 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2321 ata_port_disable(ap);
2322
2323 DPRINTK("EXIT\n");
Tejun Heo272f7882008-03-25 22:16:40 +09002324}
2325
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002326#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002327
Tejun Heo272f7882008-03-25 22:16:40 +09002328/**
Tejun Heo9363c382008-04-07 22:47:16 +09002329 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
Tejun Heo272f7882008-03-25 22:16:40 +09002330 * @pdev: PCI device
2331 *
2332 * Some PCI ATA devices report simplex mode but in fact can be told to
2333 * enter non simplex mode. This implements the necessary logic to
2334 * perform the task on such devices. Calling it on other devices will
2335 * have -undefined- behaviour.
2336 */
Tejun Heo9363c382008-04-07 22:47:16 +09002337int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
Alan4112e162007-01-08 12:10:05 +00002338{
Tejun Heo272f7882008-03-25 22:16:40 +09002339 unsigned long bmdma = pci_resource_start(pdev, 4);
2340 u8 simplex;
Jeff Garzika84471f2007-02-26 05:51:33 -05002341
Tejun Heo272f7882008-03-25 22:16:40 +09002342 if (bmdma == 0)
2343 return -ENOENT;
2344
2345 simplex = inb(bmdma + 0x02);
2346 outb(simplex & 0x60, bmdma + 0x02);
2347 simplex = inb(bmdma + 0x02);
2348 if (simplex & 0x80)
2349 return -EOPNOTSUPP;
2350 return 0;
2351}
2352
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002353/**
Tejun Heo9363c382008-04-07 22:47:16 +09002354 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
Tejun Heo0f834de2007-04-17 23:44:07 +09002355 * @host: target ATA host
2356 *
2357 * Acquire PCI BMDMA resources and initialize @host accordingly.
2358 *
2359 * LOCKING:
2360 * Inherited from calling layer (may sleep).
2361 *
2362 * RETURNS:
2363 * 0 on success, -errno otherwise.
2364 */
Tejun Heo9363c382008-04-07 22:47:16 +09002365int ata_pci_bmdma_init(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002366{
Tejun Heo0f834de2007-04-17 23:44:07 +09002367 struct device *gdev = host->dev;
2368 struct pci_dev *pdev = to_pci_dev(gdev);
2369 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002370
Alan Cox6fdc99a2007-07-26 18:41:30 +01002371 /* No BAR4 allocation: No DMA */
2372 if (pci_resource_start(pdev, 4) == 0)
2373 return 0;
2374
Tejun Heo0f834de2007-04-17 23:44:07 +09002375 /* TODO: If we get no DMA mask we should fall back to PIO */
2376 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
2377 if (rc)
2378 return rc;
2379 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
2380 if (rc)
2381 return rc;
2382
2383 /* request and iomap DMA region */
Tejun Heo35a10a82008-01-04 18:42:21 +09002384 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
Tejun Heo0f834de2007-04-17 23:44:07 +09002385 if (rc) {
2386 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
2387 return -ENOMEM;
2388 }
2389 host->iomap = pcim_iomap_table(pdev);
2390
Tejun Heo1626aeb2007-05-04 12:43:58 +02002391 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +09002392 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +09002393 void __iomem *bmdma = host->iomap[4] + 8 * i;
2394
2395 if (ata_port_is_dummy(ap))
2396 continue;
2397
Tejun Heo21b0ad42007-04-17 23:44:07 +09002398 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +09002399 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
2400 (ioread8(bmdma + 2) & 0x80))
2401 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heocbcdd872007-08-18 13:14:55 +09002402
2403 ata_port_desc(ap, "bmdma 0x%llx",
2404 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
Tejun Heo0d5ff562007-02-01 15:06:36 +09002405 }
2406
Tejun Heo0f834de2007-04-17 23:44:07 +09002407 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002408}
2409
Tejun Heo272f7882008-03-25 22:16:40 +09002410static int ata_resources_present(struct pci_dev *pdev, int port)
2411{
2412 int i;
2413
2414 /* Check the PCI resources for this channel are enabled */
2415 port = port * 2;
2416 for (i = 0; i < 2; i ++) {
2417 if (pci_resource_start(pdev, port + i) == 0 ||
2418 pci_resource_len(pdev, port + i) == 0)
2419 return 0;
2420 }
2421 return 1;
2422}
2423
Tejun Heod491b272007-04-17 23:44:07 +09002424/**
Tejun Heo9363c382008-04-07 22:47:16 +09002425 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002426 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002427 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002428 * Acquire native PCI ATA resources for @host and initialize the
2429 * first two ports of @host accordingly. Ports marked dummy are
2430 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002431 *
Tejun Heod583bc12007-07-04 18:02:07 +09002432 * Note that native PCI resources are valid even for legacy hosts
2433 * as we fix up pdev resources array early in boot, so this
2434 * function can be used for both native and legacy SFF hosts.
2435 *
Tejun Heod491b272007-04-17 23:44:07 +09002436 * LOCKING:
2437 * Inherited from calling layer (may sleep).
2438 *
2439 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002440 * 0 if at least one port is initialized, -ENODEV if no port is
2441 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002442 */
Tejun Heo9363c382008-04-07 22:47:16 +09002443int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002444{
2445 struct device *gdev = host->dev;
2446 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002447 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002448 int i, rc;
2449
Tejun Heod491b272007-04-17 23:44:07 +09002450 /* request, iomap BARs and init port addresses accordingly */
2451 for (i = 0; i < 2; i++) {
2452 struct ata_port *ap = host->ports[i];
2453 int base = i * 2;
2454 void __iomem * const *iomap;
2455
Tejun Heo1626aeb2007-05-04 12:43:58 +02002456 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002457 continue;
2458
Tejun Heo1626aeb2007-05-04 12:43:58 +02002459 /* Discard disabled ports. Some controllers show
2460 * their unused channels this way. Disabled ports are
2461 * made dummy.
2462 */
2463 if (!ata_resources_present(pdev, i)) {
2464 ap->ops = &ata_dummy_port_ops;
2465 continue;
2466 }
2467
Tejun Heo35a10a82008-01-04 18:42:21 +09002468 rc = pcim_iomap_regions(pdev, 0x3 << base,
2469 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002470 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002471 dev_printk(KERN_WARNING, gdev,
2472 "failed to request/iomap BARs for port %d "
2473 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002474 if (rc == -EBUSY)
2475 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002476 ap->ops = &ata_dummy_port_ops;
2477 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002478 }
2479 host->iomap = iomap = pcim_iomap_table(pdev);
2480
2481 ap->ioaddr.cmd_addr = iomap[base];
2482 ap->ioaddr.altstatus_addr =
2483 ap->ioaddr.ctl_addr = (void __iomem *)
2484 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002485 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002486
Tejun Heocbcdd872007-08-18 13:14:55 +09002487 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2488 (unsigned long long)pci_resource_start(pdev, base),
2489 (unsigned long long)pci_resource_start(pdev, base + 1));
2490
Tejun Heo1626aeb2007-05-04 12:43:58 +02002491 mask |= 1 << i;
2492 }
2493
2494 if (!mask) {
2495 dev_printk(KERN_ERR, gdev, "no available native port\n");
2496 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002497 }
2498
2499 return 0;
2500}
2501
Tejun Heo21b0ad42007-04-17 23:44:07 +09002502/**
Tejun Heo9363c382008-04-07 22:47:16 +09002503 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002504 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002505 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002506 * @r_host: out argument for the initialized ATA host
2507 *
2508 * Helper to allocate ATA host for @pdev, acquire all native PCI
2509 * resources and initialize it accordingly in one go.
2510 *
2511 * LOCKING:
2512 * Inherited from calling layer (may sleep).
2513 *
2514 * RETURNS:
2515 * 0 on success, -errno otherwise.
2516 */
Tejun Heo9363c382008-04-07 22:47:16 +09002517int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Tejun Heod583bc12007-07-04 18:02:07 +09002518 const struct ata_port_info * const * ppi,
2519 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002520{
2521 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002522 int rc;
2523
2524 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2525 return -ENOMEM;
2526
2527 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2528 if (!host) {
2529 dev_printk(KERN_ERR, &pdev->dev,
2530 "failed to allocate ATA host\n");
2531 rc = -ENOMEM;
2532 goto err_out;
2533 }
2534
Tejun Heo9363c382008-04-07 22:47:16 +09002535 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002536 if (rc)
2537 goto err_out;
2538
2539 /* init DMA related stuff */
Tejun Heo9363c382008-04-07 22:47:16 +09002540 rc = ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002541 if (rc)
2542 goto err_bmdma;
2543
2544 devres_remove_group(&pdev->dev, NULL);
2545 *r_host = host;
2546 return 0;
2547
2548 err_bmdma:
2549 /* This is necessary because PCI and iomap resources are
2550 * merged and releasing the top group won't release the
2551 * acquired resources if some of those have been acquired
2552 * before entering this function.
2553 */
2554 pcim_iounmap_regions(pdev, 0xf);
2555 err_out:
2556 devres_release_group(&pdev->dev, NULL);
2557 return rc;
2558}
2559
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002560/**
Tejun Heo9363c382008-04-07 22:47:16 +09002561 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002562 * @host: target SFF ATA host
2563 * @irq_handler: irq_handler used when requesting IRQ(s)
2564 * @sht: scsi_host_template to use when registering the host
2565 *
2566 * This is the counterpart of ata_host_activate() for SFF ATA
2567 * hosts. This separate helper is necessary because SFF hosts
2568 * use two separate interrupts in legacy mode.
2569 *
2570 * LOCKING:
2571 * Inherited from calling layer (may sleep).
2572 *
2573 * RETURNS:
2574 * 0 on success, -errno otherwise.
2575 */
Tejun Heo9363c382008-04-07 22:47:16 +09002576int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002577 irq_handler_t irq_handler,
2578 struct scsi_host_template *sht)
2579{
2580 struct device *dev = host->dev;
2581 struct pci_dev *pdev = to_pci_dev(dev);
2582 const char *drv_name = dev_driver_string(host->dev);
2583 int legacy_mode = 0, rc;
2584
2585 rc = ata_host_start(host);
2586 if (rc)
2587 return rc;
2588
2589 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2590 u8 tmp8, mask;
2591
2592 /* TODO: What if one channel is in native mode ... */
2593 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2594 mask = (1 << 2) | (1 << 0);
2595 if ((tmp8 & mask) != mask)
2596 legacy_mode = 1;
2597#if defined(CONFIG_NO_ATA_LEGACY)
2598 /* Some platforms with PCI limits cannot address compat
2599 port space. In that case we punt if their firmware has
2600 left a device in compatibility mode */
2601 if (legacy_mode) {
2602 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2603 return -EOPNOTSUPP;
2604 }
2605#endif
2606 }
2607
2608 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2609 return -ENOMEM;
2610
2611 if (!legacy_mode && pdev->irq) {
2612 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2613 IRQF_SHARED, drv_name, host);
2614 if (rc)
2615 goto out;
2616
2617 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
2618 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
2619 } else if (legacy_mode) {
2620 if (!ata_port_is_dummy(host->ports[0])) {
2621 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2622 irq_handler, IRQF_SHARED,
2623 drv_name, host);
2624 if (rc)
2625 goto out;
2626
2627 ata_port_desc(host->ports[0], "irq %d",
2628 ATA_PRIMARY_IRQ(pdev));
2629 }
2630
2631 if (!ata_port_is_dummy(host->ports[1])) {
2632 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2633 irq_handler, IRQF_SHARED,
2634 drv_name, host);
2635 if (rc)
2636 goto out;
2637
2638 ata_port_desc(host->ports[1], "irq %d",
2639 ATA_SECONDARY_IRQ(pdev));
2640 }
2641 }
2642
2643 rc = ata_host_register(host, sht);
2644 out:
2645 if (rc == 0)
2646 devres_remove_group(dev, NULL);
2647 else
2648 devres_release_group(dev, NULL);
2649
2650 return rc;
2651}
2652
2653/**
Tejun Heo9363c382008-04-07 22:47:16 +09002654 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002655 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002656 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002657 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002658 * @host_priv: host private_data
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002659 *
2660 * This is a helper function which can be called from a driver's
2661 * xxx_init_one() probe function if the hardware uses traditional
2662 * IDE taskfile registers.
2663 *
2664 * This function calls pci_enable_device(), reserves its register
2665 * regions, sets the dma mask, enables bus master mode, and calls
2666 * ata_device_add()
2667 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002668 * ASSUMPTION:
2669 * Nobody makes a single channel controller that appears solely as
2670 * the secondary legacy port on PCI.
2671 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002672 * LOCKING:
2673 * Inherited from PCI layer (may sleep).
2674 *
2675 * RETURNS:
2676 * Zero on success, negative on errno-based value on error.
2677 */
Tejun Heo9363c382008-04-07 22:47:16 +09002678int ata_pci_sff_init_one(struct pci_dev *pdev,
2679 const struct ata_port_info * const * ppi,
2680 struct scsi_host_template *sht, void *host_priv)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002681{
Tejun Heof0d36ef2007-01-20 16:00:28 +09002682 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002683 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09002684 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002685 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002686
2687 DPRINTK("ENTER\n");
2688
Tejun Heo1626aeb2007-05-04 12:43:58 +02002689 /* look up the first valid port_info */
2690 for (i = 0; i < 2 && ppi[i]; i++) {
2691 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
2692 pi = ppi[i];
2693 break;
2694 }
2695 }
2696
2697 if (!pi) {
2698 dev_printk(KERN_ERR, &pdev->dev,
2699 "no valid port_info specified\n");
2700 return -EINVAL;
2701 }
2702
Tejun Heof0d36ef2007-01-20 16:00:28 +09002703 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2704 return -ENOMEM;
2705
Tejun Heof0d36ef2007-01-20 16:00:28 +09002706 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002707 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002708 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002709
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002710 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09002711 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09002712 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002713 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09002714 host->private_data = host_priv;
Tejun Heod491b272007-04-17 23:44:07 +09002715
Tejun Heod491b272007-04-17 23:44:07 +09002716 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09002717 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002718 out:
2719 if (rc == 0)
2720 devres_remove_group(&pdev->dev, NULL);
2721 else
2722 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09002723
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002724 return rc;
2725}
2726
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002727#endif /* CONFIG_PCI */
2728
Tejun Heo624d5c52008-03-25 22:16:41 +09002729EXPORT_SYMBOL_GPL(ata_sff_port_ops);
2730EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
Tejun Heo9363c382008-04-07 22:47:16 +09002731EXPORT_SYMBOL_GPL(ata_sff_qc_prep);
2732EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep);
2733EXPORT_SYMBOL_GPL(ata_sff_dev_select);
2734EXPORT_SYMBOL_GPL(ata_sff_check_status);
2735EXPORT_SYMBOL_GPL(ata_sff_altstatus);
2736EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
2737EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
2738EXPORT_SYMBOL_GPL(ata_sff_tf_load);
2739EXPORT_SYMBOL_GPL(ata_sff_tf_read);
2740EXPORT_SYMBOL_GPL(ata_sff_exec_command);
2741EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
2742EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
2743EXPORT_SYMBOL_GPL(ata_sff_irq_on);
2744EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
2745EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
2746EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo22183bf2008-04-07 22:47:20 +09002747EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo9363c382008-04-07 22:47:16 +09002748EXPORT_SYMBOL_GPL(ata_sff_host_intr);
2749EXPORT_SYMBOL_GPL(ata_sff_interrupt);
2750EXPORT_SYMBOL_GPL(ata_sff_freeze);
2751EXPORT_SYMBOL_GPL(ata_sff_thaw);
2752EXPORT_SYMBOL_GPL(ata_sff_prereset);
2753EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
2754EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
2755EXPORT_SYMBOL_GPL(ata_sff_softreset);
2756EXPORT_SYMBOL_GPL(sata_sff_hardreset);
2757EXPORT_SYMBOL_GPL(ata_sff_postreset);
2758EXPORT_SYMBOL_GPL(ata_sff_error_handler);
2759EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
Tejun Heo624d5c52008-03-25 22:16:41 +09002760EXPORT_SYMBOL_GPL(ata_sff_port_start);
Tejun Heo9363c382008-04-07 22:47:16 +09002761EXPORT_SYMBOL_GPL(ata_sff_std_ports);
2762EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter);
Tejun Heo624d5c52008-03-25 22:16:41 +09002763EXPORT_SYMBOL_GPL(ata_bmdma_setup);
2764EXPORT_SYMBOL_GPL(ata_bmdma_start);
2765EXPORT_SYMBOL_GPL(ata_bmdma_stop);
2766EXPORT_SYMBOL_GPL(ata_bmdma_status);
2767EXPORT_SYMBOL_GPL(ata_bus_reset);
2768#ifdef CONFIG_PCI
Tejun Heo9363c382008-04-07 22:47:16 +09002769EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
2770EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
2771EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
2772EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
2773EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
2774EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Tejun Heo624d5c52008-03-25 22:16:41 +09002775#endif /* CONFIG_PCI */