Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Avionic Design GmbH |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | */ |
| 9 | |
Terje Bergstrom | 4231c6b | 2013-03-22 16:34:05 +0200 | [diff] [blame] | 10 | #ifndef HOST1X_DRM_H |
| 11 | #define HOST1X_DRM_H 1 |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 12 | |
Thierry Reding | e1e9064 | 2013-09-24 13:59:01 +0200 | [diff] [blame] | 13 | #include <uapi/drm/tegra_drm.h> |
| 14 | #include <linux/host1x.h> |
Thierry Reding | fb36d0e | 2015-04-27 15:12:39 +0200 | [diff] [blame] | 15 | #include <linux/of_gpio.h> |
Thierry Reding | e1e9064 | 2013-09-24 13:59:01 +0200 | [diff] [blame] | 16 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 17 | #include <drm/drmP.h> |
| 18 | #include <drm/drm_crtc_helper.h> |
| 19 | #include <drm/drm_edid.h> |
| 20 | #include <drm/drm_fb_helper.h> |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 21 | #include <drm/drm_fixed.h> |
| 22 | |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 23 | #include "gem.h" |
| 24 | |
Stephen Warren | ca48080 | 2013-11-06 16:20:54 -0700 | [diff] [blame] | 25 | struct reset_control; |
| 26 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 27 | struct tegra_fb { |
| 28 | struct drm_framebuffer base; |
| 29 | struct tegra_bo **planes; |
| 30 | unsigned int num_planes; |
| 31 | }; |
| 32 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 33 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 34 | struct tegra_fbdev { |
| 35 | struct drm_fb_helper base; |
| 36 | struct tegra_fb *fb; |
| 37 | }; |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 38 | #endif |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 39 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 40 | struct tegra_drm { |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 41 | struct drm_device *drm; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 42 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 43 | struct iommu_domain *domain; |
| 44 | struct drm_mm mm; |
| 45 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 46 | struct mutex clients_lock; |
| 47 | struct list_head clients; |
| 48 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 49 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 50 | struct tegra_fbdev *fbdev; |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 51 | #endif |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 52 | |
| 53 | unsigned int pitch_align; |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 54 | |
| 55 | struct { |
| 56 | struct drm_atomic_state *state; |
| 57 | struct work_struct work; |
| 58 | struct mutex lock; |
| 59 | } commit; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 60 | }; |
| 61 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 62 | struct tegra_drm_client; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 63 | |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 64 | struct tegra_drm_context { |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 65 | struct tegra_drm_client *client; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 66 | struct host1x_channel *channel; |
| 67 | struct list_head list; |
| 68 | }; |
| 69 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 70 | struct tegra_drm_client_ops { |
| 71 | int (*open_channel)(struct tegra_drm_client *client, |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 72 | struct tegra_drm_context *context); |
| 73 | void (*close_channel)(struct tegra_drm_context *context); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 74 | int (*is_addr_reg)(struct device *dev, u32 class, u32 offset); |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 75 | int (*submit)(struct tegra_drm_context *context, |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 76 | struct drm_tegra_submit *args, struct drm_device *drm, |
| 77 | struct drm_file *file); |
| 78 | }; |
| 79 | |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 80 | int tegra_drm_submit(struct tegra_drm_context *context, |
| 81 | struct drm_tegra_submit *args, struct drm_device *drm, |
| 82 | struct drm_file *file); |
| 83 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 84 | struct tegra_drm_client { |
| 85 | struct host1x_client base; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 86 | struct list_head list; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 87 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 88 | const struct tegra_drm_client_ops *ops; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 89 | }; |
| 90 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 91 | static inline struct tegra_drm_client * |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 92 | host1x_to_drm_client(struct host1x_client *client) |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 93 | { |
| 94 | return container_of(client, struct tegra_drm_client, base); |
| 95 | } |
| 96 | |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 97 | int tegra_drm_register_client(struct tegra_drm *tegra, |
| 98 | struct tegra_drm_client *client); |
| 99 | int tegra_drm_unregister_client(struct tegra_drm *tegra, |
| 100 | struct tegra_drm_client *client); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 101 | |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 102 | int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm); |
| 103 | int tegra_drm_exit(struct tegra_drm *tegra); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 104 | |
Thierry Reding | 8620fc6 | 2013-12-12 11:03:59 +0100 | [diff] [blame] | 105 | struct tegra_dc_soc_info; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 106 | struct tegra_output; |
| 107 | |
Thierry Reding | 791ddb1 | 2015-07-28 21:27:05 +0200 | [diff] [blame] | 108 | struct tegra_dc_stats { |
| 109 | unsigned long frames; |
| 110 | unsigned long vblank; |
| 111 | unsigned long underflow; |
| 112 | unsigned long overflow; |
| 113 | }; |
| 114 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 115 | struct tegra_dc { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 116 | struct host1x_client client; |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 117 | struct host1x_syncpt *syncpt; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 118 | struct device *dev; |
Thierry Reding | d18d303 | 2013-09-26 16:09:19 +0200 | [diff] [blame] | 119 | spinlock_t lock; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 120 | |
| 121 | struct drm_crtc base; |
Thierry Reding | 9c01270 | 2014-07-07 15:32:53 +0200 | [diff] [blame] | 122 | int powergate; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 123 | int pipe; |
| 124 | |
| 125 | struct clk *clk; |
Stephen Warren | ca48080 | 2013-11-06 16:20:54 -0700 | [diff] [blame] | 126 | struct reset_control *rst; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 127 | void __iomem *regs; |
| 128 | int irq; |
| 129 | |
| 130 | struct tegra_output *rgb; |
| 131 | |
Thierry Reding | 791ddb1 | 2015-07-28 21:27:05 +0200 | [diff] [blame] | 132 | struct tegra_dc_stats stats; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 133 | struct list_head list; |
| 134 | |
| 135 | struct drm_info_list *debugfs_files; |
| 136 | struct drm_minor *minor; |
| 137 | struct dentry *debugfs; |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 138 | |
| 139 | /* page-flip handling */ |
| 140 | struct drm_pending_vblank_event *event; |
Thierry Reding | 8620fc6 | 2013-12-12 11:03:59 +0100 | [diff] [blame] | 141 | |
| 142 | const struct tegra_dc_soc_info *soc; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 143 | |
| 144 | struct iommu_domain *domain; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 145 | }; |
| 146 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 147 | static inline struct tegra_dc * |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 148 | host1x_client_to_dc(struct host1x_client *client) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 149 | { |
| 150 | return container_of(client, struct tegra_dc, client); |
| 151 | } |
| 152 | |
| 153 | static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc) |
| 154 | { |
Thierry Reding | 3782651 | 2013-11-08 12:30:37 +0100 | [diff] [blame] | 155 | return crtc ? container_of(crtc, struct tegra_dc, base) : NULL; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 156 | } |
| 157 | |
Thierry Reding | 03a6056 | 2014-10-21 13:48:48 +0200 | [diff] [blame] | 158 | static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value, |
| 159 | unsigned long offset) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 160 | { |
Thierry Reding | 03a6056 | 2014-10-21 13:48:48 +0200 | [diff] [blame] | 161 | writel(value, dc->regs + (offset << 2)); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 162 | } |
| 163 | |
Thierry Reding | 03a6056 | 2014-10-21 13:48:48 +0200 | [diff] [blame] | 164 | static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 165 | { |
Thierry Reding | 03a6056 | 2014-10-21 13:48:48 +0200 | [diff] [blame] | 166 | return readl(dc->regs + (offset << 2)); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 167 | } |
| 168 | |
Thierry Reding | f34bc78 | 2012-11-04 21:47:13 +0100 | [diff] [blame] | 169 | struct tegra_dc_window { |
| 170 | struct { |
| 171 | unsigned int x; |
| 172 | unsigned int y; |
| 173 | unsigned int w; |
| 174 | unsigned int h; |
| 175 | } src; |
| 176 | struct { |
| 177 | unsigned int x; |
| 178 | unsigned int y; |
| 179 | unsigned int w; |
| 180 | unsigned int h; |
| 181 | } dst; |
| 182 | unsigned int bits_per_pixel; |
Thierry Reding | f34bc78 | 2012-11-04 21:47:13 +0100 | [diff] [blame] | 183 | unsigned int stride[2]; |
| 184 | unsigned long base[3]; |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 185 | bool bottom_up; |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 186 | |
| 187 | struct tegra_bo_tiling tiling; |
Thierry Reding | 8f604f8 | 2014-11-28 13:14:55 +0100 | [diff] [blame] | 188 | u32 format; |
| 189 | u32 swap; |
Thierry Reding | f34bc78 | 2012-11-04 21:47:13 +0100 | [diff] [blame] | 190 | }; |
| 191 | |
| 192 | /* from dc.c */ |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 193 | u32 tegra_dc_get_vblank_counter(struct tegra_dc *dc); |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 194 | void tegra_dc_enable_vblank(struct tegra_dc *dc); |
| 195 | void tegra_dc_disable_vblank(struct tegra_dc *dc); |
| 196 | void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); |
Thierry Reding | 62b9e06 | 2014-11-21 17:33:33 +0100 | [diff] [blame] | 197 | void tegra_dc_commit(struct tegra_dc *dc); |
Thierry Reding | ca915b1 | 2014-12-08 16:14:45 +0100 | [diff] [blame] | 198 | int tegra_dc_state_setup_clock(struct tegra_dc *dc, |
| 199 | struct drm_crtc_state *crtc_state, |
| 200 | struct clk *clk, unsigned long pclk, |
| 201 | unsigned int div); |
Thierry Reding | f34bc78 | 2012-11-04 21:47:13 +0100 | [diff] [blame] | 202 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 203 | struct tegra_output { |
| 204 | struct device_node *of_node; |
| 205 | struct device *dev; |
| 206 | |
Thierry Reding | 9be7d86 | 2013-08-30 15:22:36 +0200 | [diff] [blame] | 207 | struct drm_panel *panel; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 208 | struct i2c_adapter *ddc; |
| 209 | const struct edid *edid; |
| 210 | unsigned int hpd_irq; |
| 211 | int hpd_gpio; |
Thierry Reding | fb36d0e | 2015-04-27 15:12:39 +0200 | [diff] [blame] | 212 | enum of_gpio_flags hpd_gpio_flags; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 213 | |
| 214 | struct drm_encoder encoder; |
| 215 | struct drm_connector connector; |
| 216 | }; |
| 217 | |
| 218 | static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) |
| 219 | { |
| 220 | return container_of(e, struct tegra_output, encoder); |
| 221 | } |
| 222 | |
| 223 | static inline struct tegra_output *connector_to_output(struct drm_connector *c) |
| 224 | { |
| 225 | return container_of(c, struct tegra_output, connector); |
| 226 | } |
| 227 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 228 | /* from rgb.c */ |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 229 | int tegra_dc_rgb_probe(struct tegra_dc *dc); |
| 230 | int tegra_dc_rgb_remove(struct tegra_dc *dc); |
| 231 | int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc); |
| 232 | int tegra_dc_rgb_exit(struct tegra_dc *dc); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 233 | |
| 234 | /* from output.c */ |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 235 | int tegra_output_probe(struct tegra_output *output); |
Thierry Reding | 328ec69 | 2014-12-19 15:55:08 +0100 | [diff] [blame] | 236 | void tegra_output_remove(struct tegra_output *output); |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 237 | int tegra_output_init(struct drm_device *drm, struct tegra_output *output); |
Thierry Reding | 328ec69 | 2014-12-19 15:55:08 +0100 | [diff] [blame] | 238 | void tegra_output_exit(struct tegra_output *output); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 239 | |
Thierry Reding | 132085d | 2014-11-28 15:38:40 +0100 | [diff] [blame] | 240 | int tegra_output_connector_get_modes(struct drm_connector *connector); |
| 241 | struct drm_encoder * |
| 242 | tegra_output_connector_best_encoder(struct drm_connector *connector); |
| 243 | enum drm_connector_status |
| 244 | tegra_output_connector_detect(struct drm_connector *connector, bool force); |
| 245 | void tegra_output_connector_destroy(struct drm_connector *connector); |
| 246 | |
| 247 | void tegra_output_encoder_destroy(struct drm_encoder *encoder); |
| 248 | |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 249 | /* from dpaux.c */ |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 250 | struct tegra_dpaux; |
| 251 | struct drm_dp_link; |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 252 | |
| 253 | struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np); |
| 254 | enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux); |
| 255 | int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output); |
| 256 | int tegra_dpaux_detach(struct tegra_dpaux *dpaux); |
| 257 | int tegra_dpaux_enable(struct tegra_dpaux *dpaux); |
| 258 | int tegra_dpaux_disable(struct tegra_dpaux *dpaux); |
| 259 | int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding); |
| 260 | int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, |
| 261 | u8 pattern); |
| 262 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 263 | /* from fb.c */ |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 264 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
| 265 | unsigned int index); |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 266 | bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer); |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 267 | int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, |
| 268 | struct tegra_bo_tiling *tiling); |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 269 | struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, |
| 270 | struct drm_file *file, |
Ville Syrjälä | 1eb8345 | 2015-11-11 19:11:29 +0200 | [diff] [blame] | 271 | const struct drm_mode_fb_cmd2 *cmd); |
Thierry Reding | e221532 | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 272 | int tegra_drm_fb_prepare(struct drm_device *drm); |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 273 | void tegra_drm_fb_free(struct drm_device *drm); |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 274 | int tegra_drm_fb_init(struct drm_device *drm); |
| 275 | void tegra_drm_fb_exit(struct drm_device *drm); |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 276 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 688c59a | 2014-04-16 09:54:21 +0200 | [diff] [blame] | 277 | void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev); |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 278 | void tegra_fb_output_poll_changed(struct drm_device *drm); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 279 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 280 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 281 | extern struct platform_driver tegra_dc_driver; |
Thierry Reding | dec7273 | 2013-09-03 08:45:46 +0200 | [diff] [blame] | 282 | extern struct platform_driver tegra_dsi_driver; |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 283 | extern struct platform_driver tegra_sor_driver; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 284 | extern struct platform_driver tegra_hdmi_driver; |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 285 | extern struct platform_driver tegra_dpaux_driver; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 286 | extern struct platform_driver tegra_gr2d_driver; |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 287 | extern struct platform_driver tegra_gr3d_driver; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 288 | |
Terje Bergstrom | 4231c6b | 2013-03-22 16:34:05 +0200 | [diff] [blame] | 289 | #endif /* HOST1X_DRM_H */ |