blob: 00cc78c7aa045e9eb5ff747afce8ac3b66a57e7d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040014#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/pci.h>
17#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070018#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070019#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090020#include <linux/errno.h>
21#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24#include "pci.h"
25#include "msi.h"
26
Linus Torvalds1da177e2005-04-16 15:20:36 -070027static int pci_msi_enable = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010029/* Arch hooks */
30
Michael Ellerman11df1f02009-01-19 11:31:00 +110031#ifndef arch_msi_check_device
32int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010033{
34 return 0;
35}
Michael Ellerman11df1f02009-01-19 11:31:00 +110036#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010037
Michael Ellerman11df1f02009-01-19 11:31:00 +110038#ifndef arch_setup_msi_irqs
Thomas Gleixner1525bf02010-10-06 16:05:35 -040039# define arch_setup_msi_irqs default_setup_msi_irqs
40# define HAVE_DEFAULT_MSI_SETUP_IRQS
41#endif
42
43#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
44int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010045{
46 struct msi_desc *entry;
47 int ret;
48
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -040049 /*
50 * If an architecture wants to support multiple MSI, it needs to
51 * override arch_setup_msi_irqs()
52 */
53 if (type == PCI_CAP_ID_MSI && nvec > 1)
54 return 1;
55
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010056 list_for_each_entry(entry, &dev->msi_list, list) {
57 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +110058 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010059 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +110060 if (ret > 0)
61 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010062 }
63
64 return 0;
65}
Michael Ellerman11df1f02009-01-19 11:31:00 +110066#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010067
Michael Ellerman11df1f02009-01-19 11:31:00 +110068#ifndef arch_teardown_msi_irqs
Thomas Gleixner1525bf02010-10-06 16:05:35 -040069# define arch_teardown_msi_irqs default_teardown_msi_irqs
70# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
71#endif
72
73#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
74void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010075{
76 struct msi_desc *entry;
77
78 list_for_each_entry(entry, &dev->msi_list, list) {
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -040079 int i, nvec;
80 if (entry->irq == 0)
81 continue;
82 nvec = 1 << entry->msi_attrib.multiple;
83 for (i = 0; i < nvec; i++)
84 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010085 }
86}
Michael Ellerman11df1f02009-01-19 11:31:00 +110087#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010088
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -050089#ifndef arch_restore_msi_irqs
90# define arch_restore_msi_irqs default_restore_msi_irqs
91# define HAVE_DEFAULT_MSI_RESTORE_IRQS
92#endif
93
94#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
95void default_restore_msi_irqs(struct pci_dev *dev, int irq)
96{
97 struct msi_desc *entry;
98
99 entry = NULL;
100 if (dev->msix_enabled) {
101 list_for_each_entry(entry, &dev->msi_list, list) {
102 if (irq == entry->irq)
103 break;
104 }
105 } else if (dev->msi_enabled) {
106 entry = irq_get_msi_desc(irq);
107 }
108
109 if (entry)
110 write_msi_msg(irq, &entry->msg);
111}
112#endif
113
Matthew Wilcox110828c2009-06-16 06:31:45 -0600114static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800115{
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800116 u16 control;
117
Matthew Wilcox110828c2009-06-16 06:31:45 -0600118 BUG_ON(!pos);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800119
Matthew Wilcox110828c2009-06-16 06:31:45 -0600120 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
121 control &= ~PCI_MSI_FLAGS_ENABLE;
122 if (enable)
123 control |= PCI_MSI_FLAGS_ENABLE;
124 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +0900125}
126
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800127static void msix_set_enable(struct pci_dev *dev, int enable)
128{
129 int pos;
130 u16 control;
131
132 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
133 if (pos) {
134 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
135 control &= ~PCI_MSIX_FLAGS_ENABLE;
136 if (enable)
137 control |= PCI_MSIX_FLAGS_ENABLE;
138 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
139 }
140}
141
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500142static inline __attribute_const__ u32 msi_mask(unsigned x)
143{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700144 /* Don't shift by >= width of type */
145 if (x >= 5)
146 return 0xffffffff;
147 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500148}
149
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400150static inline __attribute_const__ u32 msi_capable_mask(u16 control)
Mitch Williams988cbb12007-03-30 11:54:08 -0700151{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400152 return msi_mask((control >> 1) & 7);
153}
Mitch Williams988cbb12007-03-30 11:54:08 -0700154
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400155static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
156{
157 return msi_mask((control >> 4) & 7);
Mitch Williams988cbb12007-03-30 11:54:08 -0700158}
159
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600160/*
161 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
162 * mask all MSI interrupts by clearing the MSI enable bit does not work
163 * reliably as devices without an INTx disable bit will then generate a
164 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600165 */
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900166static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400168 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400170 if (!desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900171 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400172
173 mask_bits &= ~mask;
174 mask_bits |= flag;
175 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900176
177 return mask_bits;
178}
179
180static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
181{
182 desc->masked = __msi_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400183}
184
185/*
186 * This internal function does not flush PCI writes to the device.
187 * All users must ensure that they read from the device before either
188 * assuming that the device state is up to date, or returning out of this
189 * file. This saves a few milliseconds when initialising devices with lots
190 * of MSI-X interrupts.
191 */
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900192static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400193{
194 u32 mask_bits = desc->masked;
195 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900196 PCI_MSIX_ENTRY_VECTOR_CTRL;
Sheng Yang8d805282010-11-11 15:46:55 +0800197 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
198 if (flag)
199 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400200 writel(mask_bits, desc->mask_base + offset);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900201
202 return mask_bits;
203}
204
205static void msix_mask_irq(struct msi_desc *desc, u32 flag)
206{
207 desc->masked = __msix_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400208}
209
Jan Glauber9a4da8a2012-11-29 13:05:05 +0100210#ifdef CONFIG_GENERIC_HARDIRQS
211
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200212static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400213{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200214 struct msi_desc *desc = irq_data_get_msi(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400215
216 if (desc->msi_attrib.is_msix) {
217 msix_mask_irq(desc, flag);
218 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400219 } else {
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200220 unsigned offset = data->irq - desc->dev->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400221 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400223}
224
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200225void mask_msi_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400226{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200227 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400228}
229
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200230void unmask_msi_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400231{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200232 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233}
234
Jan Glauber9a4da8a2012-11-29 13:05:05 +0100235#endif /* CONFIG_GENERIC_HARDIRQS */
236
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200237void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700238{
Ben Hutchings30da5522010-07-23 14:56:28 +0100239 BUG_ON(entry->dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700240
Ben Hutchings30da5522010-07-23 14:56:28 +0100241 if (entry->msi_attrib.is_msix) {
242 void __iomem *base = entry->mask_base +
243 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
244
245 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
246 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
247 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
248 } else {
249 struct pci_dev *dev = entry->dev;
250 int pos = entry->msi_attrib.pos;
251 u16 data;
252
253 pci_read_config_dword(dev, msi_lower_address_reg(pos),
254 &msg->address_lo);
255 if (entry->msi_attrib.is_64) {
256 pci_read_config_dword(dev, msi_upper_address_reg(pos),
257 &msg->address_hi);
258 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
259 } else {
260 msg->address_hi = 0;
261 pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
262 }
263 msg->data = data;
264 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700265}
266
Yinghai Lu3145e942008-12-05 18:58:34 -0800267void read_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700268{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200269 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800270
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200271 __read_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800272}
273
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200274void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Ben Hutchings30da5522010-07-23 14:56:28 +0100275{
Ben Hutchings30da5522010-07-23 14:56:28 +0100276 /* Assert that the cache is valid, assuming that
277 * valid messages are not all-zeroes. */
278 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
279 entry->msg.data));
280
281 *msg = entry->msg;
282}
283
284void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
285{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200286 struct msi_desc *entry = irq_get_msi_desc(irq);
Ben Hutchings30da5522010-07-23 14:56:28 +0100287
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200288 __get_cached_msi_msg(entry, msg);
Ben Hutchings30da5522010-07-23 14:56:28 +0100289}
290
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200291void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800292{
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100293 if (entry->dev->current_state != PCI_D0) {
294 /* Don't touch the hardware now */
295 } else if (entry->msi_attrib.is_msix) {
Matthew Wilcox24d27552009-03-17 08:54:06 -0400296 void __iomem *base;
297 base = entry->mask_base +
298 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
299
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900300 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
301 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
302 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400303 } else {
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700304 struct pci_dev *dev = entry->dev;
305 int pos = entry->msi_attrib.pos;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400306 u16 msgctl;
307
308 pci_read_config_word(dev, msi_control_reg(pos), &msgctl);
309 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
310 msgctl |= entry->msi_attrib.multiple << 4;
311 pci_write_config_word(dev, msi_control_reg(pos), msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700312
313 pci_write_config_dword(dev, msi_lower_address_reg(pos),
314 msg->address_lo);
315 if (entry->msi_attrib.is_64) {
316 pci_write_config_dword(dev, msi_upper_address_reg(pos),
317 msg->address_hi);
318 pci_write_config_word(dev, msi_data_reg(pos, 1),
319 msg->data);
320 } else {
321 pci_write_config_word(dev, msi_data_reg(pos, 0),
322 msg->data);
323 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700324 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700325 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700326}
327
Yinghai Lu3145e942008-12-05 18:58:34 -0800328void write_msi_msg(unsigned int irq, struct msi_msg *msg)
329{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200330 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800331
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200332 __write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800333}
334
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900335static void free_msi_irqs(struct pci_dev *dev)
336{
337 struct msi_desc *entry, *tmp;
338
339 list_for_each_entry(entry, &dev->msi_list, list) {
340 int i, nvec;
341 if (!entry->irq)
342 continue;
343 nvec = 1 << entry->msi_attrib.multiple;
Jan Glauber9a4da8a2012-11-29 13:05:05 +0100344#ifdef CONFIG_GENERIC_HARDIRQS
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900345 for (i = 0; i < nvec; i++)
346 BUG_ON(irq_has_action(entry->irq + i));
Jan Glauber9a4da8a2012-11-29 13:05:05 +0100347#endif
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900348 }
349
350 arch_teardown_msi_irqs(dev);
351
352 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
353 if (entry->msi_attrib.is_msix) {
354 if (list_is_last(&entry->list, &dev->msi_list))
355 iounmap(entry->mask_base);
356 }
Neil Horman424eb392012-01-03 10:29:54 -0500357
358 /*
359 * Its possible that we get into this path
360 * When populate_msi_sysfs fails, which means the entries
361 * were not registered with sysfs. In that case don't
362 * unregister them.
363 */
364 if (entry->kobj.parent) {
365 kobject_del(&entry->kobj);
366 kobject_put(&entry->kobj);
367 }
368
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900369 list_del(&entry->list);
370 kfree(entry);
371 }
372}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900373
Matthew Wilcox379f5322009-03-17 08:54:07 -0400374static struct msi_desc *alloc_msi_entry(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375{
Matthew Wilcox379f5322009-03-17 08:54:07 -0400376 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
377 if (!desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 return NULL;
379
Matthew Wilcox379f5322009-03-17 08:54:07 -0400380 INIT_LIST_HEAD(&desc->list);
381 desc->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382
Matthew Wilcox379f5322009-03-17 08:54:07 -0400383 return desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384}
385
David Millerba698ad2007-10-25 01:16:30 -0700386static void pci_intx_for_msi(struct pci_dev *dev, int enable)
387{
388 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
389 pci_intx(dev, enable);
390}
391
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100392static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800393{
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700394 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800395 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700396 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800397
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800398 if (!dev->msi_enabled)
399 return;
400
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200401 entry = irq_get_msi_desc(dev->irq);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700402 pos = entry->msi_attrib.pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800403
David Millerba698ad2007-10-25 01:16:30 -0700404 pci_intx_for_msi(dev, 0);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600405 msi_set_enable(dev, pos, 0);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500406 arch_restore_msi_irqs(dev, dev->irq);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700407
408 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400409 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700410 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400411 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Shaohua Li41017f02006-02-08 17:11:38 +0800412 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100413}
414
415static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800416{
Shaohua Li41017f02006-02-08 17:11:38 +0800417 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800418 struct msi_desc *entry;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700419 u16 control;
Shaohua Li41017f02006-02-08 17:11:38 +0800420
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700421 if (!dev->msix_enabled)
422 return;
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700423 BUG_ON(list_empty(&dev->msi_list));
Hidetoshi Seto9cc8d542009-08-06 11:32:04 +0900424 entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700425 pos = entry->msi_attrib.pos;
426 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700427
Shaohua Li41017f02006-02-08 17:11:38 +0800428 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700429 pci_intx_for_msi(dev, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700430 control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL;
431 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
Shaohua Li41017f02006-02-08 17:11:38 +0800432
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000433 list_for_each_entry(entry, &dev->msi_list, list) {
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500434 arch_restore_msi_irqs(dev, entry->irq);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400435 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800436 }
Shaohua Li41017f02006-02-08 17:11:38 +0800437
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700438 control &= ~PCI_MSIX_FLAGS_MASKALL;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700439 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
Shaohua Li41017f02006-02-08 17:11:38 +0800440}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100441
442void pci_restore_msi_state(struct pci_dev *dev)
443{
444 __pci_restore_msi_state(dev);
445 __pci_restore_msix_state(dev);
446}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600447EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800448
Neil Hormanda8d1c82011-10-06 14:08:18 -0400449
450#define to_msi_attr(obj) container_of(obj, struct msi_attribute, attr)
451#define to_msi_desc(obj) container_of(obj, struct msi_desc, kobj)
452
453struct msi_attribute {
454 struct attribute attr;
455 ssize_t (*show)(struct msi_desc *entry, struct msi_attribute *attr,
456 char *buf);
457 ssize_t (*store)(struct msi_desc *entry, struct msi_attribute *attr,
458 const char *buf, size_t count);
459};
460
461static ssize_t show_msi_mode(struct msi_desc *entry, struct msi_attribute *atr,
462 char *buf)
463{
464 return sprintf(buf, "%s\n", entry->msi_attrib.is_msix ? "msix" : "msi");
465}
466
467static ssize_t msi_irq_attr_show(struct kobject *kobj,
468 struct attribute *attr, char *buf)
469{
470 struct msi_attribute *attribute = to_msi_attr(attr);
471 struct msi_desc *entry = to_msi_desc(kobj);
472
473 if (!attribute->show)
474 return -EIO;
475
476 return attribute->show(entry, attribute, buf);
477}
478
479static const struct sysfs_ops msi_irq_sysfs_ops = {
480 .show = msi_irq_attr_show,
481};
482
483static struct msi_attribute mode_attribute =
484 __ATTR(mode, S_IRUGO, show_msi_mode, NULL);
485
486
487struct attribute *msi_irq_default_attrs[] = {
488 &mode_attribute.attr,
489 NULL
490};
491
492void msi_kobj_release(struct kobject *kobj)
493{
494 struct msi_desc *entry = to_msi_desc(kobj);
495
496 pci_dev_put(entry->dev);
497}
498
499static struct kobj_type msi_irq_ktype = {
500 .release = msi_kobj_release,
501 .sysfs_ops = &msi_irq_sysfs_ops,
502 .default_attrs = msi_irq_default_attrs,
503};
504
505static int populate_msi_sysfs(struct pci_dev *pdev)
506{
507 struct msi_desc *entry;
508 struct kobject *kobj;
509 int ret;
510 int count = 0;
511
512 pdev->msi_kset = kset_create_and_add("msi_irqs", NULL, &pdev->dev.kobj);
513 if (!pdev->msi_kset)
514 return -ENOMEM;
515
516 list_for_each_entry(entry, &pdev->msi_list, list) {
517 kobj = &entry->kobj;
518 kobj->kset = pdev->msi_kset;
519 pci_dev_get(pdev);
520 ret = kobject_init_and_add(kobj, &msi_irq_ktype, NULL,
521 "%u", entry->irq);
522 if (ret)
523 goto out_unroll;
524
525 count++;
526 }
527
528 return 0;
529
530out_unroll:
531 list_for_each_entry(entry, &pdev->msi_list, list) {
532 if (!count)
533 break;
534 kobject_del(&entry->kobj);
535 kobject_put(&entry->kobj);
536 count--;
537 }
538 return ret;
539}
540
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541/**
542 * msi_capability_init - configure device's MSI capability structure
543 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400544 * @nvec: number of interrupts to allocate
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400546 * Setup the MSI capability structure of the device with the requested
547 * number of interrupts. A return value of zero indicates the successful
548 * setup of an entry with the new MSI irq. A negative return value indicates
549 * an error, and a positive return value indicates the number of interrupts
550 * which could have been allocated.
551 */
552static int msi_capability_init(struct pci_dev *dev, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553{
554 struct msi_desc *entry;
Michael Ellerman7fe37302007-04-18 19:39:21 +1000555 int pos, ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700556 u16 control;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400557 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900559 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600560 msi_set_enable(dev, pos, 0); /* Disable MSI during set up */
561
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 pci_read_config_word(dev, msi_control_reg(pos), &control);
563 /* MSI Entry Initialization */
Matthew Wilcox379f5322009-03-17 08:54:07 -0400564 entry = alloc_msi_entry(dev);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700565 if (!entry)
566 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700567
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900568 entry->msi_attrib.is_msix = 0;
569 entry->msi_attrib.is_64 = is_64bit_address(control);
570 entry->msi_attrib.entry_nr = 0;
571 entry->msi_attrib.maskbit = is_mask_bit_support(control);
572 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
573 entry->msi_attrib.pos = pos;
Hidetoshi Seto0db29af2008-12-24 17:27:04 +0900574
Hidetoshi Seto67b5db62009-04-20 10:54:59 +0900575 entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400576 /* All MSIs are unmasked by default, Mask them all */
577 if (entry->msi_attrib.maskbit)
578 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
579 mask = msi_capable_mask(control);
580 msi_mask_irq(entry, mask, mask);
581
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700582 list_add_tail(&entry->list, &dev->msi_list);
Michael Ellerman9c831332007-04-18 19:39:21 +1000583
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 /* Configure MSI capability structure */
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400585 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000586 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900587 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900588 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000589 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500590 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700591
Neil Hormanda8d1c82011-10-06 14:08:18 -0400592 ret = populate_msi_sysfs(dev);
593 if (ret) {
594 msi_mask_irq(entry, mask, ~mask);
595 free_msi_irqs(dev);
596 return ret;
597 }
598
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700600 pci_intx_for_msi(dev, 0);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600601 msi_set_enable(dev, pos, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800602 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603
Michael Ellerman7fe37302007-04-18 19:39:21 +1000604 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 return 0;
606}
607
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900608static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos,
609 unsigned nr_entries)
610{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900611 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900612 u32 table_offset;
613 u8 bir;
614
615 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
616 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
617 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
618 phys_addr = pci_resource_start(dev, bir) + table_offset;
619
620 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
621}
622
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900623static int msix_setup_entries(struct pci_dev *dev, unsigned pos,
624 void __iomem *base, struct msix_entry *entries,
625 int nvec)
626{
627 struct msi_desc *entry;
628 int i;
629
630 for (i = 0; i < nvec; i++) {
631 entry = alloc_msi_entry(dev);
632 if (!entry) {
633 if (!i)
634 iounmap(base);
635 else
636 free_msi_irqs(dev);
637 /* No enough memory. Don't try again */
638 return -ENOMEM;
639 }
640
641 entry->msi_attrib.is_msix = 1;
642 entry->msi_attrib.is_64 = 1;
643 entry->msi_attrib.entry_nr = entries[i].entry;
644 entry->msi_attrib.default_irq = dev->irq;
645 entry->msi_attrib.pos = pos;
646 entry->mask_base = base;
647
648 list_add_tail(&entry->list, &dev->msi_list);
649 }
650
651 return 0;
652}
653
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900654static void msix_program_entries(struct pci_dev *dev,
655 struct msix_entry *entries)
656{
657 struct msi_desc *entry;
658 int i = 0;
659
660 list_for_each_entry(entry, &dev->msi_list, list) {
661 int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +
662 PCI_MSIX_ENTRY_VECTOR_CTRL;
663
664 entries[i].vector = entry->irq;
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200665 irq_set_msi_desc(entry->irq, entry);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900666 entry->masked = readl(entry->mask_base + offset);
667 msix_mask_irq(entry, 1);
668 i++;
669 }
670}
671
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672/**
673 * msix_capability_init - configure device's MSI-X capability
674 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700675 * @entries: pointer to an array of struct msix_entry entries
676 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600678 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700679 * single MSI-X irq. A return of zero indicates the successful setup of
680 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 **/
682static int msix_capability_init(struct pci_dev *dev,
683 struct msix_entry *entries, int nvec)
684{
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900685 int pos, ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900686 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 void __iomem *base;
688
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900689 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700690 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
691
692 /* Ensure MSI-X is disabled while it is set up */
693 control &= ~PCI_MSIX_FLAGS_ENABLE;
694 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
695
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696 /* Request & Map MSI-X table region */
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900697 base = msix_map_region(dev, pos, multi_msix_capable(control));
698 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699 return -ENOMEM;
700
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900701 ret = msix_setup_entries(dev, pos, base, entries, nvec);
702 if (ret)
703 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000704
705 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900706 if (ret)
707 goto error;
Michael Ellerman9c831332007-04-18 19:39:21 +1000708
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700709 /*
710 * Some devices require MSI-X to be enabled before we can touch the
711 * MSI-X registers. We need to mask all the vectors to prevent
712 * interrupts coming in before they're fully set up.
713 */
714 control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE;
715 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
716
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900717 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700718
Neil Hormanda8d1c82011-10-06 14:08:18 -0400719 ret = populate_msi_sysfs(dev);
720 if (ret) {
721 ret = 0;
722 goto error;
723 }
724
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700725 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700726 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800727 dev->msix_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700729 control &= ~PCI_MSIX_FLAGS_MASKALL;
730 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600731
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900733
734error:
735 if (ret < 0) {
736 /*
737 * If we had some success, report the number of irqs
738 * we succeeded in setting up.
739 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900740 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900741 int avail = 0;
742
743 list_for_each_entry(entry, &dev->msi_list, list) {
744 if (entry->irq != 0)
745 avail++;
746 }
747 if (avail != 0)
748 ret = avail;
749 }
750
751 free_msi_irqs(dev);
752
753 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754}
755
756/**
Michael Ellerman17bbc122007-04-05 17:19:07 +1000757 * pci_msi_check_device - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400758 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000759 * @nvec: how many MSIs have been requested ?
Michael Ellermanb1e23032007-03-22 21:51:39 +1100760 * @type: are we checking for MSI or MSI-X ?
Brice Goglin24334a12006-08-31 01:55:07 -0400761 *
Brice Goglin0306ebf2006-10-05 10:24:31 +0200762 * Look at global flags, the device itself, and its parent busses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000763 * to determine if MSI/-X are supported for the device. If MSI/-X is
764 * supported return 0, else return an error code.
Brice Goglin24334a12006-08-31 01:55:07 -0400765 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900766static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type)
Brice Goglin24334a12006-08-31 01:55:07 -0400767{
768 struct pci_bus *bus;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000769 int ret;
Brice Goglin24334a12006-08-31 01:55:07 -0400770
Brice Goglin0306ebf2006-10-05 10:24:31 +0200771 /* MSI must be globally enabled and supported by the device */
Brice Goglin24334a12006-08-31 01:55:07 -0400772 if (!pci_msi_enable || !dev || dev->no_msi)
773 return -EINVAL;
774
Michael Ellerman314e77b2007-04-05 17:19:12 +1000775 /*
776 * You can't ask to have 0 or less MSIs configured.
777 * a) it's stupid ..
778 * b) the list manipulation code assumes nvec >= 1.
779 */
780 if (nvec < 1)
781 return -ERANGE;
782
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900783 /*
784 * Any bridge which does NOT route MSI transactions from its
785 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200786 * the secondary pci_bus.
787 * We expect only arch-specific PCI host bus controller driver
788 * or quirks for specific PCI bridges to be setting NO_MSI.
789 */
Brice Goglin24334a12006-08-31 01:55:07 -0400790 for (bus = dev->bus; bus; bus = bus->parent)
791 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
792 return -EINVAL;
793
Michael Ellermanc9953a72007-04-05 17:19:08 +1000794 ret = arch_msi_check_device(dev, nvec, type);
795 if (ret)
796 return ret;
797
Michael Ellermanb1e23032007-03-22 21:51:39 +1100798 if (!pci_find_capability(dev, type))
799 return -EINVAL;
800
Brice Goglin24334a12006-08-31 01:55:07 -0400801 return 0;
802}
803
804/**
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400805 * pci_enable_msi_block - configure device's MSI capability structure
806 * @dev: device to configure
807 * @nvec: number of interrupts to configure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700808 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400809 * Allocate IRQs for a device with the MSI capability.
810 * This function returns a negative errno if an error occurs. If it
811 * is unable to allocate the number of interrupts requested, it returns
812 * the number of interrupts it might be able to allocate. If it successfully
813 * allocates at least the number of interrupts requested, it returns 0 and
814 * updates the @dev's irq member to the lowest new interrupt number; the
815 * other interrupt numbers allocated to this device are consecutive.
816 */
817int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818{
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400819 int status, pos, maxvec;
820 u16 msgctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400822 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
823 if (!pos)
824 return -EINVAL;
825 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
826 maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
827 if (nvec > maxvec)
828 return maxvec;
829
830 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellermanc9953a72007-04-05 17:19:08 +1000831 if (status)
832 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700834 WARN_ON(!!dev->msi_enabled);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400836 /* Check whether driver already requested MSI-X irqs */
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800837 if (dev->msix_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600838 dev_info(&dev->dev, "can't enable MSI "
839 "(MSI-X already enabled)\n");
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800840 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 }
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400842
843 status = msi_capability_init(dev, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 return status;
845}
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400846EXPORT_SYMBOL(pci_enable_msi_block);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847
Alexander Gordeev08261d82012-11-19 16:02:10 +0100848int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
849{
850 int ret, pos, nvec;
851 u16 msgctl;
852
853 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
854 if (!pos)
855 return -EINVAL;
856
857 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
858 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
859
860 if (maxvec)
861 *maxvec = ret;
862
863 do {
864 nvec = ret;
865 ret = pci_enable_msi_block(dev, nvec);
866 } while (ret > 0);
867
868 if (ret < 0)
869 return ret;
870 return nvec;
871}
872EXPORT_SYMBOL(pci_enable_msi_block_auto);
873
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400874void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400876 struct msi_desc *desc;
877 u32 mask;
878 u16 ctrl;
Matthew Wilcox110828c2009-06-16 06:31:45 -0600879 unsigned pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100881 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700882 return;
883
Matthew Wilcox110828c2009-06-16 06:31:45 -0600884 BUG_ON(list_empty(&dev->msi_list));
885 desc = list_first_entry(&dev->msi_list, struct msi_desc, list);
886 pos = desc->msi_attrib.pos;
887
888 msi_set_enable(dev, pos, 0);
David Millerba698ad2007-10-25 01:16:30 -0700889 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800890 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700891
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900892 /* Return the device with MSI unmasked as initial states */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600893 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400894 mask = msi_capable_mask(ctrl);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900895 /* Keep cached state to be restored */
896 __msi_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100897
898 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400899 dev->irq = desc->msi_attrib.default_irq;
Yinghai Lud52877c2008-04-23 14:58:09 -0700900}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400901
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900902void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700903{
Yinghai Lud52877c2008-04-23 14:58:09 -0700904 if (!pci_msi_enable || !dev || !dev->msi_enabled)
905 return;
906
907 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900908 free_msi_irqs(dev);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400909 kset_unregister(dev->msi_kset);
910 dev->msi_kset = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100912EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914/**
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100915 * pci_msix_table_size - return the number of device's MSI-X table entries
916 * @dev: pointer to the pci_dev data structure of MSI-X device function
917 */
918int pci_msix_table_size(struct pci_dev *dev)
919{
920 int pos;
921 u16 control;
922
923 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
924 if (!pos)
925 return 0;
926
927 pci_read_config_word(dev, msi_control_reg(pos), &control);
928 return multi_msix_capable(control);
929}
930
931/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 * pci_enable_msix - configure device's MSI-X capability structure
933 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700934 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700935 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 *
937 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700938 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 * MSI-X mode enabled on its hardware device function. A return of zero
940 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700941 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942 * Or a return of > 0 indicates that driver request is exceeding the number
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300943 * of irqs or MSI-X vectors available. Driver should use the returned value to
944 * re-send its request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900946int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100948 int status, nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700949 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950
Michael Ellermanc9953a72007-04-05 17:19:08 +1000951 if (!entries)
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900952 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700953
Michael Ellermanc9953a72007-04-05 17:19:08 +1000954 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
955 if (status)
956 return status;
957
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100958 nr_entries = pci_msix_table_size(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300960 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961
962 /* Check for any invalid entries */
963 for (i = 0; i < nvec; i++) {
964 if (entries[i].entry >= nr_entries)
965 return -EINVAL; /* invalid entry */
966 for (j = i + 1; j < nvec; j++) {
967 if (entries[i].entry == entries[j].entry)
968 return -EINVAL; /* duplicate entry */
969 }
970 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700971 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700972
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700973 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900974 if (dev->msi_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600975 dev_info(&dev->dev, "can't enable MSI-X "
976 "(MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977 return -EINVAL;
978 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 status = msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700980 return status;
981}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100982EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900984void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100985{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900986 struct msi_desc *entry;
987
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100988 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700989 return;
990
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900991 /* Return the device with MSI-X masked as initial states */
992 list_for_each_entry(entry, &dev->msi_list, list) {
993 /* Keep cached states to be restored */
994 __msix_mask_irq(entry, 1);
995 }
996
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800997 msix_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700998 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800999 dev->msix_enabled = 0;
Yinghai Lud52877c2008-04-23 14:58:09 -07001000}
Hidetoshi Setoc9018512009-08-06 11:31:27 +09001001
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001002void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -07001003{
1004 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1005 return;
1006
1007 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001008 free_msi_irqs(dev);
Neil Hormanda8d1c82011-10-06 14:08:18 -04001009 kset_unregister(dev->msi_kset);
1010 dev->msi_kset = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001012EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001013
1014/**
Eric W. Biederman1ce03372006-10-04 02:16:41 -07001015 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1017 *
Steven Coleeaae4b32005-05-03 18:38:30 -06001018 * Being called during hotplug remove, from which the device function
Eric W. Biederman1ce03372006-10-04 02:16:41 -07001019 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020 * allocated for this device function, are reclaimed to unused state,
1021 * which may be used later on.
1022 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001023void msi_remove_pci_irq_vectors(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001025 if (!pci_msi_enable || !dev)
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001026 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001028 if (dev->msi_enabled || dev->msix_enabled)
1029 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030}
1031
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001032void pci_no_msi(void)
1033{
1034 pci_msi_enable = 0;
1035}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001036
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001037/**
1038 * pci_msi_enabled - is MSI enabled?
1039 *
1040 * Returns true if MSI has not been disabled by the command-line option
1041 * pci=nomsi.
1042 **/
1043int pci_msi_enabled(void)
1044{
1045 return pci_msi_enable;
1046}
1047EXPORT_SYMBOL(pci_msi_enabled);
1048
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10001049void pci_msi_init_pci_dev(struct pci_dev *dev)
1050{
Eric W. Biedermand5dea7d2011-10-17 11:46:06 -07001051 int pos;
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10001052 INIT_LIST_HEAD(&dev->msi_list);
Eric W. Biedermand5dea7d2011-10-17 11:46:06 -07001053
1054 /* Disable the msi hardware to avoid screaming interrupts
1055 * during boot. This is the power on reset default so
1056 * usually this should be a noop.
1057 */
1058 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
1059 if (pos)
1060 msi_set_enable(dev, pos, 0);
1061 msix_set_enable(dev, 0);
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10001062}