Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand/spia.c |
| 3 | * |
| 4 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
| 5 | * |
| 6 | * |
| 7 | * 10-29-2001 TG change to support hardwarespecific access |
| 8 | * to controllines (due to change in nand.c) |
| 9 | * page_cache added |
| 10 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | * |
| 15 | * Overview: |
| 16 | * This is a device driver for the NAND flash device found on the |
| 17 | * SPIA board which utilizes the Toshiba TC58V64AFT part. This is |
| 18 | * a 64Mibit (8MiB x 8 bits) NAND flash device. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/mtd/mtd.h> |
| 26 | #include <linux/mtd/nand.h> |
| 27 | #include <linux/mtd/partitions.h> |
| 28 | #include <asm/io.h> |
| 29 | |
| 30 | /* |
| 31 | * MTD structure for SPIA board |
| 32 | */ |
| 33 | static struct mtd_info *spia_mtd = NULL; |
| 34 | |
| 35 | /* |
| 36 | * Values specific to the SPIA board (used with EP7212 processor) |
| 37 | */ |
| 38 | #define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ |
| 39 | #define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 40 | #define SPIA_PEDR 0x0080 /* |
| 41 | * IO offset to Port E data register |
| 42 | * where the CLE, ALE and NCE pins |
| 43 | * are wired to. |
| 44 | */ |
| 45 | #define SPIA_PEDDR 0x00c0 /* |
| 46 | * IO offset to Port E data direction |
| 47 | * register so we can control the IO |
| 48 | * lines. |
| 49 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
| 51 | /* |
| 52 | * Module stuff |
| 53 | */ |
| 54 | |
| 55 | static int spia_io_base = SPIA_IO_BASE; |
| 56 | static int spia_fio_base = SPIA_FIO_BASE; |
| 57 | static int spia_pedr = SPIA_PEDR; |
| 58 | static int spia_peddr = SPIA_PEDDR; |
| 59 | |
| 60 | module_param(spia_io_base, int, 0); |
| 61 | module_param(spia_fio_base, int, 0); |
| 62 | module_param(spia_pedr, int, 0); |
| 63 | module_param(spia_peddr, int, 0); |
| 64 | |
| 65 | /* |
| 66 | * Define partitions for flash device |
| 67 | */ |
Jesper Juhl | 3c6bee1 | 2006-01-09 20:54:01 -0800 | [diff] [blame] | 68 | static const struct mtd_partition partition_info[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 70 | .name = "SPIA flash partition 1", |
| 71 | .offset = 0, |
| 72 | .size = 2 * 1024 * 1024}, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 74 | .name = "SPIA flash partition 2", |
| 75 | .offset = 2 * 1024 * 1024, |
| 76 | .size = 6 * 1024 * 1024} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 79 | #define NUM_PARTITIONS 2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 81 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | * hardware specific access to control-lines |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 83 | * |
| 84 | * ctrl: |
| 85 | * NAND_CNE: bit 0 -> bit 2 |
| 86 | * NAND_CLE: bit 1 -> bit 0 |
| 87 | * NAND_ALE: bit 2 -> bit 1 |
| 88 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 89 | static void spia_hwcontrol(struct mtd_info *mtd, int cmd) |
| 90 | { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 91 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 93 | if (ctrl & NAND_CTRL_CHANGE) { |
| 94 | void __iomem *addr = spia_io_base + spia_pedr; |
| 95 | unsigned char bits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 97 | bits = (ctrl & NAND_CNE) << 2; |
| 98 | bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1; |
| 99 | writeb((readb(addr) & ~0x7) | bits, addr); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 100 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 101 | |
| 102 | if (cmd != NAND_CMD_NONE) |
| 103 | writeb(cmd, chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | /* |
| 107 | * Main initialization routine |
| 108 | */ |
David Woodhouse | cead4db | 2006-05-16 13:54:50 +0100 | [diff] [blame] | 109 | static int __init spia_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | { |
| 111 | struct nand_chip *this; |
| 112 | |
| 113 | /* Allocate memory for MTD device structure and private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 114 | spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | if (!spia_mtd) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 116 | printk("Unable to allocate SPIA NAND MTD device structure.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | return -ENOMEM; |
| 118 | } |
| 119 | |
| 120 | /* Get pointer to private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 121 | this = (struct nand_chip *)(&spia_mtd[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | |
| 123 | /* Initialize structures */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 124 | memset(spia_mtd, 0, sizeof(struct mtd_info)); |
| 125 | memset(this, 0, sizeof(struct nand_chip)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | |
| 127 | /* Link the private data with the MTD structure */ |
| 128 | spia_mtd->priv = this; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 129 | spia_mtd->owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | |
| 131 | /* |
| 132 | * Set GPIO Port E control register so that the pins are configured |
| 133 | * to be outputs for controlling the NAND flash. |
| 134 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 135 | (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | |
| 137 | /* Set address of NAND IO lines */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 138 | this->IO_ADDR_R = (void __iomem *)spia_fio_base; |
| 139 | this->IO_ADDR_W = (void __iomem *)spia_fio_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | /* Set address of hardware control function */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 141 | this->cmd_ctrl = spia_hwcontrol; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | /* 15 us command delay time */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 143 | this->chip_delay = 15; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
| 145 | /* Scan to find existence of the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 146 | if (nand_scan(spia_mtd, 1)) { |
| 147 | kfree(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | return -ENXIO; |
| 149 | } |
| 150 | |
| 151 | /* Register the partitions */ |
Jamie Iles | ee0e87b | 2011-05-23 10:23:40 +0100 | [diff] [blame] | 152 | mtd_device_register(spia_mtd, partition_info, NUM_PARTITIONS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | |
| 154 | /* Return happy */ |
| 155 | return 0; |
| 156 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 157 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | module_init(spia_init); |
| 159 | |
| 160 | /* |
| 161 | * Clean up routine |
| 162 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 163 | static void __exit spia_cleanup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | { |
| 165 | /* Release resources, unregister device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 166 | nand_release(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | |
| 168 | /* Free the MTD device structure */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 169 | kfree(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 171 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | module_exit(spia_cleanup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | |
| 174 | MODULE_LICENSE("GPL"); |
| 175 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); |
| 176 | MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board"); |