blob: e09398dbe7798d1d2451ad4441867e643ed3dbd9 [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea31012005-04-17 16:05:31 -05006 * www.emulex.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -05008 * *
9 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040010 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea31012005-04-17 16:05:31 -050020 *******************************************************************/
21
dea31012005-04-17 16:05:31 -050022#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26
James.Smart@Emulex.Com91886522005-08-10 15:03:09 -040027#include <scsi/scsi.h>
dea31012005-04-17 16:05:31 -050028#include <scsi/scsi_cmnd.h>
29#include <scsi/scsi_device.h>
30#include <scsi/scsi_host.h>
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -040031#include <scsi/scsi_transport_fc.h>
dea31012005-04-17 16:05:31 -050032
33#include "lpfc_hw.h"
34#include "lpfc_sli.h"
35#include "lpfc_disc.h"
36#include "lpfc_scsi.h"
37#include "lpfc.h"
38#include "lpfc_crtn.h"
39#include "lpfc_logmsg.h"
40#include "lpfc_compat.h"
41
42/*
43 * Define macro to log: Mailbox command x%x cannot issue Data
44 * This allows multiple uses of lpfc_msgBlk0311
45 * w/o perturbing log msg utility.
46 */
47#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
48 lpfc_printf_log(phba, \
49 KERN_INFO, \
50 LOG_MBOX | LOG_SLI, \
51 "%d:0311 Mailbox command x%x cannot issue " \
52 "Data: x%x x%x x%x\n", \
53 phba->brd_no, \
54 mb->mbxCommand, \
55 phba->hba_state, \
56 psli->sli_flag, \
57 flag);
58
59
60/* There are only four IOCB completion types. */
61typedef enum _lpfc_iocb_type {
62 LPFC_UNKNOWN_IOCB,
63 LPFC_UNSOL_IOCB,
64 LPFC_SOL_IOCB,
65 LPFC_ABORT_IOCB
66} lpfc_iocb_type;
67
James Bottomley604a3e32005-10-29 10:28:33 -050068void
69lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
70{
71 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
72
73 /*
74 * Clean all volatile data fields, preserve iotag and node struct.
75 */
76 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
77 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
78}
79
dea31012005-04-17 16:05:31 -050080/*
81 * Translate the iocb command to an iocb command type used to decide the final
82 * disposition of each completed IOCB.
83 */
84static lpfc_iocb_type
85lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
86{
87 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
88
89 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
90 return 0;
91
92 switch (iocb_cmnd) {
93 case CMD_XMIT_SEQUENCE_CR:
94 case CMD_XMIT_SEQUENCE_CX:
95 case CMD_XMIT_BCAST_CN:
96 case CMD_XMIT_BCAST_CX:
97 case CMD_ELS_REQUEST_CR:
98 case CMD_ELS_REQUEST_CX:
99 case CMD_CREATE_XRI_CR:
100 case CMD_CREATE_XRI_CX:
101 case CMD_GET_RPI_CN:
102 case CMD_XMIT_ELS_RSP_CX:
103 case CMD_GET_RPI_CR:
104 case CMD_FCP_IWRITE_CR:
105 case CMD_FCP_IWRITE_CX:
106 case CMD_FCP_IREAD_CR:
107 case CMD_FCP_IREAD_CX:
108 case CMD_FCP_ICMND_CR:
109 case CMD_FCP_ICMND_CX:
110 case CMD_ADAPTER_MSG:
111 case CMD_ADAPTER_DUMP:
112 case CMD_XMIT_SEQUENCE64_CR:
113 case CMD_XMIT_SEQUENCE64_CX:
114 case CMD_XMIT_BCAST64_CN:
115 case CMD_XMIT_BCAST64_CX:
116 case CMD_ELS_REQUEST64_CR:
117 case CMD_ELS_REQUEST64_CX:
118 case CMD_FCP_IWRITE64_CR:
119 case CMD_FCP_IWRITE64_CX:
120 case CMD_FCP_IREAD64_CR:
121 case CMD_FCP_IREAD64_CX:
122 case CMD_FCP_ICMND64_CR:
123 case CMD_FCP_ICMND64_CX:
124 case CMD_GEN_REQUEST64_CR:
125 case CMD_GEN_REQUEST64_CX:
126 case CMD_XMIT_ELS_RSP64_CX:
127 type = LPFC_SOL_IOCB;
128 break;
129 case CMD_ABORT_XRI_CN:
130 case CMD_ABORT_XRI_CX:
131 case CMD_CLOSE_XRI_CN:
132 case CMD_CLOSE_XRI_CX:
133 case CMD_XRI_ABORTED_CX:
134 case CMD_ABORT_MXRI64_CN:
135 type = LPFC_ABORT_IOCB;
136 break;
137 case CMD_RCV_SEQUENCE_CX:
138 case CMD_RCV_ELS_REQ_CX:
139 case CMD_RCV_SEQUENCE64_CX:
140 case CMD_RCV_ELS_REQ64_CX:
141 type = LPFC_UNSOL_IOCB;
142 break;
143 default:
144 type = LPFC_UNKNOWN_IOCB;
145 break;
146 }
147
148 return type;
149}
150
151static int
152lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
153{
154 struct lpfc_sli *psli = &phba->sli;
155 MAILBOX_t *pmbox = &pmb->mb;
156 int i, rc;
157
158 for (i = 0; i < psli->num_rings; i++) {
159 phba->hba_state = LPFC_INIT_MBX_CMDS;
160 lpfc_config_ring(phba, i, pmb);
161 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
162 if (rc != MBX_SUCCESS) {
163 lpfc_printf_log(phba,
164 KERN_ERR,
165 LOG_INIT,
166 "%d:0446 Adapter failed to init, "
167 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
168 "ring %d\n",
169 phba->brd_no,
170 pmbox->mbxCommand,
171 pmbox->mbxStatus,
172 i);
173 phba->hba_state = LPFC_HBA_ERROR;
174 return -ENXIO;
175 }
176 }
177 return 0;
178}
179
180static int
181lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
182 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
183{
184 uint16_t iotag;
185
186 list_add_tail(&piocb->list, &pring->txcmplq);
187 pring->txcmplq_cnt++;
188 if (unlikely(pring->ringno == LPFC_ELS_RING))
189 mod_timer(&phba->els_tmofunc,
190 jiffies + HZ * (phba->fc_ratov << 1));
191
192 if (pring->fast_lookup) {
193 /* Setup fast lookup based on iotag for completion */
194 iotag = piocb->iocb.ulpIoTag;
195 if (iotag && (iotag < pring->fast_iotag))
196 *(pring->fast_lookup + iotag) = piocb;
197 else {
198
199 /* Cmd ring <ringno> put: iotag <iotag> greater then
200 configured max <fast_iotag> wd0 <icmd> */
201 lpfc_printf_log(phba,
202 KERN_ERR,
203 LOG_SLI,
204 "%d:0316 Cmd ring %d put: iotag x%x "
205 "greater then configured max x%x "
206 "wd0 x%x\n",
207 phba->brd_no,
208 pring->ringno, iotag,
209 pring->fast_iotag,
210 *(((uint32_t *)(&piocb->iocb)) + 7));
211 }
212 }
213 return (0);
214}
215
216static struct lpfc_iocbq *
217lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
218{
219 struct list_head *dlp;
220 struct lpfc_iocbq *cmd_iocb;
221
222 dlp = &pring->txq;
223 cmd_iocb = NULL;
224 list_remove_head((&pring->txq), cmd_iocb,
225 struct lpfc_iocbq,
226 list);
227 if (cmd_iocb) {
228 /* If the first ptr is not equal to the list header,
229 * deque the IOCBQ_t and return it.
230 */
231 pring->txq_cnt--;
232 }
233 return (cmd_iocb);
234}
235
236static IOCB_t *
237lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
238{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400239 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500240 uint32_t max_cmd_idx = pring->numCiocb;
241 IOCB_t *iocb = NULL;
242
243 if ((pring->next_cmdidx == pring->cmdidx) &&
244 (++pring->next_cmdidx >= max_cmd_idx))
245 pring->next_cmdidx = 0;
246
247 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
248
249 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
250
251 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
253 "%d:0315 Ring %d issue: portCmdGet %d "
254 "is bigger then cmd ring %d\n",
255 phba->brd_no, pring->ringno,
256 pring->local_getidx, max_cmd_idx);
257
258 phba->hba_state = LPFC_HBA_ERROR;
259 /*
260 * All error attention handlers are posted to
261 * worker thread
262 */
263 phba->work_ha |= HA_ERATT;
264 phba->work_hs = HS_FFER3;
265 if (phba->work_wait)
266 wake_up(phba->work_wait);
267
268 return NULL;
269 }
270
271 if (pring->local_getidx == pring->next_cmdidx)
272 return NULL;
273 }
274
275 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
276
277 return iocb;
278}
279
James Bottomley604a3e32005-10-29 10:28:33 -0500280uint16_t
281lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
dea31012005-04-17 16:05:31 -0500282{
James Bottomley604a3e32005-10-29 10:28:33 -0500283 struct lpfc_iocbq ** new_arr;
284 struct lpfc_iocbq ** old_arr;
285 size_t new_len;
286 struct lpfc_sli *psli = &phba->sli;
287 uint16_t iotag;
dea31012005-04-17 16:05:31 -0500288
James Bottomley604a3e32005-10-29 10:28:33 -0500289 spin_lock_irq(phba->host->host_lock);
290 iotag = psli->last_iotag;
291 if(++iotag < psli->iocbq_lookup_len) {
292 psli->last_iotag = iotag;
293 psli->iocbq_lookup[iotag] = iocbq;
294 spin_unlock_irq(phba->host->host_lock);
295 iocbq->iotag = iotag;
296 return iotag;
297 }
298 else if (psli->iocbq_lookup_len < (0xffff
299 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
300 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
301 spin_unlock_irq(phba->host->host_lock);
302 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
303 GFP_KERNEL);
304 if (new_arr) {
305 memset((char *)new_arr, 0,
306 new_len * sizeof (struct lpfc_iocbq *));
307 spin_lock_irq(phba->host->host_lock);
308 old_arr = psli->iocbq_lookup;
309 if (new_len <= psli->iocbq_lookup_len) {
310 /* highly unprobable case */
311 kfree(new_arr);
312 iotag = psli->last_iotag;
313 if(++iotag < psli->iocbq_lookup_len) {
314 psli->last_iotag = iotag;
315 psli->iocbq_lookup[iotag] = iocbq;
316 spin_unlock_irq(phba->host->host_lock);
317 iocbq->iotag = iotag;
318 return iotag;
319 }
320 spin_unlock_irq(phba->host->host_lock);
321 return 0;
322 }
323 if (psli->iocbq_lookup)
324 memcpy(new_arr, old_arr,
325 ((psli->last_iotag + 1) *
326 sizeof (struct lpfc_iocbq *)));
327 psli->iocbq_lookup = new_arr;
328 psli->iocbq_lookup_len = new_len;
329 psli->last_iotag = iotag;
330 psli->iocbq_lookup[iotag] = iocbq;
331 spin_unlock_irq(phba->host->host_lock);
332 iocbq->iotag = iotag;
333 kfree(old_arr);
334 return iotag;
335 }
dea31012005-04-17 16:05:31 -0500336 }
337
James Bottomley604a3e32005-10-29 10:28:33 -0500338 lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
339 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
340 phba->brd_no, psli->last_iotag);
dea31012005-04-17 16:05:31 -0500341
James Bottomley604a3e32005-10-29 10:28:33 -0500342 return 0;
dea31012005-04-17 16:05:31 -0500343}
344
345static void
346lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
347 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
348{
349 /*
James Bottomley604a3e32005-10-29 10:28:33 -0500350 * Set up an iotag
dea31012005-04-17 16:05:31 -0500351 */
James Bottomley604a3e32005-10-29 10:28:33 -0500352 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea31012005-04-17 16:05:31 -0500353
354 /*
355 * Issue iocb command to adapter
356 */
357 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
358 wmb();
359 pring->stats.iocb_cmd++;
360
361 /*
362 * If there is no completion routine to call, we can release the
363 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
364 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
365 */
366 if (nextiocb->iocb_cmpl)
367 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
James Bottomley604a3e32005-10-29 10:28:33 -0500368 else
369 lpfc_sli_release_iocbq(phba, nextiocb);
dea31012005-04-17 16:05:31 -0500370
371 /*
372 * Let the HBA know what IOCB slot will be the next one the
373 * driver will put a command into.
374 */
375 pring->cmdidx = pring->next_cmdidx;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -0400376 writel(pring->cmdidx, phba->MBslimaddr
dea31012005-04-17 16:05:31 -0500377 + (SLIMOFF + (pring->ringno * 2)) * 4);
378}
379
380static void
381lpfc_sli_update_full_ring(struct lpfc_hba * phba,
382 struct lpfc_sli_ring *pring)
383{
384 int ringno = pring->ringno;
385
386 pring->flag |= LPFC_CALL_RING_AVAILABLE;
387
388 wmb();
389
390 /*
391 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
392 * The HBA will tell us when an IOCB entry is available.
393 */
394 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
395 readl(phba->CAregaddr); /* flush */
396
397 pring->stats.iocb_cmd_full++;
398}
399
400static void
401lpfc_sli_update_ring(struct lpfc_hba * phba,
402 struct lpfc_sli_ring *pring)
403{
404 int ringno = pring->ringno;
405
406 /*
407 * Tell the HBA that there is work to do in this ring.
408 */
409 wmb();
410 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
411 readl(phba->CAregaddr); /* flush */
412}
413
414static void
415lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
416{
417 IOCB_t *iocb;
418 struct lpfc_iocbq *nextiocb;
419
420 /*
421 * Check to see if:
422 * (a) there is anything on the txq to send
423 * (b) link is up
424 * (c) link attention events can be processed (fcp ring only)
425 * (d) IOCB processing is not blocked by the outstanding mbox command.
426 */
427 if (pring->txq_cnt &&
428 (phba->hba_state > LPFC_LINK_DOWN) &&
429 (pring->ringno != phba->sli.fcp_ring ||
430 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
431 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
432
433 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
434 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
435 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
436
437 if (iocb)
438 lpfc_sli_update_ring(phba, pring);
439 else
440 lpfc_sli_update_full_ring(phba, pring);
441 }
442
443 return;
444}
445
446/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
447static void
448lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
449{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400450 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
dea31012005-04-17 16:05:31 -0500451
452 /* If the ring is active, flag it */
453 if (phba->sli.ring[ringno].cmdringaddr) {
454 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
455 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
456 /*
457 * Force update of the local copy of cmdGetInx
458 */
459 phba->sli.ring[ringno].local_getidx
460 = le32_to_cpu(pgp->cmdGetInx);
461 spin_lock_irq(phba->host->host_lock);
462 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
463 spin_unlock_irq(phba->host->host_lock);
464 }
465 }
466}
467
468static int
469lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
470{
471 uint8_t ret;
472
473 switch (mbxCommand) {
474 case MBX_LOAD_SM:
475 case MBX_READ_NV:
476 case MBX_WRITE_NV:
477 case MBX_RUN_BIU_DIAG:
478 case MBX_INIT_LINK:
479 case MBX_DOWN_LINK:
480 case MBX_CONFIG_LINK:
481 case MBX_CONFIG_RING:
482 case MBX_RESET_RING:
483 case MBX_READ_CONFIG:
484 case MBX_READ_RCONFIG:
485 case MBX_READ_SPARM:
486 case MBX_READ_STATUS:
487 case MBX_READ_RPI:
488 case MBX_READ_XRI:
489 case MBX_READ_REV:
490 case MBX_READ_LNK_STAT:
491 case MBX_REG_LOGIN:
492 case MBX_UNREG_LOGIN:
493 case MBX_READ_LA:
494 case MBX_CLEAR_LA:
495 case MBX_DUMP_MEMORY:
496 case MBX_DUMP_CONTEXT:
497 case MBX_RUN_DIAGS:
498 case MBX_RESTART:
499 case MBX_UPDATE_CFG:
500 case MBX_DOWN_LOAD:
501 case MBX_DEL_LD_ENTRY:
502 case MBX_RUN_PROGRAM:
503 case MBX_SET_MASK:
504 case MBX_SET_SLIM:
505 case MBX_UNREG_D_ID:
506 case MBX_CONFIG_FARP:
507 case MBX_LOAD_AREA:
508 case MBX_RUN_BIU_DIAG64:
509 case MBX_CONFIG_PORT:
510 case MBX_READ_SPARM64:
511 case MBX_READ_RPI64:
512 case MBX_REG_LOGIN64:
513 case MBX_READ_LA64:
514 case MBX_FLASH_WR_ULA:
515 case MBX_SET_DEBUG:
516 case MBX_LOAD_EXP_ROM:
517 ret = mbxCommand;
518 break;
519 default:
520 ret = MBX_SHUTDOWN;
521 break;
522 }
523 return (ret);
524}
525static void
526lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
527{
528 wait_queue_head_t *pdone_q;
529
530 /*
531 * If pdone_q is empty, the driver thread gave up waiting and
532 * continued running.
533 */
534 pdone_q = (wait_queue_head_t *) pmboxq->context1;
535 if (pdone_q)
536 wake_up_interruptible(pdone_q);
537 return;
538}
539
540void
541lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
542{
543 struct lpfc_dmabuf *mp;
544 mp = (struct lpfc_dmabuf *) (pmb->context1);
545 if (mp) {
546 lpfc_mbuf_free(phba, mp->virt, mp->phys);
547 kfree(mp);
548 }
549 mempool_free( pmb, phba->mbox_mem_pool);
550 return;
551}
552
553int
554lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
555{
556 MAILBOX_t *mbox;
557 MAILBOX_t *pmbox;
558 LPFC_MBOXQ_t *pmb;
559 struct lpfc_sli *psli;
560 int i, rc;
561 uint32_t process_next;
562
563 psli = &phba->sli;
564 /* We should only get here if we are in SLI2 mode */
565 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
566 return (1);
567 }
568
569 phba->sli.slistat.mbox_event++;
570
571 /* Get a Mailbox buffer to setup mailbox commands for callback */
572 if ((pmb = phba->sli.mbox_active)) {
573 pmbox = &pmb->mb;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400574 mbox = &phba->slim2p->mbx;
dea31012005-04-17 16:05:31 -0500575
576 /* First check out the status word */
577 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
578
579 /* Sanity check to ensure the host owns the mailbox */
580 if (pmbox->mbxOwner != OWN_HOST) {
581 /* Lets try for a while */
582 for (i = 0; i < 10240; i++) {
583 /* First copy command data */
584 lpfc_sli_pcimem_bcopy(mbox, pmbox,
585 sizeof (uint32_t));
586 if (pmbox->mbxOwner == OWN_HOST)
587 goto mbout;
588 }
589 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
590 <status> */
591 lpfc_printf_log(phba,
592 KERN_ERR,
593 LOG_MBOX | LOG_SLI,
594 "%d:0304 Stray Mailbox Interrupt "
595 "mbxCommand x%x mbxStatus x%x\n",
596 phba->brd_no,
597 pmbox->mbxCommand,
598 pmbox->mbxStatus);
599
600 spin_lock_irq(phba->host->host_lock);
601 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
602 spin_unlock_irq(phba->host->host_lock);
603 return (1);
604 }
605
606 mbout:
607 del_timer_sync(&phba->sli.mbox_tmo);
608 phba->work_hba_events &= ~WORKER_MBOX_TMO;
609
610 /*
611 * It is a fatal error if unknown mbox command completion.
612 */
613 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
614 MBX_SHUTDOWN) {
615
616 /* Unknow mailbox command compl */
617 lpfc_printf_log(phba,
618 KERN_ERR,
619 LOG_MBOX | LOG_SLI,
620 "%d:0323 Unknown Mailbox command %x Cmpl\n",
621 phba->brd_no,
622 pmbox->mbxCommand);
623 phba->hba_state = LPFC_HBA_ERROR;
624 phba->work_hs = HS_FFER3;
625 lpfc_handle_eratt(phba);
626 return (0);
627 }
628
629 phba->sli.mbox_active = NULL;
630 if (pmbox->mbxStatus) {
631 phba->sli.slistat.mbox_stat_err++;
632 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
633 /* Mbox cmd cmpl error - RETRYing */
634 lpfc_printf_log(phba,
635 KERN_INFO,
636 LOG_MBOX | LOG_SLI,
637 "%d:0305 Mbox cmd cmpl error - "
638 "RETRYing Data: x%x x%x x%x x%x\n",
639 phba->brd_no,
640 pmbox->mbxCommand,
641 pmbox->mbxStatus,
642 pmbox->un.varWords[0],
643 phba->hba_state);
644 pmbox->mbxStatus = 0;
645 pmbox->mbxOwner = OWN_HOST;
646 spin_lock_irq(phba->host->host_lock);
647 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
648 spin_unlock_irq(phba->host->host_lock);
649 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
650 if (rc == MBX_SUCCESS)
651 return (0);
652 }
653 }
654
655 /* Mailbox cmd <cmd> Cmpl <cmpl> */
656 lpfc_printf_log(phba,
657 KERN_INFO,
658 LOG_MBOX | LOG_SLI,
659 "%d:0307 Mailbox cmd x%x Cmpl x%p "
660 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
661 phba->brd_no,
662 pmbox->mbxCommand,
663 pmb->mbox_cmpl,
664 *((uint32_t *) pmbox),
665 pmbox->un.varWords[0],
666 pmbox->un.varWords[1],
667 pmbox->un.varWords[2],
668 pmbox->un.varWords[3],
669 pmbox->un.varWords[4],
670 pmbox->un.varWords[5],
671 pmbox->un.varWords[6],
672 pmbox->un.varWords[7]);
673
674 if (pmb->mbox_cmpl) {
675 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
676 pmb->mbox_cmpl(phba,pmb);
677 }
678 }
679
680
681 do {
682 process_next = 0; /* by default don't loop */
683 spin_lock_irq(phba->host->host_lock);
684 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
685
686 /* Process next mailbox command if there is one */
687 if ((pmb = lpfc_mbox_get(phba))) {
688 spin_unlock_irq(phba->host->host_lock);
689 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
690 if (rc == MBX_NOT_FINISHED) {
691 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
692 pmb->mbox_cmpl(phba,pmb);
693 process_next = 1;
694 continue; /* loop back */
695 }
696 } else {
697 spin_unlock_irq(phba->host->host_lock);
698 /* Turn on IOCB processing */
699 for (i = 0; i < phba->sli.num_rings; i++) {
700 lpfc_sli_turn_on_ring(phba, i);
701 }
702
703 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
704 while (!list_empty(&phba->freebufList)) {
705 struct lpfc_dmabuf *mp;
706
707 mp = NULL;
708 list_remove_head((&phba->freebufList),
709 mp,
710 struct lpfc_dmabuf,
711 list);
712 if (mp) {
713 lpfc_mbuf_free(phba, mp->virt,
714 mp->phys);
715 kfree(mp);
716 }
717 }
718 }
719
720 } while (process_next);
721
722 return (0);
723}
724static int
725lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
726 struct lpfc_iocbq *saveq)
727{
728 IOCB_t * irsp;
729 WORD5 * w5p;
730 uint32_t Rctl, Type;
731 uint32_t match, i;
732
733 match = 0;
734 irsp = &(saveq->iocb);
735 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
736 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
737 Rctl = FC_ELS_REQ;
738 Type = FC_ELS_DATA;
739 } else {
740 w5p =
741 (WORD5 *) & (saveq->iocb.un.
742 ulpWord[5]);
743 Rctl = w5p->hcsw.Rctl;
744 Type = w5p->hcsw.Type;
745
746 /* Firmware Workaround */
747 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
748 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
749 Rctl = FC_ELS_REQ;
750 Type = FC_ELS_DATA;
751 w5p->hcsw.Rctl = Rctl;
752 w5p->hcsw.Type = Type;
753 }
754 }
755 /* unSolicited Responses */
756 if (pring->prt[0].profile) {
757 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
758 match = 1;
759 } else {
760 /* We must search, based on rctl / type
761 for the right routine */
762 for (i = 0; i < pring->num_mask;
763 i++) {
764 if ((pring->prt[i].rctl ==
765 Rctl)
766 && (pring->prt[i].
767 type == Type)) {
768 (pring->prt[i].lpfc_sli_rcv_unsol_event)
769 (phba, pring, saveq);
770 match = 1;
771 break;
772 }
773 }
774 }
775 if (match == 0) {
776 /* Unexpected Rctl / Type received */
777 /* Ring <ringno> handler: unexpected
778 Rctl <Rctl> Type <Type> received */
779 lpfc_printf_log(phba,
780 KERN_WARNING,
781 LOG_SLI,
782 "%d:0313 Ring %d handler: unexpected Rctl x%x "
783 "Type x%x received \n",
784 phba->brd_no,
785 pring->ringno,
786 Rctl,
787 Type);
788 }
789 return(1);
790}
791
792static struct lpfc_iocbq *
James Bottomley604a3e32005-10-29 10:28:33 -0500793lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
794 struct lpfc_sli_ring * pring,
795 struct lpfc_iocbq * prspiocb)
dea31012005-04-17 16:05:31 -0500796{
dea31012005-04-17 16:05:31 -0500797 struct lpfc_iocbq *cmd_iocb = NULL;
798 uint16_t iotag;
799
James Bottomley604a3e32005-10-29 10:28:33 -0500800 iotag = prspiocb->iocb.ulpIoTag;
dea31012005-04-17 16:05:31 -0500801
James Bottomley604a3e32005-10-29 10:28:33 -0500802 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
803 cmd_iocb = phba->sli.iocbq_lookup[iotag];
804 list_del(&cmd_iocb->list);
805 pring->txcmplq_cnt--;
806 return cmd_iocb;
dea31012005-04-17 16:05:31 -0500807 }
808
dea31012005-04-17 16:05:31 -0500809 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
James Bottomley604a3e32005-10-29 10:28:33 -0500810 "%d:0317 iotag x%x is out off "
811 "range: max iotag x%x wd0 x%x\n",
812 phba->brd_no, iotag,
813 phba->sli.last_iotag,
814 *(((uint32_t *) &prspiocb->iocb) + 7));
dea31012005-04-17 16:05:31 -0500815 return NULL;
816}
817
818static int
819lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
820 struct lpfc_iocbq *saveq)
821{
822 struct lpfc_iocbq * cmdiocbp;
823 int rc = 1;
824 unsigned long iflag;
825
826 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
827 spin_lock_irqsave(phba->host->host_lock, iflag);
James Bottomley604a3e32005-10-29 10:28:33 -0500828 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
dea31012005-04-17 16:05:31 -0500829 if (cmdiocbp) {
830 if (cmdiocbp->iocb_cmpl) {
831 /*
832 * Post all ELS completions to the worker thread.
833 * All other are passed to the completion callback.
834 */
835 if (pring->ringno == LPFC_ELS_RING) {
836 spin_unlock_irqrestore(phba->host->host_lock,
837 iflag);
838 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
839 spin_lock_irqsave(phba->host->host_lock, iflag);
840 }
841 else {
dea31012005-04-17 16:05:31 -0500842 spin_unlock_irqrestore(phba->host->host_lock,
843 iflag);
844 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
845 spin_lock_irqsave(phba->host->host_lock, iflag);
846 }
James Bottomley604a3e32005-10-29 10:28:33 -0500847 } else
848 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea31012005-04-17 16:05:31 -0500849 } else {
850 /*
851 * Unknown initiating command based on the response iotag.
852 * This could be the case on the ELS ring because of
853 * lpfc_els_abort().
854 */
855 if (pring->ringno != LPFC_ELS_RING) {
856 /*
857 * Ring <ringno> handler: unexpected completion IoTag
858 * <IoTag>
859 */
860 lpfc_printf_log(phba,
861 KERN_WARNING,
862 LOG_SLI,
863 "%d:0322 Ring %d handler: unexpected "
864 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
865 phba->brd_no,
866 pring->ringno,
867 saveq->iocb.ulpIoTag,
868 saveq->iocb.ulpStatus,
869 saveq->iocb.un.ulpWord[4],
870 saveq->iocb.ulpCommand,
871 saveq->iocb.ulpContext);
872 }
873 }
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -0400874
dea31012005-04-17 16:05:31 -0500875 spin_unlock_irqrestore(phba->host->host_lock, iflag);
876 return rc;
877}
878
879/*
880 * This routine presumes LPFC_FCP_RING handling and doesn't bother
881 * to check it explicitly.
882 */
883static int
884lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
885 struct lpfc_sli_ring * pring, uint32_t mask)
886{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400887 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500888 IOCB_t *irsp = NULL;
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400889 IOCB_t *entry = NULL;
dea31012005-04-17 16:05:31 -0500890 struct lpfc_iocbq *cmdiocbq = NULL;
891 struct lpfc_iocbq rspiocbq;
dea31012005-04-17 16:05:31 -0500892 uint32_t status;
893 uint32_t portRspPut, portRspMax;
894 int rc = 1;
895 lpfc_iocb_type type;
896 unsigned long iflag;
897 uint32_t rsp_cmpl = 0;
898 void __iomem *to_slim;
899
900 spin_lock_irqsave(phba->host->host_lock, iflag);
901 pring->stats.iocb_event++;
902
dea31012005-04-17 16:05:31 -0500903 /*
904 * The next available response entry should never exceed the maximum
905 * entries. If it does, treat it as an adapter hardware error.
906 */
907 portRspMax = pring->numRiocb;
908 portRspPut = le32_to_cpu(pgp->rspPutInx);
909 if (unlikely(portRspPut >= portRspMax)) {
910 /*
911 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
912 * rsp ring <portRspMax>
913 */
914 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
915 "%d:0312 Ring %d handler: portRspPut %d "
916 "is bigger then rsp ring %d\n",
917 phba->brd_no, pring->ringno, portRspPut,
918 portRspMax);
919
920 phba->hba_state = LPFC_HBA_ERROR;
921
922 /* All error attention handlers are posted to worker thread */
923 phba->work_ha |= HA_ERATT;
924 phba->work_hs = HS_FFER3;
925 if (phba->work_wait)
926 wake_up(phba->work_wait);
927
928 spin_unlock_irqrestore(phba->host->host_lock, iflag);
929 return 1;
930 }
931
932 rmb();
933 while (pring->rspidx != portRspPut) {
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400934 /*
935 * Fetch an entry off the ring and copy it into a local data
936 * structure. The copy involves a byte-swap since the
937 * network byte order and pci byte orders are different.
938 */
939 entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
940 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
941 (uint32_t *) &rspiocbq.iocb,
942 sizeof (IOCB_t));
943 irsp = &rspiocbq.iocb;
944
dea31012005-04-17 16:05:31 -0500945 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
946 pring->stats.iocb_rsp++;
947 rsp_cmpl++;
948
949 if (unlikely(irsp->ulpStatus)) {
950 /* Rsp ring <ringno> error: IOCB */
951 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
952 "%d:0326 Rsp Ring %d error: IOCB Data: "
953 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
954 phba->brd_no, pring->ringno,
955 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
956 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
957 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
958 *(((uint32_t *) irsp) + 6),
959 *(((uint32_t *) irsp) + 7));
960 }
961
962 switch (type) {
963 case LPFC_ABORT_IOCB:
964 case LPFC_SOL_IOCB:
965 /*
966 * Idle exchange closed via ABTS from port. No iocb
967 * resources need to be recovered.
968 */
969 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
970 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
971 "Skipping completion\n", __FUNCTION__,
972 irsp->ulpCommand);
973 break;
974 }
975
James Bottomley604a3e32005-10-29 10:28:33 -0500976 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
977 &rspiocbq);
dea31012005-04-17 16:05:31 -0500978 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
979 spin_unlock_irqrestore(
980 phba->host->host_lock, iflag);
981 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
982 &rspiocbq);
983 spin_lock_irqsave(phba->host->host_lock,
984 iflag);
985 }
986 break;
987 default:
988 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
989 char adaptermsg[LPFC_MAX_ADPTMSG];
990 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
991 memcpy(&adaptermsg[0], (uint8_t *) irsp,
992 MAX_MSG_DATA);
993 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
994 phba->brd_no, adaptermsg);
995 } else {
996 /* Unknown IOCB command */
997 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
998 "%d:0321 Unknown IOCB command "
999 "Data: x%x, x%x x%x x%x x%x\n",
1000 phba->brd_no, type, irsp->ulpCommand,
1001 irsp->ulpStatus, irsp->ulpIoTag,
1002 irsp->ulpContext);
1003 }
1004 break;
1005 }
1006
1007 /*
1008 * The response IOCB has been processed. Update the ring
1009 * pointer in SLIM. If the port response put pointer has not
1010 * been updated, sync the pgp->rspPutInx and fetch the new port
1011 * response put pointer.
1012 */
1013 if (++pring->rspidx >= portRspMax)
1014 pring->rspidx = 0;
1015
1016 to_slim = phba->MBslimaddr +
1017 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -04001018 writel(pring->rspidx, to_slim);
dea31012005-04-17 16:05:31 -05001019
1020 if (pring->rspidx == portRspPut)
1021 portRspPut = le32_to_cpu(pgp->rspPutInx);
1022 }
1023
1024 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1025 pring->stats.iocb_rsp_full++;
1026 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1027 writel(status, phba->CAregaddr);
1028 readl(phba->CAregaddr);
1029 }
1030 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1031 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1032 pring->stats.iocb_cmd_empty++;
1033
1034 /* Force update of the local copy of cmdGetInx */
1035 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1036 lpfc_sli_resume_iocb(phba, pring);
1037
1038 if ((pring->lpfc_sli_cmd_available))
1039 (pring->lpfc_sli_cmd_available) (phba, pring);
1040
1041 }
1042
1043 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1044 return rc;
1045}
1046
1047
1048int
1049lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1050 struct lpfc_sli_ring * pring, uint32_t mask)
1051{
1052 IOCB_t *entry;
1053 IOCB_t *irsp = NULL;
1054 struct lpfc_iocbq *rspiocbp = NULL;
1055 struct lpfc_iocbq *next_iocb;
1056 struct lpfc_iocbq *cmdiocbp;
1057 struct lpfc_iocbq *saveq;
1058 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001059 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -05001060 uint8_t iocb_cmd_type;
1061 lpfc_iocb_type type;
1062 uint32_t status, free_saveq;
1063 uint32_t portRspPut, portRspMax;
1064 int rc = 1;
1065 unsigned long iflag;
1066 void __iomem *to_slim;
1067
1068 spin_lock_irqsave(phba->host->host_lock, iflag);
1069 pring->stats.iocb_event++;
1070
dea31012005-04-17 16:05:31 -05001071 /*
1072 * The next available response entry should never exceed the maximum
1073 * entries. If it does, treat it as an adapter hardware error.
1074 */
1075 portRspMax = pring->numRiocb;
1076 portRspPut = le32_to_cpu(pgp->rspPutInx);
1077 if (portRspPut >= portRspMax) {
1078 /*
1079 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1080 * rsp ring <portRspMax>
1081 */
1082 lpfc_printf_log(phba,
1083 KERN_ERR,
1084 LOG_SLI,
1085 "%d:0312 Ring %d handler: portRspPut %d "
1086 "is bigger then rsp ring %d\n",
1087 phba->brd_no,
1088 pring->ringno, portRspPut, portRspMax);
1089
1090 phba->hba_state = LPFC_HBA_ERROR;
1091 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1092
1093 phba->work_hs = HS_FFER3;
1094 lpfc_handle_eratt(phba);
1095
1096 return 1;
1097 }
1098
1099 rmb();
1100 lpfc_iocb_list = &phba->lpfc_iocb_list;
1101 while (pring->rspidx != portRspPut) {
1102 /*
1103 * Build a completion list and call the appropriate handler.
1104 * The process is to get the next available response iocb, get
1105 * a free iocb from the list, copy the response data into the
1106 * free iocb, insert to the continuation list, and update the
1107 * next response index to slim. This process makes response
1108 * iocb's in the ring available to DMA as fast as possible but
1109 * pays a penalty for a copy operation. Since the iocb is
1110 * only 32 bytes, this penalty is considered small relative to
1111 * the PCI reads for register values and a slim write. When
1112 * the ulpLe field is set, the entire Command has been
1113 * received.
1114 */
1115 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1116 list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
1117 list);
1118 if (rspiocbp == NULL) {
1119 printk(KERN_ERR "%s: out of buffers! Failing "
1120 "completion.\n", __FUNCTION__);
1121 break;
1122 }
1123
1124 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1125 irsp = &rspiocbp->iocb;
1126
1127 if (++pring->rspidx >= portRspMax)
1128 pring->rspidx = 0;
1129
1130 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1131 + 1) * 4;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -04001132 writel(pring->rspidx, to_slim);
dea31012005-04-17 16:05:31 -05001133
1134 if (list_empty(&(pring->iocb_continueq))) {
1135 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1136 } else {
1137 list_add_tail(&rspiocbp->list,
1138 &(pring->iocb_continueq));
1139 }
1140
1141 pring->iocb_continueq_cnt++;
1142 if (irsp->ulpLe) {
1143 /*
1144 * By default, the driver expects to free all resources
1145 * associated with this iocb completion.
1146 */
1147 free_saveq = 1;
1148 saveq = list_get_first(&pring->iocb_continueq,
1149 struct lpfc_iocbq, list);
1150 irsp = &(saveq->iocb);
1151 list_del_init(&pring->iocb_continueq);
1152 pring->iocb_continueq_cnt = 0;
1153
1154 pring->stats.iocb_rsp++;
1155
1156 if (irsp->ulpStatus) {
1157 /* Rsp ring <ringno> error: IOCB */
1158 lpfc_printf_log(phba,
1159 KERN_WARNING,
1160 LOG_SLI,
1161 "%d:0328 Rsp Ring %d error: IOCB Data: "
1162 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1163 phba->brd_no,
1164 pring->ringno,
1165 irsp->un.ulpWord[0],
1166 irsp->un.ulpWord[1],
1167 irsp->un.ulpWord[2],
1168 irsp->un.ulpWord[3],
1169 irsp->un.ulpWord[4],
1170 irsp->un.ulpWord[5],
1171 *(((uint32_t *) irsp) + 6),
1172 *(((uint32_t *) irsp) + 7));
1173 }
1174
1175 /*
1176 * Fetch the IOCB command type and call the correct
1177 * completion routine. Solicited and Unsolicited
1178 * IOCBs on the ELS ring get freed back to the
1179 * lpfc_iocb_list by the discovery kernel thread.
1180 */
1181 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1182 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1183 if (type == LPFC_SOL_IOCB) {
1184 spin_unlock_irqrestore(phba->host->host_lock,
1185 iflag);
1186 rc = lpfc_sli_process_sol_iocb(phba, pring,
1187 saveq);
1188 spin_lock_irqsave(phba->host->host_lock, iflag);
1189 } else if (type == LPFC_UNSOL_IOCB) {
1190 spin_unlock_irqrestore(phba->host->host_lock,
1191 iflag);
1192 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1193 saveq);
1194 spin_lock_irqsave(phba->host->host_lock, iflag);
1195 } else if (type == LPFC_ABORT_IOCB) {
1196 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1197 ((cmdiocbp =
James Bottomley604a3e32005-10-29 10:28:33 -05001198 lpfc_sli_iocbq_lookup(phba, pring,
1199 saveq)))) {
dea31012005-04-17 16:05:31 -05001200 /* Call the specified completion
1201 routine */
1202 if (cmdiocbp->iocb_cmpl) {
1203 spin_unlock_irqrestore(
1204 phba->host->host_lock,
1205 iflag);
1206 (cmdiocbp->iocb_cmpl) (phba,
1207 cmdiocbp, saveq);
1208 spin_lock_irqsave(
1209 phba->host->host_lock,
1210 iflag);
James Bottomley604a3e32005-10-29 10:28:33 -05001211 } else
1212 lpfc_sli_release_iocbq(phba,
1213 cmdiocbp);
dea31012005-04-17 16:05:31 -05001214 }
1215 } else if (type == LPFC_UNKNOWN_IOCB) {
1216 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1217
1218 char adaptermsg[LPFC_MAX_ADPTMSG];
1219
1220 memset(adaptermsg, 0,
1221 LPFC_MAX_ADPTMSG);
1222 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1223 MAX_MSG_DATA);
1224 dev_warn(&((phba->pcidev)->dev),
1225 "lpfc%d: %s",
1226 phba->brd_no, adaptermsg);
1227 } else {
1228 /* Unknown IOCB command */
1229 lpfc_printf_log(phba,
1230 KERN_ERR,
1231 LOG_SLI,
1232 "%d:0321 Unknown IOCB command "
1233 "Data: x%x x%x x%x x%x\n",
1234 phba->brd_no,
1235 irsp->ulpCommand,
1236 irsp->ulpStatus,
1237 irsp->ulpIoTag,
1238 irsp->ulpContext);
1239 }
1240 }
1241
1242 if (free_saveq) {
1243 if (!list_empty(&saveq->list)) {
1244 list_for_each_entry_safe(rspiocbp,
1245 next_iocb,
1246 &saveq->list,
1247 list) {
James Bottomley604a3e32005-10-29 10:28:33 -05001248 lpfc_sli_release_iocbq(phba,
1249 rspiocbp);
dea31012005-04-17 16:05:31 -05001250 }
1251 }
1252
James Bottomley604a3e32005-10-29 10:28:33 -05001253 lpfc_sli_release_iocbq(phba, saveq);
dea31012005-04-17 16:05:31 -05001254 }
1255 }
1256
1257 /*
1258 * If the port response put pointer has not been updated, sync
1259 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1260 * response put pointer.
1261 */
1262 if (pring->rspidx == portRspPut) {
1263 portRspPut = le32_to_cpu(pgp->rspPutInx);
1264 }
1265 } /* while (pring->rspidx != portRspPut) */
1266
1267 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1268 /* At least one response entry has been freed */
1269 pring->stats.iocb_rsp_full++;
1270 /* SET RxRE_RSP in Chip Att register */
1271 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1272 writel(status, phba->CAregaddr);
1273 readl(phba->CAregaddr); /* flush */
1274 }
1275 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1276 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1277 pring->stats.iocb_cmd_empty++;
1278
1279 /* Force update of the local copy of cmdGetInx */
1280 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1281 lpfc_sli_resume_iocb(phba, pring);
1282
1283 if ((pring->lpfc_sli_cmd_available))
1284 (pring->lpfc_sli_cmd_available) (phba, pring);
1285
1286 }
1287
1288 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1289 return rc;
1290}
1291
1292int
1293lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1294{
1295 struct lpfc_iocbq *iocb, *next_iocb;
1296 IOCB_t *icmd = NULL, *cmd = NULL;
1297 int errcnt;
dea31012005-04-17 16:05:31 -05001298
1299 errcnt = 0;
1300
1301 /* Error everything on txq and txcmplq
1302 * First do the txq.
1303 */
1304 spin_lock_irq(phba->host->host_lock);
1305 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1306 list_del_init(&iocb->list);
1307 if (iocb->iocb_cmpl) {
1308 icmd = &iocb->iocb;
1309 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1310 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1311 spin_unlock_irq(phba->host->host_lock);
1312 (iocb->iocb_cmpl) (phba, iocb, iocb);
1313 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05001314 } else
1315 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05001316 }
1317 pring->txq_cnt = 0;
1318 INIT_LIST_HEAD(&(pring->txq));
1319
1320 /* Next issue ABTS for everything on the txcmplq */
1321 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1322 cmd = &iocb->iocb;
1323
1324 /*
James Bottomley604a3e32005-10-29 10:28:33 -05001325 * Imediate abort of IOCB, deque and call compl
dea31012005-04-17 16:05:31 -05001326 */
dea31012005-04-17 16:05:31 -05001327
1328 list_del_init(&iocb->list);
1329 pring->txcmplq_cnt--;
1330
1331 if (iocb->iocb_cmpl) {
1332 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1333 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1334 spin_unlock_irq(phba->host->host_lock);
1335 (iocb->iocb_cmpl) (phba, iocb, iocb);
1336 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05001337 } else
1338 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05001339 }
1340
1341 INIT_LIST_HEAD(&pring->txcmplq);
1342 pring->txcmplq_cnt = 0;
1343 spin_unlock_irq(phba->host->host_lock);
1344
1345 return errcnt;
1346}
1347
1348/******************************************************************************
1349* lpfc_sli_send_reset
1350*
1351* Note: After returning from this function, the HBA cannot be accessed for
1352* 1 ms. Since we do not wish to delay in interrupt context, it is the
1353* responsibility of the caller to perform the mdelay(1) and flush via readl().
1354******************************************************************************/
1355static int
1356lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
1357{
1358 MAILBOX_t *swpmb;
1359 volatile uint32_t word0;
1360 void __iomem *to_slim;
1361 unsigned long flags = 0;
1362
1363 spin_lock_irqsave(phba->host->host_lock, flags);
1364
1365 /* A board reset must use REAL SLIM. */
1366 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1367
1368 word0 = 0;
1369 swpmb = (MAILBOX_t *) & word0;
1370 swpmb->mbxCommand = MBX_RESTART;
1371 swpmb->mbxHc = 1;
1372
1373 to_slim = phba->MBslimaddr;
1374 writel(*(uint32_t *) swpmb, to_slim);
1375 readl(to_slim); /* flush */
1376
1377 /* Only skip post after fc_ffinit is completed */
1378 if (skip_post) {
1379 word0 = 1; /* This is really setting up word1 */
1380 } else {
1381 word0 = 0; /* This is really setting up word1 */
1382 }
1383 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1384 writel(*(uint32_t *) swpmb, to_slim);
1385 readl(to_slim); /* flush */
1386
1387 /* Turn off parity checking and serr during the physical reset */
1388 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
1389 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1390 (phba->pci_cfg_value &
1391 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1392
1393 writel(HC_INITFF, phba->HCregaddr);
1394
1395 phba->hba_state = LPFC_INIT_START;
1396 spin_unlock_irqrestore(phba->host->host_lock, flags);
1397
1398 return 0;
1399}
1400
1401static int
1402lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
1403{
1404 struct lpfc_sli_ring *pring;
1405 int i;
1406 struct lpfc_dmabuf *mp, *next_mp;
1407 unsigned long flags = 0;
1408
1409 lpfc_sli_send_reset(phba, skip_post);
1410 mdelay(1);
1411
1412 spin_lock_irqsave(phba->host->host_lock, flags);
1413 /* Risk the write on flush case ie no delay after the readl */
1414 readl(phba->HCregaddr); /* flush */
1415 /* Now toggle INITFF bit set by lpfc_sli_send_reset */
1416 writel(0, phba->HCregaddr);
1417 readl(phba->HCregaddr); /* flush */
1418
1419 /* Restore PCI cmd register */
1420 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
1421
1422 /* perform board reset */
1423 phba->fc_eventTag = 0;
1424 phba->fc_myDID = 0;
1425 phba->fc_prevDID = Mask_DID;
1426
1427 /* Reset HBA */
1428 lpfc_printf_log(phba,
1429 KERN_INFO,
1430 LOG_SLI,
1431 "%d:0325 Reset HBA Data: x%x x%x x%x\n",
1432 phba->brd_no,
1433 phba->hba_state,
1434 phba->sli.sli_flag,
1435 skip_post);
1436
1437 /* Initialize relevant SLI info */
1438 for (i = 0; i < phba->sli.num_rings; i++) {
1439 pring = &phba->sli.ring[i];
1440 pring->flag = 0;
1441 pring->rspidx = 0;
1442 pring->next_cmdidx = 0;
1443 pring->local_getidx = 0;
1444 pring->cmdidx = 0;
1445 pring->missbufcnt = 0;
1446 }
1447 spin_unlock_irqrestore(phba->host->host_lock, flags);
1448
1449 if (skip_post) {
1450 mdelay(100);
1451 } else {
1452 mdelay(2000);
1453 }
1454
1455 spin_lock_irqsave(phba->host->host_lock, flags);
1456 /* Cleanup preposted buffers on the ELS ring */
1457 pring = &phba->sli.ring[LPFC_ELS_RING];
1458 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
1459 list_del(&mp->list);
1460 pring->postbufq_cnt--;
1461 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1462 kfree(mp);
1463 }
1464 spin_unlock_irqrestore(phba->host->host_lock, flags);
1465
1466 for (i = 0; i < phba->sli.num_rings; i++)
1467 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
1468
1469 return 0;
1470}
1471
1472static int
1473lpfc_sli_chipset_init(struct lpfc_hba *phba)
1474{
1475 uint32_t status, i = 0;
1476
1477 /* Read the HBA Host Status Register */
1478 status = readl(phba->HSregaddr);
1479
1480 /* Check status register to see what current state is */
1481 i = 0;
1482 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1483
1484 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1485 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1486 * 4.
1487 */
1488 if (i++ >= 20) {
1489 /* Adapter failed to init, timeout, status reg
1490 <status> */
1491 lpfc_printf_log(phba,
1492 KERN_ERR,
1493 LOG_INIT,
1494 "%d:0436 Adapter failed to init, "
1495 "timeout, status reg x%x\n",
1496 phba->brd_no,
1497 status);
1498 phba->hba_state = LPFC_HBA_ERROR;
1499 return -ETIMEDOUT;
1500 }
1501
1502 /* Check to see if any errors occurred during init */
1503 if (status & HS_FFERM) {
1504 /* ERROR: During chipset initialization */
1505 /* Adapter failed to init, chipset, status reg
1506 <status> */
1507 lpfc_printf_log(phba,
1508 KERN_ERR,
1509 LOG_INIT,
1510 "%d:0437 Adapter failed to init, "
1511 "chipset, status reg x%x\n",
1512 phba->brd_no,
1513 status);
1514 phba->hba_state = LPFC_HBA_ERROR;
1515 return -EIO;
1516 }
1517
1518 if (i <= 5) {
1519 msleep(10);
1520 } else if (i <= 10) {
1521 msleep(500);
1522 } else {
1523 msleep(2500);
1524 }
1525
1526 if (i == 15) {
1527 lpfc_sli_brdreset(phba, 0);
1528 }
1529 /* Read the HBA Host Status Register */
1530 status = readl(phba->HSregaddr);
1531 }
1532
1533 /* Check to see if any errors occurred during init */
1534 if (status & HS_FFERM) {
1535 /* ERROR: During chipset initialization */
1536 /* Adapter failed to init, chipset, status reg <status> */
1537 lpfc_printf_log(phba,
1538 KERN_ERR,
1539 LOG_INIT,
1540 "%d:0438 Adapter failed to init, chipset, "
1541 "status reg x%x\n",
1542 phba->brd_no,
1543 status);
1544 phba->hba_state = LPFC_HBA_ERROR;
1545 return -EIO;
1546 }
1547
1548 /* Clear all interrupt enable conditions */
1549 writel(0, phba->HCregaddr);
1550 readl(phba->HCregaddr); /* flush */
1551
1552 /* setup host attn register */
1553 writel(0xffffffff, phba->HAregaddr);
1554 readl(phba->HAregaddr); /* flush */
1555 return 0;
1556}
1557
1558int
1559lpfc_sli_hba_setup(struct lpfc_hba * phba)
1560{
1561 LPFC_MBOXQ_t *pmb;
1562 uint32_t resetcount = 0, rc = 0, done = 0;
1563
1564 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1565 if (!pmb) {
1566 phba->hba_state = LPFC_HBA_ERROR;
1567 return -ENOMEM;
1568 }
1569
1570 while (resetcount < 2 && !done) {
1571 phba->hba_state = 0;
1572 lpfc_sli_brdreset(phba, 0);
1573 msleep(2500);
1574 rc = lpfc_sli_chipset_init(phba);
1575 if (rc)
1576 break;
1577
1578 resetcount++;
1579
1580 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1581 * means the call was successful. Any other nonzero value is a failure,
1582 * but if ERESTART is returned, the driver may reset the HBA and try
1583 * again.
1584 */
1585 rc = lpfc_config_port_prep(phba);
1586 if (rc == -ERESTART) {
1587 phba->hba_state = 0;
1588 continue;
1589 } else if (rc) {
1590 break;
1591 }
1592
1593 phba->hba_state = LPFC_INIT_MBX_CMDS;
1594 lpfc_config_port(phba, pmb);
1595 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1596 if (rc == MBX_SUCCESS)
1597 done = 1;
1598 else {
1599 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1600 "%d:0442 Adapter failed to init, mbxCmd x%x "
1601 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1602 phba->brd_no, pmb->mb.mbxCommand,
1603 pmb->mb.mbxStatus, 0);
1604 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1605 }
1606 }
1607 if (!done)
1608 goto lpfc_sli_hba_setup_error;
1609
1610 rc = lpfc_sli_ring_map(phba, pmb);
1611
1612 if (rc)
1613 goto lpfc_sli_hba_setup_error;
1614
1615 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1616
1617 rc = lpfc_config_port_post(phba);
1618 if (rc)
1619 goto lpfc_sli_hba_setup_error;
1620
1621 goto lpfc_sli_hba_setup_exit;
1622lpfc_sli_hba_setup_error:
1623 phba->hba_state = LPFC_HBA_ERROR;
1624lpfc_sli_hba_setup_exit:
1625 mempool_free(pmb, phba->mbox_mem_pool);
1626 return rc;
1627}
1628
1629static void
1630lpfc_mbox_abort(struct lpfc_hba * phba)
1631{
1632 LPFC_MBOXQ_t *pmbox;
1633 MAILBOX_t *mb;
1634
1635 if (phba->sli.mbox_active) {
1636 del_timer_sync(&phba->sli.mbox_tmo);
1637 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1638 pmbox = phba->sli.mbox_active;
1639 mb = &pmbox->mb;
1640 phba->sli.mbox_active = NULL;
1641 if (pmbox->mbox_cmpl) {
1642 mb->mbxStatus = MBX_NOT_FINISHED;
1643 (pmbox->mbox_cmpl) (phba, pmbox);
1644 }
1645 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1646 }
1647
1648 /* Abort all the non active mailbox commands. */
1649 spin_lock_irq(phba->host->host_lock);
1650 pmbox = lpfc_mbox_get(phba);
1651 while (pmbox) {
1652 mb = &pmbox->mb;
1653 if (pmbox->mbox_cmpl) {
1654 mb->mbxStatus = MBX_NOT_FINISHED;
1655 spin_unlock_irq(phba->host->host_lock);
1656 (pmbox->mbox_cmpl) (phba, pmbox);
1657 spin_lock_irq(phba->host->host_lock);
1658 }
1659 pmbox = lpfc_mbox_get(phba);
1660 }
1661 spin_unlock_irq(phba->host->host_lock);
1662 return;
1663}
1664
1665/*! lpfc_mbox_timeout
1666 *
1667 * \pre
1668 * \post
1669 * \param hba Pointer to per struct lpfc_hba structure
1670 * \param l1 Pointer to the driver's mailbox queue.
1671 * \return
1672 * void
1673 *
1674 * \b Description:
1675 *
1676 * This routine handles mailbox timeout events at timer interrupt context.
1677 */
1678void
1679lpfc_mbox_timeout(unsigned long ptr)
1680{
1681 struct lpfc_hba *phba;
1682 unsigned long iflag;
1683
1684 phba = (struct lpfc_hba *)ptr;
1685 spin_lock_irqsave(phba->host->host_lock, iflag);
1686 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1687 phba->work_hba_events |= WORKER_MBOX_TMO;
1688 if (phba->work_wait)
1689 wake_up(phba->work_wait);
1690 }
1691 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1692}
1693
1694void
1695lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
1696{
1697 LPFC_MBOXQ_t *pmbox;
1698 MAILBOX_t *mb;
1699
1700 spin_lock_irq(phba->host->host_lock);
1701 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1702 spin_unlock_irq(phba->host->host_lock);
1703 return;
1704 }
1705
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001706 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1707
dea31012005-04-17 16:05:31 -05001708 pmbox = phba->sli.mbox_active;
1709 mb = &pmbox->mb;
1710
1711 /* Mbox cmd <mbxCommand> timeout */
1712 lpfc_printf_log(phba,
1713 KERN_ERR,
1714 LOG_MBOX | LOG_SLI,
1715 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
1716 phba->brd_no,
1717 mb->mbxCommand,
1718 phba->hba_state,
1719 phba->sli.sli_flag,
1720 phba->sli.mbox_active);
1721
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001722 phba->sli.mbox_active = NULL;
1723 if (pmbox->mbox_cmpl) {
1724 mb->mbxStatus = MBX_NOT_FINISHED;
1725 spin_unlock_irq(phba->host->host_lock);
1726 (pmbox->mbox_cmpl) (phba, pmbox);
1727 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05001728 }
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001729 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea31012005-04-17 16:05:31 -05001730
1731 spin_unlock_irq(phba->host->host_lock);
1732 lpfc_mbox_abort(phba);
1733 return;
1734}
1735
1736int
1737lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
1738{
dea31012005-04-17 16:05:31 -05001739 MAILBOX_t *mb;
1740 struct lpfc_sli *psli;
1741 uint32_t status, evtctr;
1742 uint32_t ha_copy;
1743 int i;
1744 unsigned long drvr_flag = 0;
1745 volatile uint32_t word0, ldata;
1746 void __iomem *to_slim;
1747
1748 psli = &phba->sli;
1749
1750 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1751
1752
1753 mb = &pmbox->mb;
1754 status = MBX_SUCCESS;
1755
1756 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
1757 /* Polling for a mbox command when another one is already active
1758 * is not allowed in SLI. Also, the driver must have established
1759 * SLI2 mode to queue and process multiple mbox commands.
1760 */
1761
1762 if (flag & MBX_POLL) {
1763 spin_unlock_irqrestore(phba->host->host_lock,
1764 drvr_flag);
1765
1766 /* Mbox command <mbxCommand> cannot issue */
1767 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1768 return (MBX_NOT_FINISHED);
1769 }
1770
1771 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1772 spin_unlock_irqrestore(phba->host->host_lock,
1773 drvr_flag);
1774 /* Mbox command <mbxCommand> cannot issue */
1775 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1776 return (MBX_NOT_FINISHED);
1777 }
1778
1779 /* Handle STOP IOCB processing flag. This is only meaningful
1780 * if we are not polling for mbox completion.
1781 */
1782 if (flag & MBX_STOP_IOCB) {
1783 flag &= ~MBX_STOP_IOCB;
1784 /* Now flag each ring */
1785 for (i = 0; i < psli->num_rings; i++) {
1786 /* If the ring is active, flag it */
1787 if (psli->ring[i].cmdringaddr) {
1788 psli->ring[i].flag |=
1789 LPFC_STOP_IOCB_MBX;
1790 }
1791 }
1792 }
1793
1794 /* Another mailbox command is still being processed, queue this
1795 * command to be processed later.
1796 */
1797 lpfc_mbox_put(phba, pmbox);
1798
1799 /* Mbox cmd issue - BUSY */
1800 lpfc_printf_log(phba,
1801 KERN_INFO,
1802 LOG_MBOX | LOG_SLI,
1803 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
1804 phba->brd_no,
1805 mb->mbxCommand,
1806 phba->hba_state,
1807 psli->sli_flag,
1808 flag);
1809
1810 psli->slistat.mbox_busy++;
1811 spin_unlock_irqrestore(phba->host->host_lock,
1812 drvr_flag);
1813
1814 return (MBX_BUSY);
1815 }
1816
1817 /* Handle STOP IOCB processing flag. This is only meaningful
1818 * if we are not polling for mbox completion.
1819 */
1820 if (flag & MBX_STOP_IOCB) {
1821 flag &= ~MBX_STOP_IOCB;
1822 if (flag == MBX_NOWAIT) {
1823 /* Now flag each ring */
1824 for (i = 0; i < psli->num_rings; i++) {
1825 /* If the ring is active, flag it */
1826 if (psli->ring[i].cmdringaddr) {
1827 psli->ring[i].flag |=
1828 LPFC_STOP_IOCB_MBX;
1829 }
1830 }
1831 }
1832 }
1833
1834 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1835
1836 /* If we are not polling, we MUST be in SLI2 mode */
1837 if (flag != MBX_POLL) {
1838 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1839 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1840 spin_unlock_irqrestore(phba->host->host_lock,
1841 drvr_flag);
1842 /* Mbox command <mbxCommand> cannot issue */
1843 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
1844 return (MBX_NOT_FINISHED);
1845 }
1846 /* timeout active mbox command */
1847 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
1848 }
1849
1850 /* Mailbox cmd <cmd> issue */
1851 lpfc_printf_log(phba,
1852 KERN_INFO,
1853 LOG_MBOX | LOG_SLI,
1854 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
1855 phba->brd_no,
1856 mb->mbxCommand,
1857 phba->hba_state,
1858 psli->sli_flag,
1859 flag);
1860
1861 psli->slistat.mbox_cmd++;
1862 evtctr = psli->slistat.mbox_event;
1863
1864 /* next set own bit for the adapter and copy over command word */
1865 mb->mbxOwner = OWN_CHIP;
1866
1867 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05001868 /* First copy command data to host SLIM area */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001869 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001870 } else {
1871 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1872 /* copy command data into host mbox for cmpl */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001873 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
1874 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001875 }
1876
1877 /* First copy mbox command data to HBA SLIM, skip past first
1878 word */
1879 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1880 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
1881 MAILBOX_CMD_SIZE - sizeof (uint32_t));
1882
1883 /* Next copy over first word, with mbxOwner set */
1884 ldata = *((volatile uint32_t *)mb);
1885 to_slim = phba->MBslimaddr;
1886 writel(ldata, to_slim);
1887 readl(to_slim); /* flush */
1888
1889 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1890 /* switch over to host mailbox */
1891 psli->sli_flag |= LPFC_SLI2_ACTIVE;
1892 }
1893 }
1894
1895 wmb();
1896 /* interrupt board to doit right away */
1897 writel(CA_MBATT, phba->CAregaddr);
1898 readl(phba->CAregaddr); /* flush */
1899
1900 switch (flag) {
1901 case MBX_NOWAIT:
1902 /* Don't wait for it to finish, just return */
1903 psli->mbox_active = pmbox;
1904 break;
1905
1906 case MBX_POLL:
1907 i = 0;
1908 psli->mbox_active = NULL;
1909 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1910 /* First read mbox status word */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001911 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001912 word0 = le32_to_cpu(word0);
1913 } else {
1914 /* First read mbox status word */
1915 word0 = readl(phba->MBslimaddr);
1916 }
1917
1918 /* Read the HBA Host Attention Register */
1919 ha_copy = readl(phba->HAregaddr);
1920
1921 /* Wait for command to complete */
1922 while (((word0 & OWN_CHIP) == OWN_CHIP)
1923 || !(ha_copy & HA_MBATT)) {
1924 if (i++ >= 100) {
1925 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1926 spin_unlock_irqrestore(phba->host->host_lock,
1927 drvr_flag);
1928 return (MBX_NOT_FINISHED);
1929 }
1930
1931 /* Check if we took a mbox interrupt while we were
1932 polling */
1933 if (((word0 & OWN_CHIP) != OWN_CHIP)
1934 && (evtctr != psli->slistat.mbox_event))
1935 break;
1936
1937 spin_unlock_irqrestore(phba->host->host_lock,
1938 drvr_flag);
1939
1940 /* Can be in interrupt context, do not sleep */
1941 /* (or might be called with interrupts disabled) */
1942 mdelay(i);
1943
1944 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1945
1946 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1947 /* First copy command data */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001948 word0 = *((volatile uint32_t *)
1949 &phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001950 word0 = le32_to_cpu(word0);
1951 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1952 MAILBOX_t *slimmb;
1953 volatile uint32_t slimword0;
1954 /* Check real SLIM for any errors */
1955 slimword0 = readl(phba->MBslimaddr);
1956 slimmb = (MAILBOX_t *) & slimword0;
1957 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
1958 && slimmb->mbxStatus) {
1959 psli->sli_flag &=
1960 ~LPFC_SLI2_ACTIVE;
1961 word0 = slimword0;
1962 }
1963 }
1964 } else {
1965 /* First copy command data */
1966 word0 = readl(phba->MBslimaddr);
1967 }
1968 /* Read the HBA Host Attention Register */
1969 ha_copy = readl(phba->HAregaddr);
1970 }
1971
1972 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05001973 /* copy results back to user */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001974 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
1975 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001976 } else {
1977 /* First copy command data */
1978 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
1979 MAILBOX_CMD_SIZE);
1980 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
1981 pmbox->context2) {
1982 lpfc_memcpy_from_slim((void *)pmbox->context2,
1983 phba->MBslimaddr + DMP_RSP_OFFSET,
1984 mb->un.varDmp.word_cnt);
1985 }
1986 }
1987
1988 writel(HA_MBATT, phba->HAregaddr);
1989 readl(phba->HAregaddr); /* flush */
1990
1991 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1992 status = mb->mbxStatus;
1993 }
1994
1995 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
1996 return (status);
1997}
1998
1999static int
2000lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2001 struct lpfc_iocbq * piocb)
2002{
2003 /* Insert the caller's iocb in the txq tail for later processing. */
2004 list_add_tail(&piocb->list, &pring->txq);
2005 pring->txq_cnt++;
2006 return (0);
2007}
2008
2009static struct lpfc_iocbq *
2010lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2011 struct lpfc_iocbq ** piocb)
2012{
2013 struct lpfc_iocbq * nextiocb;
2014
2015 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2016 if (!nextiocb) {
2017 nextiocb = *piocb;
2018 *piocb = NULL;
2019 }
2020
2021 return nextiocb;
2022}
2023
2024int
2025lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2026 struct lpfc_iocbq *piocb, uint32_t flag)
2027{
2028 struct lpfc_iocbq *nextiocb;
2029 IOCB_t *iocb;
2030
2031 /*
2032 * We should never get an IOCB if we are in a < LINK_DOWN state
2033 */
2034 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2035 return IOCB_ERROR;
2036
2037 /*
2038 * Check to see if we are blocking IOCB processing because of a
2039 * outstanding mbox command.
2040 */
2041 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2042 goto iocb_busy;
2043
2044 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2045 /*
2046 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2047 * can be issued if the link is not up.
2048 */
2049 switch (piocb->iocb.ulpCommand) {
2050 case CMD_QUE_RING_BUF_CN:
2051 case CMD_QUE_RING_BUF64_CN:
dea31012005-04-17 16:05:31 -05002052 /*
2053 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2054 * completion, iocb_cmpl MUST be 0.
2055 */
2056 if (piocb->iocb_cmpl)
2057 piocb->iocb_cmpl = NULL;
2058 /*FALLTHROUGH*/
2059 case CMD_CREATE_XRI_CR:
2060 break;
2061 default:
2062 goto iocb_busy;
2063 }
2064
2065 /*
2066 * For FCP commands, we must be in a state where we can process link
2067 * attention events.
2068 */
2069 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2070 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2071 goto iocb_busy;
2072
2073 /*
2074 * Check to see if this is a high priority command.
2075 * If so bypass tx queue processing.
2076 */
2077 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
2078 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
2079 lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
2080 piocb = NULL;
2081 }
2082
2083 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2084 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2085 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2086
2087 if (iocb)
2088 lpfc_sli_update_ring(phba, pring);
2089 else
2090 lpfc_sli_update_full_ring(phba, pring);
2091
2092 if (!piocb)
2093 return IOCB_SUCCESS;
2094
2095 goto out_busy;
2096
2097 iocb_busy:
2098 pring->stats.iocb_cmd_delay++;
2099
2100 out_busy:
2101
2102 if (!(flag & SLI_IOCB_RET_IOCB)) {
2103 lpfc_sli_ringtx_put(phba, pring, piocb);
2104 return IOCB_SUCCESS;
2105 }
2106
2107 return IOCB_BUSY;
2108}
2109
2110int
2111lpfc_sli_setup(struct lpfc_hba *phba)
2112{
2113 int i, totiocb = 0;
2114 struct lpfc_sli *psli = &phba->sli;
2115 struct lpfc_sli_ring *pring;
2116
2117 psli->num_rings = MAX_CONFIGURED_RINGS;
2118 psli->sli_flag = 0;
2119 psli->fcp_ring = LPFC_FCP_RING;
2120 psli->next_ring = LPFC_FCP_NEXT_RING;
2121 psli->ip_ring = LPFC_IP_RING;
2122
James Bottomley604a3e32005-10-29 10:28:33 -05002123 psli->iocbq_lookup = NULL;
2124 psli->iocbq_lookup_len = 0;
2125 psli->last_iotag = 0;
2126
dea31012005-04-17 16:05:31 -05002127 for (i = 0; i < psli->num_rings; i++) {
2128 pring = &psli->ring[i];
2129 switch (i) {
2130 case LPFC_FCP_RING: /* ring 0 - FCP */
2131 /* numCiocb and numRiocb are used in config_port */
2132 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2133 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2134 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2135 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2136 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2137 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2138 pring->iotag_ctr = 0;
2139 pring->iotag_max =
2140 (phba->cfg_hba_queue_depth * 2);
2141 pring->fast_iotag = pring->iotag_max;
2142 pring->num_mask = 0;
2143 break;
2144 case LPFC_IP_RING: /* ring 1 - IP */
2145 /* numCiocb and numRiocb are used in config_port */
2146 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2147 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2148 pring->num_mask = 0;
2149 break;
2150 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2151 /* numCiocb and numRiocb are used in config_port */
2152 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2153 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2154 pring->fast_iotag = 0;
2155 pring->iotag_ctr = 0;
2156 pring->iotag_max = 4096;
2157 pring->num_mask = 4;
2158 pring->prt[0].profile = 0; /* Mask 0 */
2159 pring->prt[0].rctl = FC_ELS_REQ;
2160 pring->prt[0].type = FC_ELS_DATA;
2161 pring->prt[0].lpfc_sli_rcv_unsol_event =
2162 lpfc_els_unsol_event;
2163 pring->prt[1].profile = 0; /* Mask 1 */
2164 pring->prt[1].rctl = FC_ELS_RSP;
2165 pring->prt[1].type = FC_ELS_DATA;
2166 pring->prt[1].lpfc_sli_rcv_unsol_event =
2167 lpfc_els_unsol_event;
2168 pring->prt[2].profile = 0; /* Mask 2 */
2169 /* NameServer Inquiry */
2170 pring->prt[2].rctl = FC_UNSOL_CTL;
2171 /* NameServer */
2172 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2173 pring->prt[2].lpfc_sli_rcv_unsol_event =
2174 lpfc_ct_unsol_event;
2175 pring->prt[3].profile = 0; /* Mask 3 */
2176 /* NameServer response */
2177 pring->prt[3].rctl = FC_SOL_CTL;
2178 /* NameServer */
2179 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2180 pring->prt[3].lpfc_sli_rcv_unsol_event =
2181 lpfc_ct_unsol_event;
2182 break;
2183 }
2184 totiocb += (pring->numCiocb + pring->numRiocb);
2185 }
2186 if (totiocb > MAX_SLI2_IOCB) {
2187 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2189 "%d:0462 Too many cmd / rsp ring entries in "
2190 "SLI2 SLIM Data: x%x x%x\n",
2191 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2192 }
2193
2194 return 0;
2195}
2196
2197int
2198lpfc_sli_queue_setup(struct lpfc_hba * phba)
2199{
2200 struct lpfc_sli *psli;
2201 struct lpfc_sli_ring *pring;
James Bottomley604a3e32005-10-29 10:28:33 -05002202 int i;
dea31012005-04-17 16:05:31 -05002203
2204 psli = &phba->sli;
2205 spin_lock_irq(phba->host->host_lock);
2206 INIT_LIST_HEAD(&psli->mboxq);
2207 /* Initialize list headers for txq and txcmplq as double linked lists */
2208 for (i = 0; i < psli->num_rings; i++) {
2209 pring = &psli->ring[i];
2210 pring->ringno = i;
2211 pring->next_cmdidx = 0;
2212 pring->local_getidx = 0;
2213 pring->cmdidx = 0;
2214 INIT_LIST_HEAD(&pring->txq);
2215 INIT_LIST_HEAD(&pring->txcmplq);
2216 INIT_LIST_HEAD(&pring->iocb_continueq);
2217 INIT_LIST_HEAD(&pring->postbufq);
dea31012005-04-17 16:05:31 -05002218 }
2219 spin_unlock_irq(phba->host->host_lock);
2220 return (1);
2221}
2222
2223int
2224lpfc_sli_hba_down(struct lpfc_hba * phba)
2225{
2226 struct lpfc_sli *psli;
2227 struct lpfc_sli_ring *pring;
2228 LPFC_MBOXQ_t *pmb;
2229 struct lpfc_iocbq *iocb, *next_iocb;
2230 IOCB_t *icmd = NULL;
2231 int i;
2232 unsigned long flags = 0;
2233
2234 psli = &phba->sli;
2235 lpfc_hba_down_prep(phba);
2236
2237 spin_lock_irqsave(phba->host->host_lock, flags);
2238
2239 for (i = 0; i < psli->num_rings; i++) {
2240 pring = &psli->ring[i];
2241 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2242
2243 /*
2244 * Error everything on the txq since these iocbs have not been
2245 * given to the FW yet.
2246 */
2247 pring->txq_cnt = 0;
2248
2249 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2250 list_del_init(&iocb->list);
2251 if (iocb->iocb_cmpl) {
2252 icmd = &iocb->iocb;
2253 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2254 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2255 spin_unlock_irqrestore(phba->host->host_lock,
2256 flags);
2257 (iocb->iocb_cmpl) (phba, iocb, iocb);
2258 spin_lock_irqsave(phba->host->host_lock, flags);
James Bottomley604a3e32005-10-29 10:28:33 -05002259 } else
2260 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -05002261 }
2262
2263 INIT_LIST_HEAD(&(pring->txq));
2264
2265 if (pring->fast_lookup) {
2266 kfree(pring->fast_lookup);
2267 pring->fast_lookup = NULL;
2268 }
2269
2270 }
2271
2272 spin_unlock_irqrestore(phba->host->host_lock, flags);
2273
2274 /* Return any active mbox cmds */
2275 del_timer_sync(&psli->mbox_tmo);
2276 spin_lock_irqsave(phba->host->host_lock, flags);
2277 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2278 if (psli->mbox_active) {
2279 pmb = psli->mbox_active;
2280 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2281 if (pmb->mbox_cmpl) {
2282 spin_unlock_irqrestore(phba->host->host_lock, flags);
2283 pmb->mbox_cmpl(phba,pmb);
2284 spin_lock_irqsave(phba->host->host_lock, flags);
2285 }
2286 }
2287 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2288 psli->mbox_active = NULL;
2289
2290 /* Return any pending mbox cmds */
2291 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2292 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2293 if (pmb->mbox_cmpl) {
2294 spin_unlock_irqrestore(phba->host->host_lock, flags);
2295 pmb->mbox_cmpl(phba,pmb);
2296 spin_lock_irqsave(phba->host->host_lock, flags);
2297 }
2298 }
2299
2300 INIT_LIST_HEAD(&psli->mboxq);
2301
2302 spin_unlock_irqrestore(phba->host->host_lock, flags);
2303
2304 /*
2305 * Provided the hba is not in an error state, reset it. It is not
2306 * capable of IO anymore.
2307 */
2308 if (phba->hba_state != LPFC_HBA_ERROR) {
2309 phba->hba_state = LPFC_INIT_START;
2310 lpfc_sli_brdreset(phba, 1);
2311 }
2312
2313 return 1;
2314}
2315
2316void
2317lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2318{
2319 uint32_t *src = srcp;
2320 uint32_t *dest = destp;
2321 uint32_t ldata;
2322 int i;
2323
2324 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2325 ldata = *src;
2326 ldata = le32_to_cpu(ldata);
2327 *dest = ldata;
2328 src++;
2329 dest++;
2330 }
2331}
2332
2333int
2334lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2335 struct lpfc_dmabuf * mp)
2336{
2337 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2338 later */
2339 list_add_tail(&mp->list, &pring->postbufq);
2340
2341 pring->postbufq_cnt++;
2342 return 0;
2343}
2344
2345
2346struct lpfc_dmabuf *
2347lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2348 dma_addr_t phys)
2349{
2350 struct lpfc_dmabuf *mp, *next_mp;
2351 struct list_head *slp = &pring->postbufq;
2352
2353 /* Search postbufq, from the begining, looking for a match on phys */
2354 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2355 if (mp->phys == phys) {
2356 list_del_init(&mp->list);
2357 pring->postbufq_cnt--;
2358 return mp;
2359 }
2360 }
2361
2362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2363 "%d:0410 Cannot find virtual addr for mapped buf on "
2364 "ring %d Data x%llx x%p x%p x%x\n",
2365 phba->brd_no, pring->ringno, (unsigned long long)phys,
2366 slp->next, slp->prev, pring->postbufq_cnt);
2367 return NULL;
2368}
2369
2370static void
2371lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2372 struct lpfc_iocbq * rspiocb)
2373{
2374 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2375 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2376 * just aborted.
2377 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2378 */
2379 if (cmdiocb->context2) {
2380 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2381
2382 /* Free the response IOCB before completing the abort
2383 command. */
2384 buf_ptr = NULL;
2385 list_remove_head((&buf_ptr1->list), buf_ptr,
2386 struct lpfc_dmabuf, list);
2387 if (buf_ptr) {
2388 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2389 kfree(buf_ptr);
2390 }
2391 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2392 kfree(buf_ptr1);
2393 }
2394
2395 if (cmdiocb->context3) {
2396 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2397 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2398 kfree(buf_ptr);
2399 }
2400
James Bottomley604a3e32005-10-29 10:28:33 -05002401 lpfc_sli_release_iocbq(phba, cmdiocb);
dea31012005-04-17 16:05:31 -05002402 return;
2403}
2404
2405int
2406lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2407 struct lpfc_sli_ring * pring,
2408 struct lpfc_iocbq * cmdiocb)
2409{
2410 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2411 struct lpfc_iocbq *abtsiocbp = NULL;
2412 IOCB_t *icmd = NULL;
2413 IOCB_t *iabt = NULL;
2414
2415 /* issue ABTS for this IOCB based on iotag */
2416 list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
2417 if (abtsiocbp == NULL)
2418 return 0;
dea31012005-04-17 16:05:31 -05002419
2420 iabt = &abtsiocbp->iocb;
2421 icmd = &cmdiocb->iocb;
2422 switch (icmd->ulpCommand) {
2423 case CMD_ELS_REQUEST64_CR:
2424 /* Even though we abort the ELS command, the firmware may access
2425 * the BPL or other resources before it processes our
2426 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2427 * resources till the actual abort request completes.
2428 */
2429 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2430 abtsiocbp->context2 = cmdiocb->context2;
2431 abtsiocbp->context3 = cmdiocb->context3;
2432 cmdiocb->context2 = NULL;
2433 cmdiocb->context3 = NULL;
2434 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2435 break;
2436 default:
James Bottomley604a3e32005-10-29 10:28:33 -05002437 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea31012005-04-17 16:05:31 -05002438 return 0;
2439 }
2440
2441 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2442 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2443
2444 iabt->ulpLe = 1;
2445 iabt->ulpClass = CLASS3;
2446 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2447
2448 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
James Bottomley604a3e32005-10-29 10:28:33 -05002449 lpfc_sli_release_iocbq(phba, abtsiocbp);
dea31012005-04-17 16:05:31 -05002450 return 0;
2451 }
2452
2453 return 1;
2454}
2455
2456static int
2457lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
2458 uint64_t lun_id, struct lpfc_iocbq *iocb,
2459 uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
2460{
2461 int rc = 1;
2462
2463 if (lpfc_cmd == NULL)
2464 return rc;
2465
2466 switch (ctx_cmd) {
2467 case LPFC_CTX_LUN:
2468 if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
2469 (lpfc_cmd->pCmd->device->lun == lun_id))
2470 rc = 0;
2471 break;
2472 case LPFC_CTX_TGT:
2473 if (lpfc_cmd->pCmd->device->id == tgt_id)
2474 rc = 0;
2475 break;
2476 case LPFC_CTX_CTX:
2477 if (iocb->iocb.ulpContext == ctx)
2478 rc = 0;
2479 case LPFC_CTX_HOST:
2480 rc = 0;
2481 break;
2482 default:
2483 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2484 __FUNCTION__, ctx_cmd);
2485 break;
2486 }
2487
2488 return rc;
2489}
2490
2491int
2492lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2493 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2494{
2495 struct lpfc_iocbq *iocb, *next_iocb;
2496 IOCB_t *cmd = NULL;
2497 struct lpfc_scsi_buf *lpfc_cmd;
2498 int sum = 0, ret_val = 0;
2499
2500 /* Next check the txcmplq */
2501 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2502 cmd = &iocb->iocb;
2503
2504 /* Must be a FCP command */
2505 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2506 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2507 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2508 continue;
2509 }
2510
2511 /* context1 MUST be a struct lpfc_scsi_buf */
2512 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2513 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2514 NULL, 0, ctx_cmd);
2515 if (ret_val != 0)
2516 continue;
2517 sum++;
2518 }
2519 return sum;
2520}
2521
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002522void
2523lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2524 struct lpfc_iocbq * rspiocb)
2525{
2526 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -05002527 lpfc_sli_release_iocbq(phba, cmdiocb);
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002528 spin_unlock_irq(phba->host->host_lock);
2529 return;
2530}
2531
dea31012005-04-17 16:05:31 -05002532int
2533lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2534 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2535 lpfc_ctx_cmd abort_cmd)
2536{
2537 struct lpfc_iocbq *iocb, *next_iocb;
2538 struct lpfc_iocbq *abtsiocb = NULL;
2539 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2540 IOCB_t *cmd = NULL;
2541 struct lpfc_scsi_buf *lpfc_cmd;
2542 int errcnt = 0, ret_val = 0;
2543
2544 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2545 cmd = &iocb->iocb;
2546
2547 /* Must be a FCP command */
2548 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2549 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2550 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2551 continue;
2552 }
2553
2554 /* context1 MUST be a struct lpfc_scsi_buf */
2555 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2556 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2557 iocb, ctx, abort_cmd);
2558 if (ret_val != 0)
2559 continue;
2560
2561 /* issue ABTS for this IOCB based on iotag */
2562 list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
2563 list);
2564 if (abtsiocb == NULL) {
2565 errcnt++;
2566 continue;
2567 }
dea31012005-04-17 16:05:31 -05002568
2569 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2570 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2571 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2572 abtsiocb->iocb.ulpLe = 1;
2573 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2574
2575 if (phba->hba_state >= LPFC_LINK_UP)
2576 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2577 else
2578 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2579
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002580 /* Setup callback routine and issue the command. */
2581 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea31012005-04-17 16:05:31 -05002582 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2583 if (ret_val == IOCB_ERROR) {
James Bottomley604a3e32005-10-29 10:28:33 -05002584 lpfc_sli_release_iocbq(phba, abtsiocb);
dea31012005-04-17 16:05:31 -05002585 errcnt++;
2586 continue;
2587 }
2588 }
2589
2590 return errcnt;
2591}
2592
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002593static void
2594lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
2595 struct lpfc_iocbq *cmdiocbq,
2596 struct lpfc_iocbq *rspiocbq)
dea31012005-04-17 16:05:31 -05002597{
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002598 wait_queue_head_t *pdone_q;
2599 unsigned long iflags;
dea31012005-04-17 16:05:31 -05002600
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002601 spin_lock_irqsave(phba->host->host_lock, iflags);
2602 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
2603 if (cmdiocbq->context2 && rspiocbq)
2604 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
2605 &rspiocbq->iocb, sizeof(IOCB_t));
2606
2607 pdone_q = cmdiocbq->context_un.wait_queue;
2608 spin_unlock_irqrestore(phba->host->host_lock, iflags);
2609 if (pdone_q)
2610 wake_up(pdone_q);
dea31012005-04-17 16:05:31 -05002611 return;
2612}
2613
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002614/*
2615 * Issue the caller's iocb and wait for its completion, but no longer than the
2616 * caller's timeout. Note that iocb_flags is cleared before the
2617 * lpfc_sli_issue_call since the wake routine sets a unique value and by
2618 * definition this is a wait function.
2619 */
dea31012005-04-17 16:05:31 -05002620int
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002621lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
2622 struct lpfc_sli_ring * pring,
2623 struct lpfc_iocbq * piocb,
2624 struct lpfc_iocbq * prspiocbq,
2625 uint32_t timeout)
dea31012005-04-17 16:05:31 -05002626{
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002627 DECLARE_WAIT_QUEUE_HEAD(done_q);
2628 long timeleft, timeout_req = 0;
2629 int retval = IOCB_SUCCESS;
dea31012005-04-17 16:05:31 -05002630
2631 /*
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002632 * If the caller has provided a response iocbq buffer, then context2
2633 * is NULL or its an error.
dea31012005-04-17 16:05:31 -05002634 */
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002635 if (prspiocbq) {
2636 if (piocb->context2)
2637 return IOCB_ERROR;
2638 piocb->context2 = prspiocbq;
dea31012005-04-17 16:05:31 -05002639 }
2640
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002641 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
2642 piocb->context_un.wait_queue = &done_q;
2643 piocb->iocb_flag &= ~LPFC_IO_WAKE;
dea31012005-04-17 16:05:31 -05002644
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002645 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
2646 if (retval == IOCB_SUCCESS) {
2647 timeout_req = timeout * HZ;
2648 spin_unlock_irq(phba->host->host_lock);
2649 timeleft = wait_event_timeout(done_q,
2650 piocb->iocb_flag & LPFC_IO_WAKE,
2651 timeout_req);
2652 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05002653
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002654 if (timeleft == 0) {
2655 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2656 "%d:0329 IOCB wait timeout error - no "
2657 "wake response Data x%x\n",
2658 phba->brd_no, timeout);
2659 retval = IOCB_TIMEDOUT;
2660 } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
2661 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2662 "%d:0330 IOCB wake NOT set, "
2663 "Data x%x x%lx\n", phba->brd_no,
2664 timeout, (timeleft / jiffies));
2665 retval = IOCB_TIMEDOUT;
2666 } else {
2667 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
2668 "%d:0331 IOCB wake signaled\n",
2669 phba->brd_no);
dea31012005-04-17 16:05:31 -05002670 }
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002671 } else {
2672 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
2673 "%d:0332 IOCB wait issue failed, Data x%x\n",
2674 phba->brd_no, retval);
2675 retval = IOCB_ERROR;
dea31012005-04-17 16:05:31 -05002676 }
2677
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002678 if (prspiocbq)
2679 piocb->context2 = NULL;
2680
2681 piocb->context_un.wait_queue = NULL;
2682 piocb->iocb_cmpl = NULL;
dea31012005-04-17 16:05:31 -05002683 return retval;
2684}
James.Smart@Emulex.Com68876922005-10-28 20:29:47 -04002685
dea31012005-04-17 16:05:31 -05002686int
2687lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
2688 uint32_t timeout)
2689{
2690 DECLARE_WAIT_QUEUE_HEAD(done_q);
2691 DECLARE_WAITQUEUE(wq_entry, current);
2692 uint32_t timeleft = 0;
2693 int retval;
2694
2695 /* The caller must leave context1 empty. */
2696 if (pmboxq->context1 != 0) {
2697 return (MBX_NOT_FINISHED);
2698 }
2699
2700 /* setup wake call as IOCB callback */
2701 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
2702 /* setup context field to pass wait_queue pointer to wake function */
2703 pmboxq->context1 = &done_q;
2704
2705 /* start to sleep before we wait, to avoid races */
2706 set_current_state(TASK_INTERRUPTIBLE);
2707 add_wait_queue(&done_q, &wq_entry);
2708
2709 /* now issue the command */
2710 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2711
2712 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
2713 timeleft = schedule_timeout(timeout * HZ);
2714 pmboxq->context1 = NULL;
2715 /* if schedule_timeout returns 0, we timed out and were not
2716 woken up */
2717 if (timeleft == 0) {
2718 retval = MBX_TIMEOUT;
2719 } else {
2720 retval = MBX_SUCCESS;
2721 }
2722 }
2723
2724
2725 set_current_state(TASK_RUNNING);
2726 remove_wait_queue(&done_q, &wq_entry);
2727 return retval;
2728}
2729
2730irqreturn_t
2731lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
2732{
2733 struct lpfc_hba *phba;
2734 uint32_t ha_copy;
2735 uint32_t work_ha_copy;
2736 unsigned long status;
2737 int i;
2738 uint32_t control;
2739
2740 /*
2741 * Get the driver's phba structure from the dev_id and
2742 * assume the HBA is not interrupting.
2743 */
2744 phba = (struct lpfc_hba *) dev_id;
2745
2746 if (unlikely(!phba))
2747 return IRQ_NONE;
2748
2749 phba->sli.slistat.sli_intr++;
2750
2751 /*
2752 * Call the HBA to see if it is interrupting. If not, don't claim
2753 * the interrupt
2754 */
2755
2756 /* Ignore all interrupts during initialization. */
2757 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2758 return IRQ_NONE;
2759
2760 /*
2761 * Read host attention register to determine interrupt source
2762 * Clear Attention Sources, except Error Attention (to
2763 * preserve status) and Link Attention
2764 */
2765 spin_lock(phba->host->host_lock);
2766 ha_copy = readl(phba->HAregaddr);
2767 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
2768 readl(phba->HAregaddr); /* flush */
2769 spin_unlock(phba->host->host_lock);
2770
2771 if (unlikely(!ha_copy))
2772 return IRQ_NONE;
2773
2774 work_ha_copy = ha_copy & phba->work_ha_mask;
2775
2776 if (unlikely(work_ha_copy)) {
2777 if (work_ha_copy & HA_LATT) {
2778 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
2779 /*
2780 * Turn off Link Attention interrupts
2781 * until CLEAR_LA done
2782 */
2783 spin_lock(phba->host->host_lock);
2784 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
2785 control = readl(phba->HCregaddr);
2786 control &= ~HC_LAINT_ENA;
2787 writel(control, phba->HCregaddr);
2788 readl(phba->HCregaddr); /* flush */
2789 spin_unlock(phba->host->host_lock);
2790 }
2791 else
2792 work_ha_copy &= ~HA_LATT;
2793 }
2794
2795 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
2796 for (i = 0; i < phba->sli.num_rings; i++) {
2797 if (work_ha_copy & (HA_RXATT << (4*i))) {
2798 /*
2799 * Turn off Slow Rings interrupts
2800 */
2801 spin_lock(phba->host->host_lock);
2802 control = readl(phba->HCregaddr);
2803 control &= ~(HC_R0INT_ENA << i);
2804 writel(control, phba->HCregaddr);
2805 readl(phba->HCregaddr); /* flush */
2806 spin_unlock(phba->host->host_lock);
2807 }
2808 }
2809 }
2810
2811 if (work_ha_copy & HA_ERATT) {
2812 phba->hba_state = LPFC_HBA_ERROR;
2813 /*
2814 * There was a link/board error. Read the
2815 * status register to retrieve the error event
2816 * and process it.
2817 */
2818 phba->sli.slistat.err_attn_event++;
2819 /* Save status info */
2820 phba->work_hs = readl(phba->HSregaddr);
2821 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
2822 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
2823
2824 /* Clear Chip error bit */
2825 writel(HA_ERATT, phba->HAregaddr);
2826 readl(phba->HAregaddr); /* flush */
2827
2828 /*
2829 * Reseting the HBA is the only reliable way
2830 * to shutdown interrupt when there is a
2831 * ERROR.
2832 */
2833 lpfc_sli_send_reset(phba, phba->hba_state);
2834 }
2835
2836 spin_lock(phba->host->host_lock);
2837 phba->work_ha |= work_ha_copy;
2838 if (phba->work_wait)
2839 wake_up(phba->work_wait);
2840 spin_unlock(phba->host->host_lock);
2841 }
2842
2843 ha_copy &= ~(phba->work_ha_mask);
2844
2845 /*
2846 * Process all events on FCP ring. Take the optimized path for
2847 * FCP IO. Any other IO is slow path and is handled by
2848 * the worker thread.
2849 */
2850 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
2851 status >>= (4*LPFC_FCP_RING);
2852 if (status & HA_RXATT)
2853 lpfc_sli_handle_fast_ring_event(phba,
2854 &phba->sli.ring[LPFC_FCP_RING],
2855 status);
2856 return IRQ_HANDLED;
2857
2858} /* lpfc_intr_handler */