blob: 7261ee49f282f2c1e3a6d027a2aad2954c9b85a3 [file] [log] [blame]
Ron Rindjunsky1053d352008-05-05 10:22:43 +08001/******************************************************************************
2 *
Reinette Chatre1f447802010-01-15 13:43:41 -08003 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
Ron Rindjunsky1053d352008-05-05 10:22:43 +08004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080025 * Intel Linux Wireless <ilw@linux.intel.com>
Ron Rindjunsky1053d352008-05-05 10:22:43 +080026 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Tomas Winklerfd4abac2008-05-15 13:54:07 +080030#include <linux/etherdevice.h>
Alexey Dobriyand43c36d2009-10-07 17:09:06 +040031#include <linux/sched.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Ron Rindjunsky1053d352008-05-05 10:22:43 +080033#include <net/mac80211.h>
34#include "iwl-eeprom.h"
35#include "iwl-dev.h"
36#include "iwl-core.h"
37#include "iwl-sta.h"
38#include "iwl-io.h"
39#include "iwl-helpers.h"
40
Tomas Winklerfd4abac2008-05-15 13:54:07 +080041/**
42 * iwl_txq_update_write_ptr - Send new write index to hardware
43 */
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -080044void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
Tomas Winklerfd4abac2008-05-15 13:54:07 +080045{
46 u32 reg = 0;
Tomas Winklerfd4abac2008-05-15 13:54:07 +080047 int txq_id = txq->q.id;
48
49 if (txq->need_update == 0)
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -080050 return;
Tomas Winklerfd4abac2008-05-15 13:54:07 +080051
52 /* if we're trying to save power */
53 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
54 /* wake up nic if it's powered down ...
55 * uCode will wake up, and interrupt us again, so next
56 * time we'll skip this part. */
57 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
58
59 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Ben Cahill309e7312009-11-06 14:53:03 -080060 IWL_DEBUG_INFO(priv, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
61 txq_id, reg);
Tomas Winklerfd4abac2008-05-15 13:54:07 +080062 iwl_set_bit(priv, CSR_GP_CNTRL,
63 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -080064 return;
Tomas Winklerfd4abac2008-05-15 13:54:07 +080065 }
66
Tomas Winklerfd4abac2008-05-15 13:54:07 +080067 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
68 txq->q.write_ptr | (txq_id << 8));
Tomas Winklerfd4abac2008-05-15 13:54:07 +080069
70 /* else not in power-save mode, uCode will never sleep when we're
71 * trying to tx (during RFKILL, we're not trying to tx). */
72 } else
73 iwl_write32(priv, HBUS_TARG_WRPTR,
74 txq->q.write_ptr | (txq_id << 8));
75
76 txq->need_update = 0;
Tomas Winklerfd4abac2008-05-15 13:54:07 +080077}
78EXPORT_SYMBOL(iwl_txq_update_write_ptr);
79
Ron Rindjunsky1053d352008-05-05 10:22:43 +080080/**
81 * iwl_tx_queue_free - Deallocate DMA queue.
82 * @txq: Transmit queue to deallocate.
83 *
84 * Empty queue by removing and destroying all BD's.
85 * Free all buffers.
86 * 0-fill, but do not free "txq" descriptor structure.
87 */
Samuel Ortiza8e74e272009-01-23 13:45:14 -080088void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +080089{
Gregory Greenmanda99c4b2008-08-04 16:00:40 +080090 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler443cfd42008-05-15 13:53:57 +080091 struct iwl_queue *q = &txq->q;
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -080092 struct device *dev = &priv->pci_dev->dev;
Wey-Yi Guy71c55d92009-10-23 13:42:31 -070093 int i;
Ron Rindjunsky1053d352008-05-05 10:22:43 +080094
95 if (q->n_bd == 0)
96 return;
97
98 /* first, empty all BD's */
99 for (; q->write_ptr != q->read_ptr;
100 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -0800101 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800102
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800103 /* De-alloc array of command/tx buffers */
Tomas Winkler961ba602008-10-14 12:32:44 -0700104 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800105 kfree(txq->cmd[i]);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800106
107 /* De-alloc circular buffer of TFDs */
108 if (txq->q.n_bd)
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -0800109 dma_free_coherent(dev, priv->hw_params.tfd_size *
110 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800111
112 /* De-alloc array of per-TFD driver data */
113 kfree(txq->txb);
114 txq->txb = NULL;
115
Johannes Bergc2acea82009-07-24 11:13:05 -0700116 /* deallocate arrays */
117 kfree(txq->cmd);
118 kfree(txq->meta);
119 txq->cmd = NULL;
120 txq->meta = NULL;
121
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800122 /* 0-fill queue descriptor structure */
123 memset(txq, 0, sizeof(*txq));
124}
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800125EXPORT_SYMBOL(iwl_tx_queue_free);
Tomas Winkler961ba602008-10-14 12:32:44 -0700126
127/**
128 * iwl_cmd_queue_free - Deallocate DMA queue.
129 * @txq: Transmit queue to deallocate.
130 *
131 * Empty queue by removing and destroying all BD's.
132 * Free all buffers.
133 * 0-fill, but do not free "txq" descriptor structure.
134 */
Abhijeet Kolekar3e5d2382009-03-17 21:51:49 -0700135void iwl_cmd_queue_free(struct iwl_priv *priv)
Tomas Winkler961ba602008-10-14 12:32:44 -0700136{
Johannes Berg13bb9482010-08-23 10:46:33 +0200137 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
Tomas Winkler961ba602008-10-14 12:32:44 -0700138 struct iwl_queue *q = &txq->q;
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -0800139 struct device *dev = &priv->pci_dev->dev;
Wey-Yi Guy71c55d92009-10-23 13:42:31 -0700140 int i;
Zhu Yidd487442010-03-22 02:28:41 -0700141 bool huge = false;
Tomas Winkler961ba602008-10-14 12:32:44 -0700142
143 if (q->n_bd == 0)
144 return;
145
Zhu Yidd487442010-03-22 02:28:41 -0700146 for (; q->read_ptr != q->write_ptr;
147 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
148 /* we have no way to tell if it is a huge cmd ATM */
149 i = get_cmd_index(q, q->read_ptr, 0);
150
151 if (txq->meta[i].flags & CMD_SIZE_HUGE) {
152 huge = true;
153 continue;
154 }
155
156 pci_unmap_single(priv->pci_dev,
FUJITA Tomonori2e724442010-06-03 14:19:20 +0900157 dma_unmap_addr(&txq->meta[i], mapping),
158 dma_unmap_len(&txq->meta[i], len),
Zhu Yidd487442010-03-22 02:28:41 -0700159 PCI_DMA_BIDIRECTIONAL);
160 }
161 if (huge) {
162 i = q->n_window;
163 pci_unmap_single(priv->pci_dev,
FUJITA Tomonori2e724442010-06-03 14:19:20 +0900164 dma_unmap_addr(&txq->meta[i], mapping),
165 dma_unmap_len(&txq->meta[i], len),
Zhu Yidd487442010-03-22 02:28:41 -0700166 PCI_DMA_BIDIRECTIONAL);
167 }
168
Tomas Winkler961ba602008-10-14 12:32:44 -0700169 /* De-alloc array of command/tx buffers */
170 for (i = 0; i <= TFD_CMD_SLOTS; i++)
171 kfree(txq->cmd[i]);
172
173 /* De-alloc circular buffer of TFDs */
174 if (txq->q.n_bd)
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -0800175 dma_free_coherent(dev, priv->hw_params.tfd_size * txq->q.n_bd,
176 txq->tfds, txq->q.dma_addr);
Tomas Winkler961ba602008-10-14 12:32:44 -0700177
Reinette Chatre28142982009-09-25 14:24:22 -0700178 /* deallocate arrays */
179 kfree(txq->cmd);
180 kfree(txq->meta);
181 txq->cmd = NULL;
182 txq->meta = NULL;
183
Tomas Winkler961ba602008-10-14 12:32:44 -0700184 /* 0-fill queue descriptor structure */
185 memset(txq, 0, sizeof(*txq));
186}
Abhijeet Kolekar3e5d2382009-03-17 21:51:49 -0700187EXPORT_SYMBOL(iwl_cmd_queue_free);
188
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800189/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
190 * DMA services
191 *
192 * Theory of operation
193 *
194 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
195 * of buffer descriptors, each of which points to one or more data buffers for
196 * the device to read from or fill. Driver and device exchange status of each
197 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
198 * entries in each circular buffer, to protect against confusing empty and full
199 * queue states.
200 *
201 * The device reads or writes the data in the queues via the device's several
202 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
203 *
204 * For Tx queue, there are low mark and high mark limits. If, after queuing
205 * the packet for Tx, free space become < low mark, Tx queue stopped. When
206 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
207 * Tx queue resumed.
208 *
209 * See more detailed info in iwl-4965-hw.h.
210 ***************************************************/
211
212int iwl_queue_space(const struct iwl_queue *q)
213{
214 int s = q->read_ptr - q->write_ptr;
215
216 if (q->read_ptr > q->write_ptr)
217 s -= q->n_bd;
218
219 if (s <= 0)
220 s += q->n_window;
221 /* keep some reserve to not confuse empty and full situations */
222 s -= 2;
223 if (s < 0)
224 s = 0;
225 return s;
226}
227EXPORT_SYMBOL(iwl_queue_space);
228
229
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800230/**
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800231 * iwl_queue_init - Initialize queue's high/low-water and read/write indexes
232 */
Tomas Winkler443cfd42008-05-15 13:53:57 +0800233static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800234 int count, int slots_num, u32 id)
235{
236 q->n_bd = count;
237 q->n_window = slots_num;
238 q->id = id;
239
240 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
241 * and iwl_queue_dec_wrap are broken. */
242 BUG_ON(!is_power_of_2(count));
243
244 /* slots_num must be power-of-two size, otherwise
245 * get_cmd_index is broken. */
246 BUG_ON(!is_power_of_2(slots_num));
247
248 q->low_mark = q->n_window / 4;
249 if (q->low_mark < 4)
250 q->low_mark = 4;
251
252 q->high_mark = q->n_window / 8;
253 if (q->high_mark < 2)
254 q->high_mark = 2;
255
256 q->write_ptr = q->read_ptr = 0;
Wey-Yi Guyb74e31a2010-03-01 17:23:50 -0800257 q->last_read_ptr = 0;
258 q->repeat_same_read_ptr = 0;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800259
260 return 0;
261}
262
263/**
264 * iwl_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
265 */
266static int iwl_tx_queue_alloc(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800267 struct iwl_tx_queue *txq, u32 id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800268{
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -0800269 struct device *dev = &priv->pci_dev->dev;
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800270 size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800271
272 /* Driver private data, only for Tx (not command) queues,
273 * not shared with device. */
Johannes Berg13bb9482010-08-23 10:46:33 +0200274 if (id != priv->cmd_queue) {
Johannes Berg519c7c42010-05-17 02:37:33 -0700275 txq->txb = kzalloc(sizeof(txq->txb[0]) *
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800276 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
277 if (!txq->txb) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800278 IWL_ERR(priv, "kmalloc for auxiliary BD "
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800279 "structures failed\n");
280 goto error;
281 }
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800282 } else {
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800283 txq->txb = NULL;
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800284 }
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800285
286 /* Circular buffer of transmit frame descriptors (TFDs),
287 * shared with device */
Stanislaw Gruszkaf36d04a2010-02-10 05:07:45 -0800288 txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
289 GFP_KERNEL);
Tomas Winkler499b1882008-10-14 12:32:48 -0700290 if (!txq->tfds) {
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800291 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800292 goto error;
293 }
294 txq->q.id = id;
295
296 return 0;
297
298 error:
299 kfree(txq->txb);
300 txq->txb = NULL;
301
302 return -ENOMEM;
303}
304
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800305/**
306 * iwl_tx_queue_init - Allocate and initialize one tx/cmd queue
307 */
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800308int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
309 int slots_num, u32 txq_id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800310{
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800311 int i, len;
Tomas Winkler73b7d742008-09-03 11:18:48 +0800312 int ret;
Johannes Bergc2acea82009-07-24 11:13:05 -0700313 int actual_slots = slots_num;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800314
315 /*
316 * Alloc buffer array for commands (Tx or other types of commands).
Johannes Berg13bb9482010-08-23 10:46:33 +0200317 * For the command queue (#4/#9), allocate command space + one big
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800318 * command for scan, since scan command is very huge; the system will
319 * not have two scans at the same time, so only one is needed.
320 * For normal Tx queues (all other queues), no super-size command
321 * space is needed.
322 */
Johannes Berg13bb9482010-08-23 10:46:33 +0200323 if (txq_id == priv->cmd_queue)
Johannes Bergc2acea82009-07-24 11:13:05 -0700324 actual_slots++;
325
326 txq->meta = kzalloc(sizeof(struct iwl_cmd_meta) * actual_slots,
327 GFP_KERNEL);
328 txq->cmd = kzalloc(sizeof(struct iwl_device_cmd *) * actual_slots,
329 GFP_KERNEL);
330
331 if (!txq->meta || !txq->cmd)
332 goto out_free_arrays;
333
334 len = sizeof(struct iwl_device_cmd);
335 for (i = 0; i < actual_slots; i++) {
336 /* only happens for cmd queue */
337 if (i == slots_num)
Abhijeet Kolekar89612122010-02-19 11:49:49 -0800338 len = IWL_MAX_CMD_SIZE;
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800339
John W. Linville49898852008-09-02 15:07:18 -0400340 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800341 if (!txq->cmd[i])
Tomas Winkler73b7d742008-09-03 11:18:48 +0800342 goto err;
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800343 }
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800344
345 /* Alloc driver data array and TFD circular buffer */
Tomas Winkler73b7d742008-09-03 11:18:48 +0800346 ret = iwl_tx_queue_alloc(priv, txq, txq_id);
347 if (ret)
348 goto err;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800349
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800350 txq->need_update = 0;
351
Johannes Berg1a716552009-11-06 14:52:51 -0800352 /*
353 * Aggregation TX queues will get their ID when aggregation begins;
354 * they overwrite the setting done here. The command FIFO doesn't
355 * need an swq_id so don't set one to catch errors, all others can
356 * be set up to the identity mapping.
357 */
Johannes Berg13bb9482010-08-23 10:46:33 +0200358 if (txq_id != priv->cmd_queue)
Johannes Berg45af8192009-06-19 13:52:43 -0700359 txq->swq_id = txq_id;
360
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800361 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
362 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
363 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
364
365 /* Initialize queue's high/low-water marks, and head/tail indexes */
366 iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
367
368 /* Tell device where to find queue */
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800369 priv->cfg->ops->lib->txq_init(priv, txq);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800370
371 return 0;
Tomas Winkler73b7d742008-09-03 11:18:48 +0800372err:
Johannes Bergc2acea82009-07-24 11:13:05 -0700373 for (i = 0; i < actual_slots; i++)
Tomas Winkler73b7d742008-09-03 11:18:48 +0800374 kfree(txq->cmd[i]);
Johannes Bergc2acea82009-07-24 11:13:05 -0700375out_free_arrays:
376 kfree(txq->meta);
377 kfree(txq->cmd);
Tomas Winkler73b7d742008-09-03 11:18:48 +0800378
Tomas Winkler73b7d742008-09-03 11:18:48 +0800379 return -ENOMEM;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800380}
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800381EXPORT_SYMBOL(iwl_tx_queue_init);
382
Zhu Yide0f60ea2010-03-23 00:45:03 -0700383void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq,
384 int slots_num, u32 txq_id)
385{
386 int actual_slots = slots_num;
387
Johannes Berg13bb9482010-08-23 10:46:33 +0200388 if (txq_id == priv->cmd_queue)
Zhu Yide0f60ea2010-03-23 00:45:03 -0700389 actual_slots++;
390
391 memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * actual_slots);
392
393 txq->need_update = 0;
394
395 /* Initialize queue's high/low-water marks, and head/tail indexes */
396 iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
397
398 /* Tell device where to find queue */
399 priv->cfg->ops->lib->txq_init(priv, txq);
400}
401EXPORT_SYMBOL(iwl_tx_queue_reset);
402
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800403/*************** HOST COMMAND QUEUE FUNCTIONS *****/
404
405/**
406 * iwl_enqueue_hcmd - enqueue a uCode command
407 * @priv: device private data point
408 * @cmd: a point to the ucode command structure
409 *
410 * The function returns < 0 values to indicate the operation is
411 * failed. On success, it turns the index (> 0) of command in the
412 * command queue.
413 */
414int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
415{
Johannes Berg13bb9482010-08-23 10:46:33 +0200416 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800417 struct iwl_queue *q = &txq->q;
Johannes Bergc2acea82009-07-24 11:13:05 -0700418 struct iwl_device_cmd *out_cmd;
419 struct iwl_cmd_meta *out_meta;
Tomas Winklerf3674222008-08-04 16:00:44 +0800420 dma_addr_t phys_addr;
421 unsigned long flags;
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -0800422 int len;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800423 u32 idx;
424 u16 fix_size;
Wey-Yi Guy0975cc82010-07-31 08:34:07 -0700425 bool is_ct_kill = false;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800426
427 cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
428 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
429
430 /* If any of the command structures end up being larger than
431 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
Abhijeet Kolekar89612122010-02-19 11:49:49 -0800432 * we will need to increase the size of the TFD entries
433 * Also, check to see if command buffer should not exceed the size
434 * of device_cmd and max_cmd_size. */
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800435 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
Johannes Bergc2acea82009-07-24 11:13:05 -0700436 !(cmd->flags & CMD_SIZE_HUGE));
Abhijeet Kolekar89612122010-02-19 11:49:49 -0800437 BUG_ON(fix_size > IWL_MAX_CMD_SIZE);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800438
Wey-Yi Guy7812b162009-10-02 13:43:58 -0700439 if (iwl_is_rfkill(priv) || iwl_is_ctkill(priv)) {
Reinette Chatref2f21b42009-10-30 14:36:15 -0700440 IWL_WARN(priv, "Not sending command - %s KILL\n",
441 iwl_is_rfkill(priv) ? "RF" : "CT");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800442 return -EIO;
443 }
444
Johannes Bergc2acea82009-07-24 11:13:05 -0700445 if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
Wey-Yi Guy2d237f72009-11-20 12:05:08 -0800446 IWL_ERR(priv, "No space in command queue\n");
Wey-Yi Guy0975cc82010-07-31 08:34:07 -0700447 if (priv->cfg->ops->lib->tt_ops.ct_kill_check) {
448 is_ct_kill =
449 priv->cfg->ops->lib->tt_ops.ct_kill_check(priv);
450 }
451 if (!is_ct_kill) {
Wey-Yi Guy7812b162009-10-02 13:43:58 -0700452 IWL_ERR(priv, "Restarting adapter due to queue full\n");
453 queue_work(priv->workqueue, &priv->restart);
454 }
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800455 return -ENOSPC;
456 }
457
458 spin_lock_irqsave(&priv->hcmd_lock, flags);
459
Zhu Yidd487442010-03-22 02:28:41 -0700460 /* If this is a huge cmd, mark the huge flag also on the meta.flags
461 * of the _original_ cmd. This is used for DMA mapping clean up.
462 */
463 if (cmd->flags & CMD_SIZE_HUGE) {
464 idx = get_cmd_index(q, q->write_ptr, 0);
465 txq->meta[idx].flags = CMD_SIZE_HUGE;
466 }
467
Johannes Bergc2acea82009-07-24 11:13:05 -0700468 idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800469 out_cmd = txq->cmd[idx];
Johannes Bergc2acea82009-07-24 11:13:05 -0700470 out_meta = &txq->meta[idx];
471
Daniel C Halperin8ce73f32009-07-31 14:28:06 -0700472 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
Johannes Bergc2acea82009-07-24 11:13:05 -0700473 out_meta->flags = cmd->flags;
474 if (cmd->flags & CMD_WANT_SKB)
475 out_meta->source = cmd;
476 if (cmd->flags & CMD_ASYNC)
477 out_meta->callback = cmd->callback;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800478
479 out_cmd->hdr.cmd = cmd->id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800480 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
481
482 /* At this point, the out_cmd now has all of the incoming cmd
483 * information */
484
485 out_cmd->hdr.flags = 0;
Johannes Berg13bb9482010-08-23 10:46:33 +0200486 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(priv->cmd_queue) |
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800487 INDEX_TO_SEQ(q->write_ptr));
Johannes Bergc2acea82009-07-24 11:13:05 -0700488 if (cmd->flags & CMD_SIZE_HUGE)
Tomas Winkler9734cb22008-09-03 11:26:52 +0800489 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
Johannes Bergc2acea82009-07-24 11:13:05 -0700490 len = sizeof(struct iwl_device_cmd);
Abhijeet Kolekar89612122010-02-19 11:49:49 -0800491 if (idx == TFD_CMD_SLOTS)
492 len = IWL_MAX_CMD_SIZE;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800493
Esti Kummerded2ae72008-08-04 16:00:45 +0800494#ifdef CONFIG_IWLWIFI_DEBUG
495 switch (out_cmd->hdr.cmd) {
496 case REPLY_TX_LINK_QUALITY_CMD:
497 case SENSITIVITY_CMD:
Tomas Winklere1623442009-01-27 14:27:56 -0800498 IWL_DEBUG_HC_DUMP(priv, "Sending command %s (#%x), seq: 0x%04X, "
Esti Kummerded2ae72008-08-04 16:00:45 +0800499 "%d bytes at %d[%d]:%d\n",
500 get_cmd_string(out_cmd->hdr.cmd),
501 out_cmd->hdr.cmd,
502 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
Johannes Berg13bb9482010-08-23 10:46:33 +0200503 q->write_ptr, idx, priv->cmd_queue);
504 break;
Esti Kummerded2ae72008-08-04 16:00:45 +0800505 default:
Tomas Winklere1623442009-01-27 14:27:56 -0800506 IWL_DEBUG_HC(priv, "Sending command %s (#%x), seq: 0x%04X, "
Esti Kummerded2ae72008-08-04 16:00:45 +0800507 "%d bytes at %d[%d]:%d\n",
508 get_cmd_string(out_cmd->hdr.cmd),
509 out_cmd->hdr.cmd,
510 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
Johannes Berg13bb9482010-08-23 10:46:33 +0200511 q->write_ptr, idx, priv->cmd_queue);
Esti Kummerded2ae72008-08-04 16:00:45 +0800512 }
513#endif
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800514 txq->need_update = 1;
515
Samuel Ortiz518099a2009-01-19 15:30:27 -0800516 if (priv->cfg->ops->lib->txq_update_byte_cnt_tbl)
517 /* Set up entry in queue's byte count circular buffer */
518 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800519
Reinette Chatredf833b12009-04-21 10:55:48 -0700520 phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr,
521 fix_size, PCI_DMA_BIDIRECTIONAL);
FUJITA Tomonori2e724442010-06-03 14:19:20 +0900522 dma_unmap_addr_set(out_meta, mapping, phys_addr);
523 dma_unmap_len_set(out_meta, len, fix_size);
Reinette Chatredf833b12009-04-21 10:55:48 -0700524
Johannes Bergbe1a71a2009-10-02 13:44:02 -0700525 trace_iwlwifi_dev_hcmd(priv, &out_cmd->hdr, fix_size, cmd->flags);
526
Reinette Chatredf833b12009-04-21 10:55:48 -0700527 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
528 phys_addr, fix_size, 1,
529 U32_PAD(cmd->len));
530
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800531 /* Increment and update queue's write index */
532 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -0800533 iwl_txq_update_write_ptr(priv, txq);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800534
535 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
Abhijeet Kolekar7bfedc52010-02-03 13:47:56 -0800536 return idx;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800537}
538
Tomas Winkler17b88922008-05-29 16:35:12 +0800539/**
540 * iwl_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
541 *
542 * When FW advances 'R' index, all entries between old and new 'R' index
543 * need to be reclaimed. As result, some free space forms. If there is
544 * enough free space (> low mark), wake the stack that feeds us.
545 */
Tomas Winkler499b1882008-10-14 12:32:48 -0700546static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
547 int idx, int cmd_idx)
Tomas Winkler17b88922008-05-29 16:35:12 +0800548{
549 struct iwl_tx_queue *txq = &priv->txq[txq_id];
550 struct iwl_queue *q = &txq->q;
551 int nfreed = 0;
552
Tomas Winkler499b1882008-10-14 12:32:48 -0700553 if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800554 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
Tomas Winkler17b88922008-05-29 16:35:12 +0800555 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winkler499b1882008-10-14 12:32:48 -0700556 idx, q->n_bd, q->write_ptr, q->read_ptr);
Tomas Winkler17b88922008-05-29 16:35:12 +0800557 return;
558 }
559
Tomas Winkler499b1882008-10-14 12:32:48 -0700560 for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
561 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
562
563 if (nfreed++ > 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800564 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx,
Tomas Winkler17b88922008-05-29 16:35:12 +0800565 q->write_ptr, q->read_ptr);
566 queue_work(priv->workqueue, &priv->restart);
567 }
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800568
Tomas Winkler17b88922008-05-29 16:35:12 +0800569 }
570}
571
572/**
573 * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
574 * @rxb: Rx buffer to reclaim
575 *
576 * If an Rx buffer has an async callback associated with it the callback
577 * will be executed. The attached skb (if present) will only be freed
578 * if the callback returns 1
579 */
580void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
581{
Zhu Yi2f301222009-10-09 17:19:45 +0800582 struct iwl_rx_packet *pkt = rxb_addr(rxb);
Tomas Winkler17b88922008-05-29 16:35:12 +0800583 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
584 int txq_id = SEQ_TO_QUEUE(sequence);
585 int index = SEQ_TO_INDEX(sequence);
Tomas Winkler17b88922008-05-29 16:35:12 +0800586 int cmd_index;
Tomas Winkler9734cb22008-09-03 11:26:52 +0800587 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
Johannes Bergc2acea82009-07-24 11:13:05 -0700588 struct iwl_device_cmd *cmd;
589 struct iwl_cmd_meta *meta;
Johannes Berg13bb9482010-08-23 10:46:33 +0200590 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
Tomas Winkler17b88922008-05-29 16:35:12 +0800591
592 /* If a Tx command is being handled and it isn't in the actual
593 * command queue then there a command routing bug has been introduced
594 * in the queue management code. */
Johannes Berg13bb9482010-08-23 10:46:33 +0200595 if (WARN(txq_id != priv->cmd_queue,
596 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
597 txq_id, priv->cmd_queue, sequence,
598 priv->txq[priv->cmd_queue].q.read_ptr,
599 priv->txq[priv->cmd_queue].q.write_ptr)) {
Reinette Chatreec741162009-07-24 11:13:08 -0700600 iwl_print_hex_error(priv, pkt, 32);
Johannes Berg55d6a3c2008-09-23 19:18:43 +0200601 return;
Winkler, Tomas01ef93232008-11-07 09:58:45 -0800602 }
Tomas Winkler17b88922008-05-29 16:35:12 +0800603
Zhu Yidd487442010-03-22 02:28:41 -0700604 /* If this is a huge cmd, clear the huge flag on the meta.flags
605 * of the _original_ cmd. So that iwl_cmd_queue_free won't unmap
606 * the DMA buffer for the scan (huge) command.
607 */
608 if (huge) {
609 cmd_index = get_cmd_index(&txq->q, index, 0);
610 txq->meta[cmd_index].flags = 0;
611 }
612 cmd_index = get_cmd_index(&txq->q, index, huge);
613 cmd = txq->cmd[cmd_index];
614 meta = &txq->meta[cmd_index];
Tomas Winkler17b88922008-05-29 16:35:12 +0800615
Reinette Chatrec33de622009-10-30 14:36:10 -0700616 pci_unmap_single(priv->pci_dev,
FUJITA Tomonori2e724442010-06-03 14:19:20 +0900617 dma_unmap_addr(meta, mapping),
618 dma_unmap_len(meta, len),
Reinette Chatrec33de622009-10-30 14:36:10 -0700619 PCI_DMA_BIDIRECTIONAL);
620
Tomas Winkler17b88922008-05-29 16:35:12 +0800621 /* Input error checking is done when commands are added to queue. */
Johannes Bergc2acea82009-07-24 11:13:05 -0700622 if (meta->flags & CMD_WANT_SKB) {
Zhu Yi2f301222009-10-09 17:19:45 +0800623 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
624 rxb->page = NULL;
Johannes Berg5696aea2009-07-24 11:13:06 -0700625 } else if (meta->callback)
Zhu Yi2f301222009-10-09 17:19:45 +0800626 meta->callback(priv, cmd, pkt);
Tomas Winkler17b88922008-05-29 16:35:12 +0800627
Tomas Winkler499b1882008-10-14 12:32:48 -0700628 iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index);
Tomas Winkler17b88922008-05-29 16:35:12 +0800629
Johannes Bergc2acea82009-07-24 11:13:05 -0700630 if (!(meta->flags & CMD_ASYNC)) {
Tomas Winkler17b88922008-05-29 16:35:12 +0800631 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
Frans Pop91dd6c22010-03-24 14:19:58 -0700632 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command %s\n",
Reinette Chatred2dfe6d2010-02-18 22:03:04 -0800633 get_cmd_string(cmd->hdr.cmd));
Tomas Winkler17b88922008-05-29 16:35:12 +0800634 wake_up_interruptible(&priv->wait_command_queue);
635 }
Zhu Yidd487442010-03-22 02:28:41 -0700636 meta->flags = 0;
Tomas Winkler17b88922008-05-29 16:35:12 +0800637}
638EXPORT_SYMBOL(iwl_tx_cmd_complete);