Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * hcd_queue.c - DesignWare HS OTG Controller host queuing routines |
| 3 | * |
| 4 | * Copyright (C) 2004-2013 Synopsys, Inc. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions, and the following disclaimer, |
| 11 | * without modification. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * 3. The names of the above-listed copyright holders may not be used |
| 16 | * to endorse or promote products derived from this software without |
| 17 | * specific prior written permission. |
| 18 | * |
| 19 | * ALTERNATIVELY, this software may be distributed under the terms of the |
| 20 | * GNU General Public License ("GPL") as published by the Free Software |
| 21 | * Foundation; either version 2 of the License, or (at your option) any |
| 22 | * later version. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS |
| 25 | * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 28 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 29 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 30 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| 31 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 32 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 33 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 34 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 35 | */ |
| 36 | |
| 37 | /* |
| 38 | * This file contains the functions to manage Queue Heads and Queue |
| 39 | * Transfer Descriptors for Host mode |
| 40 | */ |
| 41 | #include <linux/kernel.h> |
| 42 | #include <linux/module.h> |
| 43 | #include <linux/spinlock.h> |
| 44 | #include <linux/interrupt.h> |
| 45 | #include <linux/dma-mapping.h> |
| 46 | #include <linux/io.h> |
| 47 | #include <linux/slab.h> |
| 48 | #include <linux/usb.h> |
| 49 | |
| 50 | #include <linux/usb/hcd.h> |
| 51 | #include <linux/usb/ch11.h> |
| 52 | |
| 53 | #include "core.h" |
| 54 | #include "hcd.h" |
| 55 | |
| 56 | /** |
| 57 | * dwc2_qh_init() - Initializes a QH structure |
| 58 | * |
| 59 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 60 | * @qh: The QH to init |
| 61 | * @urb: Holds the information about the device/endpoint needed to initialize |
| 62 | * the QH |
| 63 | */ |
| 64 | #define SCHEDULE_SLOP 10 |
| 65 | static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, |
| 66 | struct dwc2_hcd_urb *urb) |
| 67 | { |
| 68 | int dev_speed, hub_addr, hub_port; |
| 69 | char *speed, *type; |
| 70 | |
| 71 | dev_vdbg(hsotg->dev, "%s()\n", __func__); |
| 72 | |
| 73 | /* Initialize QH */ |
| 74 | qh->ep_type = dwc2_hcd_get_pipe_type(&urb->pipe_info); |
| 75 | qh->ep_is_in = dwc2_hcd_is_pipe_in(&urb->pipe_info) ? 1 : 0; |
| 76 | |
| 77 | qh->data_toggle = DWC2_HC_PID_DATA0; |
| 78 | qh->maxp = dwc2_hcd_get_mps(&urb->pipe_info); |
| 79 | INIT_LIST_HEAD(&qh->qtd_list); |
| 80 | INIT_LIST_HEAD(&qh->qh_list_entry); |
| 81 | |
| 82 | /* FS/LS Endpoint on HS Hub, NOT virtual root hub */ |
| 83 | dev_speed = dwc2_host_get_speed(hsotg, urb->priv); |
| 84 | |
| 85 | dwc2_host_hub_info(hsotg, urb->priv, &hub_addr, &hub_port); |
| 86 | |
| 87 | if ((dev_speed == USB_SPEED_LOW || dev_speed == USB_SPEED_FULL) && |
| 88 | hub_addr != 0 && hub_addr != 1) { |
| 89 | dev_vdbg(hsotg->dev, |
| 90 | "QH init: EP %d: TT found at hub addr %d, for port %d\n", |
| 91 | dwc2_hcd_get_ep_num(&urb->pipe_info), hub_addr, |
| 92 | hub_port); |
| 93 | qh->do_split = 1; |
| 94 | } |
| 95 | |
| 96 | if (qh->ep_type == USB_ENDPOINT_XFER_INT || |
| 97 | qh->ep_type == USB_ENDPOINT_XFER_ISOC) { |
| 98 | /* Compute scheduling parameters once and save them */ |
| 99 | u32 hprt, prtspd; |
| 100 | |
| 101 | /* Todo: Account for split transfers in the bus time */ |
| 102 | int bytecount = |
| 103 | dwc2_hb_mult(qh->maxp) * dwc2_max_packet(qh->maxp); |
| 104 | |
| 105 | qh->usecs = NS_TO_US(usb_calc_bus_time(qh->do_split ? |
| 106 | USB_SPEED_HIGH : dev_speed, qh->ep_is_in, |
| 107 | qh->ep_type == USB_ENDPOINT_XFER_ISOC, |
| 108 | bytecount)); |
Gregory Herrero | dd81dd7 | 2015-09-22 15:16:52 +0200 | [diff] [blame] | 109 | |
| 110 | /* Ensure frame_number corresponds to the reality */ |
| 111 | hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 112 | /* Start in a slightly future (micro)frame */ |
| 113 | qh->sched_frame = dwc2_frame_num_inc(hsotg->frame_number, |
| 114 | SCHEDULE_SLOP); |
| 115 | qh->interval = urb->interval; |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 116 | dwc2_sch_dbg(hsotg, "QH=%p init sch=%04x, fn=%04x, int=%#x\n", |
| 117 | qh, qh->sched_frame, hsotg->frame_number, |
| 118 | qh->interval); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 119 | #if 0 |
| 120 | /* Increase interrupt polling rate for debugging */ |
| 121 | if (qh->ep_type == USB_ENDPOINT_XFER_INT) |
| 122 | qh->interval = 8; |
| 123 | #endif |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 124 | hprt = dwc2_readl(hsotg->regs + HPRT0); |
Matthijs Kooijman | f923463 | 2013-08-30 18:45:13 +0200 | [diff] [blame] | 125 | prtspd = (hprt & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 126 | if (prtspd == HPRT0_SPD_HIGH_SPEED && |
| 127 | (dev_speed == USB_SPEED_LOW || |
| 128 | dev_speed == USB_SPEED_FULL)) { |
| 129 | qh->interval *= 8; |
| 130 | qh->sched_frame |= 0x7; |
| 131 | qh->start_split_frame = qh->sched_frame; |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 132 | dwc2_sch_dbg(hsotg, |
| 133 | "QH=%p init*8 sch=%04x, fn=%04x, int=%#x\n", |
| 134 | qh, qh->sched_frame, hsotg->frame_number, |
| 135 | qh->interval); |
| 136 | |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 137 | } |
| 138 | dev_dbg(hsotg->dev, "interval=%d\n", qh->interval); |
| 139 | } |
| 140 | |
| 141 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH Initialized\n"); |
| 142 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - qh = %p\n", qh); |
| 143 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Device Address = %d\n", |
| 144 | dwc2_hcd_get_dev_addr(&urb->pipe_info)); |
| 145 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Endpoint %d, %s\n", |
| 146 | dwc2_hcd_get_ep_num(&urb->pipe_info), |
| 147 | dwc2_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT"); |
| 148 | |
| 149 | qh->dev_speed = dev_speed; |
| 150 | |
| 151 | switch (dev_speed) { |
| 152 | case USB_SPEED_LOW: |
| 153 | speed = "low"; |
| 154 | break; |
| 155 | case USB_SPEED_FULL: |
| 156 | speed = "full"; |
| 157 | break; |
| 158 | case USB_SPEED_HIGH: |
| 159 | speed = "high"; |
| 160 | break; |
| 161 | default: |
| 162 | speed = "?"; |
| 163 | break; |
| 164 | } |
| 165 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Speed = %s\n", speed); |
| 166 | |
| 167 | switch (qh->ep_type) { |
| 168 | case USB_ENDPOINT_XFER_ISOC: |
| 169 | type = "isochronous"; |
| 170 | break; |
| 171 | case USB_ENDPOINT_XFER_INT: |
| 172 | type = "interrupt"; |
| 173 | break; |
| 174 | case USB_ENDPOINT_XFER_CONTROL: |
| 175 | type = "control"; |
| 176 | break; |
| 177 | case USB_ENDPOINT_XFER_BULK: |
| 178 | type = "bulk"; |
| 179 | break; |
| 180 | default: |
| 181 | type = "?"; |
| 182 | break; |
| 183 | } |
| 184 | |
| 185 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Type = %s\n", type); |
| 186 | |
| 187 | if (qh->ep_type == USB_ENDPOINT_XFER_INT) { |
| 188 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - usecs = %d\n", |
| 189 | qh->usecs); |
| 190 | dev_vdbg(hsotg->dev, "DWC OTG HCD QH - interval = %d\n", |
| 191 | qh->interval); |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | /** |
| 196 | * dwc2_hcd_qh_create() - Allocates and initializes a QH |
| 197 | * |
| 198 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 199 | * @urb: Holds the information about the device/endpoint needed |
| 200 | * to initialize the QH |
| 201 | * @atomic_alloc: Flag to do atomic allocation if needed |
| 202 | * |
| 203 | * Return: Pointer to the newly allocated QH, or NULL on error |
| 204 | */ |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 205 | struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 206 | struct dwc2_hcd_urb *urb, |
| 207 | gfp_t mem_flags) |
| 208 | { |
| 209 | struct dwc2_qh *qh; |
| 210 | |
Paul Zimmerman | b2d6cb5 | 2013-07-13 14:53:51 -0700 | [diff] [blame] | 211 | if (!urb->priv) |
| 212 | return NULL; |
| 213 | |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 214 | /* Allocate memory */ |
| 215 | qh = kzalloc(sizeof(*qh), mem_flags); |
| 216 | if (!qh) |
| 217 | return NULL; |
| 218 | |
| 219 | dwc2_qh_init(hsotg, qh, urb); |
| 220 | |
| 221 | if (hsotg->core_params->dma_desc_enable > 0 && |
| 222 | dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { |
| 223 | dwc2_hcd_qh_free(hsotg, qh); |
| 224 | return NULL; |
| 225 | } |
| 226 | |
| 227 | return qh; |
| 228 | } |
| 229 | |
| 230 | /** |
| 231 | * dwc2_hcd_qh_free() - Frees the QH |
| 232 | * |
| 233 | * @hsotg: HCD instance |
| 234 | * @qh: The QH to free |
| 235 | * |
| 236 | * QH should already be removed from the list. QTD list should already be empty |
| 237 | * if called from URB Dequeue. |
| 238 | * |
| 239 | * Must NOT be called with interrupt disabled or spinlock held |
| 240 | */ |
| 241 | void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 242 | { |
Douglas Anderson | 3bc04e2 | 2016-01-28 18:19:53 -0800 | [diff] [blame] | 243 | if (qh->desc_list) |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 244 | dwc2_hcd_qh_free_ddma(hsotg, qh); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 245 | kfree(qh); |
| 246 | } |
| 247 | |
| 248 | /** |
| 249 | * dwc2_periodic_channel_available() - Checks that a channel is available for a |
| 250 | * periodic transfer |
| 251 | * |
| 252 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 253 | * |
Masanari Iida | 0dcde508 | 2013-09-13 23:34:36 +0900 | [diff] [blame] | 254 | * Return: 0 if successful, negative error code otherwise |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 255 | */ |
| 256 | static int dwc2_periodic_channel_available(struct dwc2_hsotg *hsotg) |
| 257 | { |
| 258 | /* |
Masanari Iida | 0dcde508 | 2013-09-13 23:34:36 +0900 | [diff] [blame] | 259 | * Currently assuming that there is a dedicated host channel for |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 260 | * each periodic transaction plus at least one host channel for |
| 261 | * non-periodic transactions |
| 262 | */ |
| 263 | int status; |
| 264 | int num_channels; |
| 265 | |
| 266 | num_channels = hsotg->core_params->host_channels; |
| 267 | if (hsotg->periodic_channels + hsotg->non_periodic_channels < |
| 268 | num_channels |
| 269 | && hsotg->periodic_channels < num_channels - 1) { |
| 270 | status = 0; |
| 271 | } else { |
| 272 | dev_dbg(hsotg->dev, |
| 273 | "%s: Total channels: %d, Periodic: %d, " |
| 274 | "Non-periodic: %d\n", __func__, num_channels, |
| 275 | hsotg->periodic_channels, hsotg->non_periodic_channels); |
| 276 | status = -ENOSPC; |
| 277 | } |
| 278 | |
| 279 | return status; |
| 280 | } |
| 281 | |
| 282 | /** |
| 283 | * dwc2_check_periodic_bandwidth() - Checks that there is sufficient bandwidth |
| 284 | * for the specified QH in the periodic schedule |
| 285 | * |
| 286 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 287 | * @qh: QH containing periodic bandwidth required |
| 288 | * |
| 289 | * Return: 0 if successful, negative error code otherwise |
| 290 | * |
| 291 | * For simplicity, this calculation assumes that all the transfers in the |
| 292 | * periodic schedule may occur in the same (micro)frame |
| 293 | */ |
| 294 | static int dwc2_check_periodic_bandwidth(struct dwc2_hsotg *hsotg, |
| 295 | struct dwc2_qh *qh) |
| 296 | { |
| 297 | int status; |
| 298 | s16 max_claimed_usecs; |
| 299 | |
| 300 | status = 0; |
| 301 | |
| 302 | if (qh->dev_speed == USB_SPEED_HIGH || qh->do_split) { |
| 303 | /* |
| 304 | * High speed mode |
| 305 | * Max periodic usecs is 80% x 125 usec = 100 usec |
| 306 | */ |
| 307 | max_claimed_usecs = 100 - qh->usecs; |
| 308 | } else { |
| 309 | /* |
| 310 | * Full speed mode |
| 311 | * Max periodic usecs is 90% x 1000 usec = 900 usec |
| 312 | */ |
| 313 | max_claimed_usecs = 900 - qh->usecs; |
| 314 | } |
| 315 | |
| 316 | if (hsotg->periodic_usecs > max_claimed_usecs) { |
| 317 | dev_err(hsotg->dev, |
| 318 | "%s: already claimed usecs %d, required usecs %d\n", |
| 319 | __func__, hsotg->periodic_usecs, qh->usecs); |
| 320 | status = -ENOSPC; |
| 321 | } |
| 322 | |
| 323 | return status; |
| 324 | } |
| 325 | |
| 326 | /** |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 327 | * Microframe scheduler |
| 328 | * track the total use in hsotg->frame_usecs |
| 329 | * keep each qh use in qh->frame_usecs |
| 330 | * when surrendering the qh then donate the time back |
| 331 | */ |
| 332 | static const unsigned short max_uframe_usecs[] = { |
| 333 | 100, 100, 100, 100, 100, 100, 30, 0 |
| 334 | }; |
| 335 | |
| 336 | void dwc2_hcd_init_usecs(struct dwc2_hsotg *hsotg) |
| 337 | { |
| 338 | int i; |
| 339 | |
| 340 | for (i = 0; i < 8; i++) |
| 341 | hsotg->frame_usecs[i] = max_uframe_usecs[i]; |
| 342 | } |
| 343 | |
| 344 | static int dwc2_find_single_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 345 | { |
| 346 | unsigned short utime = qh->usecs; |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 347 | int i; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 348 | |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 349 | for (i = 0; i < 8; i++) { |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 350 | /* At the start hsotg->frame_usecs[i] = max_uframe_usecs[i] */ |
| 351 | if (utime <= hsotg->frame_usecs[i]) { |
| 352 | hsotg->frame_usecs[i] -= utime; |
| 353 | qh->frame_usecs[i] += utime; |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 354 | return i; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 355 | } |
| 356 | } |
Paul Zimmerman | 9bda1aa | 2013-11-22 16:43:45 -0800 | [diff] [blame] | 357 | return -ENOSPC; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 358 | } |
| 359 | |
| 360 | /* |
| 361 | * use this for FS apps that can span multiple uframes |
| 362 | */ |
| 363 | static int dwc2_find_multi_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 364 | { |
| 365 | unsigned short utime = qh->usecs; |
| 366 | unsigned short xtime; |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 367 | int t_left; |
| 368 | int i; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 369 | int j; |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 370 | int k; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 371 | |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 372 | for (i = 0; i < 8; i++) { |
| 373 | if (hsotg->frame_usecs[i] <= 0) |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 374 | continue; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 375 | |
| 376 | /* |
| 377 | * we need n consecutive slots so use j as a start slot |
| 378 | * j plus j+1 must be enough time (for now) |
| 379 | */ |
| 380 | xtime = hsotg->frame_usecs[i]; |
| 381 | for (j = i + 1; j < 8; j++) { |
| 382 | /* |
| 383 | * if we add this frame remaining time to xtime we may |
| 384 | * be OK, if not we need to test j for a complete frame |
| 385 | */ |
| 386 | if (xtime + hsotg->frame_usecs[j] < utime) { |
| 387 | if (hsotg->frame_usecs[j] < |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 388 | max_uframe_usecs[j]) |
| 389 | continue; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 390 | } |
| 391 | if (xtime >= utime) { |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 392 | t_left = utime; |
| 393 | for (k = i; k < 8; k++) { |
| 394 | t_left -= hsotg->frame_usecs[k]; |
| 395 | if (t_left <= 0) { |
| 396 | qh->frame_usecs[k] += |
| 397 | hsotg->frame_usecs[k] |
| 398 | + t_left; |
| 399 | hsotg->frame_usecs[k] = -t_left; |
| 400 | return i; |
| 401 | } else { |
| 402 | qh->frame_usecs[k] += |
| 403 | hsotg->frame_usecs[k]; |
| 404 | hsotg->frame_usecs[k] = 0; |
| 405 | } |
| 406 | } |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 407 | } |
| 408 | /* add the frame time to x time */ |
| 409 | xtime += hsotg->frame_usecs[j]; |
| 410 | /* we must have a fully available next frame or break */ |
| 411 | if (xtime < utime && |
Himangi Saraogi | 86c17c0 | 2013-11-02 10:05:30 +0530 | [diff] [blame] | 412 | hsotg->frame_usecs[j] == max_uframe_usecs[j]) |
| 413 | continue; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 414 | } |
| 415 | } |
Paul Zimmerman | 9bda1aa | 2013-11-22 16:43:45 -0800 | [diff] [blame] | 416 | return -ENOSPC; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | static int dwc2_find_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 420 | { |
| 421 | int ret; |
| 422 | |
| 423 | if (qh->dev_speed == USB_SPEED_HIGH) { |
| 424 | /* if this is a hs transaction we need a full frame */ |
| 425 | ret = dwc2_find_single_uframe(hsotg, qh); |
| 426 | } else { |
| 427 | /* |
| 428 | * if this is a fs transaction we may need a sequence |
| 429 | * of frames |
| 430 | */ |
| 431 | ret = dwc2_find_multi_uframe(hsotg, qh); |
| 432 | } |
| 433 | return ret; |
| 434 | } |
| 435 | |
| 436 | /** |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 437 | * dwc2_check_max_xfer_size() - Checks that the max transfer size allowed in a |
| 438 | * host channel is large enough to handle the maximum data transfer in a single |
| 439 | * (micro)frame for a periodic transfer |
| 440 | * |
| 441 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 442 | * @qh: QH for a periodic endpoint |
| 443 | * |
| 444 | * Return: 0 if successful, negative error code otherwise |
| 445 | */ |
| 446 | static int dwc2_check_max_xfer_size(struct dwc2_hsotg *hsotg, |
| 447 | struct dwc2_qh *qh) |
| 448 | { |
| 449 | u32 max_xfer_size; |
| 450 | u32 max_channel_xfer_size; |
| 451 | int status = 0; |
| 452 | |
| 453 | max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp); |
| 454 | max_channel_xfer_size = hsotg->core_params->max_transfer_size; |
| 455 | |
| 456 | if (max_xfer_size > max_channel_xfer_size) { |
| 457 | dev_err(hsotg->dev, |
| 458 | "%s: Periodic xfer length %d > max xfer length for channel %d\n", |
| 459 | __func__, max_xfer_size, max_channel_xfer_size); |
| 460 | status = -ENOSPC; |
| 461 | } |
| 462 | |
| 463 | return status; |
| 464 | } |
| 465 | |
| 466 | /** |
| 467 | * dwc2_schedule_periodic() - Schedules an interrupt or isochronous transfer in |
| 468 | * the periodic schedule |
| 469 | * |
| 470 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 471 | * @qh: QH for the periodic transfer. The QH should already contain the |
| 472 | * scheduling information. |
| 473 | * |
| 474 | * Return: 0 if successful, negative error code otherwise |
| 475 | */ |
| 476 | static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 477 | { |
| 478 | int status; |
| 479 | |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 480 | if (hsotg->core_params->uframe_sched > 0) { |
| 481 | int frame = -1; |
| 482 | |
| 483 | status = dwc2_find_uframe(hsotg, qh); |
| 484 | if (status == 0) |
| 485 | frame = 7; |
| 486 | else if (status > 0) |
| 487 | frame = status - 1; |
| 488 | |
| 489 | /* Set the new frame up */ |
Paul Zimmerman | 9bda1aa | 2013-11-22 16:43:45 -0800 | [diff] [blame] | 490 | if (frame >= 0) { |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 491 | qh->sched_frame &= ~0x7; |
| 492 | qh->sched_frame |= (frame & 7); |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 493 | dwc2_sch_dbg(hsotg, "QH=%p sched_p sch=%04x, uf=%d\n", |
| 494 | qh, qh->sched_frame, frame); |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 495 | } |
| 496 | |
Paul Zimmerman | 9bda1aa | 2013-11-22 16:43:45 -0800 | [diff] [blame] | 497 | if (status > 0) |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 498 | status = 0; |
| 499 | } else { |
| 500 | status = dwc2_periodic_channel_available(hsotg); |
| 501 | if (status) { |
| 502 | dev_info(hsotg->dev, |
| 503 | "%s: No host channel available for periodic transfer\n", |
| 504 | __func__); |
| 505 | return status; |
| 506 | } |
| 507 | |
| 508 | status = dwc2_check_periodic_bandwidth(hsotg, qh); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 509 | } |
| 510 | |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 511 | if (status) { |
| 512 | dev_dbg(hsotg->dev, |
| 513 | "%s: Insufficient periodic bandwidth for periodic transfer\n", |
| 514 | __func__); |
| 515 | return status; |
| 516 | } |
| 517 | |
| 518 | status = dwc2_check_max_xfer_size(hsotg, qh); |
| 519 | if (status) { |
| 520 | dev_dbg(hsotg->dev, |
| 521 | "%s: Channel max transfer size too small for periodic transfer\n", |
| 522 | __func__); |
| 523 | return status; |
| 524 | } |
| 525 | |
| 526 | if (hsotg->core_params->dma_desc_enable > 0) |
| 527 | /* Don't rely on SOF and start in ready schedule */ |
| 528 | list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); |
| 529 | else |
| 530 | /* Always start in inactive schedule */ |
| 531 | list_add_tail(&qh->qh_list_entry, |
| 532 | &hsotg->periodic_sched_inactive); |
| 533 | |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 534 | if (hsotg->core_params->uframe_sched <= 0) |
| 535 | /* Reserve periodic channel */ |
| 536 | hsotg->periodic_channels++; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 537 | |
| 538 | /* Update claimed usecs per (micro)frame */ |
| 539 | hsotg->periodic_usecs += qh->usecs; |
| 540 | |
| 541 | return status; |
| 542 | } |
| 543 | |
| 544 | /** |
| 545 | * dwc2_deschedule_periodic() - Removes an interrupt or isochronous transfer |
| 546 | * from the periodic schedule |
| 547 | * |
| 548 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 549 | * @qh: QH for the periodic transfer |
| 550 | */ |
| 551 | static void dwc2_deschedule_periodic(struct dwc2_hsotg *hsotg, |
| 552 | struct dwc2_qh *qh) |
| 553 | { |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 554 | int i; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 555 | |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 556 | list_del_init(&qh->qh_list_entry); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 557 | |
| 558 | /* Update claimed usecs per (micro)frame */ |
| 559 | hsotg->periodic_usecs -= qh->usecs; |
Dom Cobley | 20f2eb9 | 2013-09-23 14:23:34 -0700 | [diff] [blame] | 560 | |
| 561 | if (hsotg->core_params->uframe_sched > 0) { |
| 562 | for (i = 0; i < 8; i++) { |
| 563 | hsotg->frame_usecs[i] += qh->frame_usecs[i]; |
| 564 | qh->frame_usecs[i] = 0; |
| 565 | } |
| 566 | } else { |
| 567 | /* Release periodic channel reservation */ |
| 568 | hsotg->periodic_channels--; |
| 569 | } |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 570 | } |
| 571 | |
| 572 | /** |
| 573 | * dwc2_hcd_qh_add() - Adds a QH to either the non periodic or periodic |
| 574 | * schedule if it is not already in the schedule. If the QH is already in |
| 575 | * the schedule, no action is taken. |
| 576 | * |
| 577 | * @hsotg: The HCD state structure for the DWC OTG controller |
| 578 | * @qh: The QH to add |
| 579 | * |
| 580 | * Return: 0 if successful, negative error code otherwise |
| 581 | */ |
| 582 | int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 583 | { |
Dan Carpenter | d31e6ca | 2013-11-25 17:11:29 +0300 | [diff] [blame] | 584 | int status; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 585 | u32 intr_mask; |
| 586 | |
Matthijs Kooijman | b49977a | 2013-04-10 09:55:50 +0200 | [diff] [blame] | 587 | if (dbg_qh(qh)) |
| 588 | dev_vdbg(hsotg->dev, "%s()\n", __func__); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 589 | |
| 590 | if (!list_empty(&qh->qh_list_entry)) |
| 591 | /* QH already in a schedule */ |
Dan Carpenter | d31e6ca | 2013-11-25 17:11:29 +0300 | [diff] [blame] | 592 | return 0; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 593 | |
Gregory Herrero | 08c4ffc | 2015-09-22 15:16:45 +0200 | [diff] [blame] | 594 | if (!dwc2_frame_num_le(qh->sched_frame, hsotg->frame_number) && |
| 595 | !hsotg->frame_number) { |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 596 | u16 new_frame; |
| 597 | |
Gregory Herrero | 08c4ffc | 2015-09-22 15:16:45 +0200 | [diff] [blame] | 598 | dev_dbg(hsotg->dev, |
| 599 | "reset frame number counter\n"); |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 600 | new_frame = dwc2_frame_num_inc(hsotg->frame_number, |
Gregory Herrero | 08c4ffc | 2015-09-22 15:16:45 +0200 | [diff] [blame] | 601 | SCHEDULE_SLOP); |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 602 | |
| 603 | dwc2_sch_vdbg(hsotg, "QH=%p reset sch=%04x=>%04x\n", |
| 604 | qh, qh->sched_frame, new_frame); |
| 605 | qh->sched_frame = new_frame; |
Gregory Herrero | 08c4ffc | 2015-09-22 15:16:45 +0200 | [diff] [blame] | 606 | } |
| 607 | |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 608 | /* Add the new QH to the appropriate schedule */ |
| 609 | if (dwc2_qh_is_non_per(qh)) { |
| 610 | /* Always start in inactive schedule */ |
| 611 | list_add_tail(&qh->qh_list_entry, |
| 612 | &hsotg->non_periodic_sched_inactive); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 613 | return 0; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 614 | } |
| 615 | |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 616 | status = dwc2_schedule_periodic(hsotg, qh); |
| 617 | if (status) |
| 618 | return status; |
| 619 | if (!hsotg->periodic_qh_count) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 620 | intr_mask = dwc2_readl(hsotg->regs + GINTMSK); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 621 | intr_mask |= GINTSTS_SOF; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 622 | dwc2_writel(intr_mask, hsotg->regs + GINTMSK); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 623 | } |
| 624 | hsotg->periodic_qh_count++; |
| 625 | |
Dan Carpenter | d31e6ca | 2013-11-25 17:11:29 +0300 | [diff] [blame] | 626 | return 0; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | /** |
| 630 | * dwc2_hcd_qh_unlink() - Removes a QH from either the non-periodic or periodic |
| 631 | * schedule. Memory is not freed. |
| 632 | * |
| 633 | * @hsotg: The HCD state structure |
| 634 | * @qh: QH to remove from schedule |
| 635 | */ |
| 636 | void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) |
| 637 | { |
| 638 | u32 intr_mask; |
| 639 | |
| 640 | dev_vdbg(hsotg->dev, "%s()\n", __func__); |
| 641 | |
| 642 | if (list_empty(&qh->qh_list_entry)) |
| 643 | /* QH is not in a schedule */ |
| 644 | return; |
| 645 | |
| 646 | if (dwc2_qh_is_non_per(qh)) { |
| 647 | if (hsotg->non_periodic_qh_ptr == &qh->qh_list_entry) |
| 648 | hsotg->non_periodic_qh_ptr = |
| 649 | hsotg->non_periodic_qh_ptr->next; |
| 650 | list_del_init(&qh->qh_list_entry); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 651 | return; |
| 652 | } |
| 653 | |
| 654 | dwc2_deschedule_periodic(hsotg, qh); |
| 655 | hsotg->periodic_qh_count--; |
| 656 | if (!hsotg->periodic_qh_count) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 657 | intr_mask = dwc2_readl(hsotg->regs + GINTMSK); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 658 | intr_mask &= ~GINTSTS_SOF; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 659 | dwc2_writel(intr_mask, hsotg->regs + GINTMSK); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 660 | } |
| 661 | } |
| 662 | |
| 663 | /* |
| 664 | * Schedule the next continuing periodic split transfer |
| 665 | */ |
| 666 | static void dwc2_sched_periodic_split(struct dwc2_hsotg *hsotg, |
| 667 | struct dwc2_qh *qh, u16 frame_number, |
| 668 | int sched_next_periodic_split) |
| 669 | { |
| 670 | u16 incr; |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 671 | u16 old_frame = qh->sched_frame; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 672 | |
| 673 | if (sched_next_periodic_split) { |
| 674 | qh->sched_frame = frame_number; |
| 675 | incr = dwc2_frame_num_inc(qh->start_split_frame, 1); |
| 676 | if (dwc2_frame_num_le(frame_number, incr)) { |
| 677 | /* |
| 678 | * Allow one frame to elapse after start split |
| 679 | * microframe before scheduling complete split, but |
| 680 | * DON'T if we are doing the next start split in the |
| 681 | * same frame for an ISOC out |
| 682 | */ |
| 683 | if (qh->ep_type != USB_ENDPOINT_XFER_ISOC || |
| 684 | qh->ep_is_in != 0) { |
| 685 | qh->sched_frame = |
| 686 | dwc2_frame_num_inc(qh->sched_frame, 1); |
| 687 | } |
| 688 | } |
| 689 | } else { |
| 690 | qh->sched_frame = dwc2_frame_num_inc(qh->start_split_frame, |
| 691 | qh->interval); |
| 692 | if (dwc2_frame_num_le(qh->sched_frame, frame_number)) |
| 693 | qh->sched_frame = frame_number; |
| 694 | qh->sched_frame |= 0x7; |
| 695 | qh->start_split_frame = qh->sched_frame; |
| 696 | } |
Douglas Anderson | 74fc4a7 | 2016-01-28 18:19:58 -0800 | [diff] [blame^] | 697 | |
| 698 | dwc2_sch_vdbg(hsotg, "QH=%p next(%d) fn=%04x, sch=%04x=>%04x (%+d)\n", |
| 699 | qh, sched_next_periodic_split, frame_number, old_frame, |
| 700 | qh->sched_frame, |
| 701 | dwc2_frame_num_dec(qh->sched_frame, old_frame)); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 702 | } |
| 703 | |
| 704 | /* |
| 705 | * Deactivates a QH. For non-periodic QHs, removes the QH from the active |
| 706 | * non-periodic schedule. The QH is added to the inactive non-periodic |
| 707 | * schedule if any QTDs are still attached to the QH. |
| 708 | * |
| 709 | * For periodic QHs, the QH is removed from the periodic queued schedule. If |
| 710 | * there are any QTDs still attached to the QH, the QH is added to either the |
| 711 | * periodic inactive schedule or the periodic ready schedule and its next |
| 712 | * scheduled frame is calculated. The QH is placed in the ready schedule if |
| 713 | * the scheduled frame has been reached already. Otherwise it's placed in the |
| 714 | * inactive schedule. If there are no QTDs attached to the QH, the QH is |
| 715 | * completely removed from the periodic schedule. |
| 716 | */ |
| 717 | void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, |
| 718 | int sched_next_periodic_split) |
| 719 | { |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 720 | u16 frame_number; |
| 721 | |
Matthijs Kooijman | b49977a | 2013-04-10 09:55:50 +0200 | [diff] [blame] | 722 | if (dbg_qh(qh)) |
| 723 | dev_vdbg(hsotg->dev, "%s()\n", __func__); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 724 | |
| 725 | if (dwc2_qh_is_non_per(qh)) { |
| 726 | dwc2_hcd_qh_unlink(hsotg, qh); |
| 727 | if (!list_empty(&qh->qtd_list)) |
| 728 | /* Add back to inactive non-periodic schedule */ |
| 729 | dwc2_hcd_qh_add(hsotg, qh); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 730 | return; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 731 | } |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 732 | |
| 733 | frame_number = dwc2_hcd_get_frame_number(hsotg); |
| 734 | |
| 735 | if (qh->do_split) { |
| 736 | dwc2_sched_periodic_split(hsotg, qh, frame_number, |
| 737 | sched_next_periodic_split); |
| 738 | } else { |
| 739 | qh->sched_frame = dwc2_frame_num_inc(qh->sched_frame, |
| 740 | qh->interval); |
| 741 | if (dwc2_frame_num_le(qh->sched_frame, frame_number)) |
| 742 | qh->sched_frame = frame_number; |
| 743 | } |
| 744 | |
| 745 | if (list_empty(&qh->qtd_list)) { |
| 746 | dwc2_hcd_qh_unlink(hsotg, qh); |
| 747 | return; |
| 748 | } |
| 749 | /* |
| 750 | * Remove from periodic_sched_queued and move to |
| 751 | * appropriate queue |
| 752 | */ |
| 753 | if ((hsotg->core_params->uframe_sched > 0 && |
| 754 | dwc2_frame_num_le(qh->sched_frame, frame_number)) || |
| 755 | (hsotg->core_params->uframe_sched <= 0 && |
| 756 | qh->sched_frame == frame_number)) |
Douglas Anderson | 94ef7ae | 2016-01-28 18:19:56 -0800 | [diff] [blame] | 757 | list_move_tail(&qh->qh_list_entry, |
| 758 | &hsotg->periodic_sched_ready); |
Dan Carpenter | 5e12847 | 2013-11-25 17:14:14 +0300 | [diff] [blame] | 759 | else |
Douglas Anderson | 94ef7ae | 2016-01-28 18:19:56 -0800 | [diff] [blame] | 760 | list_move_tail(&qh->qh_list_entry, |
| 761 | &hsotg->periodic_sched_inactive); |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 762 | } |
| 763 | |
| 764 | /** |
| 765 | * dwc2_hcd_qtd_init() - Initializes a QTD structure |
| 766 | * |
| 767 | * @qtd: The QTD to initialize |
| 768 | * @urb: The associated URB |
| 769 | */ |
| 770 | void dwc2_hcd_qtd_init(struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb) |
| 771 | { |
| 772 | qtd->urb = urb; |
| 773 | if (dwc2_hcd_get_pipe_type(&urb->pipe_info) == |
| 774 | USB_ENDPOINT_XFER_CONTROL) { |
| 775 | /* |
| 776 | * The only time the QTD data toggle is used is on the data |
| 777 | * phase of control transfers. This phase always starts with |
| 778 | * DATA1. |
| 779 | */ |
| 780 | qtd->data_toggle = DWC2_HC_PID_DATA1; |
| 781 | qtd->control_phase = DWC2_CONTROL_SETUP; |
| 782 | } |
| 783 | |
| 784 | /* Start split */ |
| 785 | qtd->complete_split = 0; |
| 786 | qtd->isoc_split_pos = DWC2_HCSPLT_XACTPOS_ALL; |
| 787 | qtd->isoc_split_offset = 0; |
| 788 | qtd->in_process = 0; |
| 789 | |
| 790 | /* Store the qtd ptr in the urb to reference the QTD */ |
| 791 | urb->qtd = qtd; |
| 792 | } |
| 793 | |
| 794 | /** |
| 795 | * dwc2_hcd_qtd_add() - Adds a QTD to the QTD-list of a QH |
Gregory Herrero | 33ad261 | 2015-04-29 22:09:15 +0200 | [diff] [blame] | 796 | * Caller must hold driver lock. |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 797 | * |
| 798 | * @hsotg: The DWC HCD structure |
| 799 | * @qtd: The QTD to add |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 800 | * @qh: Queue head to add qtd to |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 801 | * |
| 802 | * Return: 0 if successful, negative error code otherwise |
| 803 | * |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 804 | * If the QH to which the QTD is added is not currently scheduled, it is placed |
| 805 | * into the proper schedule based on its EP type. |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 806 | */ |
| 807 | int dwc2_hcd_qtd_add(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 808 | struct dwc2_qh *qh) |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 809 | { |
Paul Zimmerman | b2d6cb5 | 2013-07-13 14:53:51 -0700 | [diff] [blame] | 810 | int retval; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 811 | |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 812 | if (unlikely(!qh)) { |
| 813 | dev_err(hsotg->dev, "%s: Invalid QH\n", __func__); |
| 814 | retval = -EINVAL; |
| 815 | goto fail; |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 816 | } |
| 817 | |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 818 | retval = dwc2_hcd_qh_add(hsotg, qh); |
Paul Zimmerman | b2d6cb5 | 2013-07-13 14:53:51 -0700 | [diff] [blame] | 819 | if (retval) |
| 820 | goto fail; |
| 821 | |
Mian Yousaf Kaukab | b58e6ce | 2015-06-29 11:05:28 +0200 | [diff] [blame] | 822 | qtd->qh = qh; |
| 823 | list_add_tail(&qtd->qtd_list_entry, &qh->qtd_list); |
Paul Zimmerman | b2d6cb5 | 2013-07-13 14:53:51 -0700 | [diff] [blame] | 824 | |
| 825 | return 0; |
Paul Zimmerman | b2d6cb5 | 2013-07-13 14:53:51 -0700 | [diff] [blame] | 826 | fail: |
Paul Zimmerman | 7359d48 | 2013-03-11 17:47:59 -0700 | [diff] [blame] | 827 | return retval; |
| 828 | } |