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Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +01003choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
Masanari Iida6b2aac42012-04-14 00:14:11 +090010 The Freescale ColdFire family of processors is a modern derivative
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010011 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23config COLDFIRE
24 bool "Coldfire CPU family support"
25 select GENERIC_GPIO
Steven Kingeac57942012-05-21 13:10:19 -070026 select ARCH_WANT_OPTIONAL_GPIOLIB
Mark Brown7563bbf2012-04-15 10:52:54 +010027 select ARCH_HAVE_CUSTOM_GPIO_H
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010028 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
Greg Ungerere7d65822012-08-03 16:08:36 +100031 select HAVE_CLK
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010032
33endchoice
34
35if M68KCLASSIC
36
Greg Ungerer0e152d82011-06-20 15:49:09 +100037config M68000
38 bool
39 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100040 select CPU_HAS_NO_MULDIV64
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +020041 select CPU_HAS_NO_UNALIGNED
Greg Ungerer7f73baf2011-10-18 15:49:19 +100042 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +100043 help
44 The Freescale (was Motorola) 68000 CPU is the first generation of
45 the well known M68K family of processors. The CPU core as well as
46 being available as a stand alone CPU was also used in many
47 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
48 a paging MMU.
49
50config MCPU32
51 bool
52 select CPU_HAS_NO_BITFIELDS
Geert Uytterhoeven7df0d272012-06-06 19:39:39 +020053 select CPU_HAS_NO_UNALIGNED
Greg Ungerer0e152d82011-06-20 15:49:09 +100054 help
55 The Freescale (was then Motorola) CPU32 is a CPU core that is
56 based on the 68020 processor. For the most part it is used in
57 System-On-Chip parts, and does not contain a paging MMU.
58
Greg Ungerer0e152d82011-06-20 15:49:09 +100059config M68020
60 bool "68020 support"
61 depends on MMU
Greg Ungerere08d7032011-10-14 14:43:30 +100062 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100063 help
64 If you anticipate running this kernel on a computer with a MC68020
65 processor, say Y. Otherwise, say N. Note that the 68020 requires a
66 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
67 Sun 3, which provides its own version.
68
69config M68030
70 bool "68030 support"
71 depends on MMU && !MMU_SUN3
Greg Ungerere08d7032011-10-14 14:43:30 +100072 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100073 help
74 If you anticipate running this kernel on a computer with a MC68030
75 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
76 work, as it does not include an MMU (Memory Management Unit).
77
78config M68040
79 bool "68040 support"
80 depends on MMU && !MMU_SUN3
Greg Ungerere08d7032011-10-14 14:43:30 +100081 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100082 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
Greg Ungerere08d7032011-10-14 14:43:30 +100091 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100092 help
93 If you anticipate running this kernel on a computer with a MC68060
94 processor, say Y. Otherwise, say N.
95
96config M68328
97 bool "MC68328"
98 depends on !MMU
99 select M68000
100 help
101 Motorola 68328 processor support.
102
103config M68EZ328
104 bool "MC68EZ328"
105 depends on !MMU
106 select M68000
107 help
108 Motorola 68EX328 processor support.
109
110config M68VZ328
111 bool "MC68VZ328"
112 depends on !MMU
113 select M68000
114 help
115 Motorola 68VZ328 processor support.
116
117config M68360
118 bool "MC68360"
119 depends on !MMU
120 select MCPU32
121 help
122 Motorola 68360 processor support.
123
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100124endif # M68KCLASSIC
125
126if COLDFIRE
127
Greg Ungerer0e152d82011-06-20 15:49:09 +1000128config M5206
129 bool "MCF5206"
130 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000131 select COLDFIRE_SW_A7
132 select HAVE_MBAR
133 help
134 Motorola ColdFire 5206 processor support.
135
136config M5206e
137 bool "MCF5206e"
138 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000139 select COLDFIRE_SW_A7
140 select HAVE_MBAR
141 help
142 Motorola ColdFire 5206e processor support.
143
144config M520x
145 bool "MCF520x"
146 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000147 select GENERIC_CLOCKEVENTS
148 select HAVE_CACHE_SPLIT
149 help
150 Freescale Coldfire 5207/5208 processor support.
151
152config M523x
153 bool "MCF523x"
154 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000155 select GENERIC_CLOCKEVENTS
156 select HAVE_CACHE_SPLIT
157 select HAVE_IPSBAR
158 help
159 Freescale Coldfire 5230/1/2/4/5 processor support
160
161config M5249
162 bool "MCF5249"
163 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000164 select COLDFIRE_SW_A7
165 select HAVE_MBAR
166 help
167 Motorola ColdFire 5249 processor support.
168
Steven King04e037a2012-06-05 08:23:08 -0700169config M525x
170 bool "MCF525x"
171 depends on !MMU
172 select COLDFIRE_SW_A7
173 select HAVE_MBAR
174 help
175 Freescale (Motorola) Coldfire 5251/5253 processor support.
176
Greg Ungerer0e152d82011-06-20 15:49:09 +1000177config M527x
178 bool
179
180config M5271
181 bool "MCF5271"
182 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000183 select M527x
184 select HAVE_CACHE_SPLIT
185 select HAVE_IPSBAR
186 select GENERIC_CLOCKEVENTS
187 help
188 Freescale (Motorola) ColdFire 5270/5271 processor support.
189
190config M5272
191 bool "MCF5272"
192 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000193 select COLDFIRE_SW_A7
194 select HAVE_MBAR
195 help
196 Motorola ColdFire 5272 processor support.
197
198config M5275
199 bool "MCF5275"
200 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000201 select M527x
202 select HAVE_CACHE_SPLIT
203 select HAVE_IPSBAR
204 select GENERIC_CLOCKEVENTS
205 help
206 Freescale (Motorola) ColdFire 5274/5275 processor support.
207
208config M528x
209 bool "MCF528x"
210 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000211 select GENERIC_CLOCKEVENTS
212 select HAVE_CACHE_SPLIT
213 select HAVE_IPSBAR
214 help
215 Motorola ColdFire 5280/5282 processor support.
216
217config M5307
218 bool "MCF5307"
219 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000220 select COLDFIRE_SW_A7
221 select HAVE_CACHE_CB
222 select HAVE_MBAR
223 help
224 Motorola ColdFire 5307 processor support.
225
226config M532x
227 bool "MCF532x"
228 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000229 select HAVE_CACHE_CB
230 help
231 Freescale (Motorola) ColdFire 532x processor support.
232
233config M5407
234 bool "MCF5407"
235 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000236 select COLDFIRE_SW_A7
237 select HAVE_CACHE_CB
238 select HAVE_MBAR
239 help
240 Motorola ColdFire 5407 processor support.
241
242config M54xx
243 bool
244
245config M547x
246 bool "MCF547x"
Greg Ungerer0e152d82011-06-20 15:49:09 +1000247 select M54xx
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000248 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000249 select HAVE_CACHE_CB
250 select HAVE_MBAR
251 help
252 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
253
254config M548x
255 bool "MCF548x"
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000256 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000257 select M54xx
258 select HAVE_CACHE_CB
259 select HAVE_MBAR
260 help
261 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
262
Steven Kingbea8bcb2012-06-06 14:28:31 -0700263config M5441x
264 bool "MCF5441x"
265 depends on !MMU
266 select GENERIC_CLOCKEVENTS
267 select HAVE_CACHE_CB
268 help
269 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
270
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100271endif # COLDFIRE
272
Greg Ungerer0e152d82011-06-20 15:49:09 +1000273
274comment "Processor Specific Options"
275
276config M68KFPU_EMU
277 bool "Math emulation support (EXPERIMENTAL)"
278 depends on MMU
279 depends on EXPERIMENTAL
280 help
281 At some point in the future, this will cause floating-point math
282 instructions to be emulated by the kernel on machines that lack a
283 floating-point math coprocessor. Thrill-seekers and chronically
284 sleep-deprived psychotic hacker types can say Y now, everyone else
285 should probably wait a while.
286
287config M68KFPU_EMU_EXTRAPREC
288 bool "Math emulation extra precision"
289 depends on M68KFPU_EMU
290 help
291 The fpu uses normally a few bit more during calculations for
292 correct rounding, the emulator can (often) do the same but this
293 extra calculation can cost quite some time, so you can disable
294 it here. The emulator will then "only" calculate with a 64 bit
295 mantissa and round slightly incorrect, what is more than enough
296 for normal usage.
297
298config M68KFPU_EMU_ONLY
299 bool "Math emulation only kernel"
300 depends on M68KFPU_EMU
301 help
302 This option prevents any floating-point instructions from being
303 compiled into the kernel, thereby the kernel doesn't save any
304 floating point context anymore during task switches, so this
305 kernel will only be usable on machines without a floating-point
306 math coprocessor. This makes the kernel a bit faster as no tests
307 needs to be executed whether a floating-point instruction in the
308 kernel should be executed or not.
309
310config ADVANCED
311 bool "Advanced configuration options"
312 depends on MMU
313 ---help---
314 This gives you access to some advanced options for the CPU. The
315 defaults should be fine for most users, but these options may make
316 it possible for you to improve performance somewhat if you know what
317 you are doing.
318
319 Note that the answer to this question won't directly affect the
320 kernel: saying N will just cause the configurator to skip all
321 the questions about these options.
322
323 Most users should say N to this question.
324
325config RMW_INSNS
326 bool "Use read-modify-write instructions"
327 depends on ADVANCED
328 ---help---
329 This allows to use certain instructions that work with indivisible
330 read-modify-write bus cycles. While this is faster than the
331 workaround of disabling interrupts, it can conflict with DMA
332 ( = direct memory access) on many Amiga systems, and it is also said
333 to destabilize other machines. It is very likely that this will
334 cause serious problems on any Amiga or Atari Medusa if set. The only
335 configuration where it should work are 68030-based Ataris, where it
336 apparently improves performance. But you've been warned! Unless you
337 really know what you are doing, say N. Try Y only if you're quite
338 adventurous.
339
340config SINGLE_MEMORY_CHUNK
341 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
342 depends on MMU
343 default y if SUN3
344 select NEED_MULTIPLE_NODES
345 help
346 Ignore all but the first contiguous chunk of physical memory for VM
347 purposes. This will save a few bytes kernel size and may speed up
348 some operations. Say N if not sure.
349
350config ARCH_DISCONTIGMEM_ENABLE
351 def_bool MMU && !SINGLE_MEMORY_CHUNK
352
353config 060_WRITETHROUGH
354 bool "Use write-through caching for 68060 supervisor accesses"
355 depends on ADVANCED && M68060
356 ---help---
357 The 68060 generally uses copyback caching of recently accessed data.
358 Copyback caching means that memory writes will be held in an on-chip
359 cache and only written back to memory some time later. Saying Y
360 here will force supervisor (kernel) accesses to use writethrough
361 caching. Writethrough caching means that data is written to memory
362 straight away, so that cache and memory data always agree.
363 Writethrough caching is less efficient, but is needed for some
364 drivers on 68060 based systems where the 68060 bus snooping signal
365 is hardwired on. The 53c710 SCSI driver is known to suffer from
366 this problem.
367
368config M68K_L2_CACHE
369 bool
370 depends on MAC
371 default y
372
373config NODES_SHIFT
374 int
375 default "3"
376 depends on !SINGLE_MEMORY_CHUNK
377
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200378config CPU_HAS_NO_BITFIELDS
379 bool
380
381config CPU_HAS_NO_MULDIV64
382 bool
383
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +0200384config CPU_HAS_NO_UNALIGNED
385 bool
386
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200387config CPU_HAS_ADDRESS_SPACES
388 bool
389
Greg Ungerer0e152d82011-06-20 15:49:09 +1000390config FPU
391 bool
392
393config COLDFIRE_SW_A7
394 bool
395
396config HAVE_CACHE_SPLIT
397 bool
398
399config HAVE_CACHE_CB
400 bool
401
402config HAVE_MBAR
403 bool
404
405config HAVE_IPSBAR
406 bool
407
408config CLOCK_SET
409 bool "Enable setting the CPU clock frequency"
410 depends on COLDFIRE
411 default n
412 help
413 On some CPU's you do not need to know what the core CPU clock
414 frequency is. On these you can disable clock setting. On some
415 traditional 68K parts, and on all ColdFire parts you need to set
416 the appropriate CPU clock frequency. On these devices many of the
417 onboard peripherals derive their timing from the master CPU clock
418 frequency.
419
420config CLOCK_FREQ
421 int "Set the core clock frequency"
422 default "66666666"
423 depends on CLOCK_SET
424 help
425 Define the CPU clock frequency in use. This is the core clock
426 frequency, it may or may not be the same as the external clock
427 crystal fitted to your board. Some processors have an internal
428 PLL and can have their frequency programmed at run time, others
429 use internal dividers. In general the kernel won't setup a PLL
430 if it is fitted (there are some exceptions). This value will be
431 specific to the exact CPU that you are using.
432
433config OLDMASK
434 bool "Old mask 5307 (1H55J) silicon"
435 depends on M5307
436 help
437 Build support for the older revision ColdFire 5307 silicon.
438 Specifically this is the 1H55J mask revision.
439
440if HAVE_CACHE_SPLIT
441choice
442 prompt "Split Cache Configuration"
443 default CACHE_I
444
445config CACHE_I
446 bool "Instruction"
447 help
448 Use all of the ColdFire CPU cache memory as an instruction cache.
449
450config CACHE_D
451 bool "Data"
452 help
453 Use all of the ColdFire CPU cache memory as a data cache.
454
455config CACHE_BOTH
456 bool "Both"
457 help
458 Split the ColdFire CPU cache, and use half as an instruction cache
459 and half as a data cache.
460endchoice
461endif
462
463if HAVE_CACHE_CB
464choice
465 prompt "Data cache mode"
466 default CACHE_WRITETHRU
467
468config CACHE_WRITETHRU
469 bool "Write-through"
470 help
471 The ColdFire CPU cache is set into Write-through mode.
472
473config CACHE_COPYBACK
474 bool "Copy-back"
475 help
476 The ColdFire CPU cache is set into Copy-back mode.
477endchoice
478endif
479