Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Nouveau Community |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Martin Peres <martin.peres@labri.fr> |
| 23 | * Ben Skeggs |
| 24 | */ |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 25 | #include "nv04.h" |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 26 | |
Ben Skeggs | a699a85 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 27 | #include <subdev/therm.h> |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 28 | #include <subdev/timer.h> |
| 29 | |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 30 | static int |
Ben Skeggs | 01d6b95 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 31 | nv50_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size) |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 32 | { |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 33 | struct nvkm_device *device = bus->subdev.device; |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 34 | int i; |
| 35 | |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 36 | nvkm_mask(device, 0x001098, 0x00000008, 0x00000000); |
| 37 | nvkm_wr32(device, 0x001304, 0x00000000); |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 38 | for (i = 0; i < size; i++) |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 39 | nvkm_wr32(device, 0x001400 + (i * 4), data[i]); |
| 40 | nvkm_mask(device, 0x001098, 0x00000018, 0x00000018); |
| 41 | nvkm_wr32(device, 0x00130c, 0x00000003); |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 42 | |
Ben Skeggs | 4f31c84 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 43 | if (nvkm_msec(device, 2000, |
| 44 | if (!(nvkm_rd32(device, 0x001308) & 0x00000100)) |
| 45 | break; |
| 46 | ) < 0) |
| 47 | return -ETIMEDOUT; |
| 48 | |
| 49 | return 0; |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | void |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 53 | nv50_bus_intr(struct nvkm_subdev *subdev) |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 54 | { |
Ben Skeggs | a699a85 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 55 | struct nvkm_device *device = subdev->device; |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 56 | u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 57 | |
| 58 | if (stat & 0x00000008) { |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 59 | u32 addr = nvkm_rd32(device, 0x009084); |
| 60 | u32 data = nvkm_rd32(device, 0x009088); |
Martin Peres | 9d7175c | 2012-12-07 02:26:02 +0100 | [diff] [blame] | 61 | |
Ben Skeggs | a699a85 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 62 | nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n", |
| 63 | (addr & 0x00000002) ? "write" : "read", data, |
| 64 | (addr & 0x00fffffc)); |
Martin Peres | 9d7175c | 2012-12-07 02:26:02 +0100 | [diff] [blame] | 65 | |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 66 | stat &= ~0x00000008; |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 67 | nvkm_wr32(device, 0x001100, 0x00000008); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | if (stat & 0x00010000) { |
Ben Skeggs | a699a85 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 71 | struct nvkm_therm *therm = device->therm; |
| 72 | if (therm && therm->subdev.intr) |
| 73 | therm->subdev.intr(&therm->subdev); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 74 | stat &= ~0x00010000; |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 75 | nvkm_wr32(device, 0x001100, 0x00010000); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | if (stat) { |
Ben Skeggs | a699a85 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 79 | nvkm_error(subdev, "intr %08x\n", stat); |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 80 | nvkm_mask(device, 0x001140, stat, 0); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 81 | } |
| 82 | } |
| 83 | |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 84 | int |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 85 | nv50_bus_init(struct nvkm_object *object) |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 86 | { |
Ben Skeggs | 01d6b95 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 87 | struct nvkm_bus *bus = (void *)object; |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 88 | struct nvkm_device *device = bus->subdev.device; |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 89 | int ret; |
| 90 | |
Ben Skeggs | 01d6b95 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 91 | ret = nvkm_bus_init(bus); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 92 | if (ret) |
| 93 | return ret; |
| 94 | |
Ben Skeggs | 14caba4 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 95 | nvkm_wr32(device, 0x001100, 0xffffffff); |
| 96 | nvkm_wr32(device, 0x001140, 0x00010008); |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 97 | return 0; |
| 98 | } |
| 99 | |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 100 | struct nvkm_oclass * |
Ben Skeggs | 48ae0b3 | 2013-10-24 09:39:05 +1000 | [diff] [blame] | 101 | nv50_bus_oclass = &(struct nv04_bus_impl) { |
| 102 | .base.handle = NV_SUBDEV(BUS, 0x50), |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 103 | .base.ofuncs = &(struct nvkm_ofuncs) { |
Ben Skeggs | 48ae0b3 | 2013-10-24 09:39:05 +1000 | [diff] [blame] | 104 | .ctor = nv04_bus_ctor, |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 105 | .dtor = _nvkm_bus_dtor, |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 106 | .init = nv50_bus_init, |
Ben Skeggs | 5f8824d | 2015-01-14 14:40:22 +1000 | [diff] [blame] | 107 | .fini = _nvkm_bus_fini, |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 108 | }, |
Ben Skeggs | 48ae0b3 | 2013-10-24 09:39:05 +1000 | [diff] [blame] | 109 | .intr = nv50_bus_intr, |
Ben Skeggs | 2984506 | 2013-10-15 10:49:39 +1000 | [diff] [blame] | 110 | .hwsq_exec = nv50_bus_hwsq_exec, |
| 111 | .hwsq_size = 64, |
Ben Skeggs | 48ae0b3 | 2013-10-24 09:39:05 +1000 | [diff] [blame] | 112 | }.base; |