blob: 651a6da8adf5544de4c254b5511a8cad5cb568de [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
29
30unsigned int ath10k_debug_mask;
31static bool uart_print;
32static unsigned int ath10k_p2p;
33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
34module_param(uart_print, bool, 0644);
35module_param_named(p2p, ath10k_p2p, uint, 0644);
36MODULE_PARM_DESC(debug_mask, "Debugging mask");
37MODULE_PARM_DESC(uart_print, "Uart target debugging");
38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
39
40static const struct ath10k_hw_params ath10k_hw_params_list[] = {
41 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030042 .id = QCA988X_HW_2_0_VERSION,
43 .name = "qca988x hw2.0",
44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
45 .fw = {
46 .dir = QCA988X_HW_2_0_FW_DIR,
47 .fw = QCA988X_HW_2_0_FW_FILE,
48 .otp = QCA988X_HW_2_0_OTP_FILE,
49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
50 },
51 },
52};
53
54static void ath10k_send_suspend_complete(struct ath10k *ar)
55{
Michal Kazior7aa7a722014-08-25 12:09:38 +020056 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030057
Marek Puzyniak9042e172014-02-10 17:14:23 +010058 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030059}
60
Kalle Valo5e3dd152013-06-12 20:52:10 +030061static int ath10k_init_configure_target(struct ath10k *ar)
62{
63 u32 param_host;
64 int ret;
65
66 /* tell target which HTC version it is used*/
67 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
68 HTC_PROTOCOL_VERSION);
69 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020070 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030071 return ret;
72 }
73
74 /* set the firmware mode to STA/IBSS/AP */
75 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
76 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020077 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 return ret;
79 }
80
81 /* TODO following parameters need to be re-visited. */
82 /* num_device */
83 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
84 /* Firmware mode */
85 /* FIXME: Why FW_MODE_AP ??.*/
86 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
87 /* mac_addr_method */
88 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
89 /* firmware_bridge */
90 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
91 /* fwsubmode */
92 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
93
94 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
95 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020096 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030097 return ret;
98 }
99
100 /* We do all byte-swapping on the host */
101 ret = ath10k_bmi_write32(ar, hi_be, 0);
102 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200103 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300104 return ret;
105 }
106
107 /* FW descriptor/Data swap flags */
108 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
109
110 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200111 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300112 return ret;
113 }
114
115 return 0;
116}
117
118static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
119 const char *dir,
120 const char *file)
121{
122 char filename[100];
123 const struct firmware *fw;
124 int ret;
125
126 if (file == NULL)
127 return ERR_PTR(-ENOENT);
128
129 if (dir == NULL)
130 dir = ".";
131
132 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
133 ret = request_firmware(&fw, filename, ar->dev);
134 if (ret)
135 return ERR_PTR(ret);
136
137 return fw;
138}
139
Kalle Valo958df3a2013-09-27 19:55:01 +0300140static int ath10k_push_board_ext_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300141{
142 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
143 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
144 u32 board_ext_data_addr;
145 int ret;
146
147 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
148 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200149 ath10k_err(ar, "could not read board ext data addr (%d)\n",
150 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300151 return ret;
152 }
153
Michal Kazior7aa7a722014-08-25 12:09:38 +0200154 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300155 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300156 board_ext_data_addr);
157
158 if (board_ext_data_addr == 0)
159 return 0;
160
Kalle Valo958df3a2013-09-27 19:55:01 +0300161 if (ar->board_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200162 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valo958df3a2013-09-27 19:55:01 +0300163 ar->board_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164 return -EINVAL;
165 }
166
167 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valo958df3a2013-09-27 19:55:01 +0300168 ar->board_data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300169 board_ext_data_size);
170 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200171 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300172 return ret;
173 }
174
175 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
176 (board_ext_data_size << 16) | 1);
177 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200178 ath10k_err(ar, "could not write board ext data bit (%d)\n",
179 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 return ret;
181 }
182
183 return 0;
184}
185
186static int ath10k_download_board_data(struct ath10k *ar)
187{
188 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
189 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300190 int ret;
191
Kalle Valo958df3a2013-09-27 19:55:01 +0300192 ret = ath10k_push_board_ext_data(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300193 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200194 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300195 goto exit;
196 }
197
198 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
199 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200200 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300201 goto exit;
202 }
203
Kalle Valo958df3a2013-09-27 19:55:01 +0300204 ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
205 min_t(u32, board_data_size,
206 ar->board_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200208 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300209 goto exit;
210 }
211
212 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
213 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200214 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300215 goto exit;
216 }
217
218exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 return ret;
220}
221
222static int ath10k_download_and_run_otp(struct ath10k *ar)
223{
Kalle Valod6d4a582014-03-11 17:33:19 +0200224 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 int ret;
226
227 /* OTP is optional */
228
Kalle Valo7f06ea12014-03-11 17:33:28 +0200229 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200230 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700231 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200233 }
234
Michal Kazior7aa7a722014-08-25 12:09:38 +0200235 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200236 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300237
Kalle Valo958df3a2013-09-27 19:55:01 +0300238 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300239 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200240 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200241 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300242 }
243
Kalle Valod6d4a582014-03-11 17:33:19 +0200244 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300245 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200246 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200247 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 }
249
Michal Kazior7aa7a722014-08-25 12:09:38 +0200250 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200251
252 if (result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200253 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200254 return -EINVAL;
255 }
256
257 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300258}
259
260static int ath10k_download_fw(struct ath10k *ar)
261{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300262 u32 address;
263 int ret;
264
Kalle Valo5e3dd152013-06-12 20:52:10 +0300265 address = ar->hw_params.patch_load_addr;
266
Kalle Valo958df3a2013-09-27 19:55:01 +0300267 ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
268 ar->firmware_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300269 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200270 ath10k_err(ar, "could not write fw (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300271 goto exit;
272 }
273
274exit:
Michal Kazior29385052013-07-16 09:38:58 +0200275 return ret;
276}
277
278static void ath10k_core_free_firmware_files(struct ath10k *ar)
279{
Kalle Valo36527912013-09-27 19:54:55 +0300280 if (ar->board && !IS_ERR(ar->board))
281 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200282
283 if (ar->otp && !IS_ERR(ar->otp))
284 release_firmware(ar->otp);
285
286 if (ar->firmware && !IS_ERR(ar->firmware))
287 release_firmware(ar->firmware);
288
Kalle Valo36527912013-09-27 19:54:55 +0300289 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300290 ar->board_data = NULL;
291 ar->board_len = 0;
292
Michal Kazior29385052013-07-16 09:38:58 +0200293 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300294 ar->otp_data = NULL;
295 ar->otp_len = 0;
296
Michal Kazior29385052013-07-16 09:38:58 +0200297 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300298 ar->firmware_data = NULL;
299 ar->firmware_len = 0;
Michal Kazior29385052013-07-16 09:38:58 +0200300}
301
Kalle Valo1a222432013-09-27 19:55:07 +0300302static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200303{
304 int ret = 0;
305
306 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200307 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200308 return -EINVAL;
309 }
310
311 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200312 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200313 return -EINVAL;
314 }
315
Kalle Valo36527912013-09-27 19:54:55 +0300316 ar->board = ath10k_fetch_fw_file(ar,
317 ar->hw_params.fw.dir,
318 ar->hw_params.fw.board);
319 if (IS_ERR(ar->board)) {
320 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200321 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200322 goto err;
323 }
324
Kalle Valo958df3a2013-09-27 19:55:01 +0300325 ar->board_data = ar->board->data;
326 ar->board_len = ar->board->size;
327
Michal Kazior29385052013-07-16 09:38:58 +0200328 ar->firmware = ath10k_fetch_fw_file(ar,
329 ar->hw_params.fw.dir,
330 ar->hw_params.fw.fw);
331 if (IS_ERR(ar->firmware)) {
332 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200333 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200334 goto err;
335 }
336
Kalle Valo958df3a2013-09-27 19:55:01 +0300337 ar->firmware_data = ar->firmware->data;
338 ar->firmware_len = ar->firmware->size;
339
Michal Kazior29385052013-07-16 09:38:58 +0200340 /* OTP may be undefined. If so, don't fetch it at all */
341 if (ar->hw_params.fw.otp == NULL)
342 return 0;
343
344 ar->otp = ath10k_fetch_fw_file(ar,
345 ar->hw_params.fw.dir,
346 ar->hw_params.fw.otp);
347 if (IS_ERR(ar->otp)) {
348 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200349 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200350 goto err;
351 }
352
Kalle Valo958df3a2013-09-27 19:55:01 +0300353 ar->otp_data = ar->otp->data;
354 ar->otp_len = ar->otp->size;
355
Michal Kazior29385052013-07-16 09:38:58 +0200356 return 0;
357
358err:
359 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300360 return ret;
361}
362
Kalle Valo1a222432013-09-27 19:55:07 +0300363static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
364{
365 size_t magic_len, len, ie_len;
366 int ie_id, i, index, bit, ret;
367 struct ath10k_fw_ie *hdr;
368 const u8 *data;
369 __le32 *timestamp;
370
371 /* first fetch the firmware file (firmware-*.bin) */
372 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
373 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200374 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700375 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300376 return PTR_ERR(ar->firmware);
377 }
378
379 data = ar->firmware->data;
380 len = ar->firmware->size;
381
382 /* magic also includes the null byte, check that as well */
383 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
384
385 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200386 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700387 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200388 ret = -EINVAL;
389 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300390 }
391
392 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200393 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200394 ret = -EINVAL;
395 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300396 }
397
398 /* jump over the padding */
399 magic_len = ALIGN(magic_len, 4);
400
401 len -= magic_len;
402 data += magic_len;
403
404 /* loop elements */
405 while (len > sizeof(struct ath10k_fw_ie)) {
406 hdr = (struct ath10k_fw_ie *)data;
407
408 ie_id = le32_to_cpu(hdr->id);
409 ie_len = le32_to_cpu(hdr->len);
410
411 len -= sizeof(*hdr);
412 data += sizeof(*hdr);
413
414 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200415 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300416 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200417 ret = -EINVAL;
418 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300419 }
420
421 switch (ie_id) {
422 case ATH10K_FW_IE_FW_VERSION:
423 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
424 break;
425
426 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
427 ar->hw->wiphy->fw_version[ie_len] = '\0';
428
Michal Kazior7aa7a722014-08-25 12:09:38 +0200429 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300430 "found fw version %s\n",
431 ar->hw->wiphy->fw_version);
432 break;
433 case ATH10K_FW_IE_TIMESTAMP:
434 if (ie_len != sizeof(u32))
435 break;
436
437 timestamp = (__le32 *)data;
438
Michal Kazior7aa7a722014-08-25 12:09:38 +0200439 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300440 le32_to_cpup(timestamp));
441 break;
442 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200443 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300444 "found firmware features ie (%zd B)\n",
445 ie_len);
446
447 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
448 index = i / 8;
449 bit = i % 8;
450
451 if (index == ie_len)
452 break;
453
Ben Greearf591a1a2014-02-04 19:51:38 +0200454 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200455 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200456 "Enabling feature bit: %i\n",
457 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300458 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200459 }
Kalle Valo1a222432013-09-27 19:55:07 +0300460 }
461
Michal Kazior7aa7a722014-08-25 12:09:38 +0200462 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300463 ar->fw_features,
464 sizeof(ar->fw_features));
465 break;
466 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200467 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300468 "found fw image ie (%zd B)\n",
469 ie_len);
470
471 ar->firmware_data = data;
472 ar->firmware_len = ie_len;
473
474 break;
475 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200476 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300477 "found otp image ie (%zd B)\n",
478 ie_len);
479
480 ar->otp_data = data;
481 ar->otp_len = ie_len;
482
483 break;
484 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200485 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300486 le32_to_cpu(hdr->id));
487 break;
488 }
489
490 /* jump over the padding */
491 ie_len = ALIGN(ie_len, 4);
492
493 len -= ie_len;
494 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300495 }
Kalle Valo1a222432013-09-27 19:55:07 +0300496
497 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200498 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700499 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300500 ret = -ENOMEDIUM;
501 goto err;
502 }
503
Michal Kazior24c88f72014-07-25 13:32:17 +0200504 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
505 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200506 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
Michal Kazior24c88f72014-07-25 13:32:17 +0200507 ret = -EINVAL;
508 goto err;
509 }
510
Kalle Valo1a222432013-09-27 19:55:07 +0300511 /* now fetch the board file */
512 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200513 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300514 ret = -EINVAL;
515 goto err;
516 }
517
518 ar->board = ath10k_fetch_fw_file(ar,
519 ar->hw_params.fw.dir,
520 ar->hw_params.fw.board);
521 if (IS_ERR(ar->board)) {
522 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200523 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700524 ar->hw_params.fw.dir, ar->hw_params.fw.board,
525 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300526 goto err;
527 }
528
529 ar->board_data = ar->board->data;
530 ar->board_len = ar->board->size;
531
532 return 0;
533
534err:
535 ath10k_core_free_firmware_files(ar);
536 return ret;
537}
538
539static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
540{
541 int ret;
542
Michal Kazior24c88f72014-07-25 13:32:17 +0200543 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200544 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200545
546 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
547 if (ret == 0)
548 goto success;
549
Ben Greear53c02282014-03-24 12:20:41 -0700550 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200551 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700552
Kalle Valo1a222432013-09-27 19:55:07 +0300553 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700554 if (ret == 0)
555 goto success;
556
557 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200558 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300559
560 ret = ath10k_core_fetch_firmware_api_1(ar);
561 if (ret)
562 return ret;
563
Ben Greear53c02282014-03-24 12:20:41 -0700564success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200565 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300566
567 return 0;
568}
569
Kalle Valo5e3dd152013-06-12 20:52:10 +0300570static int ath10k_init_download_firmware(struct ath10k *ar)
571{
572 int ret;
573
574 ret = ath10k_download_board_data(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700575 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_err(ar, "failed to download board data: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700578 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300579
580 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700581 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200582 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300583 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700584 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300585
586 ret = ath10k_download_fw(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700587 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200588 ath10k_err(ar, "failed to download firmware: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300589 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700590 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300591
592 return ret;
593}
594
595static int ath10k_init_uart(struct ath10k *ar)
596{
597 int ret;
598
599 /*
600 * Explicitly setting UART prints to zero as target turns it on
601 * based on scratch registers.
602 */
603 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
604 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200605 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300606 return ret;
607 }
608
Kalle Valoc8c39af2013-11-20 10:00:41 +0200609 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300610 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300611
612 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
613 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200614 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300615 return ret;
616 }
617
618 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
619 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200620 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300621 return ret;
622 }
623
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200624 /* Set the UART baud rate to 19200. */
625 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
626 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200627 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200628 return ret;
629 }
630
Michal Kazior7aa7a722014-08-25 12:09:38 +0200631 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300632 return 0;
633}
634
635static int ath10k_init_hw_params(struct ath10k *ar)
636{
637 const struct ath10k_hw_params *uninitialized_var(hw_params);
638 int i;
639
640 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
641 hw_params = &ath10k_hw_params_list[i];
642
643 if (hw_params->id == ar->target_version)
644 break;
645 }
646
647 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200648 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300649 ar->target_version);
650 return -EINVAL;
651 }
652
653 ar->hw_params = *hw_params;
654
Michal Kazior7aa7a722014-08-25 12:09:38 +0200655 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200656 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300657
658 return 0;
659}
660
Michal Kazioraffd3212013-07-16 09:54:35 +0200661static void ath10k_core_restart(struct work_struct *work)
662{
663 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
664
665 mutex_lock(&ar->conf_mutex);
666
667 switch (ar->state) {
668 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200669 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200670 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200671 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200672 ieee80211_restart_hw(ar->hw);
673 break;
674 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300675 /* this can happen if driver is being unloaded
676 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200677 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200678 break;
679 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300680 /* hw restart might be requested from multiple places */
681 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200682 case ATH10K_STATE_RESTARTED:
683 ar->state = ATH10K_STATE_WEDGED;
684 /* fall through */
685 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200686 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200687 break;
688 }
689
690 mutex_unlock(&ar->conf_mutex);
691}
692
Michal Kaziordd30a362013-07-16 09:38:51 +0200693int ath10k_core_start(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300694{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300695 int status;
696
Kalle Valo60631c52013-10-08 21:45:25 +0300697 lockdep_assert_held(&ar->conf_mutex);
698
Michal Kazior64d151d2013-07-16 09:38:53 +0200699 ath10k_bmi_start(ar);
700
Kalle Valo5e3dd152013-06-12 20:52:10 +0300701 if (ath10k_init_configure_target(ar)) {
702 status = -EINVAL;
703 goto err;
704 }
705
706 status = ath10k_init_download_firmware(ar);
707 if (status)
708 goto err;
709
710 status = ath10k_init_uart(ar);
711 if (status)
712 goto err;
713
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300714 ar->htc.htc_ops.target_send_suspend_complete =
715 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300716
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300717 status = ath10k_htc_init(ar);
718 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200719 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300720 goto err;
721 }
722
723 status = ath10k_bmi_done(ar);
724 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300725 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300726
727 status = ath10k_wmi_attach(ar);
728 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200729 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300730 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300731 }
732
Michal Kazior95bf21f2014-05-16 17:15:39 +0300733 status = ath10k_htt_init(ar);
734 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200735 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300736 goto err_wmi_detach;
737 }
738
739 status = ath10k_htt_tx_alloc(&ar->htt);
740 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200741 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300742 goto err_wmi_detach;
743 }
744
745 status = ath10k_htt_rx_alloc(&ar->htt);
746 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200747 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300748 goto err_htt_tx_detach;
749 }
750
Michal Kazior67e3c632013-11-08 08:05:18 +0100751 status = ath10k_hif_start(ar);
752 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200753 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300754 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100755 }
756
757 status = ath10k_htc_wait_target(&ar->htc);
758 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200759 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100760 goto err_hif_stop;
761 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300762
Michal Kazior95bf21f2014-05-16 17:15:39 +0300763 status = ath10k_htt_connect(&ar->htt);
Michal Kazioredb82362013-07-05 16:15:14 +0300764 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200765 ath10k_err(ar, "failed to connect htt (%d)\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100766 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300767 }
768
Michal Kazior95bf21f2014-05-16 17:15:39 +0300769 status = ath10k_wmi_connect(ar);
770 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200771 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300772 goto err_hif_stop;
773 }
774
775 status = ath10k_htc_start(&ar->htc);
776 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200777 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300778 goto err_hif_stop;
779 }
780
781 status = ath10k_wmi_wait_for_service_ready(ar);
782 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200783 ath10k_warn(ar, "wmi service ready event not received");
Michal Kazior95bf21f2014-05-16 17:15:39 +0300784 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200785 goto err_hif_stop;
Michal Kazior95bf21f2014-05-16 17:15:39 +0300786 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300787
Michal Kazior7aa7a722014-08-25 12:09:38 +0200788 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200789 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300790
Kalle Valo5e3dd152013-06-12 20:52:10 +0300791 status = ath10k_wmi_cmd_init(ar);
792 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200793 ath10k_err(ar, "could not send WMI init command (%d)\n",
794 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200795 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300796 }
797
798 status = ath10k_wmi_wait_for_unified_ready(ar);
799 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200800 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300801 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200802 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300803 }
804
Michal Kazior95bf21f2014-05-16 17:15:39 +0300805 status = ath10k_htt_setup(&ar->htt);
806 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200807 ath10k_err(ar, "failed to setup htt: %d\n", status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200808 goto err_hif_stop;
Michal Kazior95bf21f2014-05-16 17:15:39 +0300809 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300810
Kalle Valodb66ea02013-09-03 11:44:03 +0300811 status = ath10k_debug_start(ar);
812 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200813 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +0300814
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300815 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
816 ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1;
817 else
818 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
819
Michal Kazior05791192013-10-16 15:44:45 +0300820 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200821
Michal Kaziordd30a362013-07-16 09:38:51 +0200822 return 0;
823
Michal Kazior67e3c632013-11-08 08:05:18 +0100824err_hif_stop:
825 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300826err_htt_rx_detach:
827 ath10k_htt_rx_free(&ar->htt);
828err_htt_tx_detach:
829 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200830err_wmi_detach:
831 ath10k_wmi_detach(ar);
832err:
833 return status;
834}
Michal Kazior818bdd12013-07-16 09:38:57 +0200835EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200836
Marek Puzyniak00f54822014-02-10 17:14:24 +0100837int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
838{
839 int ret;
840
841 reinit_completion(&ar->target_suspend);
842
843 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
844 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200845 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100846 return ret;
847 }
848
849 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
850
851 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200852 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +0100853 return -ETIMEDOUT;
854 }
855
856 return 0;
857}
858
Michal Kaziordd30a362013-07-16 09:38:51 +0200859void ath10k_core_stop(struct ath10k *ar)
860{
Kalle Valo60631c52013-10-08 21:45:25 +0300861 lockdep_assert_held(&ar->conf_mutex);
862
Marek Puzyniak00f54822014-02-10 17:14:24 +0100863 /* try to suspend target */
Michal Kazior216a1832014-04-23 19:30:04 +0300864 if (ar->state != ATH10K_STATE_RESTARTING)
865 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
866
Kalle Valodb66ea02013-09-03 11:44:03 +0300867 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300868 ath10k_hif_stop(ar);
869 ath10k_htt_tx_free(&ar->htt);
870 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200871 ath10k_wmi_detach(ar);
872}
Michal Kazior818bdd12013-07-16 09:38:57 +0200873EXPORT_SYMBOL(ath10k_core_stop);
874
875/* mac80211 manages fw/hw initialization through start/stop hooks. However in
876 * order to know what hw capabilities should be advertised to mac80211 it is
877 * necessary to load the firmware (and tear it down immediately since start
878 * hook will try to init it again) before registering */
879static int ath10k_core_probe_fw(struct ath10k *ar)
880{
Michal Kazior29385052013-07-16 09:38:58 +0200881 struct bmi_target_info target_info;
882 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +0200883
884 ret = ath10k_hif_power_up(ar);
885 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200886 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +0200887 return ret;
888 }
889
Michal Kazior29385052013-07-16 09:38:58 +0200890 memset(&target_info, 0, sizeof(target_info));
891 ret = ath10k_bmi_get_target_info(ar, &target_info);
892 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200893 ath10k_err(ar, "could not get target info (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200894 ath10k_hif_power_down(ar);
895 return ret;
896 }
897
898 ar->target_version = target_info.version;
899 ar->hw->wiphy->hw_version = target_info.version;
900
901 ret = ath10k_init_hw_params(ar);
902 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200903 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200904 ath10k_hif_power_down(ar);
905 return ret;
906 }
907
908 ret = ath10k_core_fetch_firmware_files(ar);
909 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200910 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200911 ath10k_hif_power_down(ar);
912 return ret;
913 }
914
Kalle Valo60631c52013-10-08 21:45:25 +0300915 mutex_lock(&ar->conf_mutex);
916
Michal Kazior818bdd12013-07-16 09:38:57 +0200917 ret = ath10k_core_start(ar);
918 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200919 ath10k_err(ar, "could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200920 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200921 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300922 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +0200923 return ret;
924 }
925
Michal Kazior8079de02014-08-22 14:23:29 +0200926 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200927 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300928
929 mutex_unlock(&ar->conf_mutex);
930
Michal Kazior818bdd12013-07-16 09:38:57 +0200931 ath10k_hif_power_down(ar);
932 return 0;
933}
Michal Kaziordd30a362013-07-16 09:38:51 +0200934
Kalle Valoe01ae682013-09-01 11:22:14 +0300935static int ath10k_core_check_chip_id(struct ath10k *ar)
936{
937 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
938
Michal Kazior7aa7a722014-08-25 12:09:38 +0200939 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
Kalle Valoeffea962013-09-08 17:55:44 +0300940 ar->chip_id, hw_revision);
941
Kalle Valoe01ae682013-09-01 11:22:14 +0300942 /* Check that we are not using hw1.0 (some of them have same pci id
943 * as hw2.0) before doing anything else as ath10k crashes horribly
944 * due to missing hw1.0 workarounds. */
945 switch (hw_revision) {
946 case QCA988X_HW_1_0_CHIP_ID_REV:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200947 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
Kalle Valoe01ae682013-09-01 11:22:14 +0300948 return -EOPNOTSUPP;
949
950 case QCA988X_HW_2_0_CHIP_ID_REV:
951 /* known hardware revision, continue normally */
952 return 0;
953
954 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200955 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
Kalle Valoe01ae682013-09-01 11:22:14 +0300956 ar->chip_id);
957 return 0;
958 }
959
960 return 0;
961}
962
Michal Kazior6782cb62014-05-23 12:28:47 +0200963static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +0200964{
Michal Kazior6782cb62014-05-23 12:28:47 +0200965 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +0200966 int status;
967
Michal Kazior818bdd12013-07-16 09:38:57 +0200968 status = ath10k_core_probe_fw(ar);
969 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200970 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +0200971 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +0200972 }
Michal Kaziordd30a362013-07-16 09:38:51 +0200973
Kalle Valo5e3dd152013-06-12 20:52:10 +0300974 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200975 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200976 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +0200977 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +0200978 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300979
980 status = ath10k_debug_create(ar);
981 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200982 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300983 goto err_unregister_mac;
984 }
985
Simon Wunderlich855aed12014-08-02 09:12:54 +0300986 status = ath10k_spectral_create(ar);
987 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200988 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +0300989 goto err_debug_destroy;
990 }
991
Michal Kazior6782cb62014-05-23 12:28:47 +0200992 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
993 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300994
Simon Wunderlich855aed12014-08-02 09:12:54 +0300995err_debug_destroy:
996 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300997err_unregister_mac:
998 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +0200999err_release_fw:
1000 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001001err:
Michal Kaziora491a922014-07-14 16:07:29 +03001002 /* TODO: It's probably a good idea to release device from the driver
1003 * but calling device_release_driver() here will cause a deadlock.
1004 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001005 return;
1006}
1007
1008int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1009{
1010 int status;
1011
1012 ar->chip_id = chip_id;
1013
1014 status = ath10k_core_check_chip_id(ar);
1015 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001016 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
Michal Kazior6782cb62014-05-23 12:28:47 +02001017 return status;
1018 }
1019
1020 queue_work(ar->workqueue, &ar->register_work);
1021
1022 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001023}
1024EXPORT_SYMBOL(ath10k_core_register);
1025
1026void ath10k_core_unregister(struct ath10k *ar)
1027{
Michal Kazior6782cb62014-05-23 12:28:47 +02001028 cancel_work_sync(&ar->register_work);
1029
1030 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1031 return;
1032
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001033 /* Stop spectral before unregistering from mac80211 to remove the
1034 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1035 * would be already be free'd recursively, leading to a double free.
1036 */
1037 ath10k_spectral_destroy(ar);
1038
Kalle Valo5e3dd152013-06-12 20:52:10 +03001039 /* We must unregister from mac80211 before we stop HTC and HIF.
1040 * Otherwise we will fail to submit commands to FW and mac80211 will be
1041 * unhappy about callback failures. */
1042 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001043
Michal Kazior29385052013-07-16 09:38:58 +02001044 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001045
1046 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001047}
1048EXPORT_SYMBOL(ath10k_core_unregister);
1049
Michal Kaziore7b54192014-08-07 11:03:27 +02001050struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001051 const struct ath10k_hif_ops *hif_ops)
1052{
1053 struct ath10k *ar;
1054
Michal Kaziore7b54192014-08-07 11:03:27 +02001055 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001056 if (!ar)
1057 return NULL;
1058
1059 ar->ath_common.priv = ar;
1060 ar->ath_common.hw = ar->hw;
1061
1062 ar->p2p = !!ath10k_p2p;
1063 ar->dev = dev;
1064
Michal Kazior0d0a6932014-05-23 12:28:45 +02001065 ar->hif.ops = hif_ops;
1066
1067 init_completion(&ar->scan.started);
1068 init_completion(&ar->scan.completed);
1069 init_completion(&ar->scan.on_channel);
1070 init_completion(&ar->target_suspend);
1071
1072 init_completion(&ar->install_key_done);
1073 init_completion(&ar->vdev_setup_done);
1074
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001075 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001076
1077 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1078 if (!ar->workqueue)
1079 goto err_wq;
1080
1081 mutex_init(&ar->conf_mutex);
1082 spin_lock_init(&ar->data_lock);
1083
1084 INIT_LIST_HEAD(&ar->peers);
1085 init_waitqueue_head(&ar->peer_mapping_wq);
1086
1087 init_completion(&ar->offchan_tx_completed);
1088 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1089 skb_queue_head_init(&ar->offchan_tx_queue);
1090
1091 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1092 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1093
Michal Kazior6782cb62014-05-23 12:28:47 +02001094 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001095 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1096
1097 return ar;
1098
1099err_wq:
1100 ath10k_mac_destroy(ar);
1101 return NULL;
1102}
1103EXPORT_SYMBOL(ath10k_core_create);
1104
1105void ath10k_core_destroy(struct ath10k *ar)
1106{
1107 flush_workqueue(ar->workqueue);
1108 destroy_workqueue(ar->workqueue);
1109
1110 ath10k_mac_destroy(ar);
1111}
1112EXPORT_SYMBOL(ath10k_core_destroy);
1113
Kalle Valo5e3dd152013-06-12 20:52:10 +03001114MODULE_AUTHOR("Qualcomm Atheros");
1115MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1116MODULE_LICENSE("Dual BSD/GPL");