Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
| 25 | #include <core/object.h> |
| 26 | #include <core/device.h> |
| 27 | #include <core/client.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 28 | #include <core/option.h> |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 29 | #include <nvif/unpack.h> |
| 30 | #include <nvif/class.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 31 | |
Ben Skeggs | ddbb55a | 2014-11-18 10:51:19 +1000 | [diff] [blame] | 32 | #include <subdev/bios.h> |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 33 | #include <subdev/fb.h> |
| 34 | #include <subdev/instmem.h> |
| 35 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 36 | #include "priv.h" |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 37 | #include "acpi.h" |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 38 | |
| 39 | static DEFINE_MUTEX(nv_devices_mutex); |
| 40 | static LIST_HEAD(nv_devices); |
| 41 | |
| 42 | struct nouveau_device * |
| 43 | nouveau_device_find(u64 name) |
| 44 | { |
| 45 | struct nouveau_device *device, *match = NULL; |
| 46 | mutex_lock(&nv_devices_mutex); |
| 47 | list_for_each_entry(device, &nv_devices, head) { |
| 48 | if (device->handle == name) { |
| 49 | match = device; |
| 50 | break; |
| 51 | } |
| 52 | } |
| 53 | mutex_unlock(&nv_devices_mutex); |
| 54 | return match; |
| 55 | } |
| 56 | |
Ben Skeggs | 803c178 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 57 | int |
| 58 | nouveau_device_list(u64 *name, int size) |
| 59 | { |
| 60 | struct nouveau_device *device; |
| 61 | int nr = 0; |
| 62 | mutex_lock(&nv_devices_mutex); |
| 63 | list_for_each_entry(device, &nv_devices, head) { |
| 64 | if (nr++ < size) |
| 65 | name[nr - 1] = device->handle; |
| 66 | } |
| 67 | mutex_unlock(&nv_devices_mutex); |
| 68 | return nr; |
| 69 | } |
| 70 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 71 | /****************************************************************************** |
| 72 | * nouveau_devobj (0x0080): class implementation |
| 73 | *****************************************************************************/ |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 74 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 75 | struct nouveau_devobj { |
| 76 | struct nouveau_parent base; |
| 77 | struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 78 | }; |
| 79 | |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 80 | static int |
| 81 | nouveau_devobj_info(struct nouveau_object *object, void *data, u32 size) |
| 82 | { |
| 83 | struct nouveau_device *device = nv_device(object); |
| 84 | struct nouveau_fb *pfb = nouveau_fb(device); |
| 85 | struct nouveau_instmem *imem = nouveau_instmem(device); |
| 86 | union { |
| 87 | struct nv_device_info_v0 v0; |
| 88 | } *args = data; |
| 89 | int ret; |
| 90 | |
| 91 | nv_ioctl(object, "device info size %d\n", size); |
| 92 | if (nvif_unpack(args->v0, 0, 0, false)) { |
| 93 | nv_ioctl(object, "device info vers %d\n", args->v0.version); |
| 94 | } else |
| 95 | return ret; |
| 96 | |
| 97 | switch (device->chipset) { |
| 98 | case 0x01a: |
| 99 | case 0x01f: |
| 100 | case 0x04c: |
| 101 | case 0x04e: |
| 102 | case 0x063: |
| 103 | case 0x067: |
| 104 | case 0x068: |
| 105 | case 0x0aa: |
| 106 | case 0x0ac: |
| 107 | case 0x0af: |
| 108 | args->v0.platform = NV_DEVICE_INFO_V0_IGP; |
| 109 | break; |
| 110 | default: |
| 111 | if (device->pdev) { |
| 112 | if (pci_find_capability(device->pdev, PCI_CAP_ID_AGP)) |
| 113 | args->v0.platform = NV_DEVICE_INFO_V0_AGP; |
| 114 | else |
| 115 | if (pci_is_pcie(device->pdev)) |
| 116 | args->v0.platform = NV_DEVICE_INFO_V0_PCIE; |
| 117 | else |
| 118 | args->v0.platform = NV_DEVICE_INFO_V0_PCI; |
| 119 | } else { |
| 120 | args->v0.platform = NV_DEVICE_INFO_V0_SOC; |
| 121 | } |
| 122 | break; |
| 123 | } |
| 124 | |
| 125 | switch (device->card_type) { |
| 126 | case NV_04: args->v0.family = NV_DEVICE_INFO_V0_TNT; break; |
| 127 | case NV_10: |
| 128 | case NV_11: args->v0.family = NV_DEVICE_INFO_V0_CELSIUS; break; |
| 129 | case NV_20: args->v0.family = NV_DEVICE_INFO_V0_KELVIN; break; |
| 130 | case NV_30: args->v0.family = NV_DEVICE_INFO_V0_RANKINE; break; |
| 131 | case NV_40: args->v0.family = NV_DEVICE_INFO_V0_CURIE; break; |
| 132 | case NV_50: args->v0.family = NV_DEVICE_INFO_V0_TESLA; break; |
Ben Skeggs | 9c210f3 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 133 | case NV_C0: args->v0.family = NV_DEVICE_INFO_V0_FERMI; break; |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 134 | case NV_E0: args->v0.family = NV_DEVICE_INFO_V0_KEPLER; break; |
| 135 | case GM100: args->v0.family = NV_DEVICE_INFO_V0_MAXWELL; break; |
| 136 | default: |
| 137 | args->v0.family = 0; |
| 138 | break; |
| 139 | } |
| 140 | |
| 141 | args->v0.chipset = device->chipset; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 142 | args->v0.revision = device->chiprev; |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 143 | if (pfb) args->v0.ram_size = args->v0.ram_user = pfb->ram->size; |
| 144 | else args->v0.ram_size = args->v0.ram_user = 0; |
| 145 | if (imem) args->v0.ram_user = args->v0.ram_user - imem->reserved; |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | static int |
| 150 | nouveau_devobj_mthd(struct nouveau_object *object, u32 mthd, |
| 151 | void *data, u32 size) |
| 152 | { |
| 153 | switch (mthd) { |
| 154 | case NV_DEVICE_V0_INFO: |
| 155 | return nouveau_devobj_info(object, data, size); |
| 156 | default: |
| 157 | break; |
| 158 | } |
| 159 | return -EINVAL; |
| 160 | } |
| 161 | |
| 162 | static u8 |
| 163 | nouveau_devobj_rd08(struct nouveau_object *object, u64 addr) |
| 164 | { |
| 165 | return nv_rd08(object->engine, addr); |
| 166 | } |
| 167 | |
| 168 | static u16 |
| 169 | nouveau_devobj_rd16(struct nouveau_object *object, u64 addr) |
| 170 | { |
| 171 | return nv_rd16(object->engine, addr); |
| 172 | } |
| 173 | |
| 174 | static u32 |
| 175 | nouveau_devobj_rd32(struct nouveau_object *object, u64 addr) |
| 176 | { |
| 177 | return nv_rd32(object->engine, addr); |
| 178 | } |
| 179 | |
| 180 | static void |
| 181 | nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data) |
| 182 | { |
| 183 | nv_wr08(object->engine, addr, data); |
| 184 | } |
| 185 | |
| 186 | static void |
| 187 | nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data) |
| 188 | { |
| 189 | nv_wr16(object->engine, addr, data); |
| 190 | } |
| 191 | |
| 192 | static void |
| 193 | nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data) |
| 194 | { |
| 195 | nv_wr32(object->engine, addr, data); |
| 196 | } |
| 197 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 198 | static int |
| 199 | nouveau_devobj_map(struct nouveau_object *object, u64 *addr, u32 *size) |
| 200 | { |
| 201 | struct nouveau_device *device = nv_device(object); |
| 202 | *addr = nv_device_resource_start(device, 0); |
| 203 | *size = nv_device_resource_len(device, 0); |
| 204 | return 0; |
| 205 | } |
| 206 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 207 | static const u64 disable_map[] = { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 208 | [NVDEV_SUBDEV_VBIOS] = NV_DEVICE_V0_DISABLE_VBIOS, |
| 209 | [NVDEV_SUBDEV_DEVINIT] = NV_DEVICE_V0_DISABLE_CORE, |
| 210 | [NVDEV_SUBDEV_GPIO] = NV_DEVICE_V0_DISABLE_CORE, |
| 211 | [NVDEV_SUBDEV_I2C] = NV_DEVICE_V0_DISABLE_CORE, |
| 212 | [NVDEV_SUBDEV_CLOCK] = NV_DEVICE_V0_DISABLE_CORE, |
| 213 | [NVDEV_SUBDEV_MXM] = NV_DEVICE_V0_DISABLE_CORE, |
| 214 | [NVDEV_SUBDEV_MC] = NV_DEVICE_V0_DISABLE_CORE, |
| 215 | [NVDEV_SUBDEV_BUS] = NV_DEVICE_V0_DISABLE_CORE, |
| 216 | [NVDEV_SUBDEV_TIMER] = NV_DEVICE_V0_DISABLE_CORE, |
| 217 | [NVDEV_SUBDEV_FB] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 95484b5 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 218 | [NVDEV_SUBDEV_LTC] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 219 | [NVDEV_SUBDEV_IBUS] = NV_DEVICE_V0_DISABLE_CORE, |
| 220 | [NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_V0_DISABLE_CORE, |
| 221 | [NVDEV_SUBDEV_VM] = NV_DEVICE_V0_DISABLE_CORE, |
| 222 | [NVDEV_SUBDEV_BAR] = NV_DEVICE_V0_DISABLE_CORE, |
| 223 | [NVDEV_SUBDEV_VOLT] = NV_DEVICE_V0_DISABLE_CORE, |
| 224 | [NVDEV_SUBDEV_THERM] = NV_DEVICE_V0_DISABLE_CORE, |
| 225 | [NVDEV_SUBDEV_PWR] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 3735354 | 2014-11-17 22:52:11 +1000 | [diff] [blame] | 226 | [NVDEV_SUBDEV_FUSE] = NV_DEVICE_V0_DISABLE_CORE, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 227 | [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_V0_DISABLE_CORE, |
| 228 | [NVDEV_ENGINE_PERFMON] = NV_DEVICE_V0_DISABLE_CORE, |
| 229 | [NVDEV_ENGINE_FIFO] = NV_DEVICE_V0_DISABLE_FIFO, |
| 230 | [NVDEV_ENGINE_SW] = NV_DEVICE_V0_DISABLE_FIFO, |
| 231 | [NVDEV_ENGINE_GR] = NV_DEVICE_V0_DISABLE_GRAPH, |
| 232 | [NVDEV_ENGINE_MPEG] = NV_DEVICE_V0_DISABLE_MPEG, |
| 233 | [NVDEV_ENGINE_ME] = NV_DEVICE_V0_DISABLE_ME, |
| 234 | [NVDEV_ENGINE_VP] = NV_DEVICE_V0_DISABLE_VP, |
| 235 | [NVDEV_ENGINE_CRYPT] = NV_DEVICE_V0_DISABLE_CRYPT, |
| 236 | [NVDEV_ENGINE_BSP] = NV_DEVICE_V0_DISABLE_BSP, |
| 237 | [NVDEV_ENGINE_PPP] = NV_DEVICE_V0_DISABLE_PPP, |
| 238 | [NVDEV_ENGINE_COPY0] = NV_DEVICE_V0_DISABLE_COPY0, |
| 239 | [NVDEV_ENGINE_COPY1] = NV_DEVICE_V0_DISABLE_COPY1, |
Ben Skeggs | 3735354 | 2014-11-17 22:52:11 +1000 | [diff] [blame] | 240 | [NVDEV_ENGINE_COPY2] = NV_DEVICE_V0_DISABLE_COPY1, |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 241 | [NVDEV_ENGINE_VIC] = NV_DEVICE_V0_DISABLE_VIC, |
| 242 | [NVDEV_ENGINE_VENC] = NV_DEVICE_V0_DISABLE_VENC, |
| 243 | [NVDEV_ENGINE_DISP] = NV_DEVICE_V0_DISABLE_DISP, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 244 | [NVDEV_SUBDEV_NR] = 0, |
| 245 | }; |
| 246 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 247 | static void |
| 248 | nouveau_devobj_dtor(struct nouveau_object *object) |
| 249 | { |
| 250 | struct nouveau_devobj *devobj = (void *)object; |
| 251 | int i; |
| 252 | |
| 253 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) |
| 254 | nouveau_object_ref(NULL, &devobj->subdev[i]); |
| 255 | |
| 256 | nouveau_parent_destroy(&devobj->base); |
| 257 | } |
| 258 | |
| 259 | static struct nouveau_oclass |
| 260 | nouveau_devobj_oclass_super = { |
| 261 | .handle = NV_DEVICE, |
| 262 | .ofuncs = &(struct nouveau_ofuncs) { |
| 263 | .dtor = nouveau_devobj_dtor, |
| 264 | .init = _nouveau_parent_init, |
| 265 | .fini = _nouveau_parent_fini, |
| 266 | .mthd = nouveau_devobj_mthd, |
| 267 | .map = nouveau_devobj_map, |
| 268 | .rd08 = nouveau_devobj_rd08, |
| 269 | .rd16 = nouveau_devobj_rd16, |
| 270 | .rd32 = nouveau_devobj_rd32, |
| 271 | .wr08 = nouveau_devobj_wr08, |
| 272 | .wr16 = nouveau_devobj_wr16, |
| 273 | .wr32 = nouveau_devobj_wr32, |
| 274 | } |
| 275 | }; |
| 276 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 277 | static int |
| 278 | nouveau_devobj_ctor(struct nouveau_object *parent, |
| 279 | struct nouveau_object *engine, |
| 280 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 281 | struct nouveau_object **pobject) |
| 282 | { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 283 | union { |
| 284 | struct nv_device_v0 v0; |
| 285 | } *args = data; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 286 | struct nouveau_client *client = nv_client(parent); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 287 | struct nouveau_device *device; |
| 288 | struct nouveau_devobj *devobj; |
Marcin Slusarz | 950fbfa | 2012-12-29 16:24:37 +0100 | [diff] [blame] | 289 | u32 boot0, strap; |
| 290 | u64 disable, mmio_base, mmio_size; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 291 | void __iomem *map; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 292 | int ret, i, c; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 293 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 294 | nv_ioctl(parent, "create device size %d\n", size); |
| 295 | if (nvif_unpack(args->v0, 0, 0, false)) { |
| 296 | nv_ioctl(parent, "create device v%d device %016llx " |
| 297 | "disable %016llx debug0 %016llx\n", |
| 298 | args->v0.version, args->v0.device, |
| 299 | args->v0.disable, args->v0.debug0); |
| 300 | } else |
| 301 | return ret; |
| 302 | |
| 303 | /* give priviledged clients register access */ |
| 304 | if (client->super) |
| 305 | oclass = &nouveau_devobj_oclass_super; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 306 | |
| 307 | /* find the device subdev that matches what the client requested */ |
| 308 | device = nv_device(client->device); |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 309 | if (args->v0.device != ~0) { |
| 310 | device = nouveau_device_find(args->v0.device); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 311 | if (!device) |
| 312 | return -ENODEV; |
| 313 | } |
| 314 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 315 | ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, |
| 316 | nouveau_control_oclass, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 317 | (1ULL << NVDEV_ENGINE_DMAOBJ) | |
| 318 | (1ULL << NVDEV_ENGINE_FIFO) | |
Ben Skeggs | aa4d7a4 | 2013-02-13 15:29:11 +1000 | [diff] [blame] | 319 | (1ULL << NVDEV_ENGINE_DISP) | |
| 320 | (1ULL << NVDEV_ENGINE_PERFMON), &devobj); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 321 | *pobject = nv_object(devobj); |
| 322 | if (ret) |
| 323 | return ret; |
| 324 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 325 | mmio_base = nv_device_resource_start(device, 0); |
| 326 | mmio_size = nv_device_resource_len(device, 0); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 327 | |
| 328 | /* translate api disable mask into internal mapping */ |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 329 | disable = args->v0.debug0; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 330 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 331 | if (args->v0.disable & disable_map[i]) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 332 | disable |= (1ULL << i); |
| 333 | } |
| 334 | |
| 335 | /* identify the chipset, and determine classes of subdev/engines */ |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 336 | if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY) && |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 337 | !device->card_type) { |
| 338 | map = ioremap(mmio_base, 0x102000); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 339 | if (map == NULL) |
| 340 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 341 | |
| 342 | /* switch mmio to cpu's native endianness */ |
| 343 | #ifndef __BIG_ENDIAN |
| 344 | if (ioread32_native(map + 0x000004) != 0x00000000) |
| 345 | #else |
| 346 | if (ioread32_native(map + 0x000004) == 0x00000000) |
| 347 | #endif |
| 348 | iowrite32_native(0x01000001, map + 0x000004); |
| 349 | |
| 350 | /* read boot0 and strapping information */ |
| 351 | boot0 = ioread32_native(map + 0x000000); |
| 352 | strap = ioread32_native(map + 0x101000); |
| 353 | iounmap(map); |
| 354 | |
| 355 | /* determine chipset and derive architecture from it */ |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 356 | if ((boot0 & 0x1f000000) > 0) { |
| 357 | device->chipset = (boot0 & 0x1ff00000) >> 20; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 358 | device->chiprev = (boot0 & 0x000000ff); |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 359 | switch (device->chipset & 0x1f0) { |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 360 | case 0x010: { |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 361 | if (0x461 & (1 << (device->chipset & 0xf))) |
| 362 | device->card_type = NV_10; |
| 363 | else |
| 364 | device->card_type = NV_11; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 365 | device->chiprev = 0x00; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 366 | break; |
| 367 | } |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 368 | case 0x020: device->card_type = NV_20; break; |
| 369 | case 0x030: device->card_type = NV_30; break; |
| 370 | case 0x040: |
| 371 | case 0x060: device->card_type = NV_40; break; |
| 372 | case 0x050: |
| 373 | case 0x080: |
| 374 | case 0x090: |
| 375 | case 0x0a0: device->card_type = NV_50; break; |
Ben Skeggs | 9c210f3 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 376 | case 0x0c0: |
| 377 | case 0x0d0: device->card_type = NV_C0; break; |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 378 | case 0x0e0: |
| 379 | case 0x0f0: |
| 380 | case 0x100: device->card_type = NV_E0; break; |
Ben Skeggs | 083dba0 | 2014-08-18 14:02:14 +1000 | [diff] [blame] | 381 | case 0x110: |
| 382 | case 0x120: device->card_type = GM100; break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 383 | default: |
| 384 | break; |
| 385 | } |
| 386 | } else |
| 387 | if ((boot0 & 0xff00fff0) == 0x20004000) { |
| 388 | if (boot0 & 0x00f00000) |
| 389 | device->chipset = 0x05; |
| 390 | else |
| 391 | device->chipset = 0x04; |
| 392 | device->card_type = NV_04; |
| 393 | } |
| 394 | |
| 395 | switch (device->card_type) { |
| 396 | case NV_04: ret = nv04_identify(device); break; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 397 | case NV_10: |
| 398 | case NV_11: ret = nv10_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 399 | case NV_20: ret = nv20_identify(device); break; |
| 400 | case NV_30: ret = nv30_identify(device); break; |
| 401 | case NV_40: ret = nv40_identify(device); break; |
| 402 | case NV_50: ret = nv50_identify(device); break; |
Ben Skeggs | 9c210f3 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 403 | case NV_C0: ret = nvc0_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 404 | case NV_E0: ret = nve0_identify(device); break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 405 | case GM100: ret = gm100_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 406 | default: |
| 407 | ret = -EINVAL; |
| 408 | break; |
| 409 | } |
| 410 | |
| 411 | if (ret) { |
| 412 | nv_error(device, "unknown chipset, 0x%08x\n", boot0); |
| 413 | return ret; |
| 414 | } |
| 415 | |
| 416 | nv_info(device, "BOOT0 : 0x%08x\n", boot0); |
Ben Skeggs | 2094dd8 | 2012-07-27 08:28:20 +1000 | [diff] [blame] | 417 | nv_info(device, "Chipset: %s (NV%02X)\n", |
| 418 | device->cname, device->chipset); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 419 | nv_info(device, "Family : NV%02X\n", device->card_type); |
| 420 | |
| 421 | /* determine frequency of timing crystal */ |
Ilia Mirkin | 8aa816b | 2013-09-05 04:45:03 -0400 | [diff] [blame] | 422 | if ( device->card_type <= NV_10 || device->chipset < 0x17 || |
Viktor Novotný | 1f2285d4 | 2012-11-10 19:24:06 +0100 | [diff] [blame] | 423 | (device->chipset >= 0x20 && device->chipset < 0x25)) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 424 | strap &= 0x00000040; |
| 425 | else |
| 426 | strap &= 0x00400040; |
| 427 | |
| 428 | switch (strap) { |
| 429 | case 0x00000000: device->crystal = 13500; break; |
| 430 | case 0x00000040: device->crystal = 14318; break; |
| 431 | case 0x00400000: device->crystal = 27000; break; |
| 432 | case 0x00400040: device->crystal = 25000; break; |
| 433 | } |
| 434 | |
| 435 | nv_debug(device, "crystal freq: %dKHz\n", device->crystal); |
Ben Skeggs | ddbb55a | 2014-11-18 10:51:19 +1000 | [diff] [blame] | 436 | } else |
| 437 | if ( (args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY)) { |
| 438 | device->cname = "NULL"; |
| 439 | device->oclass[NVDEV_SUBDEV_VBIOS] = &nouveau_bios_oclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 440 | } |
| 441 | |
Ben Skeggs | 586491e | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 442 | if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) && |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 443 | !nv_subdev(device)->mmio) { |
| 444 | nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); |
| 445 | if (!nv_subdev(device)->mmio) { |
| 446 | nv_error(device, "unable to map device registers\n"); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 447 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 448 | } |
| 449 | } |
| 450 | |
| 451 | /* ensure requested subsystems are available for use */ |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 452 | for (i = 1, c = 1; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 453 | if (!(oclass = device->oclass[i]) || (disable & (1ULL << i))) |
| 454 | continue; |
| 455 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 456 | if (device->subdev[i]) { |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 457 | nouveau_object_ref(device->subdev[i], |
| 458 | &devobj->subdev[i]); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 459 | continue; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 460 | } |
| 461 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 462 | ret = nouveau_object_ctor(nv_object(device), NULL, |
| 463 | oclass, NULL, i, |
| 464 | &devobj->subdev[i]); |
| 465 | if (ret == -ENODEV) |
| 466 | continue; |
| 467 | if (ret) |
| 468 | return ret; |
| 469 | |
Ben Skeggs | 61b365a | 2013-11-27 09:46:56 +1000 | [diff] [blame] | 470 | device->subdev[i] = devobj->subdev[i]; |
| 471 | |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 472 | /* note: can't init *any* subdevs until devinit has been run |
| 473 | * due to not knowing exactly what the vbios init tables will |
| 474 | * mess with. devinit also can't be run until all of its |
| 475 | * dependencies have been created. |
| 476 | * |
| 477 | * this code delays init of any subdev until all of devinit's |
| 478 | * dependencies have been created, and then initialises each |
| 479 | * subdev in turn as they're created. |
| 480 | */ |
| 481 | while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { |
| 482 | struct nouveau_object *subdev = devobj->subdev[c++]; |
| 483 | if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 484 | ret = nouveau_object_inc(subdev); |
| 485 | if (ret) |
| 486 | return ret; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 487 | atomic_dec(&nv_object(device)->usecount); |
| 488 | } else |
| 489 | if (subdev) { |
| 490 | nouveau_subdev_reset(subdev); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 491 | } |
| 492 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | return 0; |
| 496 | } |
| 497 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 498 | static struct nouveau_ofuncs |
| 499 | nouveau_devobj_ofuncs = { |
| 500 | .ctor = nouveau_devobj_ctor, |
| 501 | .dtor = nouveau_devobj_dtor, |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 502 | .init = _nouveau_parent_init, |
| 503 | .fini = _nouveau_parent_fini, |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 504 | .mthd = nouveau_devobj_mthd, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 505 | }; |
| 506 | |
| 507 | /****************************************************************************** |
| 508 | * nouveau_device: engine functions |
| 509 | *****************************************************************************/ |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 510 | |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 511 | struct nouveau_device * |
| 512 | nv_device(void *obj) |
| 513 | { |
Ben Skeggs | 490d595 | 2014-12-05 11:26:23 +1000 | [diff] [blame] | 514 | struct nouveau_object *device = nv_object(obj); |
Ben Skeggs | 8000fb2 | 2014-12-05 12:21:34 +1000 | [diff] [blame^] | 515 | if (device->engine == NULL) { |
| 516 | while (device && device->parent) |
| 517 | device = device->parent; |
| 518 | } else { |
Ben Skeggs | 490d595 | 2014-12-05 11:26:23 +1000 | [diff] [blame] | 519 | device = nv_object(obj)->engine; |
| 520 | if (device && device->parent) |
| 521 | device = device->parent; |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 522 | } |
Ben Skeggs | 490d595 | 2014-12-05 11:26:23 +1000 | [diff] [blame] | 523 | #if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA |
| 524 | if (unlikely(!device)) |
| 525 | nv_assert("BAD CAST -> NvDevice, 0x%08x\n", nv_hclass(obj)); |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 526 | #endif |
Ben Skeggs | a38f37a | 2014-12-05 11:20:19 +1000 | [diff] [blame] | 527 | return (void *)device; |
| 528 | } |
| 529 | |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 530 | static struct nouveau_oclass |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 531 | nouveau_device_sclass[] = { |
| 532 | { 0x0080, &nouveau_devobj_ofuncs }, |
| 533 | {} |
| 534 | }; |
| 535 | |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 536 | static int |
Ben Skeggs | 996f5a0 | 2014-08-11 13:56:56 +1000 | [diff] [blame] | 537 | nouveau_device_event_ctor(struct nouveau_object *object, void *data, u32 size, |
| 538 | struct nvkm_notify *notify) |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 539 | { |
| 540 | if (!WARN_ON(size != 0)) { |
| 541 | notify->size = 0; |
| 542 | notify->types = 1; |
| 543 | notify->index = 0; |
| 544 | return 0; |
| 545 | } |
| 546 | return -EINVAL; |
| 547 | } |
| 548 | |
| 549 | static const struct nvkm_event_func |
| 550 | nouveau_device_event_func = { |
| 551 | .ctor = nouveau_device_event_ctor, |
| 552 | }; |
| 553 | |
| 554 | static int |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 555 | nouveau_device_fini(struct nouveau_object *object, bool suspend) |
| 556 | { |
| 557 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 558 | struct nouveau_object *subdev; |
| 559 | int ret, i; |
| 560 | |
| 561 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { |
| 562 | if ((subdev = device->subdev[i])) { |
| 563 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 564 | ret = nouveau_object_dec(subdev, suspend); |
| 565 | if (ret && suspend) |
| 566 | goto fail; |
| 567 | } |
| 568 | } |
| 569 | } |
| 570 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 571 | ret = nvkm_acpi_fini(device, suspend); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 572 | fail: |
| 573 | for (; ret && i < NVDEV_SUBDEV_NR; i++) { |
| 574 | if ((subdev = device->subdev[i])) { |
| 575 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 576 | ret = nouveau_object_inc(subdev); |
| 577 | if (ret) { |
| 578 | /* XXX */ |
| 579 | } |
| 580 | } |
| 581 | } |
| 582 | } |
| 583 | |
| 584 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 585 | } |
| 586 | |
| 587 | static int |
| 588 | nouveau_device_init(struct nouveau_object *object) |
| 589 | { |
| 590 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 591 | struct nouveau_object *subdev; |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 592 | int ret, i = 0; |
| 593 | |
| 594 | ret = nvkm_acpi_init(device); |
| 595 | if (ret) |
| 596 | goto fail; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 597 | |
| 598 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 599 | if ((subdev = device->subdev[i])) { |
| 600 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 601 | ret = nouveau_object_inc(subdev); |
| 602 | if (ret) |
| 603 | goto fail; |
| 604 | } else { |
| 605 | nouveau_subdev_reset(subdev); |
| 606 | } |
| 607 | } |
| 608 | } |
| 609 | |
| 610 | ret = 0; |
| 611 | fail: |
| 612 | for (--i; ret && i >= 0; i--) { |
| 613 | if ((subdev = device->subdev[i])) { |
| 614 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) |
| 615 | nouveau_object_dec(subdev, false); |
| 616 | } |
| 617 | } |
| 618 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 619 | if (ret) |
| 620 | nvkm_acpi_fini(device, false); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 621 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 622 | } |
| 623 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 624 | static void |
| 625 | nouveau_device_dtor(struct nouveau_object *object) |
| 626 | { |
| 627 | struct nouveau_device *device = (void *)object; |
| 628 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 629 | nvkm_event_fini(&device->event); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 630 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 631 | mutex_lock(&nv_devices_mutex); |
| 632 | list_del(&device->head); |
| 633 | mutex_unlock(&nv_devices_mutex); |
| 634 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 635 | if (nv_subdev(device)->mmio) |
| 636 | iounmap(nv_subdev(device)->mmio); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 637 | |
Ben Skeggs | 587f7a5 | 2014-12-03 12:56:41 +1000 | [diff] [blame] | 638 | nouveau_engine_destroy(&device->engine); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 639 | } |
| 640 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 641 | resource_size_t |
| 642 | nv_device_resource_start(struct nouveau_device *device, unsigned int bar) |
| 643 | { |
| 644 | if (nv_device_is_pci(device)) { |
| 645 | return pci_resource_start(device->pdev, bar); |
| 646 | } else { |
| 647 | struct resource *res; |
| 648 | res = platform_get_resource(device->platformdev, |
| 649 | IORESOURCE_MEM, bar); |
| 650 | if (!res) |
| 651 | return 0; |
| 652 | return res->start; |
| 653 | } |
| 654 | } |
| 655 | |
| 656 | resource_size_t |
| 657 | nv_device_resource_len(struct nouveau_device *device, unsigned int bar) |
| 658 | { |
| 659 | if (nv_device_is_pci(device)) { |
| 660 | return pci_resource_len(device->pdev, bar); |
| 661 | } else { |
| 662 | struct resource *res; |
| 663 | res = platform_get_resource(device->platformdev, |
| 664 | IORESOURCE_MEM, bar); |
| 665 | if (!res) |
| 666 | return 0; |
| 667 | return resource_size(res); |
| 668 | } |
| 669 | } |
| 670 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 671 | int |
| 672 | nv_device_get_irq(struct nouveau_device *device, bool stall) |
| 673 | { |
| 674 | if (nv_device_is_pci(device)) { |
| 675 | return device->pdev->irq; |
| 676 | } else { |
| 677 | return platform_get_irq_byname(device->platformdev, |
| 678 | stall ? "stall" : "nonstall"); |
| 679 | } |
| 680 | } |
| 681 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 682 | static struct nouveau_oclass |
| 683 | nouveau_device_oclass = { |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 684 | .handle = NV_ENGINE(DEVICE, 0x00), |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 685 | .ofuncs = &(struct nouveau_ofuncs) { |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 686 | .dtor = nouveau_device_dtor, |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 687 | .init = nouveau_device_init, |
| 688 | .fini = nouveau_device_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 689 | }, |
| 690 | }; |
| 691 | |
| 692 | int |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 693 | nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name, |
| 694 | const char *sname, const char *cfg, const char *dbg, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 695 | int length, void **pobject) |
| 696 | { |
| 697 | struct nouveau_device *device; |
| 698 | int ret = -EEXIST; |
| 699 | |
| 700 | mutex_lock(&nv_devices_mutex); |
| 701 | list_for_each_entry(device, &nv_devices, head) { |
| 702 | if (device->handle == name) |
| 703 | goto done; |
| 704 | } |
| 705 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 706 | ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 707 | "DEVICE", "device", length, pobject); |
| 708 | device = *pobject; |
| 709 | if (ret) |
| 710 | goto done; |
| 711 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 712 | switch (type) { |
| 713 | case NOUVEAU_BUS_PCI: |
| 714 | device->pdev = dev; |
| 715 | break; |
| 716 | case NOUVEAU_BUS_PLATFORM: |
| 717 | device->platformdev = dev; |
| 718 | break; |
| 719 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 720 | device->handle = name; |
| 721 | device->cfgopt = cfg; |
| 722 | device->dbgopt = dbg; |
| 723 | device->name = sname; |
| 724 | |
| 725 | nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE"); |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 726 | nv_engine(device)->sclass = nouveau_device_sclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 727 | list_add(&device->head, &nv_devices); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 728 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 729 | ret = nvkm_event_init(&nouveau_device_event_func, 1, 1, |
| 730 | &device->event); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 731 | done: |
| 732 | mutex_unlock(&nv_devices_mutex); |
| 733 | return ret; |
| 734 | } |