Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos4412 based Trats 2 board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * Device tree source file for Samsung's Trats 2 board which is based on |
| 8 | * Samsung's Exynos4412 SoC. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | /dts-v1/; |
| 16 | #include "exynos4412.dtsi" |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 17 | #include <dt-bindings/gpio/gpio.h> |
Krzysztof Kozlowski | e861429 | 2015-02-04 07:43:44 +0900 | [diff] [blame] | 18 | #include <dt-bindings/interrupt-controller/irq.h> |
Krzysztof Kozlowski | ce9940a | 2015-05-02 14:40:08 +0900 | [diff] [blame] | 19 | #include <dt-bindings/clock/maxim,max77686.h> |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 20 | |
| 21 | / { |
| 22 | model = "Samsung Trats 2 based on Exynos4412"; |
Sachin Kamat | 8bdb31b | 2014-03-21 02:17:22 +0900 | [diff] [blame] | 23 | compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 24 | |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 25 | aliases { |
Tomasz Stanislawski | 6af2ba9 | 2014-05-09 05:58:59 +0900 | [diff] [blame] | 26 | i2c9 = &i2c_ak8975; |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 27 | i2c10 = &i2c_cm36651; |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 28 | i2c11 = &i2c_max77693; |
Krzysztof Kozlowski | e861429 | 2015-02-04 07:43:44 +0900 | [diff] [blame] | 29 | i2c12 = &i2c_max77693_fuel; |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 30 | }; |
| 31 | |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 32 | memory { |
| 33 | reg = <0x40000000 0x40000000>; |
| 34 | }; |
| 35 | |
| 36 | chosen { |
| 37 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; |
Tomasz Figa | 62d3809 | 2015-01-23 14:47:42 +0100 | [diff] [blame] | 38 | stdout-path = &serial_2; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | firmware@0204F000 { |
| 42 | compatible = "samsung,secure-firmware"; |
| 43 | reg = <0x0204F000 0x1000>; |
| 44 | }; |
| 45 | |
| 46 | fixed-rate-clocks { |
| 47 | xxti { |
| 48 | compatible = "samsung,clock-xxti", "fixed-clock"; |
| 49 | clock-frequency = <0>; |
| 50 | }; |
| 51 | |
| 52 | xusbxti { |
| 53 | compatible = "samsung,clock-xusbxti", "fixed-clock"; |
| 54 | clock-frequency = <24000000>; |
| 55 | }; |
| 56 | }; |
| 57 | |
| 58 | regulators { |
| 59 | compatible = "simple-bus"; |
| 60 | #address-cells = <1>; |
| 61 | #size-cells = <0>; |
| 62 | |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 63 | cam_io_reg: voltage-regulator-1 { |
| 64 | compatible = "regulator-fixed"; |
| 65 | regulator-name = "CAM_SENSOR_A"; |
| 66 | regulator-min-microvolt = <2800000>; |
| 67 | regulator-max-microvolt = <2800000>; |
| 68 | gpio = <&gpm0 2 0>; |
| 69 | enable-active-high; |
| 70 | }; |
| 71 | |
Andrzej Hajda | 420ae84 | 2014-03-28 12:52:45 +0100 | [diff] [blame] | 72 | lcd_vdd3_reg: voltage-regulator-2 { |
| 73 | compatible = "regulator-fixed"; |
| 74 | regulator-name = "LCD_VDD_2.2V"; |
| 75 | regulator-min-microvolt = <2200000>; |
| 76 | regulator-max-microvolt = <2200000>; |
| 77 | gpio = <&gpc0 1 0>; |
| 78 | enable-active-high; |
| 79 | }; |
| 80 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 81 | cam_af_reg: voltage-regulator-3 { |
| 82 | compatible = "regulator-fixed"; |
| 83 | regulator-name = "CAM_AF"; |
| 84 | regulator-min-microvolt = <2800000>; |
| 85 | regulator-max-microvolt = <2800000>; |
| 86 | gpio = <&gpm0 4 0>; |
| 87 | enable-active-high; |
| 88 | }; |
| 89 | |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 90 | ps_als_reg: voltage-regulator-5 { |
| 91 | compatible = "regulator-fixed"; |
| 92 | regulator-name = "LED_A_3.0V"; |
| 93 | regulator-min-microvolt = <3000000>; |
| 94 | regulator-max-microvolt = <3000000>; |
| 95 | gpio = <&gpj0 5 0>; |
| 96 | enable-active-high; |
| 97 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 98 | }; |
| 99 | |
| 100 | gpio-keys { |
| 101 | compatible = "gpio-keys"; |
| 102 | |
| 103 | key-down { |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 104 | gpios = <&gpx3 3 1>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 105 | linux,code = <114>; |
| 106 | label = "volume down"; |
| 107 | debounce-interval = <10>; |
| 108 | }; |
| 109 | |
| 110 | key-up { |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 111 | gpios = <&gpx2 2 1>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 112 | linux,code = <115>; |
| 113 | label = "volume up"; |
| 114 | debounce-interval = <10>; |
| 115 | }; |
| 116 | |
| 117 | key-power { |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 118 | gpios = <&gpx2 7 1>; |
| 119 | linux,code = <116>; |
| 120 | label = "power"; |
| 121 | debounce-interval = <10>; |
| 122 | gpio-key,wakeup; |
| 123 | }; |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 124 | |
| 125 | key-ok { |
| 126 | gpios = <&gpx0 1 1>; |
| 127 | linux,code = <139>; |
| 128 | label = "ok"; |
| 129 | debounce-inteval = <10>; |
| 130 | gpio-key,wakeup; |
| 131 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 132 | }; |
| 133 | |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 134 | i2c_max77693: i2c-gpio-1 { |
| 135 | compatible = "i2c-gpio"; |
| 136 | gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>; |
| 137 | i2c-gpio,delay-us = <2>; |
| 138 | #address-cells = <1>; |
| 139 | #size-cells = <0>; |
| 140 | status = "okay"; |
| 141 | |
| 142 | max77693@66 { |
| 143 | compatible = "maxim,max77693"; |
| 144 | interrupt-parent = <&gpx1>; |
| 145 | interrupts = <5 2>; |
| 146 | reg = <0x66>; |
| 147 | |
| 148 | regulators { |
| 149 | esafeout1_reg: ESAFEOUT1@1 { |
| 150 | regulator-name = "ESAFEOUT1"; |
| 151 | }; |
| 152 | esafeout2_reg: ESAFEOUT2@2 { |
| 153 | regulator-name = "ESAFEOUT2"; |
| 154 | }; |
| 155 | charger_reg: CHARGER@0 { |
| 156 | regulator-name = "CHARGER"; |
| 157 | regulator-min-microamp = <60000>; |
| 158 | regulator-max-microamp = <2580000>; |
| 159 | }; |
| 160 | }; |
Jaewon Kim | d9c6808 | 2014-11-22 23:19:22 +0900 | [diff] [blame] | 161 | |
| 162 | max77693_haptic { |
| 163 | compatible = "maxim,max77693-haptic"; |
| 164 | haptic-supply = <&ldo26_reg>; |
| 165 | pwms = <&pwm 0 38022 0>; |
| 166 | }; |
Krzysztof Kozlowski | 043ef14 | 2015-02-04 07:47:39 +0900 | [diff] [blame] | 167 | |
| 168 | charger { |
| 169 | compatible = "maxim,max77693-charger"; |
| 170 | |
| 171 | maxim,constant-microvolt = <4350000>; |
| 172 | maxim,min-system-microvolt = <3600000>; |
| 173 | maxim,thermal-regulation-celsius = <100>; |
| 174 | maxim,battery-overcurrent-microamp = <3500000>; |
| 175 | maxim,charge-input-threshold-microvolt = <4300000>; |
| 176 | }; |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 177 | }; |
| 178 | }; |
| 179 | |
Krzysztof Kozlowski | e861429 | 2015-02-04 07:43:44 +0900 | [diff] [blame] | 180 | i2c_max77693_fuel: i2c-gpio-3 { |
| 181 | compatible = "i2c-gpio"; |
| 182 | gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>; |
| 183 | i2c-gpio,delay-us = <2>; |
| 184 | #address-cells = <1>; |
| 185 | #size-cells = <0>; |
| 186 | status = "okay"; |
| 187 | |
| 188 | max77693-fuel-gauge@36 { |
| 189 | compatible = "maxim,max17047"; |
| 190 | interrupt-parent = <&gpx2>; |
| 191 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; |
| 192 | reg = <0x36>; |
Krzysztof Kozlowski | 82449f2 | 2015-06-07 13:21:00 +0900 | [diff] [blame^] | 193 | |
| 194 | maxim,over-heat-temp = <700>; |
| 195 | maxim,over-volt = <4500>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 196 | }; |
| 197 | }; |
| 198 | |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 199 | i2c_ak8975: i2c-gpio-0 { |
| 200 | compatible = "i2c-gpio"; |
| 201 | gpios = <&gpy2 4 0>, <&gpy2 5 0>; |
| 202 | i2c-gpio,delay-us = <2>; |
| 203 | #address-cells = <1>; |
| 204 | #size-cells = <0>; |
| 205 | status = "okay"; |
| 206 | |
| 207 | ak8975@0c { |
Beomho Seo | 30cc798 | 2014-05-20 01:12:50 +0900 | [diff] [blame] | 208 | compatible = "asahi-kasei,ak8975"; |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 209 | reg = <0x0c>; |
| 210 | gpios = <&gpj0 7 0>; |
| 211 | }; |
| 212 | }; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 213 | |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 214 | i2c_cm36651: i2c-gpio-2 { |
| 215 | compatible = "i2c-gpio"; |
| 216 | gpios = <&gpf0 0 1>, <&gpf0 1 1>; |
| 217 | i2c-gpio,delay-us = <2>; |
| 218 | #address-cells = <1>; |
| 219 | #size-cells = <0>; |
| 220 | |
| 221 | cm36651@18 { |
| 222 | compatible = "capella,cm36651"; |
| 223 | reg = <0x18>; |
| 224 | interrupt-parent = <&gpx0>; |
| 225 | interrupts = <2 2>; |
| 226 | vled-supply = <&ps_als_reg>; |
| 227 | }; |
| 228 | }; |
| 229 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 230 | camera: camera { |
| 231 | pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 232 | pinctrl-names = "default"; |
| 233 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 234 | assigned-clocks = <&clock CLK_MOUT_CAM0>, |
| 235 | <&clock CLK_MOUT_CAM1>; |
Sylwester Nawrocki | cfe3b89 | 2015-02-04 07:49:49 +0900 | [diff] [blame] | 236 | assigned-clock-parents = <&clock CLK_XUSBXTI>, |
| 237 | <&clock CLK_XUSBXTI>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 238 | |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 239 | |
Inha Song | 440e5ae | 2015-02-04 07:51:38 +0900 | [diff] [blame] | 240 | }; |
| 241 | |
| 242 | sound { |
| 243 | compatible = "samsung,trats2-audio"; |
| 244 | samsung,i2s-controller = <&i2s0>; |
| 245 | samsung,model = "Trats2"; |
| 246 | samsung,audio-codec = <&wm1811>; |
| 247 | samsung,audio-routing = |
| 248 | "SPK", "SPKOUTLN", |
| 249 | "SPK", "SPKOUTLP", |
| 250 | "SPK", "SPKOUTRN", |
| 251 | "SPK", "SPKOUTRP"; |
| 252 | }; |
| 253 | |
Chanwoo Choi | 4f42378 | 2014-03-18 06:25:59 +0900 | [diff] [blame] | 254 | thermistor-ap@0 { |
| 255 | compatible = "ntc,ncp15wb473"; |
| 256 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
| 257 | pullup-ohm = <100000>; /* 100K */ |
| 258 | pulldown-ohm = <100000>; /* 100K */ |
| 259 | io-channels = <&adc 1>; /* AP temperature */ |
| 260 | }; |
| 261 | |
| 262 | thermistor-battery@1 { |
| 263 | compatible = "ntc,ncp15wb473"; |
| 264 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
| 265 | pullup-ohm = <100000>; /* 100K */ |
| 266 | pulldown-ohm = <100000>; /* 100K */ |
| 267 | io-channels = <&adc 2>; /* Battery temperature */ |
| 268 | }; |
Lukasz Majewski | bf4a0be | 2015-01-30 08:26:02 +0900 | [diff] [blame] | 269 | |
| 270 | thermal-zones { |
| 271 | cpu_thermal: cpu-thermal { |
| 272 | cooling-maps { |
| 273 | map0 { |
| 274 | /* Corresponds to 800MHz at freq_table */ |
| 275 | cooling-device = <&cpu0 7 7>; |
| 276 | }; |
| 277 | map1 { |
| 278 | /* Corresponds to 200MHz at freq_table */ |
| 279 | cooling-device = <&cpu0 13 13>; |
| 280 | }; |
| 281 | }; |
| 282 | }; |
| 283 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 284 | }; |
Tomasz Figa | 09918a9 | 2014-09-24 01:20:03 +0900 | [diff] [blame] | 285 | |
Krzysztof Kozlowski | 1fe9a94 | 2015-04-06 21:07:42 +0200 | [diff] [blame] | 286 | &adc { |
| 287 | vdd-supply = <&ldo3_reg>; |
| 288 | status = "okay"; |
| 289 | }; |
| 290 | |
| 291 | &csis_0 { |
| 292 | status = "okay"; |
| 293 | vddcore-supply = <&ldo8_reg>; |
| 294 | vddio-supply = <&ldo10_reg>; |
| 295 | assigned-clocks = <&clock CLK_MOUT_CSIS0>, |
| 296 | <&clock CLK_SCLK_CSIS0>; |
| 297 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 298 | assigned-clock-rates = <0>, <176000000>; |
| 299 | |
| 300 | /* Camera C (3) MIPI CSI-2 (CSIS0) */ |
| 301 | port@3 { |
| 302 | reg = <3>; |
| 303 | csis0_ep: endpoint { |
| 304 | remote-endpoint = <&s5c73m3_ep>; |
| 305 | data-lanes = <1 2 3 4>; |
| 306 | samsung,csis-hs-settle = <12>; |
| 307 | }; |
| 308 | }; |
| 309 | }; |
| 310 | |
| 311 | &csis_1 { |
| 312 | status = "okay"; |
| 313 | vddcore-supply = <&ldo8_reg>; |
| 314 | vddio-supply = <&ldo10_reg>; |
| 315 | assigned-clocks = <&clock CLK_MOUT_CSIS1>, |
| 316 | <&clock CLK_SCLK_CSIS1>; |
| 317 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 318 | assigned-clock-rates = <0>, <176000000>; |
| 319 | |
| 320 | /* Camera D (4) MIPI CSI-2 (CSIS1) */ |
| 321 | port@4 { |
| 322 | reg = <4>; |
| 323 | csis1_ep: endpoint { |
| 324 | remote-endpoint = <&is_s5k6a3_ep>; |
| 325 | data-lanes = <1>; |
| 326 | samsung,csis-hs-settle = <18>; |
| 327 | samsung,csis-wclk; |
| 328 | }; |
| 329 | }; |
| 330 | }; |
| 331 | |
| 332 | &dsi_0 { |
| 333 | vddcore-supply = <&ldo8_reg>; |
| 334 | vddio-supply = <&ldo10_reg>; |
| 335 | samsung,pll-clock-frequency = <24000000>; |
| 336 | status = "okay"; |
| 337 | |
| 338 | ports { |
| 339 | #address-cells = <1>; |
| 340 | #size-cells = <0>; |
| 341 | |
| 342 | port@1 { |
| 343 | reg = <1>; |
| 344 | |
| 345 | dsi_out: endpoint { |
| 346 | remote-endpoint = <&dsi_in>; |
| 347 | samsung,burst-clock-frequency = <500000000>; |
| 348 | samsung,esc-clock-frequency = <20000000>; |
| 349 | }; |
| 350 | }; |
| 351 | }; |
| 352 | |
| 353 | panel@0 { |
| 354 | compatible = "samsung,s6e8aa0"; |
| 355 | reg = <0>; |
| 356 | vdd3-supply = <&lcd_vdd3_reg>; |
| 357 | vci-supply = <&ldo25_reg>; |
| 358 | reset-gpios = <&gpy4 5 0>; |
| 359 | power-on-delay= <50>; |
| 360 | reset-delay = <100>; |
| 361 | init-delay = <100>; |
| 362 | flip-horizontal; |
| 363 | flip-vertical; |
| 364 | panel-width-mm = <58>; |
| 365 | panel-height-mm = <103>; |
| 366 | |
| 367 | display-timings { |
| 368 | timing-0 { |
| 369 | clock-frequency = <57153600>; |
| 370 | hactive = <720>; |
| 371 | vactive = <1280>; |
| 372 | hfront-porch = <5>; |
| 373 | hback-porch = <5>; |
| 374 | hsync-len = <5>; |
| 375 | vfront-porch = <13>; |
| 376 | vback-porch = <1>; |
| 377 | vsync-len = <2>; |
| 378 | }; |
| 379 | }; |
| 380 | |
| 381 | port { |
| 382 | dsi_in: endpoint { |
| 383 | remote-endpoint = <&dsi_out>; |
| 384 | }; |
| 385 | }; |
| 386 | }; |
| 387 | }; |
| 388 | |
| 389 | &exynos_usbphy { |
| 390 | status = "okay"; |
| 391 | }; |
| 392 | |
| 393 | &fimc_0 { |
| 394 | status = "okay"; |
| 395 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, |
| 396 | <&clock CLK_SCLK_FIMC0>; |
| 397 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 398 | assigned-clock-rates = <0>, <176000000>; |
| 399 | }; |
| 400 | |
| 401 | &fimc_1 { |
| 402 | status = "okay"; |
| 403 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, |
| 404 | <&clock CLK_SCLK_FIMC1>; |
| 405 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 406 | assigned-clock-rates = <0>, <176000000>; |
| 407 | }; |
| 408 | |
| 409 | &fimc_2 { |
| 410 | status = "okay"; |
| 411 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, |
| 412 | <&clock CLK_SCLK_FIMC2>; |
| 413 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 414 | assigned-clock-rates = <0>, <176000000>; |
| 415 | }; |
| 416 | |
| 417 | &fimc_3 { |
| 418 | status = "okay"; |
| 419 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, |
| 420 | <&clock CLK_SCLK_FIMC3>; |
| 421 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 422 | assigned-clock-rates = <0>, <176000000>; |
| 423 | }; |
| 424 | |
| 425 | &fimc_is { |
| 426 | pinctrl-0 = <&fimc_is_uart>; |
| 427 | pinctrl-names = "default"; |
| 428 | status = "okay"; |
| 429 | |
| 430 | i2c1_isp: i2c-isp@12140000 { |
| 431 | pinctrl-0 = <&fimc_is_i2c1>; |
| 432 | pinctrl-names = "default"; |
| 433 | |
| 434 | s5k6a3@10 { |
| 435 | compatible = "samsung,s5k6a3"; |
| 436 | reg = <0x10>; |
| 437 | svdda-supply = <&cam_io_reg>; |
| 438 | svddio-supply = <&ldo19_reg>; |
| 439 | afvdd-supply = <&ldo19_reg>; |
| 440 | clock-frequency = <24000000>; |
| 441 | /* CAM_B_CLKOUT */ |
| 442 | clocks = <&camera 1>; |
| 443 | clock-names = "extclk"; |
| 444 | samsung,camclk-out = <1>; |
| 445 | gpios = <&gpm1 6 0>; |
| 446 | |
| 447 | port { |
| 448 | is_s5k6a3_ep: endpoint { |
| 449 | remote-endpoint = <&csis1_ep>; |
| 450 | data-lanes = <1>; |
| 451 | }; |
| 452 | }; |
| 453 | }; |
| 454 | }; |
| 455 | }; |
| 456 | |
| 457 | &fimc_lite_0 { |
| 458 | status = "okay"; |
| 459 | }; |
| 460 | |
| 461 | &fimc_lite_1 { |
| 462 | status = "okay"; |
| 463 | }; |
| 464 | |
| 465 | &fimd { |
| 466 | status = "okay"; |
| 467 | }; |
| 468 | |
| 469 | &hsotg { |
| 470 | vusb_d-supply = <&ldo15_reg>; |
| 471 | vusb_a-supply = <&ldo12_reg>; |
| 472 | dr_mode = "peripheral"; |
| 473 | status = "okay"; |
| 474 | }; |
| 475 | |
| 476 | &i2c_0 { |
| 477 | samsung,i2c-sda-delay = <100>; |
| 478 | samsung,i2c-slave-addr = <0x10>; |
| 479 | samsung,i2c-max-bus-freq = <400000>; |
| 480 | pinctrl-0 = <&i2c0_bus>; |
| 481 | pinctrl-names = "default"; |
| 482 | status = "okay"; |
| 483 | |
| 484 | s5c73m3@3c { |
| 485 | compatible = "samsung,s5c73m3"; |
| 486 | reg = <0x3c>; |
| 487 | standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */ |
| 488 | xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */ |
| 489 | vdd-int-supply = <&buck9_reg>; |
| 490 | vddio-cis-supply = <&ldo9_reg>; |
| 491 | vdda-supply = <&ldo17_reg>; |
| 492 | vddio-host-supply = <&ldo18_reg>; |
| 493 | vdd-af-supply = <&cam_af_reg>; |
| 494 | vdd-reg-supply = <&cam_io_reg>; |
| 495 | clock-frequency = <24000000>; |
| 496 | /* CAM_A_CLKOUT */ |
| 497 | clocks = <&camera 0>; |
| 498 | clock-names = "cis_extclk"; |
| 499 | port { |
| 500 | s5c73m3_ep: endpoint { |
| 501 | remote-endpoint = <&csis0_ep>; |
| 502 | data-lanes = <1 2 3 4>; |
| 503 | }; |
| 504 | }; |
| 505 | }; |
| 506 | }; |
| 507 | |
| 508 | &i2c_3 { |
| 509 | samsung,i2c-sda-delay = <100>; |
| 510 | samsung,i2c-slave-addr = <0x10>; |
| 511 | samsung,i2c-max-bus-freq = <400000>; |
| 512 | pinctrl-0 = <&i2c3_bus>; |
| 513 | pinctrl-names = "default"; |
| 514 | status = "okay"; |
| 515 | |
| 516 | mms114-touchscreen@48 { |
| 517 | compatible = "melfas,mms114"; |
| 518 | reg = <0x48>; |
| 519 | interrupt-parent = <&gpm2>; |
| 520 | interrupts = <3 2>; |
| 521 | x-size = <720>; |
| 522 | y-size = <1280>; |
| 523 | avdd-supply = <&ldo23_reg>; |
| 524 | vdd-supply = <&ldo24_reg>; |
| 525 | }; |
| 526 | }; |
| 527 | |
| 528 | &i2c_4 { |
| 529 | samsung,i2c-sda-delay = <100>; |
| 530 | samsung,i2c-slave-addr = <0x10>; |
| 531 | samsung,i2c-max-bus-freq = <100000>; |
| 532 | pinctrl-0 = <&i2c4_bus>; |
| 533 | pinctrl-names = "default"; |
| 534 | status = "okay"; |
| 535 | |
| 536 | wm1811: wm1811@1a { |
| 537 | compatible = "wlf,wm1811"; |
| 538 | reg = <0x1a>; |
| 539 | clocks = <&pmu_system_controller 0>; |
| 540 | clock-names = "MCLK1"; |
| 541 | DCVDD-supply = <&ldo3_reg>; |
| 542 | DBVDD1-supply = <&ldo3_reg>; |
| 543 | wlf,ldo1ena = <&gpj0 4 0>; |
| 544 | }; |
| 545 | }; |
| 546 | |
| 547 | &i2c_7 { |
| 548 | samsung,i2c-sda-delay = <100>; |
| 549 | samsung,i2c-slave-addr = <0x10>; |
| 550 | samsung,i2c-max-bus-freq = <100000>; |
| 551 | pinctrl-0 = <&i2c7_bus>; |
| 552 | pinctrl-names = "default"; |
| 553 | status = "okay"; |
| 554 | |
| 555 | max77686: max77686_pmic@09 { |
| 556 | compatible = "maxim,max77686"; |
| 557 | interrupt-parent = <&gpx0>; |
| 558 | interrupts = <7 0>; |
| 559 | reg = <0x09>; |
| 560 | #clock-cells = <1>; |
| 561 | |
| 562 | voltage-regulators { |
| 563 | ldo1_reg: ldo1 { |
| 564 | regulator-compatible = "LDO1"; |
| 565 | regulator-name = "VALIVE_1.0V_AP"; |
| 566 | regulator-min-microvolt = <1000000>; |
| 567 | regulator-max-microvolt = <1000000>; |
| 568 | regulator-always-on; |
| 569 | }; |
| 570 | |
| 571 | ldo2_reg: ldo2 { |
| 572 | regulator-compatible = "LDO2"; |
| 573 | regulator-name = "VM1M2_1.2V_AP"; |
| 574 | regulator-min-microvolt = <1200000>; |
| 575 | regulator-max-microvolt = <1200000>; |
| 576 | regulator-always-on; |
| 577 | regulator-state-mem { |
| 578 | regulator-on-in-suspend; |
| 579 | }; |
| 580 | }; |
| 581 | |
| 582 | ldo3_reg: ldo3 { |
| 583 | regulator-compatible = "LDO3"; |
| 584 | regulator-name = "VCC_1.8V_AP"; |
| 585 | regulator-min-microvolt = <1800000>; |
| 586 | regulator-max-microvolt = <1800000>; |
| 587 | regulator-always-on; |
| 588 | }; |
| 589 | |
| 590 | ldo4_reg: ldo4 { |
| 591 | regulator-compatible = "LDO4"; |
| 592 | regulator-name = "VCC_2.8V_AP"; |
| 593 | regulator-min-microvolt = <2800000>; |
| 594 | regulator-max-microvolt = <2800000>; |
| 595 | regulator-always-on; |
| 596 | }; |
| 597 | |
| 598 | ldo5_reg: ldo5 { |
| 599 | regulator-compatible = "LDO5"; |
| 600 | regulator-name = "VCC_1.8V_IO"; |
| 601 | regulator-min-microvolt = <1800000>; |
| 602 | regulator-max-microvolt = <1800000>; |
| 603 | regulator-always-on; |
| 604 | }; |
| 605 | |
| 606 | ldo6_reg: ldo6 { |
| 607 | regulator-compatible = "LDO6"; |
| 608 | regulator-name = "VMPLL_1.0V_AP"; |
| 609 | regulator-min-microvolt = <1000000>; |
| 610 | regulator-max-microvolt = <1000000>; |
| 611 | regulator-always-on; |
| 612 | regulator-state-mem { |
| 613 | regulator-on-in-suspend; |
| 614 | }; |
| 615 | }; |
| 616 | |
| 617 | ldo7_reg: ldo7 { |
| 618 | regulator-compatible = "LDO7"; |
| 619 | regulator-name = "VPLL_1.0V_AP"; |
| 620 | regulator-min-microvolt = <1000000>; |
| 621 | regulator-max-microvolt = <1000000>; |
| 622 | regulator-always-on; |
| 623 | regulator-state-mem { |
| 624 | regulator-on-in-suspend; |
| 625 | }; |
| 626 | }; |
| 627 | |
| 628 | ldo8_reg: ldo8 { |
| 629 | regulator-compatible = "LDO8"; |
| 630 | regulator-name = "VMIPI_1.0V"; |
| 631 | regulator-min-microvolt = <1000000>; |
| 632 | regulator-max-microvolt = <1000000>; |
| 633 | regulator-state-mem { |
| 634 | regulator-off-in-suspend; |
| 635 | }; |
| 636 | }; |
| 637 | |
| 638 | ldo9_reg: ldo9 { |
| 639 | regulator-compatible = "LDO9"; |
| 640 | regulator-name = "CAM_ISP_MIPI_1.2V"; |
| 641 | regulator-min-microvolt = <1200000>; |
| 642 | regulator-max-microvolt = <1200000>; |
| 643 | }; |
| 644 | |
| 645 | ldo10_reg: ldo10 { |
| 646 | regulator-compatible = "LDO10"; |
| 647 | regulator-name = "VMIPI_1.8V"; |
| 648 | regulator-min-microvolt = <1800000>; |
| 649 | regulator-max-microvolt = <1800000>; |
| 650 | regulator-state-mem { |
| 651 | regulator-off-in-suspend; |
| 652 | }; |
| 653 | }; |
| 654 | |
| 655 | ldo11_reg: ldo11 { |
| 656 | regulator-compatible = "LDO11"; |
| 657 | regulator-name = "VABB1_1.95V"; |
| 658 | regulator-min-microvolt = <1950000>; |
| 659 | regulator-max-microvolt = <1950000>; |
| 660 | regulator-always-on; |
| 661 | regulator-state-mem { |
| 662 | regulator-off-in-suspend; |
| 663 | }; |
| 664 | }; |
| 665 | |
| 666 | ldo12_reg: ldo12 { |
| 667 | regulator-compatible = "LDO12"; |
| 668 | regulator-name = "VUOTG_3.0V"; |
| 669 | regulator-min-microvolt = <3000000>; |
| 670 | regulator-max-microvolt = <3000000>; |
| 671 | regulator-state-mem { |
| 672 | regulator-off-in-suspend; |
| 673 | }; |
| 674 | }; |
| 675 | |
| 676 | ldo13_reg: ldo13 { |
| 677 | regulator-compatible = "LDO13"; |
| 678 | regulator-name = "NFC_AVDD_1.8V"; |
| 679 | regulator-min-microvolt = <1800000>; |
| 680 | regulator-max-microvolt = <1800000>; |
| 681 | }; |
| 682 | |
| 683 | ldo14_reg: ldo14 { |
| 684 | regulator-compatible = "LDO14"; |
| 685 | regulator-name = "VABB2_1.95V"; |
| 686 | regulator-min-microvolt = <1950000>; |
| 687 | regulator-max-microvolt = <1950000>; |
| 688 | regulator-always-on; |
| 689 | regulator-state-mem { |
| 690 | regulator-off-in-suspend; |
| 691 | }; |
| 692 | }; |
| 693 | |
| 694 | ldo15_reg: ldo15 { |
| 695 | regulator-compatible = "LDO15"; |
| 696 | regulator-name = "VHSIC_1.0V"; |
| 697 | regulator-min-microvolt = <1000000>; |
| 698 | regulator-max-microvolt = <1000000>; |
| 699 | regulator-state-mem { |
| 700 | regulator-on-in-suspend; |
| 701 | }; |
| 702 | }; |
| 703 | |
| 704 | ldo16_reg: ldo16 { |
| 705 | regulator-compatible = "LDO16"; |
| 706 | regulator-name = "VHSIC_1.8V"; |
| 707 | regulator-min-microvolt = <1800000>; |
| 708 | regulator-max-microvolt = <1800000>; |
| 709 | regulator-state-mem { |
| 710 | regulator-on-in-suspend; |
| 711 | }; |
| 712 | }; |
| 713 | |
| 714 | ldo17_reg: ldo17 { |
| 715 | regulator-compatible = "LDO17"; |
| 716 | regulator-name = "CAM_SENSOR_CORE_1.2V"; |
| 717 | regulator-min-microvolt = <1200000>; |
| 718 | regulator-max-microvolt = <1200000>; |
| 719 | }; |
| 720 | |
| 721 | ldo18_reg: ldo18 { |
| 722 | regulator-compatible = "LDO18"; |
| 723 | regulator-name = "CAM_ISP_SEN_IO_1.8V"; |
| 724 | regulator-min-microvolt = <1800000>; |
| 725 | regulator-max-microvolt = <1800000>; |
| 726 | }; |
| 727 | |
| 728 | ldo19_reg: ldo19 { |
| 729 | regulator-compatible = "LDO19"; |
| 730 | regulator-name = "VT_CAM_1.8V"; |
| 731 | regulator-min-microvolt = <1800000>; |
| 732 | regulator-max-microvolt = <1800000>; |
| 733 | }; |
| 734 | |
| 735 | ldo20_reg: ldo20 { |
| 736 | regulator-compatible = "LDO20"; |
| 737 | regulator-name = "VDDQ_PRE_1.8V"; |
| 738 | regulator-min-microvolt = <1800000>; |
| 739 | regulator-max-microvolt = <1800000>; |
| 740 | }; |
| 741 | |
| 742 | ldo21_reg: ldo21 { |
| 743 | regulator-compatible = "LDO21"; |
| 744 | regulator-name = "VTF_2.8V"; |
| 745 | regulator-min-microvolt = <2800000>; |
| 746 | regulator-max-microvolt = <2800000>; |
| 747 | maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; |
| 748 | }; |
| 749 | |
| 750 | ldo22_reg: ldo22 { |
| 751 | regulator-compatible = "LDO22"; |
| 752 | regulator-name = "VMEM_VDD_2.8V"; |
| 753 | regulator-min-microvolt = <2800000>; |
| 754 | regulator-max-microvolt = <2800000>; |
| 755 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; |
| 756 | }; |
| 757 | |
| 758 | ldo23_reg: ldo23 { |
| 759 | regulator-compatible = "LDO23"; |
| 760 | regulator-name = "TSP_AVDD_3.3V"; |
| 761 | regulator-min-microvolt = <3300000>; |
| 762 | regulator-max-microvolt = <3300000>; |
| 763 | }; |
| 764 | |
| 765 | ldo24_reg: ldo24 { |
| 766 | regulator-compatible = "LDO24"; |
| 767 | regulator-name = "TSP_VDD_1.8V"; |
| 768 | regulator-min-microvolt = <1800000>; |
| 769 | regulator-max-microvolt = <1800000>; |
| 770 | }; |
| 771 | |
| 772 | ldo25_reg: ldo25 { |
| 773 | regulator-compatible = "LDO25"; |
| 774 | regulator-name = "LCD_VCC_3.3V"; |
| 775 | regulator-min-microvolt = <2800000>; |
| 776 | regulator-max-microvolt = <2800000>; |
| 777 | }; |
| 778 | |
| 779 | ldo26_reg: ldo26 { |
| 780 | regulator-compatible = "LDO26"; |
| 781 | regulator-name = "MOTOR_VCC_3.0V"; |
| 782 | regulator-min-microvolt = <3000000>; |
| 783 | regulator-max-microvolt = <3000000>; |
| 784 | }; |
| 785 | |
| 786 | buck1_reg: buck1 { |
| 787 | regulator-compatible = "BUCK1"; |
| 788 | regulator-name = "vdd_mif"; |
| 789 | regulator-min-microvolt = <850000>; |
| 790 | regulator-max-microvolt = <1100000>; |
| 791 | regulator-always-on; |
| 792 | regulator-boot-on; |
| 793 | regulator-state-mem { |
| 794 | regulator-off-in-suspend; |
| 795 | }; |
| 796 | }; |
| 797 | |
| 798 | buck2_reg: buck2 { |
| 799 | regulator-compatible = "BUCK2"; |
| 800 | regulator-name = "vdd_arm"; |
| 801 | regulator-min-microvolt = <850000>; |
| 802 | regulator-max-microvolt = <1500000>; |
| 803 | regulator-always-on; |
| 804 | regulator-boot-on; |
| 805 | regulator-state-mem { |
| 806 | regulator-on-in-suspend; |
| 807 | }; |
| 808 | }; |
| 809 | |
| 810 | buck3_reg: buck3 { |
| 811 | regulator-compatible = "BUCK3"; |
| 812 | regulator-name = "vdd_int"; |
| 813 | regulator-min-microvolt = <850000>; |
| 814 | regulator-max-microvolt = <1150000>; |
| 815 | regulator-always-on; |
| 816 | regulator-boot-on; |
| 817 | regulator-state-mem { |
| 818 | regulator-off-in-suspend; |
| 819 | }; |
| 820 | }; |
| 821 | |
| 822 | buck4_reg: buck4 { |
| 823 | regulator-compatible = "BUCK4"; |
| 824 | regulator-name = "vdd_g3d"; |
| 825 | regulator-min-microvolt = <850000>; |
| 826 | regulator-max-microvolt = <1150000>; |
| 827 | regulator-boot-on; |
| 828 | regulator-state-mem { |
| 829 | regulator-off-in-suspend; |
| 830 | }; |
| 831 | }; |
| 832 | |
| 833 | buck5_reg: buck5 { |
| 834 | regulator-compatible = "BUCK5"; |
| 835 | regulator-name = "VMEM_1.2V_AP"; |
| 836 | regulator-min-microvolt = <1200000>; |
| 837 | regulator-max-microvolt = <1200000>; |
| 838 | regulator-always-on; |
| 839 | }; |
| 840 | |
| 841 | buck6_reg: buck6 { |
| 842 | regulator-compatible = "BUCK6"; |
| 843 | regulator-name = "VCC_SUB_1.35V"; |
| 844 | regulator-min-microvolt = <1350000>; |
| 845 | regulator-max-microvolt = <1350000>; |
| 846 | regulator-always-on; |
| 847 | }; |
| 848 | |
| 849 | buck7_reg: buck7 { |
| 850 | regulator-compatible = "BUCK7"; |
| 851 | regulator-name = "VCC_SUB_2.0V"; |
| 852 | regulator-min-microvolt = <2000000>; |
| 853 | regulator-max-microvolt = <2000000>; |
| 854 | regulator-always-on; |
| 855 | }; |
| 856 | |
| 857 | buck8_reg: buck8 { |
| 858 | regulator-compatible = "BUCK8"; |
| 859 | regulator-name = "VMEM_VDDF_3.0V"; |
| 860 | regulator-min-microvolt = <2850000>; |
| 861 | regulator-max-microvolt = <2850000>; |
| 862 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; |
| 863 | }; |
| 864 | |
| 865 | buck9_reg: buck9 { |
| 866 | regulator-compatible = "BUCK9"; |
| 867 | regulator-name = "CAM_ISP_CORE_1.2V"; |
| 868 | regulator-min-microvolt = <1000000>; |
| 869 | regulator-max-microvolt = <1200000>; |
| 870 | maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>; |
| 871 | }; |
| 872 | }; |
| 873 | }; |
| 874 | }; |
| 875 | |
| 876 | &i2s0 { |
| 877 | pinctrl-0 = <&i2s0_bus>; |
| 878 | pinctrl-names = "default"; |
| 879 | status = "okay"; |
| 880 | }; |
| 881 | |
| 882 | &mshc_0 { |
| 883 | num-slots = <1>; |
| 884 | broken-cd; |
| 885 | non-removable; |
| 886 | card-detect-delay = <200>; |
| 887 | vmmc-supply = <&ldo22_reg>; |
| 888 | clock-frequency = <400000000>; |
| 889 | samsung,dw-mshc-ciu-div = <0>; |
| 890 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 891 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 892 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; |
| 893 | pinctrl-names = "default"; |
| 894 | status = "okay"; |
| 895 | bus-width = <8>; |
| 896 | cap-mmc-highspeed; |
| 897 | }; |
| 898 | |
Inha Song | 440e5ae | 2015-02-04 07:51:38 +0900 | [diff] [blame] | 899 | &pmu_system_controller { |
| 900 | assigned-clocks = <&pmu_system_controller 0>; |
| 901 | assigned-clock-parents = <&clock CLK_XUSBXTI>; |
| 902 | }; |
| 903 | |
Chanwoo Choi | 7808cae | 2015-02-04 08:11:52 +0900 | [diff] [blame] | 904 | &ppmu_dmc0 { |
| 905 | status = "okay"; |
| 906 | |
| 907 | events { |
| 908 | ppmu_dmc0_3: ppmu-event3-dmc0 { |
| 909 | event-name = "ppmu-event3-dmc0"; |
| 910 | }; |
| 911 | }; |
| 912 | }; |
| 913 | |
| 914 | &ppmu_dmc1 { |
| 915 | status = "okay"; |
| 916 | |
| 917 | events { |
| 918 | ppmu_dmc1_3: ppmu-event3-dmc1 { |
| 919 | event-name = "ppmu-event3-dmc1"; |
| 920 | }; |
| 921 | }; |
| 922 | }; |
| 923 | |
| 924 | &ppmu_leftbus { |
| 925 | status = "okay"; |
| 926 | |
| 927 | events { |
| 928 | ppmu_leftbus_3: ppmu-event3-leftbus { |
| 929 | event-name = "ppmu-event3-leftbus"; |
| 930 | }; |
| 931 | }; |
| 932 | }; |
| 933 | |
| 934 | &ppmu_rightbus { |
| 935 | status = "okay"; |
| 936 | |
| 937 | events { |
| 938 | ppmu_rightbus_3: ppmu-event3-rightbus { |
| 939 | event-name = "ppmu-event3-rightbus"; |
| 940 | }; |
| 941 | }; |
| 942 | }; |
| 943 | |
Tomasz Figa | 09918a9 | 2014-09-24 01:20:03 +0900 | [diff] [blame] | 944 | &pinctrl_0 { |
| 945 | pinctrl-names = "default"; |
| 946 | pinctrl-0 = <&sleep0>; |
| 947 | |
| 948 | sleep0: sleep-states { |
| 949 | PIN_SLP(gpa0-0, INPUT, NONE); |
| 950 | PIN_SLP(gpa0-1, OUT0, NONE); |
| 951 | PIN_SLP(gpa0-2, INPUT, NONE); |
| 952 | PIN_SLP(gpa0-3, INPUT, UP); |
| 953 | PIN_SLP(gpa0-4, INPUT, NONE); |
| 954 | PIN_SLP(gpa0-5, INPUT, DOWN); |
| 955 | PIN_SLP(gpa0-6, INPUT, DOWN); |
| 956 | PIN_SLP(gpa0-7, INPUT, UP); |
| 957 | |
| 958 | PIN_SLP(gpa1-0, INPUT, DOWN); |
| 959 | PIN_SLP(gpa1-1, INPUT, DOWN); |
| 960 | PIN_SLP(gpa1-2, INPUT, DOWN); |
| 961 | PIN_SLP(gpa1-3, INPUT, DOWN); |
| 962 | PIN_SLP(gpa1-4, INPUT, DOWN); |
| 963 | PIN_SLP(gpa1-5, INPUT, DOWN); |
| 964 | |
| 965 | PIN_SLP(gpb-0, INPUT, NONE); |
| 966 | PIN_SLP(gpb-1, INPUT, NONE); |
| 967 | PIN_SLP(gpb-2, INPUT, NONE); |
| 968 | PIN_SLP(gpb-3, INPUT, NONE); |
| 969 | PIN_SLP(gpb-4, INPUT, DOWN); |
| 970 | PIN_SLP(gpb-5, INPUT, UP); |
| 971 | PIN_SLP(gpb-6, INPUT, DOWN); |
| 972 | PIN_SLP(gpb-7, INPUT, DOWN); |
| 973 | |
| 974 | PIN_SLP(gpc0-0, INPUT, DOWN); |
| 975 | PIN_SLP(gpc0-1, INPUT, DOWN); |
| 976 | PIN_SLP(gpc0-2, INPUT, DOWN); |
| 977 | PIN_SLP(gpc0-3, INPUT, DOWN); |
| 978 | PIN_SLP(gpc0-4, INPUT, DOWN); |
| 979 | |
| 980 | PIN_SLP(gpc1-0, INPUT, NONE); |
| 981 | PIN_SLP(gpc1-1, PREV, NONE); |
| 982 | PIN_SLP(gpc1-2, INPUT, NONE); |
| 983 | PIN_SLP(gpc1-3, INPUT, NONE); |
| 984 | PIN_SLP(gpc1-4, INPUT, NONE); |
| 985 | |
| 986 | PIN_SLP(gpd0-0, INPUT, DOWN); |
| 987 | PIN_SLP(gpd0-1, INPUT, DOWN); |
| 988 | PIN_SLP(gpd0-2, INPUT, NONE); |
| 989 | PIN_SLP(gpd0-3, INPUT, NONE); |
| 990 | |
| 991 | PIN_SLP(gpd1-0, INPUT, DOWN); |
| 992 | PIN_SLP(gpd1-1, INPUT, DOWN); |
| 993 | PIN_SLP(gpd1-2, INPUT, NONE); |
| 994 | PIN_SLP(gpd1-3, INPUT, NONE); |
| 995 | |
| 996 | PIN_SLP(gpf0-0, INPUT, NONE); |
| 997 | PIN_SLP(gpf0-1, INPUT, NONE); |
| 998 | PIN_SLP(gpf0-2, INPUT, DOWN); |
| 999 | PIN_SLP(gpf0-3, INPUT, DOWN); |
| 1000 | PIN_SLP(gpf0-4, INPUT, NONE); |
| 1001 | PIN_SLP(gpf0-5, INPUT, DOWN); |
| 1002 | PIN_SLP(gpf0-6, INPUT, NONE); |
| 1003 | PIN_SLP(gpf0-7, INPUT, DOWN); |
| 1004 | |
| 1005 | PIN_SLP(gpf1-0, INPUT, DOWN); |
| 1006 | PIN_SLP(gpf1-1, INPUT, DOWN); |
| 1007 | PIN_SLP(gpf1-2, INPUT, DOWN); |
| 1008 | PIN_SLP(gpf1-3, INPUT, DOWN); |
| 1009 | PIN_SLP(gpf1-4, INPUT, NONE); |
| 1010 | PIN_SLP(gpf1-5, INPUT, NONE); |
| 1011 | PIN_SLP(gpf1-6, INPUT, DOWN); |
| 1012 | PIN_SLP(gpf1-7, PREV, NONE); |
| 1013 | |
| 1014 | PIN_SLP(gpf2-0, PREV, NONE); |
| 1015 | PIN_SLP(gpf2-1, INPUT, DOWN); |
| 1016 | PIN_SLP(gpf2-2, INPUT, DOWN); |
| 1017 | PIN_SLP(gpf2-3, INPUT, DOWN); |
| 1018 | PIN_SLP(gpf2-4, INPUT, DOWN); |
| 1019 | PIN_SLP(gpf2-5, INPUT, DOWN); |
| 1020 | PIN_SLP(gpf2-6, INPUT, NONE); |
| 1021 | PIN_SLP(gpf2-7, INPUT, NONE); |
| 1022 | |
| 1023 | PIN_SLP(gpf3-0, INPUT, NONE); |
| 1024 | PIN_SLP(gpf3-1, PREV, NONE); |
| 1025 | PIN_SLP(gpf3-2, PREV, NONE); |
| 1026 | PIN_SLP(gpf3-3, PREV, NONE); |
| 1027 | PIN_SLP(gpf3-4, OUT1, NONE); |
| 1028 | PIN_SLP(gpf3-5, INPUT, DOWN); |
| 1029 | |
| 1030 | PIN_SLP(gpj0-0, PREV, NONE); |
| 1031 | PIN_SLP(gpj0-1, PREV, NONE); |
| 1032 | PIN_SLP(gpj0-2, PREV, NONE); |
| 1033 | PIN_SLP(gpj0-3, INPUT, DOWN); |
| 1034 | PIN_SLP(gpj0-4, PREV, NONE); |
| 1035 | PIN_SLP(gpj0-5, PREV, NONE); |
| 1036 | PIN_SLP(gpj0-6, INPUT, DOWN); |
| 1037 | PIN_SLP(gpj0-7, INPUT, DOWN); |
| 1038 | |
| 1039 | PIN_SLP(gpj1-0, INPUT, DOWN); |
| 1040 | PIN_SLP(gpj1-1, PREV, NONE); |
| 1041 | PIN_SLP(gpj1-2, PREV, NONE); |
| 1042 | PIN_SLP(gpj1-3, INPUT, DOWN); |
| 1043 | PIN_SLP(gpj1-4, INPUT, DOWN); |
| 1044 | }; |
| 1045 | }; |
| 1046 | |
| 1047 | &pinctrl_1 { |
| 1048 | pinctrl-names = "default"; |
| 1049 | pinctrl-0 = <&sleep1>; |
| 1050 | |
| 1051 | sleep1: sleep-states { |
| 1052 | PIN_SLP(gpk0-0, PREV, NONE); |
| 1053 | PIN_SLP(gpk0-1, PREV, NONE); |
| 1054 | PIN_SLP(gpk0-2, OUT0, NONE); |
| 1055 | PIN_SLP(gpk0-3, PREV, NONE); |
| 1056 | PIN_SLP(gpk0-4, PREV, NONE); |
| 1057 | PIN_SLP(gpk0-5, PREV, NONE); |
| 1058 | PIN_SLP(gpk0-6, PREV, NONE); |
| 1059 | |
| 1060 | PIN_SLP(gpk1-0, INPUT, DOWN); |
| 1061 | PIN_SLP(gpk1-1, INPUT, DOWN); |
| 1062 | PIN_SLP(gpk1-2, INPUT, DOWN); |
| 1063 | PIN_SLP(gpk1-3, PREV, NONE); |
| 1064 | PIN_SLP(gpk1-4, PREV, NONE); |
| 1065 | PIN_SLP(gpk1-5, PREV, NONE); |
| 1066 | PIN_SLP(gpk1-6, PREV, NONE); |
| 1067 | |
| 1068 | PIN_SLP(gpk2-0, INPUT, DOWN); |
| 1069 | PIN_SLP(gpk2-1, INPUT, DOWN); |
| 1070 | PIN_SLP(gpk2-2, INPUT, DOWN); |
| 1071 | PIN_SLP(gpk2-3, INPUT, DOWN); |
| 1072 | PIN_SLP(gpk2-4, INPUT, DOWN); |
| 1073 | PIN_SLP(gpk2-5, INPUT, DOWN); |
| 1074 | PIN_SLP(gpk2-6, INPUT, DOWN); |
| 1075 | |
| 1076 | PIN_SLP(gpk3-0, OUT0, NONE); |
| 1077 | PIN_SLP(gpk3-1, INPUT, NONE); |
| 1078 | PIN_SLP(gpk3-2, INPUT, DOWN); |
| 1079 | PIN_SLP(gpk3-3, INPUT, NONE); |
| 1080 | PIN_SLP(gpk3-4, INPUT, NONE); |
| 1081 | PIN_SLP(gpk3-5, INPUT, NONE); |
| 1082 | PIN_SLP(gpk3-6, INPUT, NONE); |
| 1083 | |
| 1084 | PIN_SLP(gpl0-0, INPUT, DOWN); |
| 1085 | PIN_SLP(gpl0-1, INPUT, DOWN); |
| 1086 | PIN_SLP(gpl0-2, INPUT, DOWN); |
| 1087 | PIN_SLP(gpl0-3, INPUT, DOWN); |
| 1088 | PIN_SLP(gpl0-4, PREV, NONE); |
| 1089 | PIN_SLP(gpl0-6, PREV, NONE); |
| 1090 | |
| 1091 | PIN_SLP(gpl1-0, INPUT, DOWN); |
| 1092 | PIN_SLP(gpl1-1, INPUT, DOWN); |
| 1093 | PIN_SLP(gpl2-0, INPUT, DOWN); |
| 1094 | PIN_SLP(gpl2-1, INPUT, DOWN); |
| 1095 | PIN_SLP(gpl2-2, INPUT, DOWN); |
| 1096 | PIN_SLP(gpl2-3, INPUT, DOWN); |
| 1097 | PIN_SLP(gpl2-4, INPUT, DOWN); |
| 1098 | PIN_SLP(gpl2-5, INPUT, DOWN); |
| 1099 | PIN_SLP(gpl2-6, PREV, NONE); |
| 1100 | PIN_SLP(gpl2-7, INPUT, DOWN); |
| 1101 | |
| 1102 | PIN_SLP(gpm0-0, INPUT, DOWN); |
| 1103 | PIN_SLP(gpm0-1, INPUT, DOWN); |
| 1104 | PIN_SLP(gpm0-2, INPUT, DOWN); |
| 1105 | PIN_SLP(gpm0-3, INPUT, DOWN); |
| 1106 | PIN_SLP(gpm0-4, INPUT, DOWN); |
| 1107 | PIN_SLP(gpm0-5, INPUT, DOWN); |
| 1108 | PIN_SLP(gpm0-6, INPUT, DOWN); |
| 1109 | PIN_SLP(gpm0-7, INPUT, DOWN); |
| 1110 | |
| 1111 | PIN_SLP(gpm1-0, INPUT, DOWN); |
| 1112 | PIN_SLP(gpm1-1, INPUT, DOWN); |
| 1113 | PIN_SLP(gpm1-2, INPUT, NONE); |
| 1114 | PIN_SLP(gpm1-3, INPUT, NONE); |
| 1115 | PIN_SLP(gpm1-4, INPUT, NONE); |
| 1116 | PIN_SLP(gpm1-5, INPUT, NONE); |
| 1117 | PIN_SLP(gpm1-6, INPUT, DOWN); |
| 1118 | |
| 1119 | PIN_SLP(gpm2-0, INPUT, NONE); |
| 1120 | PIN_SLP(gpm2-1, INPUT, NONE); |
| 1121 | PIN_SLP(gpm2-2, INPUT, DOWN); |
| 1122 | PIN_SLP(gpm2-3, INPUT, DOWN); |
| 1123 | PIN_SLP(gpm2-4, INPUT, DOWN); |
| 1124 | |
| 1125 | PIN_SLP(gpm3-0, PREV, NONE); |
| 1126 | PIN_SLP(gpm3-1, PREV, NONE); |
| 1127 | PIN_SLP(gpm3-2, PREV, NONE); |
| 1128 | PIN_SLP(gpm3-3, OUT1, NONE); |
| 1129 | PIN_SLP(gpm3-4, INPUT, DOWN); |
| 1130 | PIN_SLP(gpm3-5, INPUT, DOWN); |
| 1131 | PIN_SLP(gpm3-6, INPUT, DOWN); |
| 1132 | PIN_SLP(gpm3-7, INPUT, DOWN); |
| 1133 | |
| 1134 | PIN_SLP(gpm4-0, INPUT, DOWN); |
| 1135 | PIN_SLP(gpm4-1, INPUT, DOWN); |
| 1136 | PIN_SLP(gpm4-2, INPUT, DOWN); |
| 1137 | PIN_SLP(gpm4-3, INPUT, DOWN); |
| 1138 | PIN_SLP(gpm4-4, INPUT, DOWN); |
| 1139 | PIN_SLP(gpm4-5, INPUT, DOWN); |
| 1140 | PIN_SLP(gpm4-6, INPUT, DOWN); |
| 1141 | PIN_SLP(gpm4-7, INPUT, DOWN); |
| 1142 | |
| 1143 | PIN_SLP(gpy0-0, INPUT, DOWN); |
| 1144 | PIN_SLP(gpy0-1, INPUT, DOWN); |
| 1145 | PIN_SLP(gpy0-2, INPUT, DOWN); |
| 1146 | PIN_SLP(gpy0-3, INPUT, DOWN); |
| 1147 | PIN_SLP(gpy0-4, INPUT, DOWN); |
| 1148 | PIN_SLP(gpy0-5, INPUT, DOWN); |
| 1149 | |
| 1150 | PIN_SLP(gpy1-0, INPUT, DOWN); |
| 1151 | PIN_SLP(gpy1-1, INPUT, DOWN); |
| 1152 | PIN_SLP(gpy1-2, INPUT, DOWN); |
| 1153 | PIN_SLP(gpy1-3, INPUT, DOWN); |
| 1154 | |
| 1155 | PIN_SLP(gpy2-0, PREV, NONE); |
| 1156 | PIN_SLP(gpy2-1, INPUT, DOWN); |
| 1157 | PIN_SLP(gpy2-2, INPUT, NONE); |
| 1158 | PIN_SLP(gpy2-3, INPUT, NONE); |
| 1159 | PIN_SLP(gpy2-4, INPUT, NONE); |
| 1160 | PIN_SLP(gpy2-5, INPUT, NONE); |
| 1161 | |
| 1162 | PIN_SLP(gpy3-0, INPUT, DOWN); |
| 1163 | PIN_SLP(gpy3-1, INPUT, DOWN); |
| 1164 | PIN_SLP(gpy3-2, INPUT, DOWN); |
| 1165 | PIN_SLP(gpy3-3, INPUT, DOWN); |
| 1166 | PIN_SLP(gpy3-4, INPUT, DOWN); |
| 1167 | PIN_SLP(gpy3-5, INPUT, DOWN); |
| 1168 | PIN_SLP(gpy3-6, INPUT, DOWN); |
| 1169 | PIN_SLP(gpy3-7, INPUT, DOWN); |
| 1170 | |
| 1171 | PIN_SLP(gpy4-0, INPUT, DOWN); |
| 1172 | PIN_SLP(gpy4-1, INPUT, DOWN); |
| 1173 | PIN_SLP(gpy4-2, INPUT, DOWN); |
| 1174 | PIN_SLP(gpy4-3, INPUT, DOWN); |
| 1175 | PIN_SLP(gpy4-4, INPUT, DOWN); |
| 1176 | PIN_SLP(gpy4-5, INPUT, DOWN); |
| 1177 | PIN_SLP(gpy4-6, INPUT, DOWN); |
| 1178 | PIN_SLP(gpy4-7, INPUT, DOWN); |
| 1179 | |
| 1180 | PIN_SLP(gpy5-0, INPUT, DOWN); |
| 1181 | PIN_SLP(gpy5-1, INPUT, DOWN); |
| 1182 | PIN_SLP(gpy5-2, INPUT, DOWN); |
| 1183 | PIN_SLP(gpy5-3, INPUT, DOWN); |
| 1184 | PIN_SLP(gpy5-4, INPUT, DOWN); |
| 1185 | PIN_SLP(gpy5-5, INPUT, DOWN); |
| 1186 | PIN_SLP(gpy5-6, INPUT, DOWN); |
| 1187 | PIN_SLP(gpy5-7, INPUT, DOWN); |
| 1188 | |
| 1189 | PIN_SLP(gpy6-0, INPUT, DOWN); |
| 1190 | PIN_SLP(gpy6-1, INPUT, DOWN); |
| 1191 | PIN_SLP(gpy6-2, INPUT, DOWN); |
| 1192 | PIN_SLP(gpy6-3, INPUT, DOWN); |
| 1193 | PIN_SLP(gpy6-4, INPUT, DOWN); |
| 1194 | PIN_SLP(gpy6-5, INPUT, DOWN); |
| 1195 | PIN_SLP(gpy6-6, INPUT, DOWN); |
| 1196 | PIN_SLP(gpy6-7, INPUT, DOWN); |
| 1197 | }; |
| 1198 | }; |
| 1199 | |
| 1200 | &pinctrl_2 { |
| 1201 | pinctrl-names = "default"; |
| 1202 | pinctrl-0 = <&sleep2>; |
| 1203 | |
| 1204 | sleep2: sleep-states { |
| 1205 | PIN_SLP(gpz-0, INPUT, DOWN); |
| 1206 | PIN_SLP(gpz-1, INPUT, DOWN); |
| 1207 | PIN_SLP(gpz-2, INPUT, DOWN); |
| 1208 | PIN_SLP(gpz-3, INPUT, DOWN); |
| 1209 | PIN_SLP(gpz-4, INPUT, DOWN); |
| 1210 | PIN_SLP(gpz-5, INPUT, DOWN); |
| 1211 | PIN_SLP(gpz-6, INPUT, DOWN); |
| 1212 | }; |
| 1213 | }; |
| 1214 | |
| 1215 | &pinctrl_3 { |
| 1216 | pinctrl-names = "default"; |
| 1217 | pinctrl-0 = <&sleep3>; |
| 1218 | |
| 1219 | sleep3: sleep-states { |
| 1220 | PIN_SLP(gpv0-0, INPUT, DOWN); |
| 1221 | PIN_SLP(gpv0-1, INPUT, DOWN); |
| 1222 | PIN_SLP(gpv0-2, INPUT, DOWN); |
| 1223 | PIN_SLP(gpv0-3, INPUT, DOWN); |
| 1224 | PIN_SLP(gpv0-4, INPUT, DOWN); |
| 1225 | PIN_SLP(gpv0-5, INPUT, DOWN); |
| 1226 | PIN_SLP(gpv0-6, INPUT, DOWN); |
| 1227 | PIN_SLP(gpv0-7, INPUT, DOWN); |
| 1228 | |
| 1229 | PIN_SLP(gpv1-0, INPUT, DOWN); |
| 1230 | PIN_SLP(gpv1-1, INPUT, DOWN); |
| 1231 | PIN_SLP(gpv1-2, INPUT, DOWN); |
| 1232 | PIN_SLP(gpv1-3, INPUT, DOWN); |
| 1233 | PIN_SLP(gpv1-4, INPUT, DOWN); |
| 1234 | PIN_SLP(gpv1-5, INPUT, DOWN); |
| 1235 | PIN_SLP(gpv1-6, INPUT, DOWN); |
| 1236 | PIN_SLP(gpv1-7, INPUT, DOWN); |
| 1237 | |
| 1238 | PIN_SLP(gpv2-0, INPUT, DOWN); |
| 1239 | PIN_SLP(gpv2-1, INPUT, DOWN); |
| 1240 | PIN_SLP(gpv2-2, INPUT, DOWN); |
| 1241 | PIN_SLP(gpv2-3, INPUT, DOWN); |
| 1242 | PIN_SLP(gpv2-4, INPUT, DOWN); |
| 1243 | PIN_SLP(gpv2-5, INPUT, DOWN); |
| 1244 | PIN_SLP(gpv2-6, INPUT, DOWN); |
| 1245 | PIN_SLP(gpv2-7, INPUT, DOWN); |
| 1246 | |
| 1247 | PIN_SLP(gpv3-0, INPUT, DOWN); |
| 1248 | PIN_SLP(gpv3-1, INPUT, DOWN); |
| 1249 | PIN_SLP(gpv3-2, INPUT, DOWN); |
| 1250 | PIN_SLP(gpv3-3, INPUT, DOWN); |
| 1251 | PIN_SLP(gpv3-4, INPUT, DOWN); |
| 1252 | PIN_SLP(gpv3-5, INPUT, DOWN); |
| 1253 | PIN_SLP(gpv3-6, INPUT, DOWN); |
| 1254 | PIN_SLP(gpv3-7, INPUT, DOWN); |
| 1255 | |
| 1256 | PIN_SLP(gpv4-0, INPUT, DOWN); |
| 1257 | }; |
| 1258 | }; |
Krzysztof Kozlowski | ce9940a | 2015-05-02 14:40:08 +0900 | [diff] [blame] | 1259 | |
Krzysztof Kozlowski | 1fe9a94 | 2015-04-06 21:07:42 +0200 | [diff] [blame] | 1260 | &pwm { |
| 1261 | pinctrl-0 = <&pwm0_out>; |
| 1262 | pinctrl-names = "default"; |
| 1263 | samsung,pwm-outputs = <0>; |
| 1264 | status = "okay"; |
| 1265 | }; |
| 1266 | |
Krzysztof Kozlowski | ce9940a | 2015-05-02 14:40:08 +0900 | [diff] [blame] | 1267 | &rtc { |
| 1268 | status = "okay"; |
| 1269 | clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; |
| 1270 | clock-names = "rtc", "rtc_src"; |
| 1271 | }; |
Krzysztof Kozlowski | 1fe9a94 | 2015-04-06 21:07:42 +0200 | [diff] [blame] | 1272 | |
| 1273 | &sdhci_2 { |
| 1274 | bus-width = <4>; |
| 1275 | cd-gpios = <&gpx3 4 0>; |
| 1276 | cd-inverted; |
| 1277 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; |
| 1278 | pinctrl-names = "default"; |
| 1279 | vmmc-supply = <&ldo21_reg>; |
| 1280 | status = "okay"; |
| 1281 | }; |
| 1282 | |
| 1283 | &serial_0 { |
| 1284 | status = "okay"; |
| 1285 | }; |
| 1286 | |
| 1287 | &serial_1 { |
| 1288 | status = "okay"; |
| 1289 | }; |
| 1290 | |
| 1291 | &serial_2 { |
| 1292 | status = "okay"; |
| 1293 | }; |
| 1294 | |
| 1295 | &serial_3 { |
| 1296 | status = "okay"; |
| 1297 | }; |
| 1298 | |
| 1299 | &spi_1 { |
| 1300 | pinctrl-names = "default"; |
| 1301 | pinctrl-0 = <&spi1_bus>; |
| 1302 | cs-gpios = <&gpb 5 0>; |
| 1303 | status = "okay"; |
| 1304 | |
| 1305 | s5c73m3_spi: s5c73m3 { |
| 1306 | compatible = "samsung,s5c73m3"; |
| 1307 | spi-max-frequency = <50000000>; |
| 1308 | reg = <0>; |
| 1309 | controller-data { |
| 1310 | samsung,spi-feedback-delay = <2>; |
| 1311 | }; |
| 1312 | }; |
| 1313 | }; |
| 1314 | |
| 1315 | &tmu { |
| 1316 | vtmu-supply = <&ldo10_reg>; |
| 1317 | status = "okay"; |
| 1318 | }; |