Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/char/8250_pci.c |
| 3 | * |
| 4 | * Probe module for 8250/16550-type PCI serial ports. |
| 5 | * |
| 6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. |
| 7 | * |
| 8 | * Copyright (C) 2001 Russell King, All Rights Reserved. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License. |
| 13 | * |
| 14 | * $Id: 8250_pci.c,v 1.28 2002/11/02 11:14:18 rmk Exp $ |
| 15 | */ |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/string.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/slab.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/tty.h> |
| 24 | #include <linux/serial_core.h> |
| 25 | #include <linux/8250_pci.h> |
| 26 | #include <linux/bitops.h> |
| 27 | |
| 28 | #include <asm/byteorder.h> |
| 29 | #include <asm/io.h> |
| 30 | |
| 31 | #include "8250.h" |
| 32 | |
| 33 | #undef SERIAL_DEBUG_PCI |
| 34 | |
| 35 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | * init function returns: |
| 37 | * > 0 - number of ports |
| 38 | * = 0 - use board->num_ports |
| 39 | * < 0 - error |
| 40 | */ |
| 41 | struct pci_serial_quirk { |
| 42 | u32 vendor; |
| 43 | u32 device; |
| 44 | u32 subvendor; |
| 45 | u32 subdevice; |
| 46 | int (*init)(struct pci_dev *dev); |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 47 | int (*setup)(struct serial_private *, struct pciserial_board *, |
Russell King | 05caac5 | 2005-07-27 11:41:18 +0100 | [diff] [blame] | 48 | struct uart_port *, int); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | void (*exit)(struct pci_dev *dev); |
| 50 | }; |
| 51 | |
| 52 | #define PCI_NUM_BAR_RESOURCES 6 |
| 53 | |
| 54 | struct serial_private { |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 55 | struct pci_dev *dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | unsigned int nr; |
| 57 | void __iomem *remapped_bar[PCI_NUM_BAR_RESOURCES]; |
| 58 | struct pci_serial_quirk *quirk; |
| 59 | int line[0]; |
| 60 | }; |
| 61 | |
| 62 | static void moan_device(const char *str, struct pci_dev *dev) |
| 63 | { |
| 64 | printk(KERN_WARNING "%s: %s\n" |
| 65 | KERN_WARNING "Please send the output of lspci -vv, this\n" |
| 66 | KERN_WARNING "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n" |
| 67 | KERN_WARNING "manufacturer and name of serial board or\n" |
| 68 | KERN_WARNING "modem board to rmk+serial@arm.linux.org.uk.\n", |
| 69 | pci_name(dev), str, dev->vendor, dev->device, |
| 70 | dev->subsystem_vendor, dev->subsystem_device); |
| 71 | } |
| 72 | |
| 73 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 74 | setup_port(struct serial_private *priv, struct uart_port *port, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | int bar, int offset, int regshift) |
| 76 | { |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 77 | struct pci_dev *dev = priv->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | unsigned long base, len; |
| 79 | |
| 80 | if (bar >= PCI_NUM_BAR_RESOURCES) |
| 81 | return -EINVAL; |
| 82 | |
Russell King | 72ce9a8 | 2005-07-27 11:32:04 +0100 | [diff] [blame] | 83 | base = pci_resource_start(dev, bar); |
| 84 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | len = pci_resource_len(dev, bar); |
| 87 | |
| 88 | if (!priv->remapped_bar[bar]) |
| 89 | priv->remapped_bar[bar] = ioremap(base, len); |
| 90 | if (!priv->remapped_bar[bar]) |
| 91 | return -ENOMEM; |
| 92 | |
| 93 | port->iotype = UPIO_MEM; |
Russell King | 72ce9a8 | 2005-07-27 11:32:04 +0100 | [diff] [blame] | 94 | port->iobase = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | port->mapbase = base + offset; |
| 96 | port->membase = priv->remapped_bar[bar] + offset; |
| 97 | port->regshift = regshift; |
| 98 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | port->iotype = UPIO_PORT; |
Russell King | 72ce9a8 | 2005-07-27 11:32:04 +0100 | [diff] [blame] | 100 | port->iobase = base + offset; |
| 101 | port->mapbase = 0; |
| 102 | port->membase = NULL; |
| 103 | port->regshift = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | } |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | /* |
| 109 | * AFAVLAB uses a different mixture of BARs and offsets |
| 110 | * Not that ugly ;) -- HW |
| 111 | */ |
| 112 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 113 | afavlab_setup(struct serial_private *priv, struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | struct uart_port *port, int idx) |
| 115 | { |
| 116 | unsigned int bar, offset = board->first_offset; |
| 117 | |
| 118 | bar = FL_GET_BASE(board->flags); |
| 119 | if (idx < 4) |
| 120 | bar += idx; |
| 121 | else { |
| 122 | bar = 4; |
| 123 | offset += (idx - 4) * board->uart_offset; |
| 124 | } |
| 125 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 126 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | /* |
| 130 | * HP's Remote Management Console. The Diva chip came in several |
| 131 | * different versions. N-class, L2000 and A500 have two Diva chips, each |
| 132 | * with 3 UARTs (the third UART on the second chip is unused). Superdome |
| 133 | * and Keystone have one Diva chip with 3 UARTs. Some later machines have |
| 134 | * one Diva chip, but it has been expanded to 5 UARTs. |
| 135 | */ |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 136 | static int pci_hp_diva_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | { |
| 138 | int rc = 0; |
| 139 | |
| 140 | switch (dev->subsystem_device) { |
| 141 | case PCI_DEVICE_ID_HP_DIVA_TOSCA1: |
| 142 | case PCI_DEVICE_ID_HP_DIVA_HALFDOME: |
| 143 | case PCI_DEVICE_ID_HP_DIVA_KEYSTONE: |
| 144 | case PCI_DEVICE_ID_HP_DIVA_EVEREST: |
| 145 | rc = 3; |
| 146 | break; |
| 147 | case PCI_DEVICE_ID_HP_DIVA_TOSCA2: |
| 148 | rc = 2; |
| 149 | break; |
| 150 | case PCI_DEVICE_ID_HP_DIVA_MAESTRO: |
| 151 | rc = 4; |
| 152 | break; |
| 153 | case PCI_DEVICE_ID_HP_DIVA_POWERBAR: |
Justin Chen | 551f8f0 | 2005-10-24 22:16:38 +0100 | [diff] [blame] | 154 | case PCI_DEVICE_ID_HP_DIVA_HURRICANE: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | rc = 1; |
| 156 | break; |
| 157 | } |
| 158 | |
| 159 | return rc; |
| 160 | } |
| 161 | |
| 162 | /* |
| 163 | * HP's Diva chip puts the 4th/5th serial port further out, and |
| 164 | * some serial ports are supposed to be hidden on certain models. |
| 165 | */ |
| 166 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 167 | pci_hp_diva_setup(struct serial_private *priv, struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | struct uart_port *port, int idx) |
| 169 | { |
| 170 | unsigned int offset = board->first_offset; |
| 171 | unsigned int bar = FL_GET_BASE(board->flags); |
| 172 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 173 | switch (priv->dev->subsystem_device) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | case PCI_DEVICE_ID_HP_DIVA_MAESTRO: |
| 175 | if (idx == 3) |
| 176 | idx++; |
| 177 | break; |
| 178 | case PCI_DEVICE_ID_HP_DIVA_EVEREST: |
| 179 | if (idx > 0) |
| 180 | idx++; |
| 181 | if (idx > 2) |
| 182 | idx++; |
| 183 | break; |
| 184 | } |
| 185 | if (idx > 2) |
| 186 | offset = 0x18; |
| 187 | |
| 188 | offset += idx * board->uart_offset; |
| 189 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 190 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /* |
| 194 | * Added for EKF Intel i960 serial boards |
| 195 | */ |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 196 | static int pci_inteli960ni_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | { |
| 198 | unsigned long oldval; |
| 199 | |
| 200 | if (!(dev->subsystem_device & 0x1000)) |
| 201 | return -ENODEV; |
| 202 | |
| 203 | /* is firmware started? */ |
| 204 | pci_read_config_dword(dev, 0x44, (void*) &oldval); |
| 205 | if (oldval == 0x00001000L) { /* RESET value */ |
| 206 | printk(KERN_DEBUG "Local i960 firmware missing"); |
| 207 | return -ENODEV; |
| 208 | } |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | /* |
| 213 | * Some PCI serial cards using the PLX 9050 PCI interface chip require |
| 214 | * that the card interrupt be explicitly enabled or disabled. This |
| 215 | * seems to be mainly needed on card using the PLX which also use I/O |
| 216 | * mapped memory. |
| 217 | */ |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 218 | static int pci_plx9050_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | { |
| 220 | u8 irq_config; |
| 221 | void __iomem *p; |
| 222 | |
| 223 | if ((pci_resource_flags(dev, 0) & IORESOURCE_MEM) == 0) { |
| 224 | moan_device("no memory in bar 0", dev); |
| 225 | return 0; |
| 226 | } |
| 227 | |
| 228 | irq_config = 0x41; |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 229 | if (dev->vendor == PCI_VENDOR_ID_PANACOM || |
| 230 | dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | irq_config = 0x43; |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 232 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | if ((dev->vendor == PCI_VENDOR_ID_PLX) && |
| 234 | (dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) { |
| 235 | /* |
| 236 | * As the megawolf cards have the int pins active |
| 237 | * high, and have 2 UART chips, both ints must be |
| 238 | * enabled on the 9050. Also, the UARTS are set in |
| 239 | * 16450 mode by default, so we have to enable the |
| 240 | * 16C950 'enhanced' mode so that we can use the |
| 241 | * deep FIFOs |
| 242 | */ |
| 243 | irq_config = 0x5b; |
| 244 | } |
| 245 | |
| 246 | /* |
| 247 | * enable/disable interrupts |
| 248 | */ |
| 249 | p = ioremap(pci_resource_start(dev, 0), 0x80); |
| 250 | if (p == NULL) |
| 251 | return -ENOMEM; |
| 252 | writel(irq_config, p + 0x4c); |
| 253 | |
| 254 | /* |
| 255 | * Read the register back to ensure that it took effect. |
| 256 | */ |
| 257 | readl(p + 0x4c); |
| 258 | iounmap(p); |
| 259 | |
| 260 | return 0; |
| 261 | } |
| 262 | |
| 263 | static void __devexit pci_plx9050_exit(struct pci_dev *dev) |
| 264 | { |
| 265 | u8 __iomem *p; |
| 266 | |
| 267 | if ((pci_resource_flags(dev, 0) & IORESOURCE_MEM) == 0) |
| 268 | return; |
| 269 | |
| 270 | /* |
| 271 | * disable interrupts |
| 272 | */ |
| 273 | p = ioremap(pci_resource_start(dev, 0), 0x80); |
| 274 | if (p != NULL) { |
| 275 | writel(0, p + 0x4c); |
| 276 | |
| 277 | /* |
| 278 | * Read the register back to ensure that it took effect. |
| 279 | */ |
| 280 | readl(p + 0x4c); |
| 281 | iounmap(p); |
| 282 | } |
| 283 | } |
| 284 | |
| 285 | /* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */ |
| 286 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 287 | sbs_setup(struct serial_private *priv, struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | struct uart_port *port, int idx) |
| 289 | { |
| 290 | unsigned int bar, offset = board->first_offset; |
| 291 | |
| 292 | bar = 0; |
| 293 | |
| 294 | if (idx < 4) { |
| 295 | /* first four channels map to 0, 0x100, 0x200, 0x300 */ |
| 296 | offset += idx * board->uart_offset; |
| 297 | } else if (idx < 8) { |
| 298 | /* last four channels map to 0x1000, 0x1100, 0x1200, 0x1300 */ |
| 299 | offset += idx * board->uart_offset + 0xC00; |
| 300 | } else /* we have only 8 ports on PMC-OCTALPRO */ |
| 301 | return 1; |
| 302 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 303 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | /* |
| 307 | * This does initialization for PMC OCTALPRO cards: |
| 308 | * maps the device memory, resets the UARTs (needed, bc |
| 309 | * if the module is removed and inserted again, the card |
| 310 | * is in the sleep mode) and enables global interrupt. |
| 311 | */ |
| 312 | |
| 313 | /* global control register offset for SBS PMC-OctalPro */ |
| 314 | #define OCT_REG_CR_OFF 0x500 |
| 315 | |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 316 | static int sbs_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | { |
| 318 | u8 __iomem *p; |
| 319 | |
| 320 | p = ioremap(pci_resource_start(dev, 0),pci_resource_len(dev,0)); |
| 321 | |
| 322 | if (p == NULL) |
| 323 | return -ENOMEM; |
| 324 | /* Set bit-4 Control Register (UART RESET) in to reset the uarts */ |
| 325 | writeb(0x10,p + OCT_REG_CR_OFF); |
| 326 | udelay(50); |
| 327 | writeb(0x0,p + OCT_REG_CR_OFF); |
| 328 | |
| 329 | /* Set bit-2 (INTENABLE) of Control Register */ |
| 330 | writeb(0x4, p + OCT_REG_CR_OFF); |
| 331 | iounmap(p); |
| 332 | |
| 333 | return 0; |
| 334 | } |
| 335 | |
| 336 | /* |
| 337 | * Disables the global interrupt of PMC-OctalPro |
| 338 | */ |
| 339 | |
| 340 | static void __devexit sbs_exit(struct pci_dev *dev) |
| 341 | { |
| 342 | u8 __iomem *p; |
| 343 | |
| 344 | p = ioremap(pci_resource_start(dev, 0),pci_resource_len(dev,0)); |
| 345 | if (p != NULL) { |
| 346 | writeb(0, p + OCT_REG_CR_OFF); |
| 347 | } |
| 348 | iounmap(p); |
| 349 | } |
| 350 | |
| 351 | /* |
| 352 | * SIIG serial cards have an PCI interface chip which also controls |
| 353 | * the UART clocking frequency. Each UART can be clocked independently |
| 354 | * (except cards equiped with 4 UARTs) and initial clocking settings |
| 355 | * are stored in the EEPROM chip. It can cause problems because this |
| 356 | * version of serial driver doesn't support differently clocked UART's |
| 357 | * on single PCI card. To prevent this, initialization functions set |
| 358 | * high frequency clocking for all UART's on given card. It is safe (I |
| 359 | * hope) because it doesn't touch EEPROM settings to prevent conflicts |
| 360 | * with other OSes (like M$ DOS). |
| 361 | * |
| 362 | * SIIG support added by Andrey Panin <pazke@donpac.ru>, 10/1999 |
| 363 | * |
| 364 | * There is two family of SIIG serial cards with different PCI |
| 365 | * interface chip and different configuration methods: |
| 366 | * - 10x cards have control registers in IO and/or memory space; |
| 367 | * - 20x cards have control registers in standard PCI configuration space. |
| 368 | * |
Russell King | 67d74b8 | 2005-07-27 11:33:03 +0100 | [diff] [blame] | 369 | * Note: all 10x cards have PCI device ids 0x10.. |
| 370 | * all 20x cards have PCI device ids 0x20.. |
| 371 | * |
Andrey Panin | fbc0dc0 | 2005-07-18 11:38:09 +0100 | [diff] [blame] | 372 | * There are also Quartet Serial cards which use Oxford Semiconductor |
| 373 | * 16954 quad UART PCI chip clocked by 18.432 MHz quartz. |
| 374 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | * Note: some SIIG cards are probed by the parport_serial object. |
| 376 | */ |
| 377 | |
| 378 | #define PCI_DEVICE_ID_SIIG_1S_10x (PCI_DEVICE_ID_SIIG_1S_10x_550 & 0xfffc) |
| 379 | #define PCI_DEVICE_ID_SIIG_2S_10x (PCI_DEVICE_ID_SIIG_2S_10x_550 & 0xfff8) |
| 380 | |
| 381 | static int pci_siig10x_init(struct pci_dev *dev) |
| 382 | { |
| 383 | u16 data; |
| 384 | void __iomem *p; |
| 385 | |
| 386 | switch (dev->device & 0xfff8) { |
| 387 | case PCI_DEVICE_ID_SIIG_1S_10x: /* 1S */ |
| 388 | data = 0xffdf; |
| 389 | break; |
| 390 | case PCI_DEVICE_ID_SIIG_2S_10x: /* 2S, 2S1P */ |
| 391 | data = 0xf7ff; |
| 392 | break; |
| 393 | default: /* 1S1P, 4S */ |
| 394 | data = 0xfffb; |
| 395 | break; |
| 396 | } |
| 397 | |
| 398 | p = ioremap(pci_resource_start(dev, 0), 0x80); |
| 399 | if (p == NULL) |
| 400 | return -ENOMEM; |
| 401 | |
| 402 | writew(readw(p + 0x28) & data, p + 0x28); |
| 403 | readw(p + 0x28); |
| 404 | iounmap(p); |
| 405 | return 0; |
| 406 | } |
| 407 | |
| 408 | #define PCI_DEVICE_ID_SIIG_2S_20x (PCI_DEVICE_ID_SIIG_2S_20x_550 & 0xfffc) |
| 409 | #define PCI_DEVICE_ID_SIIG_2S1P_20x (PCI_DEVICE_ID_SIIG_2S1P_20x_550 & 0xfffc) |
| 410 | |
| 411 | static int pci_siig20x_init(struct pci_dev *dev) |
| 412 | { |
| 413 | u8 data; |
| 414 | |
| 415 | /* Change clock frequency for the first UART. */ |
| 416 | pci_read_config_byte(dev, 0x6f, &data); |
| 417 | pci_write_config_byte(dev, 0x6f, data & 0xef); |
| 418 | |
| 419 | /* If this card has 2 UART, we have to do the same with second UART. */ |
| 420 | if (((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S_20x) || |
| 421 | ((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S1P_20x)) { |
| 422 | pci_read_config_byte(dev, 0x73, &data); |
| 423 | pci_write_config_byte(dev, 0x73, data & 0xef); |
| 424 | } |
| 425 | return 0; |
| 426 | } |
| 427 | |
Russell King | 67d74b8 | 2005-07-27 11:33:03 +0100 | [diff] [blame] | 428 | static int pci_siig_init(struct pci_dev *dev) |
| 429 | { |
| 430 | unsigned int type = dev->device & 0xff00; |
| 431 | |
| 432 | if (type == 0x1000) |
| 433 | return pci_siig10x_init(dev); |
| 434 | else if (type == 0x2000) |
| 435 | return pci_siig20x_init(dev); |
| 436 | |
| 437 | moan_device("Unknown SIIG card", dev); |
| 438 | return -ENODEV; |
| 439 | } |
| 440 | |
Andrey Panin | 3ec9c59 | 2006-02-02 20:15:09 +0000 | [diff] [blame] | 441 | static int pci_siig_setup(struct serial_private *priv, |
| 442 | struct pciserial_board *board, |
| 443 | struct uart_port *port, int idx) |
| 444 | { |
| 445 | unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0; |
| 446 | |
| 447 | if (idx > 3) { |
| 448 | bar = 4; |
| 449 | offset = (idx - 4) * 8; |
| 450 | } |
| 451 | |
| 452 | return setup_port(priv, port, bar, offset, 0); |
| 453 | } |
| 454 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | /* |
| 456 | * Timedia has an explosion of boards, and to avoid the PCI table from |
| 457 | * growing *huge*, we use this function to collapse some 70 entries |
| 458 | * in the PCI table into one, for sanity's and compactness's sake. |
| 459 | */ |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 460 | static const unsigned short timedia_single_port[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | 0x4025, 0x4027, 0x4028, 0x5025, 0x5027, 0 |
| 462 | }; |
| 463 | |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 464 | static const unsigned short timedia_dual_port[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | 0x0002, 0x4036, 0x4037, 0x4038, 0x4078, 0x4079, 0x4085, |
| 466 | 0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079, |
| 467 | 0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079, |
| 468 | 0x9137, 0x9138, 0x9237, 0x9238, 0xA079, 0xB079, 0xC079, |
| 469 | 0xD079, 0 |
| 470 | }; |
| 471 | |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 472 | static const unsigned short timedia_quad_port[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | 0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157, |
| 474 | 0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159, |
| 475 | 0x9256, 0x9257, 0xA056, 0xA157, 0xA158, 0xA159, 0xB056, |
| 476 | 0xB157, 0 |
| 477 | }; |
| 478 | |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 479 | static const unsigned short timedia_eight_port[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 480 | 0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166, |
| 481 | 0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0 |
| 482 | }; |
| 483 | |
Arjan van de Ven | cb3592b | 2005-11-28 21:04:11 +0000 | [diff] [blame] | 484 | static const struct timedia_struct { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | int num; |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 486 | const unsigned short *ids; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | } timedia_data[] = { |
| 488 | { 1, timedia_single_port }, |
| 489 | { 2, timedia_dual_port }, |
| 490 | { 4, timedia_quad_port }, |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 491 | { 8, timedia_eight_port } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | }; |
| 493 | |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 494 | static int pci_timedia_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | { |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 496 | const unsigned short *ids; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | int i, j; |
| 498 | |
Helge Deller | e9422e0 | 2006-08-29 21:57:29 +0200 | [diff] [blame] | 499 | for (i = 0; i < ARRAY_SIZE(timedia_data); i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | ids = timedia_data[i].ids; |
| 501 | for (j = 0; ids[j]; j++) |
| 502 | if (dev->subsystem_device == ids[j]) |
| 503 | return timedia_data[i].num; |
| 504 | } |
| 505 | return 0; |
| 506 | } |
| 507 | |
| 508 | /* |
| 509 | * Timedia/SUNIX uses a mixture of BARs and offsets |
| 510 | * Ugh, this is ugly as all hell --- TYT |
| 511 | */ |
| 512 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 513 | pci_timedia_setup(struct serial_private *priv, struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | struct uart_port *port, int idx) |
| 515 | { |
| 516 | unsigned int bar = 0, offset = board->first_offset; |
| 517 | |
| 518 | switch (idx) { |
| 519 | case 0: |
| 520 | bar = 0; |
| 521 | break; |
| 522 | case 1: |
| 523 | offset = board->uart_offset; |
| 524 | bar = 0; |
| 525 | break; |
| 526 | case 2: |
| 527 | bar = 1; |
| 528 | break; |
| 529 | case 3: |
| 530 | offset = board->uart_offset; |
Dave Jones | c2cd6d3 | 2005-12-07 18:11:26 +0000 | [diff] [blame] | 531 | /* FALLTHROUGH */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | case 4: /* BAR 2 */ |
| 533 | case 5: /* BAR 3 */ |
| 534 | case 6: /* BAR 4 */ |
| 535 | case 7: /* BAR 5 */ |
| 536 | bar = idx - 2; |
| 537 | } |
| 538 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 539 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | /* |
| 543 | * Some Titan cards are also a little weird |
| 544 | */ |
| 545 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 546 | titan_400l_800l_setup(struct serial_private *priv, |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 547 | struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | struct uart_port *port, int idx) |
| 549 | { |
| 550 | unsigned int bar, offset = board->first_offset; |
| 551 | |
| 552 | switch (idx) { |
| 553 | case 0: |
| 554 | bar = 1; |
| 555 | break; |
| 556 | case 1: |
| 557 | bar = 2; |
| 558 | break; |
| 559 | default: |
| 560 | bar = 4; |
| 561 | offset = (idx - 2) * board->uart_offset; |
| 562 | } |
| 563 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 564 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 565 | } |
| 566 | |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 567 | static int pci_xircom_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | { |
| 569 | msleep(100); |
| 570 | return 0; |
| 571 | } |
| 572 | |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 573 | static int pci_netmos_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | { |
| 575 | /* subdevice 0x00PS means <P> parallel, <S> serial */ |
| 576 | unsigned int num_serial = dev->subsystem_device & 0xf; |
| 577 | |
| 578 | if (num_serial == 0) |
| 579 | return -ENODEV; |
| 580 | return num_serial; |
| 581 | } |
| 582 | |
Niels de Vos | 84f8c6f | 2007-08-22 14:01:14 -0700 | [diff] [blame^] | 583 | /* |
| 584 | * ITE support by Niels de Vos <niels.devos@wincor-nixdorf.com> |
| 585 | * |
| 586 | * These chips are available with optionally one parallel port and up to |
| 587 | * two serial ports. Unfortunately they all have the same product id. |
| 588 | * |
| 589 | * Basic configuration is done over a region of 32 I/O ports. The base |
| 590 | * ioport is called INTA or INTC, depending on docs/other drivers. |
| 591 | * |
| 592 | * The region of the 32 I/O ports is configured in POSIO0R... |
| 593 | */ |
| 594 | |
| 595 | /* registers */ |
| 596 | #define ITE_887x_MISCR 0x9c |
| 597 | #define ITE_887x_INTCBAR 0x78 |
| 598 | #define ITE_887x_UARTBAR 0x7c |
| 599 | #define ITE_887x_PS0BAR 0x10 |
| 600 | #define ITE_887x_POSIO0 0x60 |
| 601 | |
| 602 | /* I/O space size */ |
| 603 | #define ITE_887x_IOSIZE 32 |
| 604 | /* I/O space size (bits 26-24; 8 bytes = 011b) */ |
| 605 | #define ITE_887x_POSIO_IOSIZE_8 (3 << 24) |
| 606 | /* I/O space size (bits 26-24; 32 bytes = 101b) */ |
| 607 | #define ITE_887x_POSIO_IOSIZE_32 (5 << 24) |
| 608 | /* Decoding speed (1 = slow, 2 = medium, 3 = fast) */ |
| 609 | #define ITE_887x_POSIO_SPEED (3 << 29) |
| 610 | /* enable IO_Space bit */ |
| 611 | #define ITE_887x_POSIO_ENABLE (1 << 31) |
| 612 | |
| 613 | static int __devinit pci_ite887x_init(struct pci_dev *dev) |
| 614 | { |
| 615 | /* inta_addr are the configuration addresses of the ITE */ |
| 616 | static const short inta_addr[] = { 0x2a0, 0x2c0, 0x220, 0x240, 0x1e0, |
| 617 | 0x200, 0x280, 0 }; |
| 618 | int ret, i, type; |
| 619 | struct resource *iobase = NULL; |
| 620 | u32 miscr, uartbar, ioport; |
| 621 | |
| 622 | /* search for the base-ioport */ |
| 623 | i = 0; |
| 624 | while (inta_addr[i] && iobase == NULL) { |
| 625 | iobase = request_region(inta_addr[i], ITE_887x_IOSIZE, |
| 626 | "ite887x"); |
| 627 | if (iobase != NULL) { |
| 628 | /* write POSIO0R - speed | size | ioport */ |
| 629 | pci_write_config_dword(dev, ITE_887x_POSIO0, |
| 630 | ITE_887x_POSIO_ENABLE | ITE_887x_POSIO_SPEED | |
| 631 | ITE_887x_POSIO_IOSIZE_32 | inta_addr[i]); |
| 632 | /* write INTCBAR - ioport */ |
| 633 | pci_write_config_dword(dev, ITE_887x_INTCBAR, inta_addr[i]); |
| 634 | ret = inb(inta_addr[i]); |
| 635 | if (ret != 0xff) { |
| 636 | /* ioport connected */ |
| 637 | break; |
| 638 | } |
| 639 | release_region(iobase->start, ITE_887x_IOSIZE); |
| 640 | iobase = NULL; |
| 641 | } |
| 642 | i++; |
| 643 | } |
| 644 | |
| 645 | if (!inta_addr[i]) { |
| 646 | printk(KERN_ERR "ite887x: could not find iobase\n"); |
| 647 | return -ENODEV; |
| 648 | } |
| 649 | |
| 650 | /* start of undocumented type checking (see parport_pc.c) */ |
| 651 | type = inb(iobase->start + 0x18) & 0x0f; |
| 652 | |
| 653 | switch (type) { |
| 654 | case 0x2: /* ITE8871 (1P) */ |
| 655 | case 0xa: /* ITE8875 (1P) */ |
| 656 | ret = 0; |
| 657 | break; |
| 658 | case 0xe: /* ITE8872 (2S1P) */ |
| 659 | ret = 2; |
| 660 | break; |
| 661 | case 0x6: /* ITE8873 (1S) */ |
| 662 | ret = 1; |
| 663 | break; |
| 664 | case 0x8: /* ITE8874 (2S) */ |
| 665 | ret = 2; |
| 666 | break; |
| 667 | default: |
| 668 | moan_device("Unknown ITE887x", dev); |
| 669 | ret = -ENODEV; |
| 670 | } |
| 671 | |
| 672 | /* configure all serial ports */ |
| 673 | for (i = 0; i < ret; i++) { |
| 674 | /* read the I/O port from the device */ |
| 675 | pci_read_config_dword(dev, ITE_887x_PS0BAR + (0x4 * (i + 1)), |
| 676 | &ioport); |
| 677 | ioport &= 0x0000FF00; /* the actual base address */ |
| 678 | pci_write_config_dword(dev, ITE_887x_POSIO0 + (0x4 * (i + 1)), |
| 679 | ITE_887x_POSIO_ENABLE | ITE_887x_POSIO_SPEED | |
| 680 | ITE_887x_POSIO_IOSIZE_8 | ioport); |
| 681 | |
| 682 | /* write the ioport to the UARTBAR */ |
| 683 | pci_read_config_dword(dev, ITE_887x_UARTBAR, &uartbar); |
| 684 | uartbar &= ~(0xffff << (16 * i)); /* clear half the reg */ |
| 685 | uartbar |= (ioport << (16 * i)); /* set the ioport */ |
| 686 | pci_write_config_dword(dev, ITE_887x_UARTBAR, uartbar); |
| 687 | |
| 688 | /* get current config */ |
| 689 | pci_read_config_dword(dev, ITE_887x_MISCR, &miscr); |
| 690 | /* disable interrupts (UARTx_Routing[3:0]) */ |
| 691 | miscr &= ~(0xf << (12 - 4 * i)); |
| 692 | /* activate the UART (UARTx_En) */ |
| 693 | miscr |= 1 << (23 - i); |
| 694 | /* write new config with activated UART */ |
| 695 | pci_write_config_dword(dev, ITE_887x_MISCR, miscr); |
| 696 | } |
| 697 | |
| 698 | if (ret <= 0) { |
| 699 | /* the device has no UARTs if we get here */ |
| 700 | release_region(iobase->start, ITE_887x_IOSIZE); |
| 701 | } |
| 702 | |
| 703 | return ret; |
| 704 | } |
| 705 | |
| 706 | static void __devexit pci_ite887x_exit(struct pci_dev *dev) |
| 707 | { |
| 708 | u32 ioport; |
| 709 | /* the ioport is bit 0-15 in POSIO0R */ |
| 710 | pci_read_config_dword(dev, ITE_887x_POSIO0, &ioport); |
| 711 | ioport &= 0xffff; |
| 712 | release_region(ioport, ITE_887x_IOSIZE); |
| 713 | } |
| 714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | static int |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 716 | pci_default_setup(struct serial_private *priv, struct pciserial_board *board, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | struct uart_port *port, int idx) |
| 718 | { |
| 719 | unsigned int bar, offset = board->first_offset, maxnr; |
| 720 | |
| 721 | bar = FL_GET_BASE(board->flags); |
| 722 | if (board->flags & FL_BASE_BARS) |
| 723 | bar += idx; |
| 724 | else |
| 725 | offset += idx * board->uart_offset; |
| 726 | |
Greg Kroah-Hartman | 2427ddd | 2006-06-12 17:07:52 -0700 | [diff] [blame] | 727 | maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >> |
| 728 | (board->reg_shift + 3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | |
| 730 | if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) |
| 731 | return 1; |
| 732 | |
Russell King | 70db3d9 | 2005-07-27 11:34:27 +0100 | [diff] [blame] | 733 | return setup_port(priv, port, bar, offset, board->reg_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | } |
| 735 | |
| 736 | /* This should be in linux/pci_ids.h */ |
| 737 | #define PCI_VENDOR_ID_SBSMODULARIO 0x124B |
| 738 | #define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B |
| 739 | #define PCI_DEVICE_ID_OCTPRO 0x0001 |
| 740 | #define PCI_SUBDEVICE_ID_OCTPRO232 0x0108 |
| 741 | #define PCI_SUBDEVICE_ID_OCTPRO422 0x0208 |
| 742 | #define PCI_SUBDEVICE_ID_POCTAL232 0x0308 |
| 743 | #define PCI_SUBDEVICE_ID_POCTAL422 0x0408 |
| 744 | |
| 745 | /* |
| 746 | * Master list of serial port init/setup/exit quirks. |
| 747 | * This does not describe the general nature of the port. |
| 748 | * (ie, baud base, number and location of ports, etc) |
| 749 | * |
| 750 | * This list is ordered alphabetically by vendor then device. |
| 751 | * Specific entries must come before more generic entries. |
| 752 | */ |
| 753 | static struct pci_serial_quirk pci_serial_quirks[] = { |
| 754 | /* |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 755 | * AFAVLAB cards - these may be called via parport_serial |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | * It is not clear whether this applies to all products. |
| 757 | */ |
| 758 | { |
| 759 | .vendor = PCI_VENDOR_ID_AFAVLAB, |
| 760 | .device = PCI_ANY_ID, |
| 761 | .subvendor = PCI_ANY_ID, |
| 762 | .subdevice = PCI_ANY_ID, |
| 763 | .setup = afavlab_setup, |
| 764 | }, |
| 765 | /* |
| 766 | * HP Diva |
| 767 | */ |
| 768 | { |
| 769 | .vendor = PCI_VENDOR_ID_HP, |
| 770 | .device = PCI_DEVICE_ID_HP_DIVA, |
| 771 | .subvendor = PCI_ANY_ID, |
| 772 | .subdevice = PCI_ANY_ID, |
| 773 | .init = pci_hp_diva_init, |
| 774 | .setup = pci_hp_diva_setup, |
| 775 | }, |
| 776 | /* |
| 777 | * Intel |
| 778 | */ |
| 779 | { |
| 780 | .vendor = PCI_VENDOR_ID_INTEL, |
| 781 | .device = PCI_DEVICE_ID_INTEL_80960_RP, |
| 782 | .subvendor = 0xe4bf, |
| 783 | .subdevice = PCI_ANY_ID, |
| 784 | .init = pci_inteli960ni_init, |
| 785 | .setup = pci_default_setup, |
| 786 | }, |
| 787 | /* |
Niels de Vos | 84f8c6f | 2007-08-22 14:01:14 -0700 | [diff] [blame^] | 788 | * ITE |
| 789 | */ |
| 790 | { |
| 791 | .vendor = PCI_VENDOR_ID_ITE, |
| 792 | .device = PCI_DEVICE_ID_ITE_8872, |
| 793 | .subvendor = PCI_ANY_ID, |
| 794 | .subdevice = PCI_ANY_ID, |
| 795 | .init = pci_ite887x_init, |
| 796 | .setup = pci_default_setup, |
| 797 | .exit = __devexit_p(pci_ite887x_exit), |
| 798 | }, |
| 799 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | * Panacom |
| 801 | */ |
| 802 | { |
| 803 | .vendor = PCI_VENDOR_ID_PANACOM, |
| 804 | .device = PCI_DEVICE_ID_PANACOM_QUADMODEM, |
| 805 | .subvendor = PCI_ANY_ID, |
| 806 | .subdevice = PCI_ANY_ID, |
| 807 | .init = pci_plx9050_init, |
| 808 | .setup = pci_default_setup, |
| 809 | .exit = __devexit_p(pci_plx9050_exit), |
| 810 | }, |
| 811 | { |
| 812 | .vendor = PCI_VENDOR_ID_PANACOM, |
| 813 | .device = PCI_DEVICE_ID_PANACOM_DUALMODEM, |
| 814 | .subvendor = PCI_ANY_ID, |
| 815 | .subdevice = PCI_ANY_ID, |
| 816 | .init = pci_plx9050_init, |
| 817 | .setup = pci_default_setup, |
| 818 | .exit = __devexit_p(pci_plx9050_exit), |
| 819 | }, |
| 820 | /* |
| 821 | * PLX |
| 822 | */ |
| 823 | { |
| 824 | .vendor = PCI_VENDOR_ID_PLX, |
Thomas Hoehn | 4821200 | 2007-02-10 01:46:05 -0800 | [diff] [blame] | 825 | .device = PCI_DEVICE_ID_PLX_9030, |
| 826 | .subvendor = PCI_SUBVENDOR_ID_PERLE, |
| 827 | .subdevice = PCI_ANY_ID, |
| 828 | .setup = pci_default_setup, |
| 829 | }, |
| 830 | { |
| 831 | .vendor = PCI_VENDOR_ID_PLX, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | .device = PCI_DEVICE_ID_PLX_9050, |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 833 | .subvendor = PCI_SUBVENDOR_ID_EXSYS, |
| 834 | .subdevice = PCI_SUBDEVICE_ID_EXSYS_4055, |
| 835 | .init = pci_plx9050_init, |
| 836 | .setup = pci_default_setup, |
| 837 | .exit = __devexit_p(pci_plx9050_exit), |
| 838 | }, |
| 839 | { |
| 840 | .vendor = PCI_VENDOR_ID_PLX, |
| 841 | .device = PCI_DEVICE_ID_PLX_9050, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | .subvendor = PCI_SUBVENDOR_ID_KEYSPAN, |
| 843 | .subdevice = PCI_SUBDEVICE_ID_KEYSPAN_SX2, |
| 844 | .init = pci_plx9050_init, |
| 845 | .setup = pci_default_setup, |
| 846 | .exit = __devexit_p(pci_plx9050_exit), |
| 847 | }, |
| 848 | { |
| 849 | .vendor = PCI_VENDOR_ID_PLX, |
| 850 | .device = PCI_DEVICE_ID_PLX_ROMULUS, |
| 851 | .subvendor = PCI_VENDOR_ID_PLX, |
| 852 | .subdevice = PCI_DEVICE_ID_PLX_ROMULUS, |
| 853 | .init = pci_plx9050_init, |
| 854 | .setup = pci_default_setup, |
| 855 | .exit = __devexit_p(pci_plx9050_exit), |
| 856 | }, |
| 857 | /* |
| 858 | * SBS Technologies, Inc., PMC-OCTALPRO 232 |
| 859 | */ |
| 860 | { |
| 861 | .vendor = PCI_VENDOR_ID_SBSMODULARIO, |
| 862 | .device = PCI_DEVICE_ID_OCTPRO, |
| 863 | .subvendor = PCI_SUBVENDOR_ID_SBSMODULARIO, |
| 864 | .subdevice = PCI_SUBDEVICE_ID_OCTPRO232, |
| 865 | .init = sbs_init, |
| 866 | .setup = sbs_setup, |
| 867 | .exit = __devexit_p(sbs_exit), |
| 868 | }, |
| 869 | /* |
| 870 | * SBS Technologies, Inc., PMC-OCTALPRO 422 |
| 871 | */ |
| 872 | { |
| 873 | .vendor = PCI_VENDOR_ID_SBSMODULARIO, |
| 874 | .device = PCI_DEVICE_ID_OCTPRO, |
| 875 | .subvendor = PCI_SUBVENDOR_ID_SBSMODULARIO, |
| 876 | .subdevice = PCI_SUBDEVICE_ID_OCTPRO422, |
| 877 | .init = sbs_init, |
| 878 | .setup = sbs_setup, |
| 879 | .exit = __devexit_p(sbs_exit), |
| 880 | }, |
| 881 | /* |
| 882 | * SBS Technologies, Inc., P-Octal 232 |
| 883 | */ |
| 884 | { |
| 885 | .vendor = PCI_VENDOR_ID_SBSMODULARIO, |
| 886 | .device = PCI_DEVICE_ID_OCTPRO, |
| 887 | .subvendor = PCI_SUBVENDOR_ID_SBSMODULARIO, |
| 888 | .subdevice = PCI_SUBDEVICE_ID_POCTAL232, |
| 889 | .init = sbs_init, |
| 890 | .setup = sbs_setup, |
| 891 | .exit = __devexit_p(sbs_exit), |
| 892 | }, |
| 893 | /* |
| 894 | * SBS Technologies, Inc., P-Octal 422 |
| 895 | */ |
| 896 | { |
| 897 | .vendor = PCI_VENDOR_ID_SBSMODULARIO, |
| 898 | .device = PCI_DEVICE_ID_OCTPRO, |
| 899 | .subvendor = PCI_SUBVENDOR_ID_SBSMODULARIO, |
| 900 | .subdevice = PCI_SUBDEVICE_ID_POCTAL422, |
| 901 | .init = sbs_init, |
| 902 | .setup = sbs_setup, |
| 903 | .exit = __devexit_p(sbs_exit), |
| 904 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | /* |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 906 | * SIIG cards - these may be called via parport_serial |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | */ |
| 908 | { |
| 909 | .vendor = PCI_VENDOR_ID_SIIG, |
Russell King | 67d74b8 | 2005-07-27 11:33:03 +0100 | [diff] [blame] | 910 | .device = PCI_ANY_ID, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 911 | .subvendor = PCI_ANY_ID, |
| 912 | .subdevice = PCI_ANY_ID, |
Russell King | 67d74b8 | 2005-07-27 11:33:03 +0100 | [diff] [blame] | 913 | .init = pci_siig_init, |
Andrey Panin | 3ec9c59 | 2006-02-02 20:15:09 +0000 | [diff] [blame] | 914 | .setup = pci_siig_setup, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | }, |
| 916 | /* |
| 917 | * Titan cards |
| 918 | */ |
| 919 | { |
| 920 | .vendor = PCI_VENDOR_ID_TITAN, |
| 921 | .device = PCI_DEVICE_ID_TITAN_400L, |
| 922 | .subvendor = PCI_ANY_ID, |
| 923 | .subdevice = PCI_ANY_ID, |
| 924 | .setup = titan_400l_800l_setup, |
| 925 | }, |
| 926 | { |
| 927 | .vendor = PCI_VENDOR_ID_TITAN, |
| 928 | .device = PCI_DEVICE_ID_TITAN_800L, |
| 929 | .subvendor = PCI_ANY_ID, |
| 930 | .subdevice = PCI_ANY_ID, |
| 931 | .setup = titan_400l_800l_setup, |
| 932 | }, |
| 933 | /* |
| 934 | * Timedia cards |
| 935 | */ |
| 936 | { |
| 937 | .vendor = PCI_VENDOR_ID_TIMEDIA, |
| 938 | .device = PCI_DEVICE_ID_TIMEDIA_1889, |
| 939 | .subvendor = PCI_VENDOR_ID_TIMEDIA, |
| 940 | .subdevice = PCI_ANY_ID, |
| 941 | .init = pci_timedia_init, |
| 942 | .setup = pci_timedia_setup, |
| 943 | }, |
| 944 | { |
| 945 | .vendor = PCI_VENDOR_ID_TIMEDIA, |
| 946 | .device = PCI_ANY_ID, |
| 947 | .subvendor = PCI_ANY_ID, |
| 948 | .subdevice = PCI_ANY_ID, |
| 949 | .setup = pci_timedia_setup, |
| 950 | }, |
| 951 | /* |
| 952 | * Xircom cards |
| 953 | */ |
| 954 | { |
| 955 | .vendor = PCI_VENDOR_ID_XIRCOM, |
| 956 | .device = PCI_DEVICE_ID_XIRCOM_X3201_MDM, |
| 957 | .subvendor = PCI_ANY_ID, |
| 958 | .subdevice = PCI_ANY_ID, |
| 959 | .init = pci_xircom_init, |
| 960 | .setup = pci_default_setup, |
| 961 | }, |
| 962 | /* |
Russell King | 61a116e | 2006-07-03 15:22:35 +0100 | [diff] [blame] | 963 | * Netmos cards - these may be called via parport_serial |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 964 | */ |
| 965 | { |
| 966 | .vendor = PCI_VENDOR_ID_NETMOS, |
| 967 | .device = PCI_ANY_ID, |
| 968 | .subvendor = PCI_ANY_ID, |
| 969 | .subdevice = PCI_ANY_ID, |
| 970 | .init = pci_netmos_init, |
| 971 | .setup = pci_default_setup, |
| 972 | }, |
| 973 | /* |
| 974 | * Default "match everything" terminator entry |
| 975 | */ |
| 976 | { |
| 977 | .vendor = PCI_ANY_ID, |
| 978 | .device = PCI_ANY_ID, |
| 979 | .subvendor = PCI_ANY_ID, |
| 980 | .subdevice = PCI_ANY_ID, |
| 981 | .setup = pci_default_setup, |
| 982 | } |
| 983 | }; |
| 984 | |
| 985 | static inline int quirk_id_matches(u32 quirk_id, u32 dev_id) |
| 986 | { |
| 987 | return quirk_id == PCI_ANY_ID || quirk_id == dev_id; |
| 988 | } |
| 989 | |
| 990 | static struct pci_serial_quirk *find_quirk(struct pci_dev *dev) |
| 991 | { |
| 992 | struct pci_serial_quirk *quirk; |
| 993 | |
| 994 | for (quirk = pci_serial_quirks; ; quirk++) |
| 995 | if (quirk_id_matches(quirk->vendor, dev->vendor) && |
| 996 | quirk_id_matches(quirk->device, dev->device) && |
| 997 | quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) && |
| 998 | quirk_id_matches(quirk->subdevice, dev->subsystem_device)) |
| 999 | break; |
| 1000 | return quirk; |
| 1001 | } |
| 1002 | |
Andrew Morton | dd68e88 | 2006-01-05 10:55:26 +0000 | [diff] [blame] | 1003 | static inline int get_pci_irq(struct pci_dev *dev, |
| 1004 | struct pciserial_board *board) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1005 | { |
| 1006 | if (board->flags & FL_NOIRQ) |
| 1007 | return 0; |
| 1008 | else |
| 1009 | return dev->irq; |
| 1010 | } |
| 1011 | |
| 1012 | /* |
| 1013 | * This is the configuration table for all of the PCI serial boards |
| 1014 | * which we support. It is directly indexed by the pci_board_num_t enum |
| 1015 | * value, which is encoded in the pci_device_id PCI probe table's |
| 1016 | * driver_data member. |
| 1017 | * |
| 1018 | * The makeup of these names are: |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1019 | * pbn_bn{_bt}_n_baud{_offsetinhex} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | * |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1021 | * bn = PCI BAR number |
| 1022 | * bt = Index using PCI BARs |
| 1023 | * n = number of serial ports |
| 1024 | * baud = baud rate |
| 1025 | * offsetinhex = offset for each sequential port (in hex) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | * |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1027 | * This table is sorted by (in order): bn, bt, baud, offsetindex, n. |
Russell King | f1690f3 | 2005-05-06 10:19:09 +0100 | [diff] [blame] | 1028 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1029 | * Please note: in theory if n = 1, _bt infix should make no difference. |
| 1030 | * ie, pbn_b0_1_115200 is the same as pbn_b0_bt_1_115200 |
| 1031 | */ |
| 1032 | enum pci_board_num_t { |
| 1033 | pbn_default = 0, |
| 1034 | |
| 1035 | pbn_b0_1_115200, |
| 1036 | pbn_b0_2_115200, |
| 1037 | pbn_b0_4_115200, |
| 1038 | pbn_b0_5_115200, |
| 1039 | |
| 1040 | pbn_b0_1_921600, |
| 1041 | pbn_b0_2_921600, |
| 1042 | pbn_b0_4_921600, |
| 1043 | |
David Ranson | db1de15 | 2005-07-27 11:43:55 -0700 | [diff] [blame] | 1044 | pbn_b0_2_1130000, |
| 1045 | |
Andrey Panin | fbc0dc0 | 2005-07-18 11:38:09 +0100 | [diff] [blame] | 1046 | pbn_b0_4_1152000, |
| 1047 | |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1048 | pbn_b0_2_1843200, |
| 1049 | pbn_b0_4_1843200, |
| 1050 | |
| 1051 | pbn_b0_2_1843200_200, |
| 1052 | pbn_b0_4_1843200_200, |
| 1053 | pbn_b0_8_1843200_200, |
| 1054 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1055 | pbn_b0_bt_1_115200, |
| 1056 | pbn_b0_bt_2_115200, |
| 1057 | pbn_b0_bt_8_115200, |
| 1058 | |
| 1059 | pbn_b0_bt_1_460800, |
| 1060 | pbn_b0_bt_2_460800, |
| 1061 | pbn_b0_bt_4_460800, |
| 1062 | |
| 1063 | pbn_b0_bt_1_921600, |
| 1064 | pbn_b0_bt_2_921600, |
| 1065 | pbn_b0_bt_4_921600, |
| 1066 | pbn_b0_bt_8_921600, |
| 1067 | |
| 1068 | pbn_b1_1_115200, |
| 1069 | pbn_b1_2_115200, |
| 1070 | pbn_b1_4_115200, |
| 1071 | pbn_b1_8_115200, |
| 1072 | |
| 1073 | pbn_b1_1_921600, |
| 1074 | pbn_b1_2_921600, |
| 1075 | pbn_b1_4_921600, |
| 1076 | pbn_b1_8_921600, |
| 1077 | |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1078 | pbn_b1_2_1250000, |
| 1079 | |
Niels de Vos | 84f8c6f | 2007-08-22 14:01:14 -0700 | [diff] [blame^] | 1080 | pbn_b1_bt_1_115200, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1081 | pbn_b1_bt_2_921600, |
| 1082 | |
| 1083 | pbn_b1_1_1382400, |
| 1084 | pbn_b1_2_1382400, |
| 1085 | pbn_b1_4_1382400, |
| 1086 | pbn_b1_8_1382400, |
| 1087 | |
| 1088 | pbn_b2_1_115200, |
Peter Horton | 737c175 | 2006-08-26 09:07:36 +0100 | [diff] [blame] | 1089 | pbn_b2_2_115200, |
Matthias Fuchs | a9cccd3 | 2007-02-10 01:46:05 -0800 | [diff] [blame] | 1090 | pbn_b2_4_115200, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1091 | pbn_b2_8_115200, |
| 1092 | |
| 1093 | pbn_b2_1_460800, |
| 1094 | pbn_b2_4_460800, |
| 1095 | pbn_b2_8_460800, |
| 1096 | pbn_b2_16_460800, |
| 1097 | |
| 1098 | pbn_b2_1_921600, |
| 1099 | pbn_b2_4_921600, |
| 1100 | pbn_b2_8_921600, |
| 1101 | |
| 1102 | pbn_b2_bt_1_115200, |
| 1103 | pbn_b2_bt_2_115200, |
| 1104 | pbn_b2_bt_4_115200, |
| 1105 | |
| 1106 | pbn_b2_bt_2_921600, |
| 1107 | pbn_b2_bt_4_921600, |
| 1108 | |
Alon Bar-Lev | d9004eb | 2006-01-18 11:47:33 +0000 | [diff] [blame] | 1109 | pbn_b3_2_115200, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1110 | pbn_b3_4_115200, |
| 1111 | pbn_b3_8_115200, |
| 1112 | |
| 1113 | /* |
| 1114 | * Board-specific versions. |
| 1115 | */ |
| 1116 | pbn_panacom, |
| 1117 | pbn_panacom2, |
| 1118 | pbn_panacom4, |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 1119 | pbn_exsys_4055, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | pbn_plx_romulus, |
| 1121 | pbn_oxsemi, |
| 1122 | pbn_intel_i960, |
| 1123 | pbn_sgi_ioc3, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1124 | pbn_computone_4, |
| 1125 | pbn_computone_6, |
| 1126 | pbn_computone_8, |
| 1127 | pbn_sbsxrsio, |
| 1128 | pbn_exar_XR17C152, |
| 1129 | pbn_exar_XR17C154, |
| 1130 | pbn_exar_XR17C158, |
| 1131 | }; |
| 1132 | |
| 1133 | /* |
| 1134 | * uart_offset - the space between channels |
| 1135 | * reg_shift - describes how the UART registers are mapped |
| 1136 | * to PCI memory by the card. |
| 1137 | * For example IER register on SBS, Inc. PMC-OctPro is located at |
| 1138 | * offset 0x10 from the UART base, while UART_IER is defined as 1 |
| 1139 | * in include/linux/serial_reg.h, |
| 1140 | * see first lines of serial_in() and serial_out() in 8250.c |
| 1141 | */ |
| 1142 | |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1143 | static struct pciserial_board pci_boards[] __devinitdata = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1144 | [pbn_default] = { |
| 1145 | .flags = FL_BASE0, |
| 1146 | .num_ports = 1, |
| 1147 | .base_baud = 115200, |
| 1148 | .uart_offset = 8, |
| 1149 | }, |
| 1150 | [pbn_b0_1_115200] = { |
| 1151 | .flags = FL_BASE0, |
| 1152 | .num_ports = 1, |
| 1153 | .base_baud = 115200, |
| 1154 | .uart_offset = 8, |
| 1155 | }, |
| 1156 | [pbn_b0_2_115200] = { |
| 1157 | .flags = FL_BASE0, |
| 1158 | .num_ports = 2, |
| 1159 | .base_baud = 115200, |
| 1160 | .uart_offset = 8, |
| 1161 | }, |
| 1162 | [pbn_b0_4_115200] = { |
| 1163 | .flags = FL_BASE0, |
| 1164 | .num_ports = 4, |
| 1165 | .base_baud = 115200, |
| 1166 | .uart_offset = 8, |
| 1167 | }, |
| 1168 | [pbn_b0_5_115200] = { |
| 1169 | .flags = FL_BASE0, |
| 1170 | .num_ports = 5, |
| 1171 | .base_baud = 115200, |
| 1172 | .uart_offset = 8, |
| 1173 | }, |
| 1174 | |
| 1175 | [pbn_b0_1_921600] = { |
| 1176 | .flags = FL_BASE0, |
| 1177 | .num_ports = 1, |
| 1178 | .base_baud = 921600, |
| 1179 | .uart_offset = 8, |
| 1180 | }, |
| 1181 | [pbn_b0_2_921600] = { |
| 1182 | .flags = FL_BASE0, |
| 1183 | .num_ports = 2, |
| 1184 | .base_baud = 921600, |
| 1185 | .uart_offset = 8, |
| 1186 | }, |
| 1187 | [pbn_b0_4_921600] = { |
| 1188 | .flags = FL_BASE0, |
| 1189 | .num_ports = 4, |
| 1190 | .base_baud = 921600, |
| 1191 | .uart_offset = 8, |
| 1192 | }, |
David Ranson | db1de15 | 2005-07-27 11:43:55 -0700 | [diff] [blame] | 1193 | |
| 1194 | [pbn_b0_2_1130000] = { |
| 1195 | .flags = FL_BASE0, |
| 1196 | .num_ports = 2, |
| 1197 | .base_baud = 1130000, |
| 1198 | .uart_offset = 8, |
| 1199 | }, |
| 1200 | |
Andrey Panin | fbc0dc0 | 2005-07-18 11:38:09 +0100 | [diff] [blame] | 1201 | [pbn_b0_4_1152000] = { |
| 1202 | .flags = FL_BASE0, |
| 1203 | .num_ports = 4, |
| 1204 | .base_baud = 1152000, |
| 1205 | .uart_offset = 8, |
| 1206 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1208 | [pbn_b0_2_1843200] = { |
| 1209 | .flags = FL_BASE0, |
| 1210 | .num_ports = 2, |
| 1211 | .base_baud = 1843200, |
| 1212 | .uart_offset = 8, |
| 1213 | }, |
| 1214 | [pbn_b0_4_1843200] = { |
| 1215 | .flags = FL_BASE0, |
| 1216 | .num_ports = 4, |
| 1217 | .base_baud = 1843200, |
| 1218 | .uart_offset = 8, |
| 1219 | }, |
| 1220 | |
| 1221 | [pbn_b0_2_1843200_200] = { |
| 1222 | .flags = FL_BASE0, |
| 1223 | .num_ports = 2, |
| 1224 | .base_baud = 1843200, |
| 1225 | .uart_offset = 0x200, |
| 1226 | }, |
| 1227 | [pbn_b0_4_1843200_200] = { |
| 1228 | .flags = FL_BASE0, |
| 1229 | .num_ports = 4, |
| 1230 | .base_baud = 1843200, |
| 1231 | .uart_offset = 0x200, |
| 1232 | }, |
| 1233 | [pbn_b0_8_1843200_200] = { |
| 1234 | .flags = FL_BASE0, |
| 1235 | .num_ports = 8, |
| 1236 | .base_baud = 1843200, |
| 1237 | .uart_offset = 0x200, |
| 1238 | }, |
| 1239 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1240 | [pbn_b0_bt_1_115200] = { |
| 1241 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1242 | .num_ports = 1, |
| 1243 | .base_baud = 115200, |
| 1244 | .uart_offset = 8, |
| 1245 | }, |
| 1246 | [pbn_b0_bt_2_115200] = { |
| 1247 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1248 | .num_ports = 2, |
| 1249 | .base_baud = 115200, |
| 1250 | .uart_offset = 8, |
| 1251 | }, |
| 1252 | [pbn_b0_bt_8_115200] = { |
| 1253 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1254 | .num_ports = 8, |
| 1255 | .base_baud = 115200, |
| 1256 | .uart_offset = 8, |
| 1257 | }, |
| 1258 | |
| 1259 | [pbn_b0_bt_1_460800] = { |
| 1260 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1261 | .num_ports = 1, |
| 1262 | .base_baud = 460800, |
| 1263 | .uart_offset = 8, |
| 1264 | }, |
| 1265 | [pbn_b0_bt_2_460800] = { |
| 1266 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1267 | .num_ports = 2, |
| 1268 | .base_baud = 460800, |
| 1269 | .uart_offset = 8, |
| 1270 | }, |
| 1271 | [pbn_b0_bt_4_460800] = { |
| 1272 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1273 | .num_ports = 4, |
| 1274 | .base_baud = 460800, |
| 1275 | .uart_offset = 8, |
| 1276 | }, |
| 1277 | |
| 1278 | [pbn_b0_bt_1_921600] = { |
| 1279 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1280 | .num_ports = 1, |
| 1281 | .base_baud = 921600, |
| 1282 | .uart_offset = 8, |
| 1283 | }, |
| 1284 | [pbn_b0_bt_2_921600] = { |
| 1285 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1286 | .num_ports = 2, |
| 1287 | .base_baud = 921600, |
| 1288 | .uart_offset = 8, |
| 1289 | }, |
| 1290 | [pbn_b0_bt_4_921600] = { |
| 1291 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1292 | .num_ports = 4, |
| 1293 | .base_baud = 921600, |
| 1294 | .uart_offset = 8, |
| 1295 | }, |
| 1296 | [pbn_b0_bt_8_921600] = { |
| 1297 | .flags = FL_BASE0|FL_BASE_BARS, |
| 1298 | .num_ports = 8, |
| 1299 | .base_baud = 921600, |
| 1300 | .uart_offset = 8, |
| 1301 | }, |
| 1302 | |
| 1303 | [pbn_b1_1_115200] = { |
| 1304 | .flags = FL_BASE1, |
| 1305 | .num_ports = 1, |
| 1306 | .base_baud = 115200, |
| 1307 | .uart_offset = 8, |
| 1308 | }, |
| 1309 | [pbn_b1_2_115200] = { |
| 1310 | .flags = FL_BASE1, |
| 1311 | .num_ports = 2, |
| 1312 | .base_baud = 115200, |
| 1313 | .uart_offset = 8, |
| 1314 | }, |
| 1315 | [pbn_b1_4_115200] = { |
| 1316 | .flags = FL_BASE1, |
| 1317 | .num_ports = 4, |
| 1318 | .base_baud = 115200, |
| 1319 | .uart_offset = 8, |
| 1320 | }, |
| 1321 | [pbn_b1_8_115200] = { |
| 1322 | .flags = FL_BASE1, |
| 1323 | .num_ports = 8, |
| 1324 | .base_baud = 115200, |
| 1325 | .uart_offset = 8, |
| 1326 | }, |
| 1327 | |
| 1328 | [pbn_b1_1_921600] = { |
| 1329 | .flags = FL_BASE1, |
| 1330 | .num_ports = 1, |
| 1331 | .base_baud = 921600, |
| 1332 | .uart_offset = 8, |
| 1333 | }, |
| 1334 | [pbn_b1_2_921600] = { |
| 1335 | .flags = FL_BASE1, |
| 1336 | .num_ports = 2, |
| 1337 | .base_baud = 921600, |
| 1338 | .uart_offset = 8, |
| 1339 | }, |
| 1340 | [pbn_b1_4_921600] = { |
| 1341 | .flags = FL_BASE1, |
| 1342 | .num_ports = 4, |
| 1343 | .base_baud = 921600, |
| 1344 | .uart_offset = 8, |
| 1345 | }, |
| 1346 | [pbn_b1_8_921600] = { |
| 1347 | .flags = FL_BASE1, |
| 1348 | .num_ports = 8, |
| 1349 | .base_baud = 921600, |
| 1350 | .uart_offset = 8, |
| 1351 | }, |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 1352 | [pbn_b1_2_1250000] = { |
| 1353 | .flags = FL_BASE1, |
| 1354 | .num_ports = 2, |
| 1355 | .base_baud = 1250000, |
| 1356 | .uart_offset = 8, |
| 1357 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1358 | |
Niels de Vos | 84f8c6f | 2007-08-22 14:01:14 -0700 | [diff] [blame^] | 1359 | [pbn_b1_bt_1_115200] = { |
| 1360 | .flags = FL_BASE1|FL_BASE_BARS, |
| 1361 | .num_ports = 1, |
| 1362 | .base_baud = 115200, |
| 1363 | .uart_offset = 8, |
| 1364 | }, |
| 1365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | [pbn_b1_bt_2_921600] = { |
| 1367 | .flags = FL_BASE1|FL_BASE_BARS, |
| 1368 | .num_ports = 2, |
| 1369 | .base_baud = 921600, |
| 1370 | .uart_offset = 8, |
| 1371 | }, |
| 1372 | |
| 1373 | [pbn_b1_1_1382400] = { |
| 1374 | .flags = FL_BASE1, |
| 1375 | .num_ports = 1, |
| 1376 | .base_baud = 1382400, |
| 1377 | .uart_offset = 8, |
| 1378 | }, |
| 1379 | [pbn_b1_2_1382400] = { |
| 1380 | .flags = FL_BASE1, |
| 1381 | .num_ports = 2, |
| 1382 | .base_baud = 1382400, |
| 1383 | .uart_offset = 8, |
| 1384 | }, |
| 1385 | [pbn_b1_4_1382400] = { |
| 1386 | .flags = FL_BASE1, |
| 1387 | .num_ports = 4, |
| 1388 | .base_baud = 1382400, |
| 1389 | .uart_offset = 8, |
| 1390 | }, |
| 1391 | [pbn_b1_8_1382400] = { |
| 1392 | .flags = FL_BASE1, |
| 1393 | .num_ports = 8, |
| 1394 | .base_baud = 1382400, |
| 1395 | .uart_offset = 8, |
| 1396 | }, |
| 1397 | |
| 1398 | [pbn_b2_1_115200] = { |
| 1399 | .flags = FL_BASE2, |
| 1400 | .num_ports = 1, |
| 1401 | .base_baud = 115200, |
| 1402 | .uart_offset = 8, |
| 1403 | }, |
Peter Horton | 737c175 | 2006-08-26 09:07:36 +0100 | [diff] [blame] | 1404 | [pbn_b2_2_115200] = { |
| 1405 | .flags = FL_BASE2, |
| 1406 | .num_ports = 2, |
| 1407 | .base_baud = 115200, |
| 1408 | .uart_offset = 8, |
| 1409 | }, |
Matthias Fuchs | a9cccd3 | 2007-02-10 01:46:05 -0800 | [diff] [blame] | 1410 | [pbn_b2_4_115200] = { |
| 1411 | .flags = FL_BASE2, |
| 1412 | .num_ports = 4, |
| 1413 | .base_baud = 115200, |
| 1414 | .uart_offset = 8, |
| 1415 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1416 | [pbn_b2_8_115200] = { |
| 1417 | .flags = FL_BASE2, |
| 1418 | .num_ports = 8, |
| 1419 | .base_baud = 115200, |
| 1420 | .uart_offset = 8, |
| 1421 | }, |
| 1422 | |
| 1423 | [pbn_b2_1_460800] = { |
| 1424 | .flags = FL_BASE2, |
| 1425 | .num_ports = 1, |
| 1426 | .base_baud = 460800, |
| 1427 | .uart_offset = 8, |
| 1428 | }, |
| 1429 | [pbn_b2_4_460800] = { |
| 1430 | .flags = FL_BASE2, |
| 1431 | .num_ports = 4, |
| 1432 | .base_baud = 460800, |
| 1433 | .uart_offset = 8, |
| 1434 | }, |
| 1435 | [pbn_b2_8_460800] = { |
| 1436 | .flags = FL_BASE2, |
| 1437 | .num_ports = 8, |
| 1438 | .base_baud = 460800, |
| 1439 | .uart_offset = 8, |
| 1440 | }, |
| 1441 | [pbn_b2_16_460800] = { |
| 1442 | .flags = FL_BASE2, |
| 1443 | .num_ports = 16, |
| 1444 | .base_baud = 460800, |
| 1445 | .uart_offset = 8, |
| 1446 | }, |
| 1447 | |
| 1448 | [pbn_b2_1_921600] = { |
| 1449 | .flags = FL_BASE2, |
| 1450 | .num_ports = 1, |
| 1451 | .base_baud = 921600, |
| 1452 | .uart_offset = 8, |
| 1453 | }, |
| 1454 | [pbn_b2_4_921600] = { |
| 1455 | .flags = FL_BASE2, |
| 1456 | .num_ports = 4, |
| 1457 | .base_baud = 921600, |
| 1458 | .uart_offset = 8, |
| 1459 | }, |
| 1460 | [pbn_b2_8_921600] = { |
| 1461 | .flags = FL_BASE2, |
| 1462 | .num_ports = 8, |
| 1463 | .base_baud = 921600, |
| 1464 | .uart_offset = 8, |
| 1465 | }, |
| 1466 | |
| 1467 | [pbn_b2_bt_1_115200] = { |
| 1468 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1469 | .num_ports = 1, |
| 1470 | .base_baud = 115200, |
| 1471 | .uart_offset = 8, |
| 1472 | }, |
| 1473 | [pbn_b2_bt_2_115200] = { |
| 1474 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1475 | .num_ports = 2, |
| 1476 | .base_baud = 115200, |
| 1477 | .uart_offset = 8, |
| 1478 | }, |
| 1479 | [pbn_b2_bt_4_115200] = { |
| 1480 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1481 | .num_ports = 4, |
| 1482 | .base_baud = 115200, |
| 1483 | .uart_offset = 8, |
| 1484 | }, |
| 1485 | |
| 1486 | [pbn_b2_bt_2_921600] = { |
| 1487 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1488 | .num_ports = 2, |
| 1489 | .base_baud = 921600, |
| 1490 | .uart_offset = 8, |
| 1491 | }, |
| 1492 | [pbn_b2_bt_4_921600] = { |
| 1493 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1494 | .num_ports = 4, |
| 1495 | .base_baud = 921600, |
| 1496 | .uart_offset = 8, |
| 1497 | }, |
| 1498 | |
Alon Bar-Lev | d9004eb | 2006-01-18 11:47:33 +0000 | [diff] [blame] | 1499 | [pbn_b3_2_115200] = { |
| 1500 | .flags = FL_BASE3, |
| 1501 | .num_ports = 2, |
| 1502 | .base_baud = 115200, |
| 1503 | .uart_offset = 8, |
| 1504 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1505 | [pbn_b3_4_115200] = { |
| 1506 | .flags = FL_BASE3, |
| 1507 | .num_ports = 4, |
| 1508 | .base_baud = 115200, |
| 1509 | .uart_offset = 8, |
| 1510 | }, |
| 1511 | [pbn_b3_8_115200] = { |
| 1512 | .flags = FL_BASE3, |
| 1513 | .num_ports = 8, |
| 1514 | .base_baud = 115200, |
| 1515 | .uart_offset = 8, |
| 1516 | }, |
| 1517 | |
| 1518 | /* |
| 1519 | * Entries following this are board-specific. |
| 1520 | */ |
| 1521 | |
| 1522 | /* |
| 1523 | * Panacom - IOMEM |
| 1524 | */ |
| 1525 | [pbn_panacom] = { |
| 1526 | .flags = FL_BASE2, |
| 1527 | .num_ports = 2, |
| 1528 | .base_baud = 921600, |
| 1529 | .uart_offset = 0x400, |
| 1530 | .reg_shift = 7, |
| 1531 | }, |
| 1532 | [pbn_panacom2] = { |
| 1533 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1534 | .num_ports = 2, |
| 1535 | .base_baud = 921600, |
| 1536 | .uart_offset = 0x400, |
| 1537 | .reg_shift = 7, |
| 1538 | }, |
| 1539 | [pbn_panacom4] = { |
| 1540 | .flags = FL_BASE2|FL_BASE_BARS, |
| 1541 | .num_ports = 4, |
| 1542 | .base_baud = 921600, |
| 1543 | .uart_offset = 0x400, |
| 1544 | .reg_shift = 7, |
| 1545 | }, |
| 1546 | |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 1547 | [pbn_exsys_4055] = { |
| 1548 | .flags = FL_BASE2, |
| 1549 | .num_ports = 4, |
| 1550 | .base_baud = 115200, |
| 1551 | .uart_offset = 8, |
| 1552 | }, |
| 1553 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1554 | /* I think this entry is broken - the first_offset looks wrong --rmk */ |
| 1555 | [pbn_plx_romulus] = { |
| 1556 | .flags = FL_BASE2, |
| 1557 | .num_ports = 4, |
| 1558 | .base_baud = 921600, |
| 1559 | .uart_offset = 8 << 2, |
| 1560 | .reg_shift = 2, |
| 1561 | .first_offset = 0x03, |
| 1562 | }, |
| 1563 | |
| 1564 | /* |
| 1565 | * This board uses the size of PCI Base region 0 to |
| 1566 | * signal now many ports are available |
| 1567 | */ |
| 1568 | [pbn_oxsemi] = { |
| 1569 | .flags = FL_BASE0|FL_REGION_SZ_CAP, |
| 1570 | .num_ports = 32, |
| 1571 | .base_baud = 115200, |
| 1572 | .uart_offset = 8, |
| 1573 | }, |
| 1574 | |
| 1575 | /* |
| 1576 | * EKF addition for i960 Boards form EKF with serial port. |
| 1577 | * Max 256 ports. |
| 1578 | */ |
| 1579 | [pbn_intel_i960] = { |
| 1580 | .flags = FL_BASE0, |
| 1581 | .num_ports = 32, |
| 1582 | .base_baud = 921600, |
| 1583 | .uart_offset = 8 << 2, |
| 1584 | .reg_shift = 2, |
| 1585 | .first_offset = 0x10000, |
| 1586 | }, |
| 1587 | [pbn_sgi_ioc3] = { |
| 1588 | .flags = FL_BASE0|FL_NOIRQ, |
| 1589 | .num_ports = 1, |
| 1590 | .base_baud = 458333, |
| 1591 | .uart_offset = 8, |
| 1592 | .reg_shift = 0, |
| 1593 | .first_offset = 0x20178, |
| 1594 | }, |
| 1595 | |
| 1596 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1597 | * Computone - uses IOMEM. |
| 1598 | */ |
| 1599 | [pbn_computone_4] = { |
| 1600 | .flags = FL_BASE0, |
| 1601 | .num_ports = 4, |
| 1602 | .base_baud = 921600, |
| 1603 | .uart_offset = 0x40, |
| 1604 | .reg_shift = 2, |
| 1605 | .first_offset = 0x200, |
| 1606 | }, |
| 1607 | [pbn_computone_6] = { |
| 1608 | .flags = FL_BASE0, |
| 1609 | .num_ports = 6, |
| 1610 | .base_baud = 921600, |
| 1611 | .uart_offset = 0x40, |
| 1612 | .reg_shift = 2, |
| 1613 | .first_offset = 0x200, |
| 1614 | }, |
| 1615 | [pbn_computone_8] = { |
| 1616 | .flags = FL_BASE0, |
| 1617 | .num_ports = 8, |
| 1618 | .base_baud = 921600, |
| 1619 | .uart_offset = 0x40, |
| 1620 | .reg_shift = 2, |
| 1621 | .first_offset = 0x200, |
| 1622 | }, |
| 1623 | [pbn_sbsxrsio] = { |
| 1624 | .flags = FL_BASE0, |
| 1625 | .num_ports = 8, |
| 1626 | .base_baud = 460800, |
| 1627 | .uart_offset = 256, |
| 1628 | .reg_shift = 4, |
| 1629 | }, |
| 1630 | /* |
| 1631 | * Exar Corp. XR17C15[248] Dual/Quad/Octal UART |
| 1632 | * Only basic 16550A support. |
| 1633 | * XR17C15[24] are not tested, but they should work. |
| 1634 | */ |
| 1635 | [pbn_exar_XR17C152] = { |
| 1636 | .flags = FL_BASE0, |
| 1637 | .num_ports = 2, |
| 1638 | .base_baud = 921600, |
| 1639 | .uart_offset = 0x200, |
| 1640 | }, |
| 1641 | [pbn_exar_XR17C154] = { |
| 1642 | .flags = FL_BASE0, |
| 1643 | .num_ports = 4, |
| 1644 | .base_baud = 921600, |
| 1645 | .uart_offset = 0x200, |
| 1646 | }, |
| 1647 | [pbn_exar_XR17C158] = { |
| 1648 | .flags = FL_BASE0, |
| 1649 | .num_ports = 8, |
| 1650 | .base_baud = 921600, |
| 1651 | .uart_offset = 0x200, |
| 1652 | }, |
| 1653 | }; |
| 1654 | |
| 1655 | /* |
| 1656 | * Given a complete unknown PCI device, try to use some heuristics to |
| 1657 | * guess what the configuration might be, based on the pitiful PCI |
| 1658 | * serial specs. Returns 0 on success, 1 on failure. |
| 1659 | */ |
| 1660 | static int __devinit |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1661 | serial_pci_guess_board(struct pci_dev *dev, struct pciserial_board *board) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | { |
| 1663 | int num_iomem, num_port, first_port = -1, i; |
| 1664 | |
| 1665 | /* |
| 1666 | * If it is not a communications device or the programming |
| 1667 | * interface is greater than 6, give up. |
| 1668 | * |
| 1669 | * (Should we try to make guesses for multiport serial devices |
| 1670 | * later?) |
| 1671 | */ |
| 1672 | if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) && |
| 1673 | ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) || |
| 1674 | (dev->class & 0xff) > 6) |
| 1675 | return -ENODEV; |
| 1676 | |
| 1677 | num_iomem = num_port = 0; |
| 1678 | for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { |
| 1679 | if (pci_resource_flags(dev, i) & IORESOURCE_IO) { |
| 1680 | num_port++; |
| 1681 | if (first_port == -1) |
| 1682 | first_port = i; |
| 1683 | } |
| 1684 | if (pci_resource_flags(dev, i) & IORESOURCE_MEM) |
| 1685 | num_iomem++; |
| 1686 | } |
| 1687 | |
| 1688 | /* |
| 1689 | * If there is 1 or 0 iomem regions, and exactly one port, |
| 1690 | * use it. We guess the number of ports based on the IO |
| 1691 | * region size. |
| 1692 | */ |
| 1693 | if (num_iomem <= 1 && num_port == 1) { |
| 1694 | board->flags = first_port; |
| 1695 | board->num_ports = pci_resource_len(dev, first_port) / 8; |
| 1696 | return 0; |
| 1697 | } |
| 1698 | |
| 1699 | /* |
| 1700 | * Now guess if we've got a board which indexes by BARs. |
| 1701 | * Each IO BAR should be 8 bytes, and they should follow |
| 1702 | * consecutively. |
| 1703 | */ |
| 1704 | first_port = -1; |
| 1705 | num_port = 0; |
| 1706 | for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { |
| 1707 | if (pci_resource_flags(dev, i) & IORESOURCE_IO && |
| 1708 | pci_resource_len(dev, i) == 8 && |
| 1709 | (first_port == -1 || (first_port + num_port) == i)) { |
| 1710 | num_port++; |
| 1711 | if (first_port == -1) |
| 1712 | first_port = i; |
| 1713 | } |
| 1714 | } |
| 1715 | |
| 1716 | if (num_port > 1) { |
| 1717 | board->flags = first_port | FL_BASE_BARS; |
| 1718 | board->num_ports = num_port; |
| 1719 | return 0; |
| 1720 | } |
| 1721 | |
| 1722 | return -ENODEV; |
| 1723 | } |
| 1724 | |
| 1725 | static inline int |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1726 | serial_pci_matches(struct pciserial_board *board, |
| 1727 | struct pciserial_board *guessed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1728 | { |
| 1729 | return |
| 1730 | board->num_ports == guessed->num_ports && |
| 1731 | board->base_baud == guessed->base_baud && |
| 1732 | board->uart_offset == guessed->uart_offset && |
| 1733 | board->reg_shift == guessed->reg_shift && |
| 1734 | board->first_offset == guessed->first_offset; |
| 1735 | } |
| 1736 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1737 | struct serial_private * |
| 1738 | pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board) |
| 1739 | { |
| 1740 | struct uart_port serial_port; |
| 1741 | struct serial_private *priv; |
| 1742 | struct pci_serial_quirk *quirk; |
| 1743 | int rc, nr_ports, i; |
| 1744 | |
| 1745 | nr_ports = board->num_ports; |
| 1746 | |
| 1747 | /* |
| 1748 | * Find an init and setup quirks. |
| 1749 | */ |
| 1750 | quirk = find_quirk(dev); |
| 1751 | |
| 1752 | /* |
| 1753 | * Run the new-style initialization function. |
| 1754 | * The initialization function returns: |
| 1755 | * <0 - error |
| 1756 | * 0 - use board->num_ports |
| 1757 | * >0 - number of ports |
| 1758 | */ |
| 1759 | if (quirk->init) { |
| 1760 | rc = quirk->init(dev); |
| 1761 | if (rc < 0) { |
| 1762 | priv = ERR_PTR(rc); |
| 1763 | goto err_out; |
| 1764 | } |
| 1765 | if (rc) |
| 1766 | nr_ports = rc; |
| 1767 | } |
| 1768 | |
Burman Yan | 8f31bb3 | 2007-02-14 00:33:07 -0800 | [diff] [blame] | 1769 | priv = kzalloc(sizeof(struct serial_private) + |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1770 | sizeof(unsigned int) * nr_ports, |
| 1771 | GFP_KERNEL); |
| 1772 | if (!priv) { |
| 1773 | priv = ERR_PTR(-ENOMEM); |
| 1774 | goto err_deinit; |
| 1775 | } |
| 1776 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1777 | priv->dev = dev; |
| 1778 | priv->quirk = quirk; |
| 1779 | |
| 1780 | memset(&serial_port, 0, sizeof(struct uart_port)); |
| 1781 | serial_port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; |
| 1782 | serial_port.uartclk = board->base_baud * 16; |
| 1783 | serial_port.irq = get_pci_irq(dev, board); |
| 1784 | serial_port.dev = &dev->dev; |
| 1785 | |
| 1786 | for (i = 0; i < nr_ports; i++) { |
| 1787 | if (quirk->setup(priv, board, &serial_port, i)) |
| 1788 | break; |
| 1789 | |
| 1790 | #ifdef SERIAL_DEBUG_PCI |
| 1791 | printk("Setup PCI port: port %x, irq %d, type %d\n", |
| 1792 | serial_port.iobase, serial_port.irq, serial_port.iotype); |
| 1793 | #endif |
| 1794 | |
| 1795 | priv->line[i] = serial8250_register_port(&serial_port); |
| 1796 | if (priv->line[i] < 0) { |
| 1797 | printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]); |
| 1798 | break; |
| 1799 | } |
| 1800 | } |
| 1801 | |
| 1802 | priv->nr = i; |
| 1803 | |
| 1804 | return priv; |
| 1805 | |
| 1806 | err_deinit: |
| 1807 | if (quirk->exit) |
| 1808 | quirk->exit(dev); |
| 1809 | err_out: |
| 1810 | return priv; |
| 1811 | } |
| 1812 | EXPORT_SYMBOL_GPL(pciserial_init_ports); |
| 1813 | |
| 1814 | void pciserial_remove_ports(struct serial_private *priv) |
| 1815 | { |
| 1816 | struct pci_serial_quirk *quirk; |
| 1817 | int i; |
| 1818 | |
| 1819 | for (i = 0; i < priv->nr; i++) |
| 1820 | serial8250_unregister_port(priv->line[i]); |
| 1821 | |
| 1822 | for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { |
| 1823 | if (priv->remapped_bar[i]) |
| 1824 | iounmap(priv->remapped_bar[i]); |
| 1825 | priv->remapped_bar[i] = NULL; |
| 1826 | } |
| 1827 | |
| 1828 | /* |
| 1829 | * Find the exit quirks. |
| 1830 | */ |
| 1831 | quirk = find_quirk(priv->dev); |
| 1832 | if (quirk->exit) |
| 1833 | quirk->exit(priv->dev); |
| 1834 | |
| 1835 | kfree(priv); |
| 1836 | } |
| 1837 | EXPORT_SYMBOL_GPL(pciserial_remove_ports); |
| 1838 | |
| 1839 | void pciserial_suspend_ports(struct serial_private *priv) |
| 1840 | { |
| 1841 | int i; |
| 1842 | |
| 1843 | for (i = 0; i < priv->nr; i++) |
| 1844 | if (priv->line[i] >= 0) |
| 1845 | serial8250_suspend_port(priv->line[i]); |
| 1846 | } |
| 1847 | EXPORT_SYMBOL_GPL(pciserial_suspend_ports); |
| 1848 | |
| 1849 | void pciserial_resume_ports(struct serial_private *priv) |
| 1850 | { |
| 1851 | int i; |
| 1852 | |
| 1853 | /* |
| 1854 | * Ensure that the board is correctly configured. |
| 1855 | */ |
| 1856 | if (priv->quirk->init) |
| 1857 | priv->quirk->init(priv->dev); |
| 1858 | |
| 1859 | for (i = 0; i < priv->nr; i++) |
| 1860 | if (priv->line[i] >= 0) |
| 1861 | serial8250_resume_port(priv->line[i]); |
| 1862 | } |
| 1863 | EXPORT_SYMBOL_GPL(pciserial_resume_ports); |
| 1864 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1865 | /* |
| 1866 | * Probe one serial board. Unfortunately, there is no rhyme nor reason |
| 1867 | * to the arrangement of serial ports on a PCI card. |
| 1868 | */ |
| 1869 | static int __devinit |
| 1870 | pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) |
| 1871 | { |
| 1872 | struct serial_private *priv; |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1873 | struct pciserial_board *board, tmp; |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1874 | int rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | |
| 1876 | if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { |
| 1877 | printk(KERN_ERR "pci_init_one: invalid driver_data: %ld\n", |
| 1878 | ent->driver_data); |
| 1879 | return -EINVAL; |
| 1880 | } |
| 1881 | |
| 1882 | board = &pci_boards[ent->driver_data]; |
| 1883 | |
| 1884 | rc = pci_enable_device(dev); |
| 1885 | if (rc) |
| 1886 | return rc; |
| 1887 | |
| 1888 | if (ent->driver_data == pbn_default) { |
| 1889 | /* |
| 1890 | * Use a copy of the pci_board entry for this; |
| 1891 | * avoid changing entries in the table. |
| 1892 | */ |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1893 | memcpy(&tmp, board, sizeof(struct pciserial_board)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | board = &tmp; |
| 1895 | |
| 1896 | /* |
| 1897 | * We matched one of our class entries. Try to |
| 1898 | * determine the parameters of this board. |
| 1899 | */ |
| 1900 | rc = serial_pci_guess_board(dev, board); |
| 1901 | if (rc) |
| 1902 | goto disable; |
| 1903 | } else { |
| 1904 | /* |
| 1905 | * We matched an explicit entry. If we are able to |
| 1906 | * detect this boards settings with our heuristic, |
| 1907 | * then we no longer need this entry. |
| 1908 | */ |
Russell King | 1c7c1fe | 2005-07-27 11:31:19 +0100 | [diff] [blame] | 1909 | memcpy(&tmp, &pci_boards[pbn_default], |
| 1910 | sizeof(struct pciserial_board)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1911 | rc = serial_pci_guess_board(dev, &tmp); |
| 1912 | if (rc == 0 && serial_pci_matches(board, &tmp)) |
| 1913 | moan_device("Redundant entry in serial pci_table.", |
| 1914 | dev); |
| 1915 | } |
| 1916 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1917 | priv = pciserial_init_ports(dev, board); |
| 1918 | if (!IS_ERR(priv)) { |
| 1919 | pci_set_drvdata(dev, priv); |
| 1920 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1921 | } |
| 1922 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1923 | rc = PTR_ERR(priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1924 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1925 | disable: |
| 1926 | pci_disable_device(dev); |
| 1927 | return rc; |
| 1928 | } |
| 1929 | |
| 1930 | static void __devexit pciserial_remove_one(struct pci_dev *dev) |
| 1931 | { |
| 1932 | struct serial_private *priv = pci_get_drvdata(dev); |
| 1933 | |
| 1934 | pci_set_drvdata(dev, NULL); |
| 1935 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1936 | pciserial_remove_ports(priv); |
Russell King | 056a876 | 2005-07-22 10:15:04 +0100 | [diff] [blame] | 1937 | |
| 1938 | pci_disable_device(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1939 | } |
| 1940 | |
Alexey Dobriyan | 1d5e799 | 2006-09-25 16:51:27 -0700 | [diff] [blame] | 1941 | #ifdef CONFIG_PM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1942 | static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state) |
| 1943 | { |
| 1944 | struct serial_private *priv = pci_get_drvdata(dev); |
| 1945 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1946 | if (priv) |
| 1947 | pciserial_suspend_ports(priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1948 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1949 | pci_save_state(dev); |
| 1950 | pci_set_power_state(dev, pci_choose_state(dev, state)); |
| 1951 | return 0; |
| 1952 | } |
| 1953 | |
| 1954 | static int pciserial_resume_one(struct pci_dev *dev) |
| 1955 | { |
| 1956 | struct serial_private *priv = pci_get_drvdata(dev); |
| 1957 | |
| 1958 | pci_set_power_state(dev, PCI_D0); |
| 1959 | pci_restore_state(dev); |
| 1960 | |
| 1961 | if (priv) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | /* |
| 1963 | * The device may have been disabled. Re-enable it. |
| 1964 | */ |
| 1965 | pci_enable_device(dev); |
| 1966 | |
Russell King | 241fc43 | 2005-07-27 11:35:54 +0100 | [diff] [blame] | 1967 | pciserial_resume_ports(priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1968 | } |
| 1969 | return 0; |
| 1970 | } |
Alexey Dobriyan | 1d5e799 | 2006-09-25 16:51:27 -0700 | [diff] [blame] | 1971 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1972 | |
| 1973 | static struct pci_device_id serial_pci_tbl[] = { |
| 1974 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960, |
| 1975 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1976 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0, |
| 1977 | pbn_b1_8_1382400 }, |
| 1978 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960, |
| 1979 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1980 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232, 0, 0, |
| 1981 | pbn_b1_4_1382400 }, |
| 1982 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960, |
| 1983 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1984 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232, 0, 0, |
| 1985 | pbn_b1_2_1382400 }, |
| 1986 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 1987 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1988 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0, |
| 1989 | pbn_b1_8_1382400 }, |
| 1990 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 1991 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1992 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232, 0, 0, |
| 1993 | pbn_b1_4_1382400 }, |
| 1994 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 1995 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 1996 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232, 0, 0, |
| 1997 | pbn_b1_2_1382400 }, |
| 1998 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 1999 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2000 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485, 0, 0, |
| 2001 | pbn_b1_8_921600 }, |
| 2002 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2003 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2004 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4, 0, 0, |
| 2005 | pbn_b1_8_921600 }, |
| 2006 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2007 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2008 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485, 0, 0, |
| 2009 | pbn_b1_4_921600 }, |
| 2010 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2011 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2012 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2, 0, 0, |
| 2013 | pbn_b1_4_921600 }, |
| 2014 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2015 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2016 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485, 0, 0, |
| 2017 | pbn_b1_2_921600 }, |
| 2018 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2019 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2020 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6, 0, 0, |
| 2021 | pbn_b1_8_921600 }, |
| 2022 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2023 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2024 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1, 0, 0, |
| 2025 | pbn_b1_8_921600 }, |
| 2026 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2027 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2028 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1, 0, 0, |
| 2029 | pbn_b1_4_921600 }, |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 2030 | { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351, |
| 2031 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2032 | PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ, 0, 0, |
| 2033 | pbn_b1_2_1250000 }, |
| 2034 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, |
| 2035 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2036 | PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2, 0, 0, |
| 2037 | pbn_b0_2_1843200 }, |
| 2038 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, |
| 2039 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2040 | PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0, |
| 2041 | pbn_b0_4_1843200 }, |
Yoichi Yuasa | 85d1494 | 2006-02-08 21:46:24 +0000 | [diff] [blame] | 2042 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, |
| 2043 | PCI_VENDOR_ID_AFAVLAB, |
| 2044 | PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0, |
| 2045 | pbn_b0_4_1152000 }, |
Gareth Howlett | 26e9286 | 2006-01-04 17:00:42 +0000 | [diff] [blame] | 2046 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, |
| 2047 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2048 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0, |
| 2049 | pbn_b0_2_1843200_200 }, |
| 2050 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154, |
| 2051 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2052 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232, 0, 0, |
| 2053 | pbn_b0_4_1843200_200 }, |
| 2054 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158, |
| 2055 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2056 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232, 0, 0, |
| 2057 | pbn_b0_8_1843200_200 }, |
| 2058 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, |
| 2059 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2060 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1, 0, 0, |
| 2061 | pbn_b0_2_1843200_200 }, |
| 2062 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154, |
| 2063 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2064 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2, 0, 0, |
| 2065 | pbn_b0_4_1843200_200 }, |
| 2066 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158, |
| 2067 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2068 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4, 0, 0, |
| 2069 | pbn_b0_8_1843200_200 }, |
| 2070 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, |
| 2071 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2072 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2, 0, 0, |
| 2073 | pbn_b0_2_1843200_200 }, |
| 2074 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154, |
| 2075 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2076 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4, 0, 0, |
| 2077 | pbn_b0_4_1843200_200 }, |
| 2078 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158, |
| 2079 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2080 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8, 0, 0, |
| 2081 | pbn_b0_8_1843200_200 }, |
| 2082 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, |
| 2083 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2084 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485, 0, 0, |
| 2085 | pbn_b0_2_1843200_200 }, |
| 2086 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154, |
| 2087 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2088 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485, 0, 0, |
| 2089 | pbn_b0_4_1843200_200 }, |
| 2090 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158, |
| 2091 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
| 2092 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0, |
| 2093 | pbn_b0_8_1843200_200 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2094 | |
| 2095 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, |
| 2096 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2097 | pbn_b2_bt_1_115200 }, |
| 2098 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM2, |
| 2099 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2100 | pbn_b2_bt_2_115200 }, |
| 2101 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM422, |
| 2102 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2103 | pbn_b2_bt_4_115200 }, |
| 2104 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM232, |
| 2105 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2106 | pbn_b2_bt_2_115200 }, |
| 2107 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM4, |
| 2108 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2109 | pbn_b2_bt_4_115200 }, |
| 2110 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM8, |
| 2111 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2112 | pbn_b2_8_115200 }, |
| 2113 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM8, |
| 2114 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2115 | pbn_b2_8_115200 }, |
| 2116 | |
| 2117 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_GTEK_SERIAL2, |
| 2118 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2119 | pbn_b2_bt_2_115200 }, |
| 2120 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM200, |
| 2121 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2122 | pbn_b2_bt_2_921600 }, |
| 2123 | /* |
| 2124 | * VScom SPCOM800, from sl@s.pl |
| 2125 | */ |
| 2126 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM800, |
| 2127 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2128 | pbn_b2_8_921600 }, |
| 2129 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_1077, |
| 2130 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2131 | pbn_b2_4_921600 }, |
| 2132 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2133 | PCI_SUBVENDOR_ID_KEYSPAN, |
| 2134 | PCI_SUBDEVICE_ID_KEYSPAN_SX2, 0, 0, |
| 2135 | pbn_panacom }, |
| 2136 | { PCI_VENDOR_ID_PANACOM, PCI_DEVICE_ID_PANACOM_QUADMODEM, |
| 2137 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2138 | pbn_panacom4 }, |
| 2139 | { PCI_VENDOR_ID_PANACOM, PCI_DEVICE_ID_PANACOM_DUALMODEM, |
| 2140 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2141 | pbn_panacom2 }, |
Matthias Fuchs | a9cccd3 | 2007-02-10 01:46:05 -0800 | [diff] [blame] | 2142 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, |
| 2143 | PCI_VENDOR_ID_ESDGMBH, |
| 2144 | PCI_DEVICE_ID_ESDGMBH_CPCIASIO4, 0, 0, |
| 2145 | pbn_b2_4_115200 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2146 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2147 | PCI_SUBVENDOR_ID_CHASE_PCIFAST, |
| 2148 | PCI_SUBDEVICE_ID_CHASE_PCIFAST4, 0, 0, |
| 2149 | pbn_b2_4_460800 }, |
| 2150 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2151 | PCI_SUBVENDOR_ID_CHASE_PCIFAST, |
| 2152 | PCI_SUBDEVICE_ID_CHASE_PCIFAST8, 0, 0, |
| 2153 | pbn_b2_8_460800 }, |
| 2154 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2155 | PCI_SUBVENDOR_ID_CHASE_PCIFAST, |
| 2156 | PCI_SUBDEVICE_ID_CHASE_PCIFAST16, 0, 0, |
| 2157 | pbn_b2_16_460800 }, |
| 2158 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2159 | PCI_SUBVENDOR_ID_CHASE_PCIFAST, |
| 2160 | PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC, 0, 0, |
| 2161 | pbn_b2_16_460800 }, |
| 2162 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2163 | PCI_SUBVENDOR_ID_CHASE_PCIRAS, |
| 2164 | PCI_SUBDEVICE_ID_CHASE_PCIRAS4, 0, 0, |
| 2165 | pbn_b2_4_460800 }, |
| 2166 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2167 | PCI_SUBVENDOR_ID_CHASE_PCIRAS, |
| 2168 | PCI_SUBDEVICE_ID_CHASE_PCIRAS8, 0, 0, |
| 2169 | pbn_b2_8_460800 }, |
Bjorn Helgaas | add7b58 | 2005-10-24 22:11:57 +0100 | [diff] [blame] | 2170 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, |
| 2171 | PCI_SUBVENDOR_ID_EXSYS, |
| 2172 | PCI_SUBDEVICE_ID_EXSYS_4055, 0, 0, |
| 2173 | pbn_exsys_4055 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2174 | /* |
| 2175 | * Megawolf Romulus PCI Serial Card, from Mike Hudson |
| 2176 | * (Exoray@isys.ca) |
| 2177 | */ |
| 2178 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_ROMULUS, |
| 2179 | 0x10b5, 0x106a, 0, 0, |
| 2180 | pbn_plx_romulus }, |
| 2181 | { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_QSC100, |
| 2182 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2183 | pbn_b1_4_115200 }, |
| 2184 | { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_DSC100, |
| 2185 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2186 | pbn_b1_2_115200 }, |
| 2187 | { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_ESC100D, |
| 2188 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2189 | pbn_b1_8_115200 }, |
| 2190 | { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_ESC100M, |
| 2191 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2192 | pbn_b1_8_115200 }, |
| 2193 | { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954, |
| 2194 | PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0, |
| 2195 | pbn_b0_4_921600 }, |
| 2196 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, |
Andrey Panin | fbc0dc0 | 2005-07-18 11:38:09 +0100 | [diff] [blame] | 2197 | PCI_SUBVENDOR_ID_SIIG, PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL, 0, 0, |
| 2198 | pbn_b0_4_1152000 }, |
David Ranson | db1de15 | 2005-07-27 11:43:55 -0700 | [diff] [blame] | 2199 | |
| 2200 | /* |
| 2201 | * The below card is a little controversial since it is the |
| 2202 | * subject of a PCI vendor/device ID clash. (See |
| 2203 | * www.ussg.iu.edu/hypermail/linux/kernel/0303.1/0516.html). |
| 2204 | * For now just used the hex ID 0x950a. |
| 2205 | */ |
| 2206 | { PCI_VENDOR_ID_OXSEMI, 0x950a, |
| 2207 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2208 | pbn_b0_2_1130000 }, |
Andrey Panin | fbc0dc0 | 2005-07-18 11:38:09 +0100 | [diff] [blame] | 2209 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2210 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2211 | pbn_b0_4_115200 }, |
| 2212 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952, |
| 2213 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2214 | pbn_b0_bt_2_921600 }, |
| 2215 | |
| 2216 | /* |
| 2217 | * SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards, |
| 2218 | * from skokodyn@yahoo.com |
| 2219 | */ |
| 2220 | { PCI_VENDOR_ID_SBSMODULARIO, PCI_DEVICE_ID_OCTPRO, |
| 2221 | PCI_SUBVENDOR_ID_SBSMODULARIO, PCI_SUBDEVICE_ID_OCTPRO232, 0, 0, |
| 2222 | pbn_sbsxrsio }, |
| 2223 | { PCI_VENDOR_ID_SBSMODULARIO, PCI_DEVICE_ID_OCTPRO, |
| 2224 | PCI_SUBVENDOR_ID_SBSMODULARIO, PCI_SUBDEVICE_ID_OCTPRO422, 0, 0, |
| 2225 | pbn_sbsxrsio }, |
| 2226 | { PCI_VENDOR_ID_SBSMODULARIO, PCI_DEVICE_ID_OCTPRO, |
| 2227 | PCI_SUBVENDOR_ID_SBSMODULARIO, PCI_SUBDEVICE_ID_POCTAL232, 0, 0, |
| 2228 | pbn_sbsxrsio }, |
| 2229 | { PCI_VENDOR_ID_SBSMODULARIO, PCI_DEVICE_ID_OCTPRO, |
| 2230 | PCI_SUBVENDOR_ID_SBSMODULARIO, PCI_SUBDEVICE_ID_POCTAL422, 0, 0, |
| 2231 | pbn_sbsxrsio }, |
| 2232 | |
| 2233 | /* |
| 2234 | * Digitan DS560-558, from jimd@esoft.com |
| 2235 | */ |
| 2236 | { PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_ATT_VENUS_MODEM, |
| 2237 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2238 | pbn_b1_1_115200 }, |
| 2239 | |
| 2240 | /* |
| 2241 | * Titan Electronic cards |
| 2242 | * The 400L and 800L have a custom setup quirk. |
| 2243 | */ |
| 2244 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100, |
| 2245 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2246 | pbn_b0_1_921600 }, |
| 2247 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200, |
| 2248 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2249 | pbn_b0_2_921600 }, |
| 2250 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400, |
| 2251 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2252 | pbn_b0_4_921600 }, |
| 2253 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800B, |
| 2254 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2255 | pbn_b0_4_921600 }, |
| 2256 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100L, |
| 2257 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2258 | pbn_b1_1_921600 }, |
| 2259 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200L, |
| 2260 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2261 | pbn_b1_bt_2_921600 }, |
| 2262 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400L, |
| 2263 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2264 | pbn_b0_bt_4_921600 }, |
| 2265 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800L, |
| 2266 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2267 | pbn_b0_bt_8_921600 }, |
| 2268 | |
| 2269 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_550, |
| 2270 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2271 | pbn_b2_1_460800 }, |
| 2272 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_650, |
| 2273 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2274 | pbn_b2_1_460800 }, |
| 2275 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_850, |
| 2276 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2277 | pbn_b2_1_460800 }, |
| 2278 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_550, |
| 2279 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2280 | pbn_b2_bt_2_921600 }, |
| 2281 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_650, |
| 2282 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2283 | pbn_b2_bt_2_921600 }, |
| 2284 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_850, |
| 2285 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2286 | pbn_b2_bt_2_921600 }, |
| 2287 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_550, |
| 2288 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2289 | pbn_b2_bt_4_921600 }, |
| 2290 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_650, |
| 2291 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2292 | pbn_b2_bt_4_921600 }, |
| 2293 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_850, |
| 2294 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2295 | pbn_b2_bt_4_921600 }, |
| 2296 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_550, |
| 2297 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2298 | pbn_b0_1_921600 }, |
| 2299 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_650, |
| 2300 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2301 | pbn_b0_1_921600 }, |
| 2302 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_850, |
| 2303 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2304 | pbn_b0_1_921600 }, |
| 2305 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_550, |
| 2306 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2307 | pbn_b0_bt_2_921600 }, |
| 2308 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_650, |
| 2309 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2310 | pbn_b0_bt_2_921600 }, |
| 2311 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_850, |
| 2312 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2313 | pbn_b0_bt_2_921600 }, |
| 2314 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_550, |
| 2315 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2316 | pbn_b0_bt_4_921600 }, |
| 2317 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_650, |
| 2318 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2319 | pbn_b0_bt_4_921600 }, |
| 2320 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850, |
| 2321 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2322 | pbn_b0_bt_4_921600 }, |
Andrey Panin | 3ec9c59 | 2006-02-02 20:15:09 +0000 | [diff] [blame] | 2323 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_550, |
| 2324 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2325 | pbn_b0_bt_8_921600 }, |
| 2326 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_650, |
| 2327 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2328 | pbn_b0_bt_8_921600 }, |
| 2329 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_850, |
| 2330 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2331 | pbn_b0_bt_8_921600 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2332 | |
| 2333 | /* |
| 2334 | * Computone devices submitted by Doug McNash dmcnash@computone.com |
| 2335 | */ |
| 2336 | { PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG, |
| 2337 | PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG4, |
| 2338 | 0, 0, pbn_computone_4 }, |
| 2339 | { PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG, |
| 2340 | PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG8, |
| 2341 | 0, 0, pbn_computone_8 }, |
| 2342 | { PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG, |
| 2343 | PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG6, |
| 2344 | 0, 0, pbn_computone_6 }, |
| 2345 | |
| 2346 | { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI95N, |
| 2347 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2348 | pbn_oxsemi }, |
| 2349 | { PCI_VENDOR_ID_TIMEDIA, PCI_DEVICE_ID_TIMEDIA_1889, |
| 2350 | PCI_VENDOR_ID_TIMEDIA, PCI_ANY_ID, 0, 0, |
| 2351 | pbn_b0_bt_1_921600 }, |
| 2352 | |
| 2353 | /* |
| 2354 | * AFAVLAB serial card, from Harald Welte <laforge@gnumonks.org> |
| 2355 | */ |
| 2356 | { PCI_VENDOR_ID_AFAVLAB, PCI_DEVICE_ID_AFAVLAB_P028, |
| 2357 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2358 | pbn_b0_bt_8_115200 }, |
| 2359 | { PCI_VENDOR_ID_AFAVLAB, PCI_DEVICE_ID_AFAVLAB_P030, |
| 2360 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2361 | pbn_b0_bt_8_115200 }, |
| 2362 | |
| 2363 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DSERIAL, |
| 2364 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2365 | pbn_b0_bt_2_115200 }, |
| 2366 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_A, |
| 2367 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2368 | pbn_b0_bt_2_115200 }, |
| 2369 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, |
| 2370 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2371 | pbn_b0_bt_2_115200 }, |
| 2372 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, |
| 2373 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2374 | pbn_b0_bt_4_460800 }, |
| 2375 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_B, |
| 2376 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2377 | pbn_b0_bt_4_460800 }, |
| 2378 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PORT_PLUS, |
| 2379 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2380 | pbn_b0_bt_2_460800 }, |
| 2381 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUAD_A, |
| 2382 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2383 | pbn_b0_bt_2_460800 }, |
| 2384 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUAD_B, |
| 2385 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2386 | pbn_b0_bt_2_460800 }, |
| 2387 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_SSERIAL, |
| 2388 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2389 | pbn_b0_bt_1_115200 }, |
| 2390 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PORT_650, |
| 2391 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2392 | pbn_b0_bt_1_460800 }, |
| 2393 | |
| 2394 | /* |
Russell King | 1fb8cacc | 2006-12-13 14:45:46 +0000 | [diff] [blame] | 2395 | * Korenix Jetcard F0/F1 cards (JC1204, JC1208, JC1404, JC1408). |
| 2396 | * Cards are identified by their subsystem vendor IDs, which |
| 2397 | * (in hex) match the model number. |
| 2398 | * |
| 2399 | * Note that JC140x are RS422/485 cards which require ox950 |
| 2400 | * ACR = 0x10, and as such are not currently fully supported. |
| 2401 | */ |
| 2402 | { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF0, |
| 2403 | 0x1204, 0x0004, 0, 0, |
| 2404 | pbn_b0_4_921600 }, |
| 2405 | { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF0, |
| 2406 | 0x1208, 0x0004, 0, 0, |
| 2407 | pbn_b0_4_921600 }, |
| 2408 | /* { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF0, |
| 2409 | 0x1402, 0x0002, 0, 0, |
| 2410 | pbn_b0_2_921600 }, */ |
| 2411 | /* { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF0, |
| 2412 | 0x1404, 0x0004, 0, 0, |
| 2413 | pbn_b0_4_921600 }, */ |
| 2414 | { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF1, |
| 2415 | 0x1208, 0x0004, 0, 0, |
| 2416 | pbn_b0_4_921600 }, |
| 2417 | |
| 2418 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2419 | * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com |
| 2420 | */ |
| 2421 | { PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_RAC4, |
| 2422 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2423 | pbn_b1_1_1382400 }, |
| 2424 | |
| 2425 | /* |
| 2426 | * Dell Remote Access Card III - Tim_T_Murphy@Dell.com |
| 2427 | */ |
| 2428 | { PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_RACIII, |
| 2429 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2430 | pbn_b1_1_1382400 }, |
| 2431 | |
| 2432 | /* |
| 2433 | * RAStel 2 port modem, gerg@moreton.com.au |
| 2434 | */ |
| 2435 | { PCI_VENDOR_ID_MORETON, PCI_DEVICE_ID_RASTEL_2PORT, |
| 2436 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2437 | pbn_b2_bt_2_115200 }, |
| 2438 | |
| 2439 | /* |
| 2440 | * EKF addition for i960 Boards form EKF with serial port |
| 2441 | */ |
| 2442 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80960_RP, |
| 2443 | 0xE4BF, PCI_ANY_ID, 0, 0, |
| 2444 | pbn_intel_i960 }, |
| 2445 | |
| 2446 | /* |
| 2447 | * Xircom Cardbus/Ethernet combos |
| 2448 | */ |
| 2449 | { PCI_VENDOR_ID_XIRCOM, PCI_DEVICE_ID_XIRCOM_X3201_MDM, |
| 2450 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2451 | pbn_b0_1_115200 }, |
| 2452 | /* |
| 2453 | * Xircom RBM56G cardbus modem - Dirk Arnold (temp entry) |
| 2454 | */ |
| 2455 | { PCI_VENDOR_ID_XIRCOM, PCI_DEVICE_ID_XIRCOM_RBM56G, |
| 2456 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2457 | pbn_b0_1_115200 }, |
| 2458 | |
| 2459 | /* |
| 2460 | * Untested PCI modems, sent in from various folks... |
| 2461 | */ |
| 2462 | |
| 2463 | /* |
| 2464 | * Elsa Model 56K PCI Modem, from Andreas Rath <arh@01019freenet.de> |
| 2465 | */ |
| 2466 | { PCI_VENDOR_ID_ROCKWELL, 0x1004, |
| 2467 | 0x1048, 0x1500, 0, 0, |
| 2468 | pbn_b1_1_115200 }, |
| 2469 | |
| 2470 | { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, |
| 2471 | 0xFF00, 0, 0, 0, |
| 2472 | pbn_sgi_ioc3 }, |
| 2473 | |
| 2474 | /* |
| 2475 | * HP Diva card |
| 2476 | */ |
| 2477 | { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA, |
| 2478 | PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA_RMP3, 0, 0, |
| 2479 | pbn_b1_1_115200 }, |
| 2480 | { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA, |
| 2481 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2482 | pbn_b0_5_115200 }, |
| 2483 | { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA_AUX, |
| 2484 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2485 | pbn_b2_1_115200 }, |
| 2486 | |
Alon Bar-Lev | d9004eb | 2006-01-18 11:47:33 +0000 | [diff] [blame] | 2487 | { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM2, |
| 2488 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2489 | pbn_b3_2_115200 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2490 | { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM4, |
| 2491 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2492 | pbn_b3_4_115200 }, |
| 2493 | { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM8, |
| 2494 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2495 | pbn_b3_8_115200 }, |
| 2496 | |
| 2497 | /* |
| 2498 | * Exar Corp. XR17C15[248] Dual/Quad/Octal UART |
| 2499 | */ |
| 2500 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, |
| 2501 | PCI_ANY_ID, PCI_ANY_ID, |
| 2502 | 0, |
| 2503 | 0, pbn_exar_XR17C152 }, |
| 2504 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154, |
| 2505 | PCI_ANY_ID, PCI_ANY_ID, |
| 2506 | 0, |
| 2507 | 0, pbn_exar_XR17C154 }, |
| 2508 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158, |
| 2509 | PCI_ANY_ID, PCI_ANY_ID, |
| 2510 | 0, |
| 2511 | 0, pbn_exar_XR17C158 }, |
| 2512 | |
| 2513 | /* |
| 2514 | * Topic TP560 Data/Fax/Voice 56k modem (reported by Evan Clarke) |
| 2515 | */ |
| 2516 | { PCI_VENDOR_ID_TOPIC, PCI_DEVICE_ID_TOPIC_TP560, |
| 2517 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 2518 | pbn_b0_1_115200 }, |
Niels de Vos | 84f8c6f | 2007-08-22 14:01:14 -0700 | [diff] [blame^] | 2519 | /* |
| 2520 | * ITE |
| 2521 | */ |
| 2522 | { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872, |
| 2523 | PCI_ANY_ID, PCI_ANY_ID, |
| 2524 | 0, 0, |
| 2525 | pbn_b1_bt_1_115200 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2526 | |
| 2527 | /* |
Peter Horton | 737c175 | 2006-08-26 09:07:36 +0100 | [diff] [blame] | 2528 | * IntaShield IS-200 |
| 2529 | */ |
| 2530 | { PCI_VENDOR_ID_INTASHIELD, PCI_DEVICE_ID_INTASHIELD_IS200, |
| 2531 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, /* 135a.0811 */ |
| 2532 | pbn_b2_2_115200 }, |
| 2533 | |
| 2534 | /* |
Thomas Hoehn | 4821200 | 2007-02-10 01:46:05 -0800 | [diff] [blame] | 2535 | * Perle PCI-RAS cards |
| 2536 | */ |
| 2537 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, |
| 2538 | PCI_SUBVENDOR_ID_PERLE, PCI_SUBDEVICE_ID_PCI_RAS4, |
| 2539 | 0, 0, pbn_b2_4_921600 }, |
| 2540 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, |
| 2541 | PCI_SUBVENDOR_ID_PERLE, PCI_SUBDEVICE_ID_PCI_RAS8, |
| 2542 | 0, 0, pbn_b2_8_921600 }, |
| 2543 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2544 | * These entries match devices with class COMMUNICATION_SERIAL, |
| 2545 | * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL |
| 2546 | */ |
| 2547 | { PCI_ANY_ID, PCI_ANY_ID, |
| 2548 | PCI_ANY_ID, PCI_ANY_ID, |
| 2549 | PCI_CLASS_COMMUNICATION_SERIAL << 8, |
| 2550 | 0xffff00, pbn_default }, |
| 2551 | { PCI_ANY_ID, PCI_ANY_ID, |
| 2552 | PCI_ANY_ID, PCI_ANY_ID, |
| 2553 | PCI_CLASS_COMMUNICATION_MODEM << 8, |
| 2554 | 0xffff00, pbn_default }, |
| 2555 | { PCI_ANY_ID, PCI_ANY_ID, |
| 2556 | PCI_ANY_ID, PCI_ANY_ID, |
| 2557 | PCI_CLASS_COMMUNICATION_MULTISERIAL << 8, |
| 2558 | 0xffff00, pbn_default }, |
| 2559 | { 0, } |
| 2560 | }; |
| 2561 | |
| 2562 | static struct pci_driver serial_pci_driver = { |
| 2563 | .name = "serial", |
| 2564 | .probe = pciserial_init_one, |
| 2565 | .remove = __devexit_p(pciserial_remove_one), |
Alexey Dobriyan | 1d5e799 | 2006-09-25 16:51:27 -0700 | [diff] [blame] | 2566 | #ifdef CONFIG_PM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2567 | .suspend = pciserial_suspend_one, |
| 2568 | .resume = pciserial_resume_one, |
Alexey Dobriyan | 1d5e799 | 2006-09-25 16:51:27 -0700 | [diff] [blame] | 2569 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2570 | .id_table = serial_pci_tbl, |
| 2571 | }; |
| 2572 | |
| 2573 | static int __init serial8250_pci_init(void) |
| 2574 | { |
| 2575 | return pci_register_driver(&serial_pci_driver); |
| 2576 | } |
| 2577 | |
| 2578 | static void __exit serial8250_pci_exit(void) |
| 2579 | { |
| 2580 | pci_unregister_driver(&serial_pci_driver); |
| 2581 | } |
| 2582 | |
| 2583 | module_init(serial8250_pci_init); |
| 2584 | module_exit(serial8250_pci_exit); |
| 2585 | |
| 2586 | MODULE_LICENSE("GPL"); |
| 2587 | MODULE_DESCRIPTION("Generic 8250/16x50 PCI serial probe module"); |
| 2588 | MODULE_DEVICE_TABLE(pci, serial_pci_tbl); |