blob: 1a9d233c94d00f68f47fdc4313759666559140eb [file] [log] [blame]
Daniel Macka3819342009-03-09 02:13:17 +01001/*
2 * AK4104 ALSA SoC (ASoC) driver
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090013#include <linux/slab.h>
Daniel Macka3819342009-03-09 02:13:17 +010014#include <linux/spi/spi.h>
Daniel Mack385a4c22012-11-14 18:28:39 +080015#include <linux/of_device.h>
16#include <linux/of_gpio.h>
Daniel Mackb38d10e2014-03-27 21:42:15 +010017#include <linux/regulator/consumer.h>
Daniel Macka3819342009-03-09 02:13:17 +010018#include <sound/asoundef.h>
Daniel Mackb38d10e2014-03-27 21:42:15 +010019#include <sound/core.h>
20#include <sound/soc.h>
21#include <sound/initval.h>
Daniel Macka3819342009-03-09 02:13:17 +010022
Daniel Macka3819342009-03-09 02:13:17 +010023/* AK4104 registers addresses */
24#define AK4104_REG_CONTROL1 0x00
25#define AK4104_REG_RESERVED 0x01
26#define AK4104_REG_CONTROL2 0x02
27#define AK4104_REG_TX 0x03
28#define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
29#define AK4104_NUM_REGS 10
30
31#define AK4104_REG_MASK 0x1f
32#define AK4104_READ 0xc0
33#define AK4104_WRITE 0xe0
34#define AK4104_RESERVED_VAL 0x5b
35
36/* Bit masks for AK4104 registers */
37#define AK4104_CONTROL1_RSTN (1 << 0)
38#define AK4104_CONTROL1_PW (1 << 1)
39#define AK4104_CONTROL1_DIF0 (1 << 2)
40#define AK4104_CONTROL1_DIF1 (1 << 3)
41
42#define AK4104_CONTROL2_SEL0 (1 << 0)
43#define AK4104_CONTROL2_SEL1 (1 << 1)
44#define AK4104_CONTROL2_MODE (1 << 2)
45
46#define AK4104_TX_TXE (1 << 0)
47#define AK4104_TX_V (1 << 1)
48
Daniel Macka3819342009-03-09 02:13:17 +010049struct ak4104_private {
Mark Brown2901d6e2012-02-17 12:14:18 -080050 struct regmap *regmap;
Daniel Mackb38d10e2014-03-27 21:42:15 +010051 struct regulator *regulator;
Daniel Macka3819342009-03-09 02:13:17 +010052};
53
Mark Brown2e619262013-08-07 19:01:40 +010054static const struct snd_soc_dapm_widget ak4104_dapm_widgets[] = {
Mark Browna5db4d52013-08-07 19:05:47 +010055SND_SOC_DAPM_PGA("TXE", AK4104_REG_TX, AK4104_TX_TXE, 0, NULL, 0),
56
Mark Brown2e619262013-08-07 19:01:40 +010057SND_SOC_DAPM_OUTPUT("TX"),
58};
59
60static const struct snd_soc_dapm_route ak4104_dapm_routes[] = {
Mark Browna5db4d52013-08-07 19:05:47 +010061 { "TXE", NULL, "Playback" },
62 { "TX", NULL, "TXE" },
Mark Brown2e619262013-08-07 19:01:40 +010063};
64
Daniel Macka3819342009-03-09 02:13:17 +010065static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
66 unsigned int format)
67{
68 struct snd_soc_codec *codec = codec_dai->codec;
Daniel Mackb0ec7612013-03-06 22:22:15 +010069 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
Daniel Macka3819342009-03-09 02:13:17 +010070 int val = 0;
Mark Brown2901d6e2012-02-17 12:14:18 -080071 int ret;
Daniel Macka3819342009-03-09 02:13:17 +010072
Daniel Macka3819342009-03-09 02:13:17 +010073 /* set DAI format */
74 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
75 case SND_SOC_DAIFMT_RIGHT_J:
76 break;
77 case SND_SOC_DAIFMT_LEFT_J:
78 val |= AK4104_CONTROL1_DIF0;
79 break;
80 case SND_SOC_DAIFMT_I2S:
81 val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
82 break;
83 default:
84 dev_err(codec->dev, "invalid dai format\n");
85 return -EINVAL;
86 }
87
88 /* This device can only be slave */
89 if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
90 return -EINVAL;
91
Daniel Mackb0ec7612013-03-06 22:22:15 +010092 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1,
93 AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1,
94 val);
Mark Brownafad95f2012-02-17 12:04:41 -080095 if (ret < 0)
96 return ret;
97
98 return 0;
Daniel Macka3819342009-03-09 02:13:17 +010099}
100
101static int ak4104_hw_params(struct snd_pcm_substream *substream,
102 struct snd_pcm_hw_params *params,
103 struct snd_soc_dai *dai)
104{
Mark Browne6968a12012-04-04 15:58:16 +0100105 struct snd_soc_codec *codec = dai->codec;
Daniel Mackb0ec7612013-03-06 22:22:15 +0100106 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
Daniel Mackb692a432013-03-06 22:22:16 +0100107 int ret, val = 0;
Daniel Macka3819342009-03-09 02:13:17 +0100108
109 /* set the IEC958 bits: consumer mode, no copyright bit */
110 val |= IEC958_AES0_CON_NOT_COPYRIGHT;
Daniel Mackb0ec7612013-03-06 22:22:15 +0100111 regmap_write(ak4104->regmap, AK4104_REG_CHN_STATUS(0), val);
Daniel Macka3819342009-03-09 02:13:17 +0100112
113 val = 0;
114
115 switch (params_rate(params)) {
Daniel Mack08201de2012-10-07 17:51:23 +0200116 case 22050:
117 val |= IEC958_AES3_CON_FS_22050;
118 break;
119 case 24000:
120 val |= IEC958_AES3_CON_FS_24000;
121 break;
122 case 32000:
123 val |= IEC958_AES3_CON_FS_32000;
124 break;
Daniel Macka3819342009-03-09 02:13:17 +0100125 case 44100:
126 val |= IEC958_AES3_CON_FS_44100;
127 break;
128 case 48000:
129 val |= IEC958_AES3_CON_FS_48000;
130 break;
Daniel Mack08201de2012-10-07 17:51:23 +0200131 case 88200:
132 val |= IEC958_AES3_CON_FS_88200;
133 break;
134 case 96000:
135 val |= IEC958_AES3_CON_FS_96000;
136 break;
137 case 176400:
138 val |= IEC958_AES3_CON_FS_176400;
139 break;
140 case 192000:
141 val |= IEC958_AES3_CON_FS_192000;
Daniel Macka3819342009-03-09 02:13:17 +0100142 break;
143 default:
144 dev_err(codec->dev, "unsupported sampling rate\n");
145 return -EINVAL;
146 }
147
Daniel Mackb692a432013-03-06 22:22:16 +0100148 ret = regmap_write(ak4104->regmap, AK4104_REG_CHN_STATUS(3), val);
149 if (ret < 0)
150 return ret;
151
Daniel Mackb692a432013-03-06 22:22:16 +0100152 return 0;
153}
154
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100155static const struct snd_soc_dai_ops ak4101_dai_ops = {
Mark Brown65ec1cd2009-03-11 16:51:31 +0000156 .hw_params = ak4104_hw_params,
157 .set_fmt = ak4104_set_dai_fmt,
158};
159
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000160static struct snd_soc_dai_driver ak4104_dai = {
161 .name = "ak4104-hifi",
Daniel Macka3819342009-03-09 02:13:17 +0100162 .playback = {
163 .stream_name = "Playback",
164 .channels_min = 2,
165 .channels_max = 2,
Vishal Thankic14c59f2016-09-26 15:34:19 +0200166 .rates = SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
167 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
168 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
169 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000,
Daniel Macka3819342009-03-09 02:13:17 +0100170 .formats = SNDRV_PCM_FMTBIT_S16_LE |
171 SNDRV_PCM_FMTBIT_S24_3LE |
172 SNDRV_PCM_FMTBIT_S24_LE
173 },
Mark Brown65ec1cd2009-03-11 16:51:31 +0000174 .ops = &ak4101_dai_ops,
Daniel Macka3819342009-03-09 02:13:17 +0100175};
176
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000177static int ak4104_probe(struct snd_soc_codec *codec)
178{
179 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
Mark Brown2901d6e2012-02-17 12:14:18 -0800180 int ret;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000181
Daniel Mackb38d10e2014-03-27 21:42:15 +0100182 ret = regulator_enable(ak4104->regulator);
183 if (ret < 0) {
184 dev_err(codec->dev, "Unable to enable regulator: %d\n", ret);
185 return ret;
186 }
187
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000188 /* set power-up and non-reset bits */
Daniel Mackb0ec7612013-03-06 22:22:15 +0100189 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1,
190 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN,
191 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000192 if (ret < 0)
Daniel Mackb38d10e2014-03-27 21:42:15 +0100193 goto exit_disable_regulator;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000194
195 /* enable transmitter */
Daniel Mackb0ec7612013-03-06 22:22:15 +0100196 ret = regmap_update_bits(ak4104->regmap, AK4104_REG_TX,
197 AK4104_TX_TXE, AK4104_TX_TXE);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000198 if (ret < 0)
Daniel Mackb38d10e2014-03-27 21:42:15 +0100199 goto exit_disable_regulator;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000200
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000201 return 0;
Daniel Mackb38d10e2014-03-27 21:42:15 +0100202
203exit_disable_regulator:
204 regulator_disable(ak4104->regulator);
205 return ret;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000206}
207
208static int ak4104_remove(struct snd_soc_codec *codec)
209{
Daniel Mackb0ec7612013-03-06 22:22:15 +0100210 struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
211
212 regmap_update_bits(ak4104->regmap, AK4104_REG_CONTROL1,
213 AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0);
Daniel Mackb38d10e2014-03-27 21:42:15 +0100214 regulator_disable(ak4104->regulator);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000215
Mark Brownafad95f2012-02-17 12:04:41 -0800216 return 0;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000217}
218
Daniel Mackb38d10e2014-03-27 21:42:15 +0100219#ifdef CONFIG_PM
220static int ak4104_soc_suspend(struct snd_soc_codec *codec)
221{
222 struct ak4104_private *priv = snd_soc_codec_get_drvdata(codec);
223
224 regulator_disable(priv->regulator);
225
226 return 0;
227}
228
229static int ak4104_soc_resume(struct snd_soc_codec *codec)
230{
231 struct ak4104_private *priv = snd_soc_codec_get_drvdata(codec);
232 int ret;
233
234 ret = regulator_enable(priv->regulator);
235 if (ret < 0)
236 return ret;
237
238 return 0;
239}
240#else
241#define ak4104_soc_suspend NULL
242#define ak4104_soc_resume NULL
243#endif /* CONFIG_PM */
244
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000245static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
Daniel Mackb38d10e2014-03-27 21:42:15 +0100246 .probe = ak4104_probe,
247 .remove = ak4104_remove,
248 .suspend = ak4104_soc_suspend,
249 .resume = ak4104_soc_resume,
Mark Brown2e619262013-08-07 19:01:40 +0100250
Kuninori Morimoto1cd5e362016-08-08 09:07:11 +0000251 .component_driver = {
252 .dapm_widgets = ak4104_dapm_widgets,
253 .num_dapm_widgets = ARRAY_SIZE(ak4104_dapm_widgets),
254 .dapm_routes = ak4104_dapm_routes,
255 .num_dapm_routes = ARRAY_SIZE(ak4104_dapm_routes),
256 }
Mark Brown2901d6e2012-02-17 12:14:18 -0800257};
258
259static const struct regmap_config ak4104_regmap = {
260 .reg_bits = 8,
261 .val_bits = 8,
262
263 .max_register = AK4104_NUM_REGS - 1,
264 .read_flag_mask = AK4104_READ,
265 .write_flag_mask = AK4104_WRITE,
266
267 .cache_type = REGCACHE_RBTREE,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000268};
Daniel Macka3819342009-03-09 02:13:17 +0100269
270static int ak4104_spi_probe(struct spi_device *spi)
271{
Daniel Mack385a4c22012-11-14 18:28:39 +0800272 struct device_node *np = spi->dev.of_node;
Daniel Macka3819342009-03-09 02:13:17 +0100273 struct ak4104_private *ak4104;
Mark Brown2901d6e2012-02-17 12:14:18 -0800274 unsigned int val;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000275 int ret;
Daniel Macka3819342009-03-09 02:13:17 +0100276
277 spi->bits_per_word = 8;
278 spi->mode = SPI_MODE_0;
279 ret = spi_setup(spi);
280 if (ret < 0)
281 return ret;
282
Axel Lin3922d512011-12-20 14:37:12 +0800283 ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
284 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000285 if (ak4104 == NULL)
Daniel Macka3819342009-03-09 02:13:17 +0100286 return -ENOMEM;
Daniel Macka3819342009-03-09 02:13:17 +0100287
Daniel Mackb38d10e2014-03-27 21:42:15 +0100288 ak4104->regulator = devm_regulator_get(&spi->dev, "vdd");
289 if (IS_ERR(ak4104->regulator)) {
290 ret = PTR_ERR(ak4104->regulator);
291 dev_err(&spi->dev, "Unable to get Vdd regulator: %d\n", ret);
292 return ret;
293 }
294
Tushar Beheraa273cd12012-11-22 09:38:36 +0530295 ak4104->regmap = devm_regmap_init_spi(spi, &ak4104_regmap);
Mark Brown2901d6e2012-02-17 12:14:18 -0800296 if (IS_ERR(ak4104->regmap)) {
297 ret = PTR_ERR(ak4104->regmap);
298 return ret;
299 }
300
Daniel Mack385a4c22012-11-14 18:28:39 +0800301 if (np) {
302 enum of_gpio_flags flags;
303 int gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
304
305 if (gpio_is_valid(gpio)) {
306 ret = devm_gpio_request_one(&spi->dev, gpio,
307 flags & OF_GPIO_ACTIVE_LOW ?
308 GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
309 "ak4104 reset");
310 if (ret < 0)
311 return ret;
312 }
313 }
314
Mark Brown2901d6e2012-02-17 12:14:18 -0800315 /* read the 'reserved' register - according to the datasheet, it
316 * should contain 0x5b. Not a good way to verify the presence of
317 * the device, but there is no hardware ID register. */
318 ret = regmap_read(ak4104->regmap, AK4104_REG_RESERVED, &val);
319 if (ret != 0)
Tushar Beheraa273cd12012-11-22 09:38:36 +0530320 return ret;
321 if (val != AK4104_RESERVED_VAL)
322 return -ENODEV;
Mark Brown2901d6e2012-02-17 12:14:18 -0800323
Daniel Macka3819342009-03-09 02:13:17 +0100324 spi_set_drvdata(spi, ak4104);
Daniel Macka3819342009-03-09 02:13:17 +0100325
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000326 ret = snd_soc_register_codec(&spi->dev,
327 &soc_codec_device_ak4104, &ak4104_dai, 1);
Daniel Macka3819342009-03-09 02:13:17 +0100328 return ret;
329}
330
Bill Pemberton7a79e942012-12-07 09:26:37 -0500331static int ak4104_spi_remove(struct spi_device *spi)
Daniel Macka3819342009-03-09 02:13:17 +0100332{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000333 snd_soc_unregister_codec(&spi->dev);
Daniel Macka3819342009-03-09 02:13:17 +0100334 return 0;
335}
336
Daniel Mackac5dbea2012-10-07 17:51:24 +0200337static const struct of_device_id ak4104_of_match[] = {
338 { .compatible = "asahi-kasei,ak4104", },
339 { }
340};
341MODULE_DEVICE_TABLE(of, ak4104_of_match);
342
Daniel Mack193b2f62013-09-16 18:14:20 +0200343static const struct spi_device_id ak4104_id_table[] = {
344 { "ak4104", 0 },
345 { }
346};
347MODULE_DEVICE_TABLE(spi, ak4104_id_table);
348
Daniel Macka3819342009-03-09 02:13:17 +0100349static struct spi_driver ak4104_spi_driver = {
350 .driver = {
Daniel Mack193b2f62013-09-16 18:14:20 +0200351 .name = "ak4104",
Daniel Mackac5dbea2012-10-07 17:51:24 +0200352 .of_match_table = ak4104_of_match,
Daniel Macka3819342009-03-09 02:13:17 +0100353 },
Daniel Mack193b2f62013-09-16 18:14:20 +0200354 .id_table = ak4104_id_table,
Daniel Macka3819342009-03-09 02:13:17 +0100355 .probe = ak4104_spi_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500356 .remove = ak4104_spi_remove,
Daniel Macka3819342009-03-09 02:13:17 +0100357};
358
Mark Brown38d78ba2012-02-16 22:50:35 -0800359module_spi_driver(ak4104_spi_driver);
Daniel Macka3819342009-03-09 02:13:17 +0100360
361MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
362MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
363MODULE_LICENSE("GPL");
364