blob: cc619c138777165b8e05550b4d09cf43e2281135 [file] [log] [blame]
Ben Widawsky254f9652012-06-04 14:42:42 -07001/*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28/*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
Damien Lespiau508842a2013-08-30 14:40:26 +010076 * GPU. The GPU has loaded its state already and has stored away the gtt
Ben Widawsky254f9652012-06-04 14:42:42 -070077 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
David Howells760285e2012-10-02 18:01:07 +010088#include <drm/drmP.h>
89#include <drm/i915_drm.h>
Ben Widawsky254f9652012-06-04 14:42:42 -070090#include "i915_drv.h"
91
Ben Widawsky40521052012-06-04 14:42:43 -070092/* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96#define CONTEXT_ALIGN (64<<10)
97
98static struct i915_hw_context *
99i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100100static int do_switch(struct i915_hw_context *to);
Ben Widawsky40521052012-06-04 14:42:43 -0700101
Ben Widawsky254f9652012-06-04 14:42:42 -0700102static int get_context_size(struct drm_device *dev)
103{
104 struct drm_i915_private *dev_priv = dev->dev_private;
105 int ret;
106 u32 reg;
107
108 switch (INTEL_INFO(dev)->gen) {
109 case 6:
110 reg = I915_READ(CXT_SIZE);
111 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112 break;
113 case 7:
Ben Widawsky4f91dd62012-07-18 10:10:09 -0700114 reg = I915_READ(GEN7_CXT_SIZE);
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700115 if (IS_HASWELL(dev))
Ben Widawskya0de80a2013-06-25 21:53:40 -0700116 ret = HSW_CXT_TOTAL_SIZE;
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700117 else
118 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
Ben Widawsky254f9652012-06-04 14:42:42 -0700119 break;
120 default:
121 BUG();
122 }
123
124 return ret;
125}
126
Mika Kuoppaladce32712013-04-30 13:30:33 +0300127void i915_gem_context_free(struct kref *ctx_ref)
Ben Widawsky40521052012-06-04 14:42:43 -0700128{
Mika Kuoppaladce32712013-04-30 13:30:33 +0300129 struct i915_hw_context *ctx = container_of(ctx_ref,
130 typeof(*ctx), ref);
Ben Widawsky40521052012-06-04 14:42:43 -0700131
Ben Widawskya33afea2013-09-17 21:12:45 -0700132 list_del(&ctx->link);
Ben Widawsky40521052012-06-04 14:42:43 -0700133 drm_gem_object_unreference(&ctx->obj->base);
134 kfree(ctx);
135}
136
Ben Widawsky146937e2012-06-29 10:30:39 -0700137static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700138create_hw_context(struct drm_device *dev,
Ben Widawsky146937e2012-06-29 10:30:39 -0700139 struct drm_i915_file_private *file_priv)
Ben Widawsky40521052012-06-04 14:42:43 -0700140{
141 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky146937e2012-06-29 10:30:39 -0700142 struct i915_hw_context *ctx;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800143 int ret;
Ben Widawsky40521052012-06-04 14:42:43 -0700144
Ben Widawskyf94982b2012-11-10 10:56:04 -0800145 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
Ben Widawsky146937e2012-06-29 10:30:39 -0700146 if (ctx == NULL)
147 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700148
Mika Kuoppaladce32712013-04-30 13:30:33 +0300149 kref_init(&ctx->ref);
Ben Widawsky146937e2012-06-29 10:30:39 -0700150 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
Ben Widawskya33afea2013-09-17 21:12:45 -0700151 INIT_LIST_HEAD(&ctx->link);
Ben Widawsky146937e2012-06-29 10:30:39 -0700152 if (ctx->obj == NULL) {
153 kfree(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700154 DRM_DEBUG_DRIVER("Context object allocated failed\n");
Ben Widawsky146937e2012-06-29 10:30:39 -0700155 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700156 }
157
Chris Wilson4615d4c2013-04-08 14:28:40 +0100158 if (INTEL_INFO(dev)->gen >= 7) {
159 ret = i915_gem_object_set_cache_level(ctx->obj,
Chris Wilson350ec882013-08-06 13:17:02 +0100160 I915_CACHE_L3_LLC);
Ben Widawskybb036412013-05-25 12:26:38 -0700161 /* Failure shouldn't ever happen this early */
162 if (WARN_ON(ret))
Chris Wilson4615d4c2013-04-08 14:28:40 +0100163 goto err_out;
164 }
165
Ben Widawsky40521052012-06-04 14:42:43 -0700166 /* The ring associated with the context object is handled by the normal
167 * object tracking code. We give an initial ring value simple to pass an
168 * assertion in the context switch code.
169 */
Ben Widawsky146937e2012-06-29 10:30:39 -0700170 ctx->ring = &dev_priv->ring[RCS];
Ben Widawskya33afea2013-09-17 21:12:45 -0700171 list_add_tail(&ctx->link, &dev_priv->context_list);
Ben Widawsky40521052012-06-04 14:42:43 -0700172
173 /* Default context will never have a file_priv */
174 if (file_priv == NULL)
Ben Widawsky146937e2012-06-29 10:30:39 -0700175 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700176
Tejun Heoc8c470a2013-02-27 17:04:10 -0800177 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
178 GFP_KERNEL);
179 if (ret < 0)
Ben Widawsky40521052012-06-04 14:42:43 -0700180 goto err_out;
Mika Kuoppaladce32712013-04-30 13:30:33 +0300181
182 ctx->file_priv = file_priv;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800183 ctx->id = ret;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700184 /* NB: Mark all slices as needing a remap so that when the context first
185 * loads it will restore whatever remap state already exists. If there
186 * is no remap info, it will be a NOP. */
187 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
Ben Widawsky40521052012-06-04 14:42:43 -0700188
Ben Widawsky146937e2012-06-29 10:30:39 -0700189 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700190
191err_out:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300192 i915_gem_context_unreference(ctx);
Ben Widawsky146937e2012-06-29 10:30:39 -0700193 return ERR_PTR(ret);
Ben Widawsky40521052012-06-04 14:42:43 -0700194}
195
Ben Widawskye0556842012-06-04 14:42:46 -0700196static inline bool is_default_context(struct i915_hw_context *ctx)
197{
198 return (ctx == ctx->ring->default_context);
199}
200
Ben Widawsky254f9652012-06-04 14:42:42 -0700201/**
202 * The default context needs to exist per ring that uses contexts. It stores the
203 * context state of the GPU for applications that don't utilize HW contexts, as
204 * well as an idle case.
205 */
206static int create_default_context(struct drm_i915_private *dev_priv)
207{
Ben Widawsky40521052012-06-04 14:42:43 -0700208 struct i915_hw_context *ctx;
209 int ret;
210
211 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
212
Ben Widawsky146937e2012-06-29 10:30:39 -0700213 ctx = create_hw_context(dev_priv->dev, NULL);
214 if (IS_ERR(ctx))
215 return PTR_ERR(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700216
217 /* We may need to do things with the shrinker which require us to
218 * immediately switch back to the default context. This can cause a
219 * problem as pinning the default context also requires GTT space which
220 * may not be available. To avoid this we always pin the
221 * default context.
222 */
Ben Widawskyc37e2202013-07-31 16:59:58 -0700223 ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
Ben Widawskybb036412013-05-25 12:26:38 -0700224 if (ret) {
225 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100226 goto err_destroy;
Ben Widawskybb036412013-05-25 12:26:38 -0700227 }
Ben Widawsky40521052012-06-04 14:42:43 -0700228
Chris Wilson9a3b5302012-07-15 12:34:24 +0100229 ret = do_switch(ctx);
Ben Widawskybb036412013-05-25 12:26:38 -0700230 if (ret) {
231 DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100232 goto err_unpin;
Ben Widawskybb036412013-05-25 12:26:38 -0700233 }
Ben Widawskydfabbcb2012-06-04 14:42:51 -0700234
Ben Widawsky71b76d02013-10-14 10:01:37 -0700235 dev_priv->ring[RCS].default_context = ctx;
236
Chris Wilson9a3b5302012-07-15 12:34:24 +0100237 DRM_DEBUG_DRIVER("Default HW context loaded\n");
238 return 0;
239
240err_unpin:
241 i915_gem_object_unpin(ctx->obj);
242err_destroy:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300243 i915_gem_context_unreference(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700244 return ret;
Ben Widawsky254f9652012-06-04 14:42:42 -0700245}
246
247void i915_gem_context_init(struct drm_device *dev)
248{
249 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky254f9652012-06-04 14:42:42 -0700250
Ben Widawskye158c5a2012-06-17 09:37:24 -0700251 if (!HAS_HW_CONTEXTS(dev)) {
252 dev_priv->hw_contexts_disabled = true;
Ben Widawskybb036412013-05-25 12:26:38 -0700253 DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n");
Ben Widawsky254f9652012-06-04 14:42:42 -0700254 return;
Ben Widawskye158c5a2012-06-17 09:37:24 -0700255 }
Ben Widawsky254f9652012-06-04 14:42:42 -0700256
257 /* If called from reset, or thaw... we've been here already */
Ben Widawsky40521052012-06-04 14:42:43 -0700258 if (dev_priv->hw_contexts_disabled ||
259 dev_priv->ring[RCS].default_context)
Ben Widawsky254f9652012-06-04 14:42:42 -0700260 return;
261
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800262 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
Ben Widawsky254f9652012-06-04 14:42:42 -0700263
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800264 if (dev_priv->hw_context_size > (1<<20)) {
Ben Widawsky254f9652012-06-04 14:42:42 -0700265 dev_priv->hw_contexts_disabled = true;
Ben Widawskybb036412013-05-25 12:26:38 -0700266 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
Ben Widawsky254f9652012-06-04 14:42:42 -0700267 return;
268 }
269
270 if (create_default_context(dev_priv)) {
271 dev_priv->hw_contexts_disabled = true;
Ben Widawskybb036412013-05-25 12:26:38 -0700272 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n");
Ben Widawsky254f9652012-06-04 14:42:42 -0700273 return;
274 }
275
276 DRM_DEBUG_DRIVER("HW context support initialized\n");
277}
278
279void i915_gem_context_fini(struct drm_device *dev)
280{
281 struct drm_i915_private *dev_priv = dev->dev_private;
Mika Kuoppaladce32712013-04-30 13:30:33 +0300282 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
Ben Widawsky254f9652012-06-04 14:42:42 -0700283
284 if (dev_priv->hw_contexts_disabled)
285 return;
Ben Widawsky40521052012-06-04 14:42:43 -0700286
Daniel Vetter55a66622012-06-19 21:55:32 +0200287 /* The only known way to stop the gpu from accessing the hw context is
288 * to reset it. Do this as the very last operation to avoid confusing
289 * other code, leading to spurious errors. */
290 intel_gpu_reset(dev);
291
Mika Kuoppala168f8362013-05-03 16:29:08 +0300292 /* When default context is created and switched to, base object refcount
293 * will be 2 (+1 from object creation and +1 from do_switch()).
294 * i915_gem_context_fini() will be called after gpu_idle() has switched
295 * to default context. So we need to unreference the base object once
296 * to offset the do_switch part, so that i915_gem_context_unreference()
297 * can then free the base object correctly. */
Ben Widawsky71b76d02013-10-14 10:01:37 -0700298 WARN_ON(!dev_priv->ring[RCS].last_context);
299 if (dev_priv->ring[RCS].last_context == dctx) {
300 /* Fake switch to NULL context */
301 WARN_ON(dctx->obj->active);
302 i915_gem_object_unpin(dctx->obj);
303 i915_gem_context_unreference(dctx);
304 }
305
306 i915_gem_object_unpin(dctx->obj);
Mika Kuoppaladce32712013-04-30 13:30:33 +0300307 i915_gem_context_unreference(dctx);
Ben Widawsky71b76d02013-10-14 10:01:37 -0700308 dev_priv->ring[RCS].default_context = NULL;
309 dev_priv->ring[RCS].last_context = NULL;
Ben Widawsky254f9652012-06-04 14:42:42 -0700310}
311
Ben Widawsky40521052012-06-04 14:42:43 -0700312static int context_idr_cleanup(int id, void *p, void *data)
313{
Daniel Vetter73c273e2012-06-19 20:27:39 +0200314 struct i915_hw_context *ctx = p;
Ben Widawsky40521052012-06-04 14:42:43 -0700315
316 BUG_ON(id == DEFAULT_CONTEXT_ID);
Ben Widawsky40521052012-06-04 14:42:43 -0700317
Mika Kuoppaladce32712013-04-30 13:30:33 +0300318 i915_gem_context_unreference(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700319 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700320}
321
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300322struct i915_ctx_hang_stats *
Chris Wilson11fa3382013-07-03 17:22:06 +0300323i915_gem_context_get_hang_stats(struct drm_device *dev,
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300324 struct drm_file *file,
325 u32 id)
326{
Chris Wilson11fa3382013-07-03 17:22:06 +0300327 struct drm_i915_private *dev_priv = dev->dev_private;
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300328 struct drm_i915_file_private *file_priv = file->driver_priv;
Chris Wilson11fa3382013-07-03 17:22:06 +0300329 struct i915_hw_context *ctx;
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300330
331 if (id == DEFAULT_CONTEXT_ID)
332 return &file_priv->hang_stats;
333
Chris Wilson11fa3382013-07-03 17:22:06 +0300334 ctx = NULL;
335 if (!dev_priv->hw_contexts_disabled)
336 ctx = i915_gem_context_get(file->driver_priv, id);
337 if (ctx == NULL)
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300338 return ERR_PTR(-ENOENT);
339
Chris Wilson11fa3382013-07-03 17:22:06 +0300340 return &ctx->hang_stats;
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300341}
342
Ben Widawsky254f9652012-06-04 14:42:42 -0700343void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
344{
Ben Widawsky40521052012-06-04 14:42:43 -0700345 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky254f9652012-06-04 14:42:42 -0700346
Ben Widawsky40521052012-06-04 14:42:43 -0700347 mutex_lock(&dev->struct_mutex);
Daniel Vetter73c273e2012-06-19 20:27:39 +0200348 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
Ben Widawsky40521052012-06-04 14:42:43 -0700349 idr_destroy(&file_priv->context_idr);
350 mutex_unlock(&dev->struct_mutex);
351}
352
Ben Widawskye0556842012-06-04 14:42:46 -0700353static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700354i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
355{
356 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
Ben Widawsky254f9652012-06-04 14:42:42 -0700357}
Ben Widawskye0556842012-06-04 14:42:46 -0700358
359static inline int
360mi_set_context(struct intel_ring_buffer *ring,
361 struct i915_hw_context *new_context,
362 u32 hw_flags)
363{
364 int ret;
365
Ben Widawsky12b02862012-06-04 14:42:50 -0700366 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
367 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
368 * explicitly, so we rely on the value at ring init, stored in
369 * itlb_before_ctx_switch.
370 */
371 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
Chris Wilsonac82ea22012-10-01 14:27:04 +0100372 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
Ben Widawsky12b02862012-06-04 14:42:50 -0700373 if (ret)
374 return ret;
375 }
376
Ben Widawskye37ec392012-06-04 14:42:48 -0700377 ret = intel_ring_begin(ring, 6);
Ben Widawskye0556842012-06-04 14:42:46 -0700378 if (ret)
379 return ret;
380
Damien Lespiau8693a822013-05-03 18:48:11 +0100381 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
Ben Widawskye37ec392012-06-04 14:42:48 -0700382 if (IS_GEN7(ring->dev))
383 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
384 else
385 intel_ring_emit(ring, MI_NOOP);
386
Ben Widawskye0556842012-06-04 14:42:46 -0700387 intel_ring_emit(ring, MI_NOOP);
388 intel_ring_emit(ring, MI_SET_CONTEXT);
Ben Widawskyf343c5f2013-07-05 14:41:04 -0700389 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
Ben Widawskye0556842012-06-04 14:42:46 -0700390 MI_MM_SPACE_GTT |
391 MI_SAVE_EXT_STATE_EN |
392 MI_RESTORE_EXT_STATE_EN |
393 hw_flags);
394 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
395 intel_ring_emit(ring, MI_NOOP);
396
Ben Widawskye37ec392012-06-04 14:42:48 -0700397 if (IS_GEN7(ring->dev))
398 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
399 else
400 intel_ring_emit(ring, MI_NOOP);
401
Ben Widawskye0556842012-06-04 14:42:46 -0700402 intel_ring_advance(ring);
403
404 return ret;
405}
406
Chris Wilson9a3b5302012-07-15 12:34:24 +0100407static int do_switch(struct i915_hw_context *to)
Ben Widawskye0556842012-06-04 14:42:46 -0700408{
Chris Wilson9a3b5302012-07-15 12:34:24 +0100409 struct intel_ring_buffer *ring = to->ring;
Chris Wilson112522f2013-05-02 16:48:07 +0300410 struct i915_hw_context *from = ring->last_context;
Ben Widawskye0556842012-06-04 14:42:46 -0700411 u32 hw_flags = 0;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700412 int ret, i;
Ben Widawskye0556842012-06-04 14:42:46 -0700413
Chris Wilson112522f2013-05-02 16:48:07 +0300414 BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
Ben Widawskye0556842012-06-04 14:42:46 -0700415
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700416 if (from == to && !to->remap_slice)
Chris Wilson9a3b5302012-07-15 12:34:24 +0100417 return 0;
418
Ben Widawskyc37e2202013-07-31 16:59:58 -0700419 ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
Ben Widawskye0556842012-06-04 14:42:46 -0700420 if (ret)
421 return ret;
422
Chris Wilsond3373a22012-07-15 12:34:22 +0100423 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
424 * that thanks to write = false in this call and us not setting any gpu
425 * write domains when putting a context object onto the active list
426 * (when switching away from it), this won't block.
427 * XXX: We need a real interface to do this instead of trickery. */
428 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
429 if (ret) {
430 i915_gem_object_unpin(to->obj);
431 return ret;
432 }
433
Daniel Vetter3af7b852012-06-14 00:08:32 +0200434 if (!to->obj->has_global_gtt_mapping)
435 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
436
Ben Widawskye0556842012-06-04 14:42:46 -0700437 if (!to->is_initialized || is_default_context(to))
438 hw_flags |= MI_RESTORE_INHIBIT;
Ben Widawskye0556842012-06-04 14:42:46 -0700439
Ben Widawskye0556842012-06-04 14:42:46 -0700440 ret = mi_set_context(ring, to, hw_flags);
441 if (ret) {
442 i915_gem_object_unpin(to->obj);
443 return ret;
444 }
445
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700446 for (i = 0; i < MAX_L3_SLICES; i++) {
447 if (!(to->remap_slice & (1<<i)))
448 continue;
449
450 ret = i915_gem_l3_remap(ring, i);
451 /* If it failed, try again next round */
452 if (ret)
453 DRM_DEBUG_DRIVER("L3 remapping failed\n");
454 else
455 to->remap_slice &= ~(1<<i);
456 }
457
Ben Widawskye0556842012-06-04 14:42:46 -0700458 /* The backing object for the context is done after switching to the
459 * *next* context. Therefore we cannot retire the previous context until
460 * the next context has already started running. In fact, the below code
461 * is a bit suboptimal because the retiring can occur simply after the
462 * MI_SET_CONTEXT instead of when the next seqno has completed.
463 */
Chris Wilson112522f2013-05-02 16:48:07 +0300464 if (from != NULL) {
465 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
Ben Widawskye2d05a82013-09-24 09:57:58 -0700466 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
Ben Widawskye0556842012-06-04 14:42:46 -0700467 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
468 * whole damn pipeline, we don't need to explicitly mark the
469 * object dirty. The only exception is that the context must be
470 * correct in case the object gets swapped out. Ideally we'd be
471 * able to defer doing this until we know the object would be
472 * swapped, but there is no way to do that yet.
473 */
Chris Wilson112522f2013-05-02 16:48:07 +0300474 from->obj->dirty = 1;
475 BUG_ON(from->obj->ring != ring);
Chris Wilsonb259b312012-07-15 12:34:23 +0100476
Chris Wilsonc0321e22013-08-26 19:50:53 -0300477 /* obj is kept alive until the next request by its active ref */
Chris Wilson112522f2013-05-02 16:48:07 +0300478 i915_gem_object_unpin(from->obj);
479 i915_gem_context_unreference(from);
Ben Widawskye0556842012-06-04 14:42:46 -0700480 }
481
Chris Wilson112522f2013-05-02 16:48:07 +0300482 i915_gem_context_reference(to);
483 ring->last_context = to;
Ben Widawskye0556842012-06-04 14:42:46 -0700484 to->is_initialized = true;
485
486 return 0;
487}
488
489/**
490 * i915_switch_context() - perform a GPU context switch.
491 * @ring: ring for which we'll execute the context switch
492 * @file_priv: file_priv associated with the context, may be NULL
493 * @id: context id number
494 * @seqno: sequence number by which the new context will be switched to
495 * @flags:
496 *
497 * The context life cycle is simple. The context refcount is incremented and
498 * decremented by 1 and create and destroy. If the context is in use by the GPU,
499 * it will have a refoucnt > 1. This allows us to destroy the context abstract
500 * object while letting the normal object tracking destroy the backing BO.
501 */
502int i915_switch_context(struct intel_ring_buffer *ring,
503 struct drm_file *file,
504 int to_id)
505{
506 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Ben Widawskye0556842012-06-04 14:42:46 -0700507 struct i915_hw_context *to;
Ben Widawskye0556842012-06-04 14:42:46 -0700508
509 if (dev_priv->hw_contexts_disabled)
510 return 0;
511
Ben Widawsky186507e2013-04-23 23:15:29 -0700512 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
513
Ben Widawskye0556842012-06-04 14:42:46 -0700514 if (ring != &dev_priv->ring[RCS])
515 return 0;
516
Ben Widawskye0556842012-06-04 14:42:46 -0700517 if (to_id == DEFAULT_CONTEXT_ID) {
518 to = ring->default_context;
519 } else {
Chris Wilson9a3b5302012-07-15 12:34:24 +0100520 if (file == NULL)
521 return -EINVAL;
522
523 to = i915_gem_context_get(file->driver_priv, to_id);
Ben Widawskye0556842012-06-04 14:42:46 -0700524 if (to == NULL)
Daniel Vetter0d326012012-06-19 16:52:31 +0200525 return -ENOENT;
Ben Widawskye0556842012-06-04 14:42:46 -0700526 }
527
Chris Wilson9a3b5302012-07-15 12:34:24 +0100528 return do_switch(to);
Ben Widawskye0556842012-06-04 14:42:46 -0700529}
Ben Widawsky84624812012-06-04 14:42:54 -0700530
531int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
532 struct drm_file *file)
533{
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200534 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky84624812012-06-04 14:42:54 -0700535 struct drm_i915_gem_context_create *args = data;
536 struct drm_i915_file_private *file_priv = file->driver_priv;
537 struct i915_hw_context *ctx;
538 int ret;
539
540 if (!(dev->driver->driver_features & DRIVER_GEM))
541 return -ENODEV;
542
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200543 if (dev_priv->hw_contexts_disabled)
544 return -ENODEV;
545
Ben Widawsky84624812012-06-04 14:42:54 -0700546 ret = i915_mutex_lock_interruptible(dev);
547 if (ret)
548 return ret;
549
Ben Widawsky146937e2012-06-29 10:30:39 -0700550 ctx = create_hw_context(dev, file_priv);
Ben Widawsky84624812012-06-04 14:42:54 -0700551 mutex_unlock(&dev->struct_mutex);
Dan Carpenterbe636382012-07-17 09:44:49 +0300552 if (IS_ERR(ctx))
553 return PTR_ERR(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700554
555 args->ctx_id = ctx->id;
556 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
557
Dan Carpenterbe636382012-07-17 09:44:49 +0300558 return 0;
Ben Widawsky84624812012-06-04 14:42:54 -0700559}
560
561int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
562 struct drm_file *file)
563{
564 struct drm_i915_gem_context_destroy *args = data;
565 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky84624812012-06-04 14:42:54 -0700566 struct i915_hw_context *ctx;
567 int ret;
568
569 if (!(dev->driver->driver_features & DRIVER_GEM))
570 return -ENODEV;
571
572 ret = i915_mutex_lock_interruptible(dev);
573 if (ret)
574 return ret;
575
576 ctx = i915_gem_context_get(file_priv, args->ctx_id);
577 if (!ctx) {
578 mutex_unlock(&dev->struct_mutex);
Daniel Vetter0d326012012-06-19 16:52:31 +0200579 return -ENOENT;
Ben Widawsky84624812012-06-04 14:42:54 -0700580 }
581
Mika Kuoppaladce32712013-04-30 13:30:33 +0300582 idr_remove(&ctx->file_priv->context_idr, ctx->id);
583 i915_gem_context_unreference(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700584 mutex_unlock(&dev->struct_mutex);
585
586 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
587 return 0;
588}