blob: 9bc37c437874a6ba185799680a093598cb213948 [file] [log] [blame]
Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Viresh Kumarbbcf0712014-09-09 19:58:03 +05307 * The OPP code in function set_target() is reused from
Shawn Guo95ceafd2012-09-06 07:09:11 +00008 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Thomas Petazzoni34e5a522014-10-19 11:30:28 +020021#include <linux/cpufreq-dt.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040022#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000023#include <linux/err.h>
24#include <linux/module.h>
25#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050026#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000027#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000028#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040030#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000031
Viresh Kumard2f31f12014-08-28 11:22:28 +053032struct private_data {
33 struct device *cpu_dev;
34 struct regulator *cpu_reg;
35 struct thermal_cooling_device *cdev;
36 unsigned int voltage_tolerance; /* in percentage */
37};
Shawn Guo95ceafd2012-09-06 07:09:11 +000038
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +020039static struct freq_attr *cpufreq_dt_attr[] = {
40 &cpufreq_freq_attr_scaling_available_freqs,
41 NULL, /* Extra space for boost-attr if required */
42 NULL,
43};
44
Viresh Kumarbbcf0712014-09-09 19:58:03 +053045static int set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000046{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050047 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053048 struct cpufreq_frequency_table *freq_table = policy->freq_table;
49 struct clk *cpu_clk = policy->clk;
50 struct private_data *priv = policy->driver_data;
51 struct device *cpu_dev = priv->cpu_dev;
52 struct regulator *cpu_reg = priv->cpu_reg;
Andrzej Hajda929ca892015-12-30 12:18:42 +010053 unsigned long volt = 0, tol = 0;
54 int volt_old = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053055 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010056 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000057 int ret;
58
Shawn Guo95ceafd2012-09-06 07:09:11 +000059 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080060 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000061 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000062
Viresh Kumard4019f02013-08-14 19:38:24 +053063 freq_exact = freq_Hz;
64 new_freq = freq_Hz / 1000;
65 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000066
Mark Brown4a511de2013-08-13 14:58:24 +020067 if (!IS_ERR(cpu_reg)) {
Stefan Wahren0a1e8792014-10-17 22:09:48 +000068 unsigned long opp_freq;
69
Nishanth Menon78e8eb82013-01-18 19:52:33 +000070 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050071 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000072 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000073 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053074 dev_err(cpu_dev, "failed to find OPP for %ld\n",
75 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053076 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000077 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050078 volt = dev_pm_opp_get_voltage(opp);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000079 opp_freq = dev_pm_opp_get_freq(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000080 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053081 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000082 volt_old = regulator_get_voltage(cpu_reg);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000083 dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
84 opp_freq / 1000, volt);
Shawn Guo95ceafd2012-09-06 07:09:11 +000085 }
86
Andrzej Hajda929ca892015-12-30 12:18:42 +010087 dev_dbg(cpu_dev, "%u MHz, %d mV --> %u MHz, %ld mV\n",
Stefan Wahren8197bb12014-10-17 22:09:49 +000088 old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053089 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000090
91 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053092 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000093 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
94 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053095 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
96 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053097 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000098 }
99 }
100
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +0100101 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000102 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530103 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Stefan Wahren8197bb12014-10-17 22:09:49 +0000104 if (!IS_ERR(cpu_reg) && volt_old > 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000105 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +0530106 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000107 }
108
109 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530110 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +0000111 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
112 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530113 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
114 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530115 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000116 }
117 }
118
Viresh Kumarfd143b42013-04-01 12:57:44 +0000119 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000120}
121
Viresh Kumar95b61052014-08-28 11:22:30 +0530122static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530123 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000124{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530125 struct device *cpu_dev;
126 struct regulator *cpu_reg;
127 struct clk *cpu_clk;
128 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530129 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000130
Viresh Kumar95b61052014-08-28 11:22:30 +0530131 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100132 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530133 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100134 return -ENODEV;
135 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000136
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530137 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530138 if (!cpu)
139 reg = reg_cpu0;
140 else
141 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530142
143try_again:
144 cpu_reg = regulator_get_optional(cpu_dev, reg);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000145 if (IS_ERR(cpu_reg)) {
146 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530147 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000148 * not yet registered, we should try defering probe.
149 */
150 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530151 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
152 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530153 return -EPROBE_DEFER;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000154 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530155
156 /* Try with "cpu-supply" */
157 if (reg == reg_cpu0) {
158 reg = reg_cpu;
159 goto try_again;
160 }
161
Thomas Petazzonia00de1a2014-10-19 11:30:29 +0200162 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
163 cpu, PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000164 }
165
Lucas Stache3beb0a2014-05-16 12:20:42 +0200166 cpu_clk = clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000167 if (IS_ERR(cpu_clk)) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530168 /* put regulator */
169 if (!IS_ERR(cpu_reg))
170 regulator_put(cpu_reg);
171
Shawn Guo95ceafd2012-09-06 07:09:11 +0000172 ret = PTR_ERR(cpu_clk);
Viresh Kumar48a86242014-08-28 11:22:26 +0530173
174 /*
175 * If cpu's clk node is present, but clock is not yet
176 * registered, we should try defering probe.
177 */
178 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530179 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530180 else
Abhilash Kesavan71796212014-10-31 18:09:33 +0530181 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
182 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530183 } else {
184 *cdev = cpu_dev;
185 *creg = cpu_reg;
186 *cclk = cpu_clk;
187 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530188
Viresh Kumard2f31f12014-08-28 11:22:28 +0530189 return ret;
190}
191
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530192static int cpufreq_init(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530193{
194 struct cpufreq_frequency_table *freq_table;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530195 struct device_node *np;
196 struct private_data *priv;
197 struct device *cpu_dev;
198 struct regulator *cpu_reg;
199 struct clk *cpu_clk;
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200200 struct dev_pm_opp *suspend_opp;
Lucas Stach045ee452014-10-24 15:05:55 +0200201 unsigned long min_uV = ~0, max_uV = 0;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530202 unsigned int transition_latency;
Viresh Kumar2e02d872015-07-29 16:23:10 +0530203 bool need_update = false;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530204 int ret;
205
Viresh Kumar95b61052014-08-28 11:22:30 +0530206 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530207 if (ret) {
Geert Uytterhoevenedd52b12014-10-23 11:52:54 +0200208 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530209 return ret;
210 }
211
212 np = of_node_get(cpu_dev->of_node);
213 if (!np) {
214 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
215 ret = -ENOENT;
216 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000217 }
218
Viresh Kumar2e02d872015-07-29 16:23:10 +0530219 /* Get OPP-sharing information from "operating-points-v2" bindings */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530220 ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530221 if (ret) {
222 /*
223 * operating-points-v2 not supported, fallback to old method of
224 * finding shared-OPPs for backward compatibility.
225 */
226 if (ret == -ENOENT)
227 need_update = true;
228 else
229 goto out_node_put;
230 }
231
232 /*
233 * Initialize OPP tables for all policy->cpus. They will be shared by
234 * all CPUs which have marked their CPUs shared with OPP bindings.
235 *
236 * For platforms not using operating-points-v2 bindings, we do this
237 * before updating policy->cpus. Otherwise, we will end up creating
238 * duplicate OPPs for policy->cpus.
239 *
240 * OPPs might be populated at runtime, don't check for error here
241 */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530242 dev_pm_opp_of_cpumask_add_table(policy->cpus);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530243
Viresh Kumar7d5d0c82015-09-02 14:36:48 +0530244 /*
245 * But we need OPP table to function so if it is not there let's
246 * give platform code chance to provide it for us.
247 */
248 ret = dev_pm_opp_get_opp_count(cpu_dev);
249 if (ret <= 0) {
250 pr_debug("OPP table is not ready, deferring probe\n");
251 ret = -EPROBE_DEFER;
252 goto out_free_opp;
253 }
254
Viresh Kumar2e02d872015-07-29 16:23:10 +0530255 if (need_update) {
256 struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
257
258 if (!pd || !pd->independent_clocks)
259 cpumask_setall(policy->cpus);
260
261 /*
262 * OPP tables are initialized only for policy->cpu, do it for
263 * others as well.
264 */
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530265 ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
Viresh Kumar8bc86282015-09-02 14:36:49 +0530266 if (ret)
267 dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
268 __func__, ret);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530269
270 of_property_read_u32(np, "clock-latency", &transition_latency);
271 } else {
272 transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
273 }
Shawn Guo95ceafd2012-09-06 07:09:11 +0000274
Viresh Kumard2f31f12014-08-28 11:22:28 +0530275 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
276 if (!priv) {
277 ret = -ENOMEM;
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530278 goto out_free_opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530279 }
280
281 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000282
Viresh Kumar2e02d872015-07-29 16:23:10 +0530283 if (!transition_latency)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000284 transition_latency = CPUFREQ_ETERNAL;
285
Philipp Zabel43c638e2013-09-26 11:19:37 +0200286 if (!IS_ERR(cpu_reg)) {
Lucas Stach045ee452014-10-24 15:05:55 +0200287 unsigned long opp_freq = 0;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000288
289 /*
Lucas Stach045ee452014-10-24 15:05:55 +0200290 * Disable any OPPs where the connected regulator isn't able to
291 * provide the specified voltage and record minimum and maximum
292 * voltage levels.
Shawn Guo95ceafd2012-09-06 07:09:11 +0000293 */
Lucas Stach045ee452014-10-24 15:05:55 +0200294 while (1) {
295 struct dev_pm_opp *opp;
296 unsigned long opp_uV, tol_uV;
297
298 rcu_read_lock();
299 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
300 if (IS_ERR(opp)) {
301 rcu_read_unlock();
302 break;
303 }
304 opp_uV = dev_pm_opp_get_voltage(opp);
305 rcu_read_unlock();
306
307 tol_uV = opp_uV * priv->voltage_tolerance / 100;
Viresh Kumara2022002015-09-02 14:36:50 +0530308 if (regulator_is_supported_voltage(cpu_reg,
309 opp_uV - tol_uV,
Lucas Stach045ee452014-10-24 15:05:55 +0200310 opp_uV + tol_uV)) {
311 if (opp_uV < min_uV)
312 min_uV = opp_uV;
313 if (opp_uV > max_uV)
314 max_uV = opp_uV;
315 } else {
316 dev_pm_opp_disable(cpu_dev, opp_freq);
317 }
318
319 opp_freq++;
320 }
321
Shawn Guo95ceafd2012-09-06 07:09:11 +0000322 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
323 if (ret > 0)
324 transition_latency += ret * 1000;
325 }
326
Lucas Stach045ee452014-10-24 15:05:55 +0200327 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
328 if (ret) {
329 pr_err("failed to init cpufreq table: %d\n", ret);
330 goto out_free_priv;
331 }
332
Viresh Kumard2f31f12014-08-28 11:22:28 +0530333 priv->cpu_dev = cpu_dev;
334 priv->cpu_reg = cpu_reg;
335 policy->driver_data = priv;
336
337 policy->clk = cpu_clk;
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200338
339 rcu_read_lock();
340 suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev);
341 if (suspend_opp)
342 policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000;
343 rcu_read_unlock();
344
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200345 ret = cpufreq_table_validate_and_show(policy, freq_table);
346 if (ret) {
347 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
348 ret);
Viresh Kumar9a004422014-11-27 06:07:52 +0530349 goto out_free_cpufreq_table;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200350 }
351
Viresh Kumard15fa862015-07-29 16:23:11 +0530352 /* Support turbo/boost mode */
353 if (policy_has_boost_freq(policy)) {
354 /* This gets disabled by core on driver unregister */
355 ret = cpufreq_enable_boost_support();
356 if (ret)
357 goto out_free_cpufreq_table;
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200358 cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
Viresh Kumard15fa862015-07-29 16:23:11 +0530359 }
360
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200361 policy->cpuinfo.transition_latency = transition_latency;
362
Lucas Stachf9739d22014-09-26 15:33:46 +0200363 of_node_put(np);
364
Shawn Guo95ceafd2012-09-06 07:09:11 +0000365 return 0;
366
Viresh Kumar9a004422014-11-27 06:07:52 +0530367out_free_cpufreq_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500368 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Lucas Stach045ee452014-10-24 15:05:55 +0200369out_free_priv:
370 kfree(priv);
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530371out_free_opp:
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530372 dev_pm_opp_of_cpumask_remove_table(policy->cpus);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530373out_node_put:
Shawn Guo95ceafd2012-09-06 07:09:11 +0000374 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530375out_put_reg_clk:
376 clk_put(cpu_clk);
377 if (!IS_ERR(cpu_reg))
378 regulator_put(cpu_reg);
379
380 return ret;
381}
382
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530383static int cpufreq_exit(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530384{
385 struct private_data *priv = policy->driver_data;
386
Markus Elfring17ad13b2015-02-03 19:21:21 +0100387 cpufreq_cooling_unregister(priv->cdev);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530388 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
Viresh Kumar8f8d37b2015-09-04 13:47:24 +0530389 dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530390 clk_put(policy->clk);
391 if (!IS_ERR(priv->cpu_reg))
392 regulator_put(priv->cpu_reg);
393 kfree(priv);
394
395 return 0;
396}
397
Viresh Kumar9a004422014-11-27 06:07:52 +0530398static void cpufreq_ready(struct cpufreq_policy *policy)
399{
400 struct private_data *priv = policy->driver_data;
401 struct device_node *np = of_node_get(priv->cpu_dev->of_node);
402
403 if (WARN_ON(!np))
404 return;
405
406 /*
407 * For now, just loading the cooling device;
408 * thermal DT code takes care of matching them.
409 */
410 if (of_find_property(np, "#cooling-cells", NULL)) {
Punit Agrawalf8fa8ae2015-11-17 12:06:22 +0000411 u32 power_coefficient = 0;
412
413 of_property_read_u32(np, "dynamic-power-coefficient",
414 &power_coefficient);
415
416 priv->cdev = of_cpufreq_power_cooling_register(np,
417 policy->related_cpus, power_coefficient, NULL);
Viresh Kumar9a004422014-11-27 06:07:52 +0530418 if (IS_ERR(priv->cdev)) {
419 dev_err(priv->cpu_dev,
420 "running cpufreq without cooling device: %ld\n",
421 PTR_ERR(priv->cdev));
422
423 priv->cdev = NULL;
424 }
425 }
426
427 of_node_put(np);
428}
429
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530430static struct cpufreq_driver dt_cpufreq_driver = {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530431 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
432 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530433 .target_index = set_target,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530434 .get = cpufreq_generic_get,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530435 .init = cpufreq_init,
436 .exit = cpufreq_exit,
Viresh Kumar9a004422014-11-27 06:07:52 +0530437 .ready = cpufreq_ready,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530438 .name = "cpufreq-dt",
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200439 .attr = cpufreq_dt_attr,
Bartlomiej Zolnierkiewicz953ba9f2015-09-08 18:41:03 +0200440 .suspend = cpufreq_generic_suspend,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530441};
442
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530443static int dt_cpufreq_probe(struct platform_device *pdev)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530444{
445 struct device *cpu_dev;
446 struct regulator *cpu_reg;
447 struct clk *cpu_clk;
448 int ret;
449
450 /*
451 * All per-cluster (CPUs sharing clock/voltages) initialization is done
452 * from ->init(). In probe(), we just need to make sure that clk and
453 * regulators are available. Else defer probe and retry.
454 *
455 * FIXME: Is checking this only for CPU0 sufficient ?
456 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530457 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530458 if (ret)
459 return ret;
460
461 clk_put(cpu_clk);
462 if (!IS_ERR(cpu_reg))
463 regulator_put(cpu_reg);
464
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200465 dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
466
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530467 ret = cpufreq_register_driver(&dt_cpufreq_driver);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530468 if (ret)
469 dev_err(cpu_dev, "failed register driver: %d\n", ret);
470
Shawn Guo95ceafd2012-09-06 07:09:11 +0000471 return ret;
472}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000473
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530474static int dt_cpufreq_remove(struct platform_device *pdev)
Shawn Guo5553f9e2013-01-30 14:27:49 +0000475{
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530476 cpufreq_unregister_driver(&dt_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000477 return 0;
478}
479
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530480static struct platform_driver dt_cpufreq_platdrv = {
Shawn Guo5553f9e2013-01-30 14:27:49 +0000481 .driver = {
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530482 .name = "cpufreq-dt",
Shawn Guo5553f9e2013-01-30 14:27:49 +0000483 },
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530484 .probe = dt_cpufreq_probe,
485 .remove = dt_cpufreq_remove,
Shawn Guo5553f9e2013-01-30 14:27:49 +0000486};
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530487module_platform_driver(dt_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000488
Felipe Balbi07949bf2015-05-08 14:57:30 -0500489MODULE_ALIAS("platform:cpufreq-dt");
Viresh Kumar748c8762014-08-28 11:22:24 +0530490MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000491MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530492MODULE_DESCRIPTION("Generic cpufreq driver");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000493MODULE_LICENSE("GPL");