Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel IO-APIC support for multi-Pentium hosts. |
| 3 | * |
| 4 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo |
| 5 | * |
| 6 | * Many thanks to Stig Venaas for trying out countless experimental |
| 7 | * patches and reporting/debugging problems patiently! |
| 8 | * |
| 9 | * (c) 1999, Multiple IO-APIC support, developed by |
| 10 | * Ken-ichi Yaku <yaku@css1.kbnes.nec.co.jp> and |
| 11 | * Hidemi Kishimoto <kisimoto@css1.kbnes.nec.co.jp>, |
| 12 | * further tested and cleaned up by Zach Brown <zab@redhat.com> |
| 13 | * and Ingo Molnar <mingo@redhat.com> |
| 14 | * |
| 15 | * Fixes |
| 16 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
| 17 | * thanks to Eric Gilmore |
| 18 | * and Rolf G. Tews |
| 19 | * for testing these extensively |
| 20 | * Paul Diefenbaugh : Added full ACPI support |
| 21 | */ |
| 22 | |
| 23 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/sched.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 28 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/mc146818rtc.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <linux/acpi.h> |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/sysdev.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 34 | #include <linux/msi.h> |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 35 | #include <linux/htirq.h> |
Nigel Cunningham | 7dfb710 | 2006-12-06 20:34:23 -0800 | [diff] [blame] | 36 | #include <linux/freezer.h> |
Eric W. Biederman | f26d6a2 | 2007-05-02 19:27:19 +0200 | [diff] [blame] | 37 | #include <linux/kthread.h> |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 38 | #include <linux/jiffies.h> /* time_after() */ |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 39 | #ifdef CONFIG_ACPI |
| 40 | #include <acpi/acpi_bus.h> |
| 41 | #endif |
| 42 | #include <linux/bootmem.h> |
| 43 | #include <linux/dmar.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 44 | #include <linux/hpet.h> |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 45 | |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 46 | #include <asm/idle.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/io.h> |
| 48 | #include <asm/smp.h> |
| 49 | #include <asm/desc.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 50 | #include <asm/proto.h> |
| 51 | #include <asm/acpi.h> |
| 52 | #include <asm/dma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | #include <asm/timer.h> |
Ingo Molnar | 306e440 | 2005-06-30 02:58:55 -0700 | [diff] [blame] | 54 | #include <asm/i8259.h> |
Don Zickus | 3e4ff11 | 2006-06-26 13:57:01 +0200 | [diff] [blame] | 55 | #include <asm/nmi.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 56 | #include <asm/msidef.h> |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 57 | #include <asm/hypertransport.h> |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 58 | #include <asm/setup.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 59 | #include <asm/irq_remapping.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 60 | #include <asm/hpet.h> |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 61 | #include <asm/uv/uv_hub.h> |
| 62 | #include <asm/uv/uv_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 64 | #include <mach_ipi.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | #include <mach_apic.h> |
Andi Kleen | 874c4fe | 2006-09-26 10:52:26 +0200 | [diff] [blame] | 66 | #include <mach_apicdef.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 68 | #define __apicdebuginit(type) static type __init |
| 69 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 71 | * Is the SiS APIC rmw bug present ? |
| 72 | * -1 = don't know, 0 = no, 1 = yes |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | */ |
| 74 | int sis_apic_bug = -1; |
| 75 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 76 | static DEFINE_SPINLOCK(ioapic_lock); |
| 77 | static DEFINE_SPINLOCK(vector_lock); |
| 78 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 79 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | * # of IRQ routing registers |
| 81 | */ |
| 82 | int nr_ioapic_registers[MAX_IO_APICS]; |
| 83 | |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 84 | /* I/O APIC entries */ |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 85 | struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 86 | int nr_ioapics; |
| 87 | |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 88 | /* MP IRQ source entries */ |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 89 | struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 90 | |
| 91 | /* # of MP IRQ source entries */ |
| 92 | int mp_irq_entries; |
| 93 | |
Alexey Starikovskiy | 8732fc4 | 2008-05-19 19:47:16 +0400 | [diff] [blame] | 94 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 95 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 96 | #endif |
| 97 | |
| 98 | DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
| 99 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 100 | int skip_ioapic_setup; |
| 101 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 102 | static int __init parse_noapic(char *str) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 103 | { |
| 104 | /* disable IO-APIC */ |
| 105 | disable_ioapic_setup(); |
| 106 | return 0; |
| 107 | } |
| 108 | early_param("noapic", parse_noapic); |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 109 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 110 | struct irq_pin_list; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 111 | |
| 112 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | * This is performance-critical, we want to do it O(1) |
| 114 | * |
| 115 | * the indexing order of this array favors 1:1 mappings |
| 116 | * between pins and IRQs. |
| 117 | */ |
| 118 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 119 | struct irq_pin_list { |
| 120 | int apic, pin; |
| 121 | struct irq_pin_list *next; |
| 122 | }; |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 123 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 124 | static struct irq_pin_list *get_one_free_irq_2_pin(int cpu) |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 125 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 126 | struct irq_pin_list *pin; |
| 127 | int node; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 128 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 129 | node = cpu_to_node(cpu); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 130 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 131 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); |
| 132 | printk(KERN_DEBUG " alloc irq_2_pin on cpu %d node %d\n", cpu, node); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 133 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 134 | return pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 135 | } |
| 136 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 137 | struct irq_cfg { |
| 138 | struct irq_pin_list *irq_2_pin; |
| 139 | cpumask_t domain; |
| 140 | cpumask_t old_domain; |
| 141 | unsigned move_cleanup_count; |
| 142 | u8 vector; |
| 143 | u8 move_in_progress : 1; |
| 144 | }; |
| 145 | |
| 146 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
| 147 | #ifdef CONFIG_SPARSE_IRQ |
| 148 | static struct irq_cfg irq_cfgx[] = { |
| 149 | #else |
| 150 | static struct irq_cfg irq_cfgx[NR_IRQS] = { |
| 151 | #endif |
| 152 | [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, |
| 153 | [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, |
| 154 | [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, |
| 155 | [3] = { .domain = CPU_MASK_ALL, .vector = IRQ3_VECTOR, }, |
| 156 | [4] = { .domain = CPU_MASK_ALL, .vector = IRQ4_VECTOR, }, |
| 157 | [5] = { .domain = CPU_MASK_ALL, .vector = IRQ5_VECTOR, }, |
| 158 | [6] = { .domain = CPU_MASK_ALL, .vector = IRQ6_VECTOR, }, |
| 159 | [7] = { .domain = CPU_MASK_ALL, .vector = IRQ7_VECTOR, }, |
| 160 | [8] = { .domain = CPU_MASK_ALL, .vector = IRQ8_VECTOR, }, |
| 161 | [9] = { .domain = CPU_MASK_ALL, .vector = IRQ9_VECTOR, }, |
| 162 | [10] = { .domain = CPU_MASK_ALL, .vector = IRQ10_VECTOR, }, |
| 163 | [11] = { .domain = CPU_MASK_ALL, .vector = IRQ11_VECTOR, }, |
| 164 | [12] = { .domain = CPU_MASK_ALL, .vector = IRQ12_VECTOR, }, |
| 165 | [13] = { .domain = CPU_MASK_ALL, .vector = IRQ13_VECTOR, }, |
| 166 | [14] = { .domain = CPU_MASK_ALL, .vector = IRQ14_VECTOR, }, |
| 167 | [15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, }, |
| 168 | }; |
| 169 | |
| 170 | void __init arch_early_irq_init(void) |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 171 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 172 | struct irq_cfg *cfg; |
| 173 | struct irq_desc *desc; |
| 174 | int count; |
| 175 | int i; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 176 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 177 | cfg = irq_cfgx; |
| 178 | count = ARRAY_SIZE(irq_cfgx); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 179 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 180 | for (i = 0; i < count; i++) { |
| 181 | desc = irq_to_desc(i); |
| 182 | desc->chip_data = &cfg[i]; |
| 183 | } |
| 184 | } |
| 185 | |
| 186 | #ifdef CONFIG_SPARSE_IRQ |
| 187 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 188 | { |
| 189 | struct irq_cfg *cfg = NULL; |
| 190 | struct irq_desc *desc; |
| 191 | |
| 192 | desc = irq_to_desc(irq); |
| 193 | if (desc) |
| 194 | cfg = desc->chip_data; |
| 195 | |
| 196 | return cfg; |
| 197 | } |
| 198 | |
| 199 | static struct irq_cfg *get_one_free_irq_cfg(int cpu) |
| 200 | { |
| 201 | struct irq_cfg *cfg; |
| 202 | int node; |
| 203 | |
| 204 | node = cpu_to_node(cpu); |
| 205 | |
| 206 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); |
| 207 | printk(KERN_DEBUG " alloc irq_cfg on cpu %d node %d\n", cpu, node); |
| 208 | |
| 209 | return cfg; |
| 210 | } |
| 211 | |
| 212 | void arch_init_chip_data(struct irq_desc *desc, int cpu) |
| 213 | { |
| 214 | struct irq_cfg *cfg; |
| 215 | |
| 216 | cfg = desc->chip_data; |
| 217 | if (!cfg) { |
| 218 | desc->chip_data = get_one_free_irq_cfg(cpu); |
| 219 | if (!desc->chip_data) { |
| 220 | printk(KERN_ERR "can not alloc irq_cfg\n"); |
| 221 | BUG_ON(1); |
| 222 | } |
| 223 | } |
| 224 | } |
| 225 | |
| 226 | #else |
| 227 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 228 | { |
| 229 | return irq < nr_irqs ? irq_cfgx + irq : NULL; |
| 230 | } |
| 231 | |
| 232 | #endif |
| 233 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 234 | static inline void set_extra_move_desc(struct irq_desc *desc, cpumask_t mask) |
| 235 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 236 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 238 | struct io_apic { |
| 239 | unsigned int index; |
| 240 | unsigned int unused[3]; |
| 241 | unsigned int data; |
| 242 | }; |
| 243 | |
| 244 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
| 245 | { |
| 246 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 247 | + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
| 251 | { |
| 252 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 253 | writel(reg, &io_apic->index); |
| 254 | return readl(&io_apic->data); |
| 255 | } |
| 256 | |
| 257 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) |
| 258 | { |
| 259 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 260 | writel(reg, &io_apic->index); |
| 261 | writel(value, &io_apic->data); |
| 262 | } |
| 263 | |
| 264 | /* |
| 265 | * Re-write a value: to be used for read-modify-write |
| 266 | * cycles where the read already set up the index register. |
| 267 | * |
| 268 | * Older SiS APIC requires we rewrite the index register |
| 269 | */ |
| 270 | static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) |
| 271 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 272 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 273 | |
| 274 | if (sis_apic_bug) |
| 275 | writel(reg, &io_apic->index); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 276 | writel(value, &io_apic->data); |
| 277 | } |
| 278 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 279 | static bool io_apic_level_ack_pending(struct irq_cfg *cfg) |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 280 | { |
| 281 | struct irq_pin_list *entry; |
| 282 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 283 | |
| 284 | spin_lock_irqsave(&ioapic_lock, flags); |
| 285 | entry = cfg->irq_2_pin; |
| 286 | for (;;) { |
| 287 | unsigned int reg; |
| 288 | int pin; |
| 289 | |
| 290 | if (!entry) |
| 291 | break; |
| 292 | pin = entry->pin; |
| 293 | reg = io_apic_read(entry->apic, 0x10 + pin*2); |
| 294 | /* Is the remote IRR bit set? */ |
| 295 | if (reg & IO_APIC_REDIR_REMOTE_IRR) { |
| 296 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 297 | return true; |
| 298 | } |
| 299 | if (!entry->next) |
| 300 | break; |
| 301 | entry = entry->next; |
| 302 | } |
| 303 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 304 | |
| 305 | return false; |
| 306 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 307 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 308 | union entry_union { |
| 309 | struct { u32 w1, w2; }; |
| 310 | struct IO_APIC_route_entry entry; |
| 311 | }; |
| 312 | |
| 313 | static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) |
| 314 | { |
| 315 | union entry_union eu; |
| 316 | unsigned long flags; |
| 317 | spin_lock_irqsave(&ioapic_lock, flags); |
| 318 | eu.w1 = io_apic_read(apic, 0x10 + 2 * pin); |
| 319 | eu.w2 = io_apic_read(apic, 0x11 + 2 * pin); |
| 320 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 321 | return eu.entry; |
| 322 | } |
| 323 | |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 324 | /* |
| 325 | * When we write a new IO APIC routing entry, we need to write the high |
| 326 | * word first! If the mask bit in the low word is clear, we will enable |
| 327 | * the interrupt, and we need to make sure the entry is fully populated |
| 328 | * before that happens. |
| 329 | */ |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 330 | static void |
| 331 | __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 332 | { |
| 333 | union entry_union eu; |
| 334 | eu.entry = e; |
| 335 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 336 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 337 | } |
| 338 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 339 | static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 340 | { |
| 341 | unsigned long flags; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 342 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 343 | __ioapic_write_entry(apic, pin, e); |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 344 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 345 | } |
| 346 | |
| 347 | /* |
| 348 | * When we mask an IO APIC routing entry, we need to write the low |
| 349 | * word first, in order to set the mask bit before we change the |
| 350 | * high bits! |
| 351 | */ |
| 352 | static void ioapic_mask_entry(int apic, int pin) |
| 353 | { |
| 354 | unsigned long flags; |
| 355 | union entry_union eu = { .entry.mask = 1 }; |
| 356 | |
| 357 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 358 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 359 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 360 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 361 | } |
| 362 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 363 | #ifdef CONFIG_SMP |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 364 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 365 | { |
| 366 | int apic, pin; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 367 | struct irq_pin_list *entry; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 368 | u8 vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 369 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 370 | entry = cfg->irq_2_pin; |
| 371 | for (;;) { |
| 372 | unsigned int reg; |
| 373 | |
| 374 | if (!entry) |
| 375 | break; |
| 376 | |
| 377 | apic = entry->apic; |
| 378 | pin = entry->pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 379 | #ifdef CONFIG_INTR_REMAP |
| 380 | /* |
| 381 | * With interrupt-remapping, destination information comes |
| 382 | * from interrupt-remapping table entry. |
| 383 | */ |
| 384 | if (!irq_remapped(irq)) |
| 385 | io_apic_write(apic, 0x11 + pin*2, dest); |
| 386 | #else |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 387 | io_apic_write(apic, 0x11 + pin*2, dest); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 388 | #endif |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 389 | reg = io_apic_read(apic, 0x10 + pin*2); |
| 390 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; |
| 391 | reg |= vector; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 392 | io_apic_modify(apic, 0x10 + pin*2, reg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 393 | if (!entry->next) |
| 394 | break; |
| 395 | entry = entry->next; |
| 396 | } |
| 397 | } |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 398 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 399 | static int assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 400 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 401 | static void set_ioapic_affinity_irq_desc(struct irq_desc *desc, |
| 402 | const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 403 | { |
| 404 | struct irq_cfg *cfg; |
| 405 | unsigned long flags; |
| 406 | unsigned int dest; |
| 407 | cpumask_t tmp; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 408 | unsigned int irq; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 409 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 410 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 411 | return; |
| 412 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 413 | irq = desc->irq; |
| 414 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 415 | if (assign_irq_vector(irq, cfg, *mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 416 | return; |
| 417 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 418 | set_extra_move_desc(desc, *mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 419 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 420 | cpumask_and(&tmp, &cfg->domain, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 421 | dest = cpu_mask_to_apicid(tmp); |
| 422 | /* |
| 423 | * Only the high 8 bits are valid. |
| 424 | */ |
| 425 | dest = SET_APIC_LOGICAL_ID(dest); |
| 426 | |
| 427 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 428 | __target_IO_APIC_irq(irq, dest, cfg); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 429 | cpumask_copy(&desc->affinity, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 430 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 431 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 432 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 433 | static void set_ioapic_affinity_irq(unsigned int irq, |
| 434 | const struct cpumask *mask) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 435 | { |
| 436 | struct irq_desc *desc; |
| 437 | |
| 438 | desc = irq_to_desc(irq); |
| 439 | |
| 440 | set_ioapic_affinity_irq_desc(desc, mask); |
| 441 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 442 | #endif /* CONFIG_SMP */ |
| 443 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | /* |
| 445 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
| 446 | * shared ISA-space IRQs, so we have to support them. We are super |
| 447 | * fast in the common case, and fast for shared ISA-space IRQs. |
| 448 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 449 | static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 451 | struct irq_pin_list *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 453 | entry = cfg->irq_2_pin; |
| 454 | if (!entry) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 455 | entry = get_one_free_irq_2_pin(cpu); |
| 456 | if (!entry) { |
| 457 | printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n", |
| 458 | apic, pin); |
| 459 | return; |
| 460 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 461 | cfg->irq_2_pin = entry; |
| 462 | entry->apic = apic; |
| 463 | entry->pin = pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 464 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 466 | |
| 467 | while (entry->next) { |
| 468 | /* not again, please */ |
| 469 | if (entry->apic == apic && entry->pin == pin) |
| 470 | return; |
| 471 | |
| 472 | entry = entry->next; |
| 473 | } |
| 474 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 475 | entry->next = get_one_free_irq_2_pin(cpu); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 476 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | entry->apic = apic; |
| 478 | entry->pin = pin; |
| 479 | } |
| 480 | |
| 481 | /* |
| 482 | * Reroute an IRQ to a different pin. |
| 483 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 484 | static void __init replace_pin_at_irq_cpu(struct irq_cfg *cfg, int cpu, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | int oldapic, int oldpin, |
| 486 | int newapic, int newpin) |
| 487 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 488 | struct irq_pin_list *entry = cfg->irq_2_pin; |
| 489 | int replaced = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 491 | while (entry) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | if (entry->apic == oldapic && entry->pin == oldpin) { |
| 493 | entry->apic = newapic; |
| 494 | entry->pin = newpin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 495 | replaced = 1; |
| 496 | /* every one is different, right? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 498 | } |
| 499 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 501 | |
| 502 | /* why? call replace before add? */ |
| 503 | if (!replaced) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 504 | add_pin_to_irq_cpu(cfg, cpu, newapic, newpin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 507 | static inline void io_apic_modify_irq(struct irq_cfg *cfg, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 508 | int mask_and, int mask_or, |
| 509 | void (*final)(struct irq_pin_list *entry)) |
| 510 | { |
| 511 | int pin; |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 512 | struct irq_pin_list *entry; |
| 513 | |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 514 | for (entry = cfg->irq_2_pin; entry != NULL; entry = entry->next) { |
| 515 | unsigned int reg; |
| 516 | pin = entry->pin; |
| 517 | reg = io_apic_read(entry->apic, 0x10 + pin * 2); |
| 518 | reg &= mask_and; |
| 519 | reg |= mask_or; |
| 520 | io_apic_modify(entry->apic, 0x10 + pin * 2, reg); |
| 521 | if (final) |
| 522 | final(entry); |
| 523 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 524 | } |
| 525 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 526 | static void __unmask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 527 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 528 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 529 | } |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 530 | |
| 531 | #ifdef CONFIG_X86_64 |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 532 | void io_apic_sync(struct irq_pin_list *entry) |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 533 | { |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 534 | /* |
| 535 | * Synchronize the IO-APIC and the CPU by doing |
| 536 | * a dummy read from the IO-APIC |
| 537 | */ |
| 538 | struct io_apic __iomem *io_apic; |
| 539 | io_apic = io_apic_base(entry->apic); |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 540 | readl(&io_apic->data); |
| 541 | } |
| 542 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 543 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 544 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 545 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 546 | } |
| 547 | #else /* CONFIG_X86_32 */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 548 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 549 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 550 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 551 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 552 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 553 | static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 554 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 555 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 556 | IO_APIC_REDIR_MASKED, NULL); |
| 557 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 558 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 559 | static void __unmask_and_level_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 560 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 561 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 562 | IO_APIC_REDIR_LEVEL_TRIGGER, NULL); |
| 563 | } |
| 564 | #endif /* CONFIG_X86_32 */ |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 565 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 566 | static void mask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 568 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | unsigned long flags; |
| 570 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 571 | BUG_ON(!cfg); |
| 572 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 574 | __mask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 576 | } |
| 577 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 578 | static void unmask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 580 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | unsigned long flags; |
| 582 | |
| 583 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 584 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 586 | } |
| 587 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 588 | static void mask_IO_APIC_irq(unsigned int irq) |
| 589 | { |
| 590 | struct irq_desc *desc = irq_to_desc(irq); |
| 591 | |
| 592 | mask_IO_APIC_irq_desc(desc); |
| 593 | } |
| 594 | static void unmask_IO_APIC_irq(unsigned int irq) |
| 595 | { |
| 596 | struct irq_desc *desc = irq_to_desc(irq); |
| 597 | |
| 598 | unmask_IO_APIC_irq_desc(desc); |
| 599 | } |
| 600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) |
| 602 | { |
| 603 | struct IO_APIC_route_entry entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 604 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | /* Check delivery_mode to be sure we're not clearing an SMI pin */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 606 | entry = ioapic_read_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | if (entry.delivery_mode == dest_SMI) |
| 608 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | /* |
| 610 | * Disable it in the IO-APIC irq-routing table: |
| 611 | */ |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 612 | ioapic_mask_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | } |
| 614 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 615 | static void clear_IO_APIC (void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | { |
| 617 | int apic, pin; |
| 618 | |
| 619 | for (apic = 0; apic < nr_ioapics; apic++) |
| 620 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 621 | clear_IO_APIC_pin(apic, pin); |
| 622 | } |
| 623 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 624 | #if !defined(CONFIG_SMP) && defined(CONFIG_X86_32) |
Harvey Harrison | 75604d7 | 2008-01-30 13:31:17 +0100 | [diff] [blame] | 625 | void send_IPI_self(int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | { |
| 627 | unsigned int cfg; |
| 628 | |
| 629 | /* |
| 630 | * Wait for idle. |
| 631 | */ |
| 632 | apic_wait_icr_idle(); |
| 633 | cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL; |
| 634 | /* |
| 635 | * Send the IPI. The write to APIC_ICR fires this off. |
| 636 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 637 | apic_write(APIC_ICR, cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 639 | #endif /* !CONFIG_SMP && CONFIG_X86_32*/ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 641 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | /* |
| 643 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
| 644 | * specific CPU-side IRQs. |
| 645 | */ |
| 646 | |
| 647 | #define MAX_PIRQS 8 |
| 648 | static int pirq_entries [MAX_PIRQS]; |
| 649 | static int pirqs_enabled; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | static int __init ioapic_pirq_setup(char *str) |
| 652 | { |
| 653 | int i, max; |
| 654 | int ints[MAX_PIRQS+1]; |
| 655 | |
| 656 | get_options(str, ARRAY_SIZE(ints), ints); |
| 657 | |
| 658 | for (i = 0; i < MAX_PIRQS; i++) |
| 659 | pirq_entries[i] = -1; |
| 660 | |
| 661 | pirqs_enabled = 1; |
| 662 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 663 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
| 664 | max = MAX_PIRQS; |
| 665 | if (ints[0] < MAX_PIRQS) |
| 666 | max = ints[0]; |
| 667 | |
| 668 | for (i = 0; i < max; i++) { |
| 669 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 670 | "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); |
| 671 | /* |
| 672 | * PIRQs are mapped upside down, usually. |
| 673 | */ |
| 674 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; |
| 675 | } |
| 676 | return 1; |
| 677 | } |
| 678 | |
| 679 | __setup("pirq=", ioapic_pirq_setup); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 680 | #endif /* CONFIG_X86_32 */ |
| 681 | |
| 682 | #ifdef CONFIG_INTR_REMAP |
| 683 | /* I/O APIC RTE contents at the OS boot up */ |
| 684 | static struct IO_APIC_route_entry *early_ioapic_entries[MAX_IO_APICS]; |
| 685 | |
| 686 | /* |
| 687 | * Saves and masks all the unmasked IO-APIC RTE's |
| 688 | */ |
| 689 | int save_mask_IO_APIC_setup(void) |
| 690 | { |
| 691 | union IO_APIC_reg_01 reg_01; |
| 692 | unsigned long flags; |
| 693 | int apic, pin; |
| 694 | |
| 695 | /* |
| 696 | * The number of IO-APIC IRQ registers (== #pins): |
| 697 | */ |
| 698 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 699 | spin_lock_irqsave(&ioapic_lock, flags); |
| 700 | reg_01.raw = io_apic_read(apic, 1); |
| 701 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 702 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 703 | } |
| 704 | |
| 705 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 706 | early_ioapic_entries[apic] = |
| 707 | kzalloc(sizeof(struct IO_APIC_route_entry) * |
| 708 | nr_ioapic_registers[apic], GFP_KERNEL); |
| 709 | if (!early_ioapic_entries[apic]) |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 710 | goto nomem; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 711 | } |
| 712 | |
| 713 | for (apic = 0; apic < nr_ioapics; apic++) |
| 714 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 715 | struct IO_APIC_route_entry entry; |
| 716 | |
| 717 | entry = early_ioapic_entries[apic][pin] = |
| 718 | ioapic_read_entry(apic, pin); |
| 719 | if (!entry.mask) { |
| 720 | entry.mask = 1; |
| 721 | ioapic_write_entry(apic, pin, entry); |
| 722 | } |
| 723 | } |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 724 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 725 | return 0; |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 726 | |
| 727 | nomem: |
Cyrill Gorcunov | c1370b4 | 2008-09-23 23:00:02 +0400 | [diff] [blame] | 728 | while (apic >= 0) |
| 729 | kfree(early_ioapic_entries[apic--]); |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 730 | memset(early_ioapic_entries, 0, |
| 731 | ARRAY_SIZE(early_ioapic_entries)); |
| 732 | |
| 733 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 734 | } |
| 735 | |
| 736 | void restore_IO_APIC_setup(void) |
| 737 | { |
| 738 | int apic, pin; |
| 739 | |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 740 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 741 | if (!early_ioapic_entries[apic]) |
| 742 | break; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 743 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 744 | ioapic_write_entry(apic, pin, |
| 745 | early_ioapic_entries[apic][pin]); |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 746 | kfree(early_ioapic_entries[apic]); |
| 747 | early_ioapic_entries[apic] = NULL; |
| 748 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 749 | } |
| 750 | |
| 751 | void reinit_intr_remapped_IO_APIC(int intr_remapping) |
| 752 | { |
| 753 | /* |
| 754 | * for now plain restore of previous settings. |
| 755 | * TBD: In the case of OS enabling interrupt-remapping, |
| 756 | * IO-APIC RTE's need to be setup to point to interrupt-remapping |
| 757 | * table entries. for now, do a plain restore, and wait for |
| 758 | * the setup_IO_APIC_irqs() to do proper initialization. |
| 759 | */ |
| 760 | restore_IO_APIC_setup(); |
| 761 | } |
| 762 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | |
| 764 | /* |
| 765 | * Find the IRQ entry number of a certain pin. |
| 766 | */ |
| 767 | static int find_irq_entry(int apic, int pin, int type) |
| 768 | { |
| 769 | int i; |
| 770 | |
| 771 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 772 | if (mp_irqs[i].mp_irqtype == type && |
| 773 | (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || |
| 774 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) && |
| 775 | mp_irqs[i].mp_dstirq == pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | return i; |
| 777 | |
| 778 | return -1; |
| 779 | } |
| 780 | |
| 781 | /* |
| 782 | * Find the pin to which IRQ[irq] (ISA) is connected |
| 783 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 784 | static int __init find_isa_irq_pin(int irq, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | { |
| 786 | int i; |
| 787 | |
| 788 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 789 | int lbus = mp_irqs[i].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 790 | |
Alexey Starikovskiy | d27e2b8 | 2008-03-20 14:54:18 +0300 | [diff] [blame] | 791 | if (test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 792 | (mp_irqs[i].mp_irqtype == type) && |
| 793 | (mp_irqs[i].mp_srcbusirq == irq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 795 | return mp_irqs[i].mp_dstirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | } |
| 797 | return -1; |
| 798 | } |
| 799 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 800 | static int __init find_isa_irq_apic(int irq, int type) |
| 801 | { |
| 802 | int i; |
| 803 | |
| 804 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 805 | int lbus = mp_irqs[i].mp_srcbus; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 806 | |
Alexey Starikovskiy | 73b2961 | 2008-03-20 14:54:24 +0300 | [diff] [blame] | 807 | if (test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 808 | (mp_irqs[i].mp_irqtype == type) && |
| 809 | (mp_irqs[i].mp_srcbusirq == irq)) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 810 | break; |
| 811 | } |
| 812 | if (i < mp_irq_entries) { |
| 813 | int apic; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 814 | for(apic = 0; apic < nr_ioapics; apic++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 815 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 816 | return apic; |
| 817 | } |
| 818 | } |
| 819 | |
| 820 | return -1; |
| 821 | } |
| 822 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | /* |
| 824 | * Find a specific PCI IRQ entry. |
| 825 | * Not an __init, possibly needed by modules |
| 826 | */ |
| 827 | static int pin_2_irq(int idx, int apic, int pin); |
| 828 | |
| 829 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) |
| 830 | { |
| 831 | int apic, i, best_guess = -1; |
| 832 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 833 | apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", |
| 834 | bus, slot, pin); |
Alexey Starikovskiy | ce6444d | 2008-05-19 19:47:09 +0400 | [diff] [blame] | 835 | if (test_bit(bus, mp_bus_not_pci)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 836 | apic_printk(APIC_VERBOSE, "PCI BIOS passed nonexistent PCI bus %d!\n", bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | return -1; |
| 838 | } |
| 839 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 840 | int lbus = mp_irqs[i].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | |
| 842 | for (apic = 0; apic < nr_ioapics; apic++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 843 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || |
| 844 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | break; |
| 846 | |
Alexey Starikovskiy | 47cab82 | 2008-03-20 14:54:30 +0300 | [diff] [blame] | 847 | if (!test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 848 | !mp_irqs[i].mp_irqtype && |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | (bus == lbus) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 850 | (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 851 | int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 852 | |
| 853 | if (!(apic || IO_APIC_IRQ(irq))) |
| 854 | continue; |
| 855 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 856 | if (pin == (mp_irqs[i].mp_srcbusirq & 3)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | return irq; |
| 858 | /* |
| 859 | * Use the first all-but-pin matching entry as a |
| 860 | * best-guess fuzzy result for broken mptables. |
| 861 | */ |
| 862 | if (best_guess < 0) |
| 863 | best_guess = irq; |
| 864 | } |
| 865 | } |
| 866 | return best_guess; |
| 867 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 868 | |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 869 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 870 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 871 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | /* |
| 873 | * EISA Edge/Level control register, ELCR |
| 874 | */ |
| 875 | static int EISA_ELCR(unsigned int irq) |
| 876 | { |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 877 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 878 | unsigned int port = 0x4d0 + (irq >> 3); |
| 879 | return (inb(port) >> (irq & 7)) & 1; |
| 880 | } |
| 881 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 882 | "Broken MPtable reports ISA irq %d\n", irq); |
| 883 | return 0; |
| 884 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 885 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 886 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 888 | /* ISA interrupts are always polarity zero edge triggered, |
| 889 | * when listed as conforming in the MP table. */ |
| 890 | |
| 891 | #define default_ISA_trigger(idx) (0) |
| 892 | #define default_ISA_polarity(idx) (0) |
| 893 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | /* EISA interrupts are always polarity zero and can be edge or level |
| 895 | * trigger depending on the ELCR value. If an interrupt is listed as |
| 896 | * EISA conforming in the MP table, that means its trigger type must |
| 897 | * be read in from the ELCR */ |
| 898 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 899 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 900 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | |
| 902 | /* PCI interrupts are always polarity one level triggered, |
| 903 | * when listed as conforming in the MP table. */ |
| 904 | |
| 905 | #define default_PCI_trigger(idx) (1) |
| 906 | #define default_PCI_polarity(idx) (1) |
| 907 | |
| 908 | /* MCA interrupts are always polarity zero level triggered, |
| 909 | * when listed as conforming in the MP table. */ |
| 910 | |
| 911 | #define default_MCA_trigger(idx) (1) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 912 | #define default_MCA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 913 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 914 | static int MPBIOS_polarity(int idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 916 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 917 | int polarity; |
| 918 | |
| 919 | /* |
| 920 | * Determine IRQ line polarity (high active or low active): |
| 921 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 922 | switch (mp_irqs[idx].mp_irqflag & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 924 | case 0: /* conforms, ie. bus-type dependent polarity */ |
| 925 | if (test_bit(bus, mp_bus_not_pci)) |
| 926 | polarity = default_ISA_polarity(idx); |
| 927 | else |
| 928 | polarity = default_PCI_polarity(idx); |
| 929 | break; |
| 930 | case 1: /* high active */ |
| 931 | { |
| 932 | polarity = 0; |
| 933 | break; |
| 934 | } |
| 935 | case 2: /* reserved */ |
| 936 | { |
| 937 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 938 | polarity = 1; |
| 939 | break; |
| 940 | } |
| 941 | case 3: /* low active */ |
| 942 | { |
| 943 | polarity = 1; |
| 944 | break; |
| 945 | } |
| 946 | default: /* invalid */ |
| 947 | { |
| 948 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 949 | polarity = 1; |
| 950 | break; |
| 951 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | } |
| 953 | return polarity; |
| 954 | } |
| 955 | |
| 956 | static int MPBIOS_trigger(int idx) |
| 957 | { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 958 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 959 | int trigger; |
| 960 | |
| 961 | /* |
| 962 | * Determine IRQ trigger mode (edge or level sensitive): |
| 963 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 964 | switch ((mp_irqs[idx].mp_irqflag>>2) & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 965 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 966 | case 0: /* conforms, ie. bus-type dependent */ |
| 967 | if (test_bit(bus, mp_bus_not_pci)) |
| 968 | trigger = default_ISA_trigger(idx); |
| 969 | else |
| 970 | trigger = default_PCI_trigger(idx); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 971 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 972 | switch (mp_bus_id_to_type[bus]) { |
| 973 | case MP_BUS_ISA: /* ISA pin */ |
| 974 | { |
| 975 | /* set before the switch */ |
| 976 | break; |
| 977 | } |
| 978 | case MP_BUS_EISA: /* EISA pin */ |
| 979 | { |
| 980 | trigger = default_EISA_trigger(idx); |
| 981 | break; |
| 982 | } |
| 983 | case MP_BUS_PCI: /* PCI pin */ |
| 984 | { |
| 985 | /* set before the switch */ |
| 986 | break; |
| 987 | } |
| 988 | case MP_BUS_MCA: /* MCA pin */ |
| 989 | { |
| 990 | trigger = default_MCA_trigger(idx); |
| 991 | break; |
| 992 | } |
| 993 | default: |
| 994 | { |
| 995 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 996 | trigger = 1; |
| 997 | break; |
| 998 | } |
| 999 | } |
| 1000 | #endif |
| 1001 | break; |
| 1002 | case 1: /* edge */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1003 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1004 | trigger = 0; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1005 | break; |
| 1006 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1007 | case 2: /* reserved */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1008 | { |
| 1009 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1010 | trigger = 1; |
| 1011 | break; |
| 1012 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1013 | case 3: /* level */ |
| 1014 | { |
| 1015 | trigger = 1; |
| 1016 | break; |
| 1017 | } |
| 1018 | default: /* invalid */ |
| 1019 | { |
| 1020 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1021 | trigger = 0; |
| 1022 | break; |
| 1023 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1024 | } |
| 1025 | return trigger; |
| 1026 | } |
| 1027 | |
| 1028 | static inline int irq_polarity(int idx) |
| 1029 | { |
| 1030 | return MPBIOS_polarity(idx); |
| 1031 | } |
| 1032 | |
| 1033 | static inline int irq_trigger(int idx) |
| 1034 | { |
| 1035 | return MPBIOS_trigger(idx); |
| 1036 | } |
| 1037 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1038 | int (*ioapic_renumber_irq)(int ioapic, int irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1039 | static int pin_2_irq(int idx, int apic, int pin) |
| 1040 | { |
| 1041 | int irq, i; |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 1042 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1043 | |
| 1044 | /* |
| 1045 | * Debugging check, we are in big trouble if this message pops up! |
| 1046 | */ |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 1047 | if (mp_irqs[idx].mp_dstirq != pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1048 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
| 1049 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1050 | if (test_bit(bus, mp_bus_not_pci)) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 1051 | irq = mp_irqs[idx].mp_srcbusirq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1052 | } else { |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 1053 | /* |
| 1054 | * PCI IRQs are mapped in order |
| 1055 | */ |
| 1056 | i = irq = 0; |
| 1057 | while (i < apic) |
| 1058 | irq += nr_ioapic_registers[i++]; |
| 1059 | irq += pin; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1060 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1061 | * For MPS mode, so far only needed by ES7000 platform |
| 1062 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1063 | if (ioapic_renumber_irq) |
| 1064 | irq = ioapic_renumber_irq(apic, irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | } |
| 1066 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1067 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1068 | /* |
| 1069 | * PCI IRQ command line redirection. Yes, limits are hardcoded. |
| 1070 | */ |
| 1071 | if ((pin >= 16) && (pin <= 23)) { |
| 1072 | if (pirq_entries[pin-16] != -1) { |
| 1073 | if (!pirq_entries[pin-16]) { |
| 1074 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1075 | "disabling PIRQ%d\n", pin-16); |
| 1076 | } else { |
| 1077 | irq = pirq_entries[pin-16]; |
| 1078 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1079 | "using PIRQ%d -> IRQ %d\n", |
| 1080 | pin-16, irq); |
| 1081 | } |
| 1082 | } |
| 1083 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1084 | #endif |
| 1085 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | return irq; |
| 1087 | } |
| 1088 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1089 | void lock_vector_lock(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1091 | /* Used to the online set of cpus does not change |
| 1092 | * during assign_irq_vector. |
| 1093 | */ |
| 1094 | spin_lock(&vector_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1095 | } |
| 1096 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1097 | void unlock_vector_lock(void) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1098 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1099 | spin_unlock(&vector_lock); |
| 1100 | } |
| 1101 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1102 | static int __assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1103 | { |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1104 | /* |
| 1105 | * NOTE! The local APIC isn't very good at handling |
| 1106 | * multiple interrupts at the same interrupt level. |
| 1107 | * As the interrupt level is determined by taking the |
| 1108 | * vector number and shifting that right by 4, we |
| 1109 | * want to spread these out a bit so that they don't |
| 1110 | * all fall in the same interrupt level. |
| 1111 | * |
| 1112 | * Also, we've got to be careful not to trash gate |
| 1113 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 1114 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1115 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; |
| 1116 | unsigned int old_vector; |
| 1117 | int cpu; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1118 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1119 | if ((cfg->move_in_progress) || cfg->move_cleanup_count) |
| 1120 | return -EBUSY; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1121 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1122 | /* Only try and allocate irqs on cpus that are present */ |
| 1123 | cpus_and(mask, mask, cpu_online_map); |
| 1124 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1125 | old_vector = cfg->vector; |
| 1126 | if (old_vector) { |
| 1127 | cpumask_t tmp; |
| 1128 | cpus_and(tmp, cfg->domain, mask); |
| 1129 | if (!cpus_empty(tmp)) |
| 1130 | return 0; |
| 1131 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1132 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1133 | for_each_cpu_mask_nr(cpu, mask) { |
| 1134 | cpumask_t domain, new_mask; |
| 1135 | int new_cpu; |
| 1136 | int vector, offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1137 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1138 | domain = vector_allocation_domain(cpu); |
| 1139 | cpus_and(new_mask, domain, cpu_online_map); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1140 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1141 | vector = current_vector; |
| 1142 | offset = current_offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1143 | next: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1144 | vector += 8; |
| 1145 | if (vector >= first_system_vector) { |
| 1146 | /* If we run out of vectors on large boxen, must share them. */ |
| 1147 | offset = (offset + 1) % 8; |
| 1148 | vector = FIRST_DEVICE_VECTOR + offset; |
Yinghai Lu | 7a959cf | 2008-08-19 20:50:32 -0700 | [diff] [blame] | 1149 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1150 | if (unlikely(current_vector == vector)) |
| 1151 | continue; |
| 1152 | #ifdef CONFIG_X86_64 |
| 1153 | if (vector == IA32_SYSCALL_VECTOR) |
| 1154 | goto next; |
| 1155 | #else |
| 1156 | if (vector == SYSCALL_VECTOR) |
| 1157 | goto next; |
| 1158 | #endif |
| 1159 | for_each_cpu_mask_nr(new_cpu, new_mask) |
| 1160 | if (per_cpu(vector_irq, new_cpu)[vector] != -1) |
| 1161 | goto next; |
| 1162 | /* Found one! */ |
| 1163 | current_vector = vector; |
| 1164 | current_offset = offset; |
| 1165 | if (old_vector) { |
| 1166 | cfg->move_in_progress = 1; |
| 1167 | cfg->old_domain = cfg->domain; |
| 1168 | } |
| 1169 | for_each_cpu_mask_nr(new_cpu, new_mask) |
| 1170 | per_cpu(vector_irq, new_cpu)[vector] = irq; |
| 1171 | cfg->vector = vector; |
| 1172 | cfg->domain = domain; |
| 1173 | return 0; |
| 1174 | } |
| 1175 | return -ENOSPC; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1176 | } |
| 1177 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1178 | static int assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1179 | { |
| 1180 | int err; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1181 | unsigned long flags; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1182 | |
| 1183 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1184 | err = __assign_irq_vector(irq, cfg, mask); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1185 | spin_unlock_irqrestore(&vector_lock, flags); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1186 | return err; |
| 1187 | } |
| 1188 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1189 | static void __clear_irq_vector(int irq, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1190 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1191 | cpumask_t mask; |
| 1192 | int cpu, vector; |
| 1193 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1194 | BUG_ON(!cfg->vector); |
| 1195 | |
| 1196 | vector = cfg->vector; |
| 1197 | cpus_and(mask, cfg->domain, cpu_online_map); |
| 1198 | for_each_cpu_mask_nr(cpu, mask) |
| 1199 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1200 | |
| 1201 | cfg->vector = 0; |
| 1202 | cpus_clear(cfg->domain); |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1203 | |
| 1204 | if (likely(!cfg->move_in_progress)) |
| 1205 | return; |
| 1206 | cpus_and(mask, cfg->old_domain, cpu_online_map); |
| 1207 | for_each_cpu_mask_nr(cpu, mask) { |
| 1208 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; |
| 1209 | vector++) { |
| 1210 | if (per_cpu(vector_irq, cpu)[vector] != irq) |
| 1211 | continue; |
| 1212 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1213 | break; |
| 1214 | } |
| 1215 | } |
| 1216 | cfg->move_in_progress = 0; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1217 | } |
| 1218 | |
| 1219 | void __setup_vector_irq(int cpu) |
| 1220 | { |
| 1221 | /* Initialize vector_irq on a new cpu */ |
| 1222 | /* This function must be called with vector_lock held */ |
| 1223 | int irq, vector; |
| 1224 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1225 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1226 | |
| 1227 | /* Mark the inuse vectors */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1228 | for_each_irq_desc(irq, desc) { |
| 1229 | if (!desc) |
| 1230 | continue; |
| 1231 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1232 | if (!cpu_isset(cpu, cfg->domain)) |
| 1233 | continue; |
| 1234 | vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1235 | per_cpu(vector_irq, cpu)[vector] = irq; |
| 1236 | } |
| 1237 | /* Mark the free vectors */ |
| 1238 | for (vector = 0; vector < NR_VECTORS; ++vector) { |
| 1239 | irq = per_cpu(vector_irq, cpu)[vector]; |
| 1240 | if (irq < 0) |
| 1241 | continue; |
| 1242 | |
| 1243 | cfg = irq_cfg(irq); |
| 1244 | if (!cpu_isset(cpu, cfg->domain)) |
| 1245 | per_cpu(vector_irq, cpu)[vector] = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1246 | } |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1247 | } |
Glauber Costa | 3fde690 | 2008-05-28 20:34:19 -0700 | [diff] [blame] | 1248 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1249 | static struct irq_chip ioapic_chip; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1250 | #ifdef CONFIG_INTR_REMAP |
| 1251 | static struct irq_chip ir_ioapic_chip; |
| 1252 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1253 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1254 | #define IOAPIC_AUTO -1 |
| 1255 | #define IOAPIC_EDGE 0 |
| 1256 | #define IOAPIC_LEVEL 1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1258 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1259 | static inline int IO_APIC_irq_trigger(int irq) |
| 1260 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1261 | int apic, idx, pin; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1262 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1263 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1264 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 1265 | idx = find_irq_entry(apic, pin, mp_INT); |
| 1266 | if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) |
| 1267 | return irq_trigger(idx); |
| 1268 | } |
| 1269 | } |
| 1270 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1271 | * nonexistent IRQs are edge default |
| 1272 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1273 | return 0; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1274 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1275 | #else |
| 1276 | static inline int IO_APIC_irq_trigger(int irq) |
| 1277 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1278 | return 1; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1279 | } |
| 1280 | #endif |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1281 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1282 | static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long trigger) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1283 | { |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 1284 | |
Jan Beulich | 6ebcc00 | 2006-06-26 13:56:46 +0200 | [diff] [blame] | 1285 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1286 | trigger == IOAPIC_LEVEL) |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1287 | desc->status |= IRQ_LEVEL; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1288 | else |
| 1289 | desc->status &= ~IRQ_LEVEL; |
| 1290 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1291 | #ifdef CONFIG_INTR_REMAP |
| 1292 | if (irq_remapped(irq)) { |
| 1293 | desc->status |= IRQ_MOVE_PCNTXT; |
| 1294 | if (trigger) |
| 1295 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1296 | handle_fasteoi_irq, |
| 1297 | "fasteoi"); |
| 1298 | else |
| 1299 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1300 | handle_edge_irq, "edge"); |
| 1301 | return; |
| 1302 | } |
| 1303 | #endif |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1304 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
| 1305 | trigger == IOAPIC_LEVEL) |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1306 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1307 | handle_fasteoi_irq, |
| 1308 | "fasteoi"); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1309 | else |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1310 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1311 | handle_edge_irq, "edge"); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1312 | } |
| 1313 | |
| 1314 | static int setup_ioapic_entry(int apic, int irq, |
| 1315 | struct IO_APIC_route_entry *entry, |
| 1316 | unsigned int destination, int trigger, |
| 1317 | int polarity, int vector) |
| 1318 | { |
| 1319 | /* |
| 1320 | * add it to the IO-APIC irq-routing table: |
| 1321 | */ |
| 1322 | memset(entry,0,sizeof(*entry)); |
| 1323 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1324 | #ifdef CONFIG_INTR_REMAP |
| 1325 | if (intr_remapping_enabled) { |
| 1326 | struct intel_iommu *iommu = map_ioapic_to_ir(apic); |
| 1327 | struct irte irte; |
| 1328 | struct IR_IO_APIC_route_entry *ir_entry = |
| 1329 | (struct IR_IO_APIC_route_entry *) entry; |
| 1330 | int index; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1331 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1332 | if (!iommu) |
| 1333 | panic("No mapping iommu for ioapic %d\n", apic); |
| 1334 | |
| 1335 | index = alloc_irte(iommu, irq, 1); |
| 1336 | if (index < 0) |
| 1337 | panic("Failed to allocate IRTE for ioapic %d\n", apic); |
| 1338 | |
| 1339 | memset(&irte, 0, sizeof(irte)); |
| 1340 | |
| 1341 | irte.present = 1; |
| 1342 | irte.dst_mode = INT_DEST_MODE; |
| 1343 | irte.trigger_mode = trigger; |
| 1344 | irte.dlvry_mode = INT_DELIVERY_MODE; |
| 1345 | irte.vector = vector; |
| 1346 | irte.dest_id = IRTE_DEST(destination); |
| 1347 | |
| 1348 | modify_irte(irq, &irte); |
| 1349 | |
| 1350 | ir_entry->index2 = (index >> 15) & 0x1; |
| 1351 | ir_entry->zero = 0; |
| 1352 | ir_entry->format = 1; |
| 1353 | ir_entry->index = (index & 0x7fff); |
| 1354 | } else |
| 1355 | #endif |
| 1356 | { |
| 1357 | entry->delivery_mode = INT_DELIVERY_MODE; |
| 1358 | entry->dest_mode = INT_DEST_MODE; |
| 1359 | entry->dest = destination; |
| 1360 | } |
| 1361 | |
| 1362 | entry->mask = 0; /* enable IRQ */ |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1363 | entry->trigger = trigger; |
| 1364 | entry->polarity = polarity; |
| 1365 | entry->vector = vector; |
| 1366 | |
| 1367 | /* Mask level triggered irqs. |
| 1368 | * Use IRQ_DELAYED_DISABLE for edge triggered irqs. |
| 1369 | */ |
| 1370 | if (trigger) |
| 1371 | entry->mask = 1; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1372 | return 0; |
| 1373 | } |
| 1374 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1375 | static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1376 | int trigger, int polarity) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1377 | { |
| 1378 | struct irq_cfg *cfg; |
| 1379 | struct IO_APIC_route_entry entry; |
| 1380 | cpumask_t mask; |
| 1381 | |
| 1382 | if (!IO_APIC_IRQ(irq)) |
| 1383 | return; |
| 1384 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1385 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1386 | |
| 1387 | mask = TARGET_CPUS; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1388 | if (assign_irq_vector(irq, cfg, mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1389 | return; |
| 1390 | |
| 1391 | cpus_and(mask, cfg->domain, mask); |
| 1392 | |
| 1393 | apic_printk(APIC_VERBOSE,KERN_DEBUG |
| 1394 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " |
| 1395 | "IRQ %d Mode:%i Active:%i)\n", |
| 1396 | apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector, |
| 1397 | irq, trigger, polarity); |
| 1398 | |
| 1399 | |
| 1400 | if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, |
| 1401 | cpu_mask_to_apicid(mask), trigger, polarity, |
| 1402 | cfg->vector)) { |
| 1403 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", |
| 1404 | mp_ioapics[apic].mp_apicid, pin); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1405 | __clear_irq_vector(irq, cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1406 | return; |
| 1407 | } |
| 1408 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1409 | ioapic_register_intr(irq, desc, trigger); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 1410 | if (irq < NR_IRQS_LEGACY) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1411 | disable_8259A_irq(irq); |
| 1412 | |
| 1413 | ioapic_write_entry(apic, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1414 | } |
| 1415 | |
| 1416 | static void __init setup_IO_APIC_irqs(void) |
| 1417 | { |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1418 | int apic, pin, idx, irq; |
| 1419 | int notcon = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1420 | struct irq_desc *desc; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1421 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1422 | int cpu = boot_cpu_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1423 | |
| 1424 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
| 1425 | |
| 1426 | for (apic = 0; apic < nr_ioapics; apic++) { |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1427 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1428 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1429 | idx = find_irq_entry(apic, pin, mp_INT); |
| 1430 | if (idx == -1) { |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1431 | if (!notcon) { |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1432 | notcon = 1; |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1433 | apic_printk(APIC_VERBOSE, |
| 1434 | KERN_DEBUG " %d-%d", |
| 1435 | mp_ioapics[apic].mp_apicid, |
| 1436 | pin); |
| 1437 | } else |
| 1438 | apic_printk(APIC_VERBOSE, " %d-%d", |
| 1439 | mp_ioapics[apic].mp_apicid, |
| 1440 | pin); |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1441 | continue; |
| 1442 | } |
Cyrill Gorcunov | 56ffa1a | 2008-09-13 13:11:16 +0400 | [diff] [blame] | 1443 | if (notcon) { |
| 1444 | apic_printk(APIC_VERBOSE, |
| 1445 | " (apicid-pin) not connected\n"); |
| 1446 | notcon = 0; |
| 1447 | } |
Yinghai Lu | 20d225b | 2007-10-17 18:04:41 +0200 | [diff] [blame] | 1448 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1449 | irq = pin_2_irq(idx, apic, pin); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1450 | #ifdef CONFIG_X86_32 |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1451 | if (multi_timer_check(apic, irq)) |
| 1452 | continue; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1453 | #endif |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1454 | desc = irq_to_desc_alloc_cpu(irq, cpu); |
| 1455 | if (!desc) { |
| 1456 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
| 1457 | continue; |
| 1458 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1459 | cfg = desc->chip_data; |
| 1460 | add_pin_to_irq_cpu(cfg, cpu, apic, pin); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1461 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1462 | setup_IO_APIC_irq(apic, pin, irq, desc, |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1463 | irq_trigger(idx), irq_polarity(idx)); |
| 1464 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1465 | } |
| 1466 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1467 | if (notcon) |
| 1468 | apic_printk(APIC_VERBOSE, |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1469 | " (apicid-pin) not connected\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | } |
| 1471 | |
| 1472 | /* |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1473 | * Set up the timer pin, possibly with the 8259A-master behind. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1474 | */ |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1475 | static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, |
| 1476 | int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1477 | { |
| 1478 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1479 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1480 | #ifdef CONFIG_INTR_REMAP |
| 1481 | if (intr_remapping_enabled) |
| 1482 | return; |
| 1483 | #endif |
| 1484 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1485 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1486 | |
| 1487 | /* |
| 1488 | * We use logical delivery to get the timer IRQ |
| 1489 | * to the first CPU. |
| 1490 | */ |
| 1491 | entry.dest_mode = INT_DEST_MODE; |
Maciej W. Rozycki | 03be750 | 2008-05-27 21:19:45 +0100 | [diff] [blame] | 1492 | entry.mask = 1; /* mask IRQ now */ |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 1493 | entry.dest = cpu_mask_to_apicid(TARGET_CPUS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | entry.delivery_mode = INT_DELIVERY_MODE; |
| 1495 | entry.polarity = 0; |
| 1496 | entry.trigger = 0; |
| 1497 | entry.vector = vector; |
| 1498 | |
| 1499 | /* |
| 1500 | * The timer IRQ doesn't have to know that behind the |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1501 | * scene we may have a 8259A-master in AEOI mode ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1502 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1503 | set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1504 | |
| 1505 | /* |
| 1506 | * Add it to the IO-APIC irq-routing table: |
| 1507 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1508 | ioapic_write_entry(apic, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1509 | } |
| 1510 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1511 | |
| 1512 | __apicdebuginit(void) print_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1513 | { |
| 1514 | int apic, i; |
| 1515 | union IO_APIC_reg_00 reg_00; |
| 1516 | union IO_APIC_reg_01 reg_01; |
| 1517 | union IO_APIC_reg_02 reg_02; |
| 1518 | union IO_APIC_reg_03 reg_03; |
| 1519 | unsigned long flags; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1520 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1521 | struct irq_desc *desc; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1522 | unsigned int irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1523 | |
| 1524 | if (apic_verbosity == APIC_QUIET) |
| 1525 | return; |
| 1526 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1527 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1528 | for (i = 0; i < nr_ioapics; i++) |
| 1529 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1530 | mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1531 | |
| 1532 | /* |
| 1533 | * We are a bit conservative about what we expect. We have to |
| 1534 | * know about every hardware change ASAP. |
| 1535 | */ |
| 1536 | printk(KERN_INFO "testing the IO APIC.......................\n"); |
| 1537 | |
| 1538 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1539 | |
| 1540 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1541 | reg_00.raw = io_apic_read(apic, 0); |
| 1542 | reg_01.raw = io_apic_read(apic, 1); |
| 1543 | if (reg_01.bits.version >= 0x10) |
| 1544 | reg_02.raw = io_apic_read(apic, 2); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1545 | if (reg_01.bits.version >= 0x20) |
| 1546 | reg_03.raw = io_apic_read(apic, 3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1547 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1548 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1549 | printk("\n"); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1550 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
| 1552 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
| 1553 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
| 1554 | printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1556 | printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)®_01); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1557 | printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | |
| 1559 | printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ); |
| 1560 | printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1561 | |
| 1562 | /* |
| 1563 | * Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02, |
| 1564 | * but the value of reg_02 is read as the previous read register |
| 1565 | * value, so ignore it if reg_02 == reg_01. |
| 1566 | */ |
| 1567 | if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) { |
| 1568 | printk(KERN_DEBUG ".... register #02: %08X\n", reg_02.raw); |
| 1569 | printk(KERN_DEBUG "....... : arbitration: %02X\n", reg_02.bits.arbitration); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | } |
| 1571 | |
| 1572 | /* |
| 1573 | * Some Intel chipsets with IO APIC VERSION of 0x2? don't have reg_02 |
| 1574 | * or reg_03, but the value of reg_0[23] is read as the previous read |
| 1575 | * register value, so ignore it if reg_03 == reg_0[12]. |
| 1576 | */ |
| 1577 | if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw && |
| 1578 | reg_03.raw != reg_01.raw) { |
| 1579 | printk(KERN_DEBUG ".... register #03: %08X\n", reg_03.raw); |
| 1580 | printk(KERN_DEBUG "....... : Boot DT : %X\n", reg_03.bits.boot_DT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1581 | } |
| 1582 | |
| 1583 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
| 1584 | |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 1585 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" |
| 1586 | " Stat Dmod Deli Vect: \n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1587 | |
| 1588 | for (i = 0; i <= reg_01.bits.entries; i++) { |
| 1589 | struct IO_APIC_route_entry entry; |
| 1590 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1591 | entry = ioapic_read_entry(apic, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1593 | printk(KERN_DEBUG " %02x %03X ", |
| 1594 | i, |
| 1595 | entry.dest |
| 1596 | ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1597 | |
| 1598 | printk("%1d %1d %1d %1d %1d %1d %1d %02X\n", |
| 1599 | entry.mask, |
| 1600 | entry.trigger, |
| 1601 | entry.irr, |
| 1602 | entry.polarity, |
| 1603 | entry.delivery_status, |
| 1604 | entry.dest_mode, |
| 1605 | entry.delivery_mode, |
| 1606 | entry.vector |
| 1607 | ); |
| 1608 | } |
| 1609 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | printk(KERN_DEBUG "IRQ to pin mappings:\n"); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1611 | for_each_irq_desc(irq, desc) { |
| 1612 | struct irq_pin_list *entry; |
| 1613 | |
| 1614 | if (!desc) |
| 1615 | continue; |
| 1616 | cfg = desc->chip_data; |
| 1617 | entry = cfg->irq_2_pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1618 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | continue; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1620 | printk(KERN_DEBUG "IRQ%d ", irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | for (;;) { |
| 1622 | printk("-> %d:%d", entry->apic, entry->pin); |
| 1623 | if (!entry->next) |
| 1624 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1625 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | } |
| 1627 | printk("\n"); |
| 1628 | } |
| 1629 | |
| 1630 | printk(KERN_INFO ".................................... done.\n"); |
| 1631 | |
| 1632 | return; |
| 1633 | } |
| 1634 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1635 | __apicdebuginit(void) print_APIC_bitfield(int base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | { |
| 1637 | unsigned int v; |
| 1638 | int i, j; |
| 1639 | |
| 1640 | if (apic_verbosity == APIC_QUIET) |
| 1641 | return; |
| 1642 | |
| 1643 | printk(KERN_DEBUG "0123456789abcdef0123456789abcdef\n" KERN_DEBUG); |
| 1644 | for (i = 0; i < 8; i++) { |
| 1645 | v = apic_read(base + i*0x10); |
| 1646 | for (j = 0; j < 32; j++) { |
| 1647 | if (v & (1<<j)) |
| 1648 | printk("1"); |
| 1649 | else |
| 1650 | printk("0"); |
| 1651 | } |
| 1652 | printk("\n"); |
| 1653 | } |
| 1654 | } |
| 1655 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1656 | __apicdebuginit(void) print_local_APIC(void *dummy) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1657 | { |
| 1658 | unsigned int v, ver, maxlvt; |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1659 | u64 icr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1660 | |
| 1661 | if (apic_verbosity == APIC_QUIET) |
| 1662 | return; |
| 1663 | |
| 1664 | printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", |
| 1665 | smp_processor_id(), hard_smp_processor_id()); |
Andreas Herrmann | 6682311 | 2008-06-05 16:35:10 +0200 | [diff] [blame] | 1666 | v = apic_read(APIC_ID); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1667 | printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, read_apic_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | v = apic_read(APIC_LVR); |
| 1669 | printk(KERN_INFO "... APIC VERSION: %08x\n", v); |
| 1670 | ver = GET_APIC_VERSION(v); |
Thomas Gleixner | e05d723 | 2007-02-16 01:27:58 -0800 | [diff] [blame] | 1671 | maxlvt = lapic_get_maxlvt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1672 | |
| 1673 | v = apic_read(APIC_TASKPRI); |
| 1674 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
| 1675 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1676 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1677 | if (!APIC_XAPIC(ver)) { |
| 1678 | v = apic_read(APIC_ARBPRI); |
| 1679 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
| 1680 | v & APIC_ARBPRI_MASK); |
| 1681 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1682 | v = apic_read(APIC_PROCPRI); |
| 1683 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
| 1684 | } |
| 1685 | |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1686 | /* |
| 1687 | * Remote read supported only in the 82489DX and local APIC for |
| 1688 | * Pentium processors. |
| 1689 | */ |
| 1690 | if (!APIC_INTEGRATED(ver) || maxlvt == 3) { |
| 1691 | v = apic_read(APIC_RRR); |
| 1692 | printk(KERN_DEBUG "... APIC RRR: %08x\n", v); |
| 1693 | } |
| 1694 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1695 | v = apic_read(APIC_LDR); |
| 1696 | printk(KERN_DEBUG "... APIC LDR: %08x\n", v); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1697 | if (!x2apic_enabled()) { |
| 1698 | v = apic_read(APIC_DFR); |
| 1699 | printk(KERN_DEBUG "... APIC DFR: %08x\n", v); |
| 1700 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1701 | v = apic_read(APIC_SPIV); |
| 1702 | printk(KERN_DEBUG "... APIC SPIV: %08x\n", v); |
| 1703 | |
| 1704 | printk(KERN_DEBUG "... APIC ISR field:\n"); |
| 1705 | print_APIC_bitfield(APIC_ISR); |
| 1706 | printk(KERN_DEBUG "... APIC TMR field:\n"); |
| 1707 | print_APIC_bitfield(APIC_TMR); |
| 1708 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
| 1709 | print_APIC_bitfield(APIC_IRR); |
| 1710 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1711 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1712 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1713 | apic_write(APIC_ESR, 0); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1715 | v = apic_read(APIC_ESR); |
| 1716 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
| 1717 | } |
| 1718 | |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1719 | icr = apic_icr_read(); |
Ingo Molnar | 0c425ce | 2008-08-18 13:04:26 +0200 | [diff] [blame] | 1720 | printk(KERN_DEBUG "... APIC ICR: %08x\n", (u32)icr); |
| 1721 | printk(KERN_DEBUG "... APIC ICR2: %08x\n", (u32)(icr >> 32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1722 | |
| 1723 | v = apic_read(APIC_LVTT); |
| 1724 | printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); |
| 1725 | |
| 1726 | if (maxlvt > 3) { /* PC is LVT#4. */ |
| 1727 | v = apic_read(APIC_LVTPC); |
| 1728 | printk(KERN_DEBUG "... APIC LVTPC: %08x\n", v); |
| 1729 | } |
| 1730 | v = apic_read(APIC_LVT0); |
| 1731 | printk(KERN_DEBUG "... APIC LVT0: %08x\n", v); |
| 1732 | v = apic_read(APIC_LVT1); |
| 1733 | printk(KERN_DEBUG "... APIC LVT1: %08x\n", v); |
| 1734 | |
| 1735 | if (maxlvt > 2) { /* ERR is LVT#3. */ |
| 1736 | v = apic_read(APIC_LVTERR); |
| 1737 | printk(KERN_DEBUG "... APIC LVTERR: %08x\n", v); |
| 1738 | } |
| 1739 | |
| 1740 | v = apic_read(APIC_TMICT); |
| 1741 | printk(KERN_DEBUG "... APIC TMICT: %08x\n", v); |
| 1742 | v = apic_read(APIC_TMCCT); |
| 1743 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
| 1744 | v = apic_read(APIC_TDCR); |
| 1745 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
| 1746 | printk("\n"); |
| 1747 | } |
| 1748 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1749 | __apicdebuginit(void) print_all_local_APICs(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1750 | { |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1751 | int cpu; |
| 1752 | |
| 1753 | preempt_disable(); |
| 1754 | for_each_online_cpu(cpu) |
| 1755 | smp_call_function_single(cpu, print_local_APIC, NULL, 1); |
| 1756 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | } |
| 1758 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1759 | __apicdebuginit(void) print_PIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1760 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1761 | unsigned int v; |
| 1762 | unsigned long flags; |
| 1763 | |
| 1764 | if (apic_verbosity == APIC_QUIET) |
| 1765 | return; |
| 1766 | |
| 1767 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| 1768 | |
| 1769 | spin_lock_irqsave(&i8259A_lock, flags); |
| 1770 | |
| 1771 | v = inb(0xa1) << 8 | inb(0x21); |
| 1772 | printk(KERN_DEBUG "... PIC IMR: %04x\n", v); |
| 1773 | |
| 1774 | v = inb(0xa0) << 8 | inb(0x20); |
| 1775 | printk(KERN_DEBUG "... PIC IRR: %04x\n", v); |
| 1776 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1777 | outb(0x0b,0xa0); |
| 1778 | outb(0x0b,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | v = inb(0xa0) << 8 | inb(0x20); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1780 | outb(0x0a,0xa0); |
| 1781 | outb(0x0a,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1782 | |
| 1783 | spin_unlock_irqrestore(&i8259A_lock, flags); |
| 1784 | |
| 1785 | printk(KERN_DEBUG "... PIC ISR: %04x\n", v); |
| 1786 | |
| 1787 | v = inb(0x4d1) << 8 | inb(0x4d0); |
| 1788 | printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); |
| 1789 | } |
| 1790 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1791 | __apicdebuginit(int) print_all_ICs(void) |
| 1792 | { |
| 1793 | print_PIC(); |
| 1794 | print_all_local_APICs(); |
| 1795 | print_IO_APIC(); |
| 1796 | |
| 1797 | return 0; |
| 1798 | } |
| 1799 | |
| 1800 | fs_initcall(print_all_ICs); |
| 1801 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1802 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1803 | /* Where if anywhere is the i8259 connect in external int mode */ |
| 1804 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
| 1805 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1806 | void __init enable_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1807 | { |
| 1808 | union IO_APIC_reg_01 reg_01; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1809 | int i8259_apic, i8259_pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1810 | int apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1811 | unsigned long flags; |
| 1812 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1813 | #ifdef CONFIG_X86_32 |
| 1814 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1815 | if (!pirqs_enabled) |
| 1816 | for (i = 0; i < MAX_PIRQS; i++) |
| 1817 | pirq_entries[i] = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1818 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1819 | |
| 1820 | /* |
| 1821 | * The number of IO-APIC IRQ registers (== #pins): |
| 1822 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1823 | for (apic = 0; apic < nr_ioapics; apic++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | spin_lock_irqsave(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1825 | reg_01.raw = io_apic_read(apic, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1826 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1827 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 1828 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1829 | for(apic = 0; apic < nr_ioapics; apic++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1830 | int pin; |
| 1831 | /* See if any of the pins is in ExtINT mode */ |
Eric W. Biederman | 1008fdd | 2006-01-11 22:46:06 +0100 | [diff] [blame] | 1832 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1833 | struct IO_APIC_route_entry entry; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1834 | entry = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1835 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1836 | /* If the interrupt line is enabled and in ExtInt mode |
| 1837 | * I have found the pin where the i8259 is connected. |
| 1838 | */ |
| 1839 | if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) { |
| 1840 | ioapic_i8259.apic = apic; |
| 1841 | ioapic_i8259.pin = pin; |
| 1842 | goto found_i8259; |
| 1843 | } |
| 1844 | } |
| 1845 | } |
| 1846 | found_i8259: |
| 1847 | /* Look to see what if the MP table has reported the ExtINT */ |
| 1848 | /* If we could not find the appropriate pin by looking at the ioapic |
| 1849 | * the i8259 probably is not connected the ioapic but give the |
| 1850 | * mptable a chance anyway. |
| 1851 | */ |
| 1852 | i8259_pin = find_isa_irq_pin(0, mp_ExtINT); |
| 1853 | i8259_apic = find_isa_irq_apic(0, mp_ExtINT); |
| 1854 | /* Trust the MP table if nothing is setup in the hardware */ |
| 1855 | if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) { |
| 1856 | printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n"); |
| 1857 | ioapic_i8259.pin = i8259_pin; |
| 1858 | ioapic_i8259.apic = i8259_apic; |
| 1859 | } |
| 1860 | /* Complain if the MP table and the hardware disagree */ |
| 1861 | if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) && |
| 1862 | (i8259_pin >= 0) && (ioapic_i8259.pin >= 0)) |
| 1863 | { |
| 1864 | printk(KERN_WARNING "ExtINT in hardware and MP table differ\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1865 | } |
| 1866 | |
| 1867 | /* |
| 1868 | * Do not trust the IO-APIC being empty at bootup |
| 1869 | */ |
| 1870 | clear_IO_APIC(); |
| 1871 | } |
| 1872 | |
| 1873 | /* |
| 1874 | * Not an __init, needed by the reboot code |
| 1875 | */ |
| 1876 | void disable_IO_APIC(void) |
| 1877 | { |
| 1878 | /* |
| 1879 | * Clear the IO-APIC before rebooting: |
| 1880 | */ |
| 1881 | clear_IO_APIC(); |
| 1882 | |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1883 | /* |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1884 | * If the i8259 is routed through an IOAPIC |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1885 | * Put that IOAPIC in virtual wire mode |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1886 | * so legacy interrupts can be delivered. |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1887 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1888 | if (ioapic_i8259.pin != -1) { |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1889 | struct IO_APIC_route_entry entry; |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1890 | |
| 1891 | memset(&entry, 0, sizeof(entry)); |
| 1892 | entry.mask = 0; /* Enabled */ |
| 1893 | entry.trigger = 0; /* Edge */ |
| 1894 | entry.irr = 0; |
| 1895 | entry.polarity = 0; /* High */ |
| 1896 | entry.delivery_status = 0; |
| 1897 | entry.dest_mode = 0; /* Physical */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1898 | entry.delivery_mode = dest_ExtINT; /* ExtInt */ |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1899 | entry.vector = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1900 | entry.dest = read_apic_id(); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1901 | |
| 1902 | /* |
| 1903 | * Add it to the IO-APIC irq-routing table: |
| 1904 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1905 | ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1906 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1907 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1908 | disconnect_bsp_APIC(ioapic_i8259.pin != -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1909 | } |
| 1910 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1911 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1912 | /* |
| 1913 | * function to set the IO-APIC physical IDs based on the |
| 1914 | * values stored in the MPC table. |
| 1915 | * |
| 1916 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 1917 | */ |
| 1918 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1919 | static void __init setup_ioapic_ids_from_mpc(void) |
| 1920 | { |
| 1921 | union IO_APIC_reg_00 reg_00; |
| 1922 | physid_mask_t phys_id_present_map; |
| 1923 | int apic; |
| 1924 | int i; |
| 1925 | unsigned char old_id; |
| 1926 | unsigned long flags; |
| 1927 | |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 1928 | if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 1929 | return; |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 1930 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1931 | /* |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 1932 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 1933 | * no meaning without the serial APIC bus. |
| 1934 | */ |
Shaohua Li | 7c5c1e4 | 2006-03-23 02:59:53 -0800 | [diff] [blame] | 1935 | if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 1936 | || APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 1937 | return; |
| 1938 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1939 | * This is broken; anything with a real cpu count has to |
| 1940 | * circumvent this idiocy regardless. |
| 1941 | */ |
| 1942 | phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map); |
| 1943 | |
| 1944 | /* |
| 1945 | * Set the IOAPIC ID to the value stored in the MPC table. |
| 1946 | */ |
| 1947 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1948 | |
| 1949 | /* Read the register 0 value */ |
| 1950 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1951 | reg_00.raw = io_apic_read(apic, 0); |
| 1952 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1953 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1954 | old_id = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1956 | if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1957 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1958 | apic, mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1959 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 1960 | reg_00.bits.ID); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1961 | mp_ioapics[apic].mp_apicid = reg_00.bits.ID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | } |
| 1963 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1964 | /* |
| 1965 | * Sanity check, is the ID really free? Every APIC in a |
| 1966 | * system must have a unique ID or we get lots of nice |
| 1967 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 1968 | */ |
| 1969 | if (check_apicid_used(phys_id_present_map, |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1970 | mp_ioapics[apic].mp_apicid)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1971 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1972 | apic, mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1973 | for (i = 0; i < get_physical_broadcast(); i++) |
| 1974 | if (!physid_isset(i, phys_id_present_map)) |
| 1975 | break; |
| 1976 | if (i >= get_physical_broadcast()) |
| 1977 | panic("Max APIC ID exceeded!\n"); |
| 1978 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 1979 | i); |
| 1980 | physid_set(i, phys_id_present_map); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1981 | mp_ioapics[apic].mp_apicid = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1982 | } else { |
| 1983 | physid_mask_t tmp; |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1984 | tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1985 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
| 1986 | "phys_id_present_map\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1987 | mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1988 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
| 1989 | } |
| 1990 | |
| 1991 | |
| 1992 | /* |
| 1993 | * We need to adjust the IRQ routing table |
| 1994 | * if the ID changed. |
| 1995 | */ |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1996 | if (old_id != mp_ioapics[apic].mp_apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1997 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 1998 | if (mp_irqs[i].mp_dstapic == old_id) |
| 1999 | mp_irqs[i].mp_dstapic |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2000 | = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2001 | |
| 2002 | /* |
| 2003 | * Read the right value from the MPC table and |
| 2004 | * write it into the ID register. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2005 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2006 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 2007 | "...changing IO-APIC physical APIC ID to %d ...", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2008 | mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2009 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2010 | reg_00.bits.ID = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2011 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | a2d332f | 2008-08-21 12:56:32 -0700 | [diff] [blame] | 2012 | io_apic_write(apic, 0, reg_00.raw); |
| 2013 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2014 | |
| 2015 | /* |
| 2016 | * Sanity check |
| 2017 | */ |
| 2018 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2019 | reg_00.raw = io_apic_read(apic, 0); |
| 2020 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2021 | if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2022 | printk("could not set ID!\n"); |
| 2023 | else |
| 2024 | apic_printk(APIC_VERBOSE, " ok.\n"); |
| 2025 | } |
| 2026 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2027 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2028 | |
Zachary Amsden | 7ce0bcf | 2007-02-13 13:26:21 +0100 | [diff] [blame] | 2029 | int no_timer_check __initdata; |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2030 | |
| 2031 | static int __init notimercheck(char *s) |
| 2032 | { |
| 2033 | no_timer_check = 1; |
| 2034 | return 1; |
| 2035 | } |
| 2036 | __setup("no_timer_check", notimercheck); |
| 2037 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2038 | /* |
| 2039 | * There is a nasty bug in some older SMP boards, their mptable lies |
| 2040 | * about the timer IRQ. We do the following to work around the situation: |
| 2041 | * |
| 2042 | * - timer IRQ defaults to IO-APIC IRQ |
| 2043 | * - if this function detects that timer IRQs are defunct, then we fall |
| 2044 | * back to ISA timer IRQs |
| 2045 | */ |
Adrian Bunk | f0a7a5c | 2007-07-21 17:10:29 +0200 | [diff] [blame] | 2046 | static int __init timer_irq_works(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2047 | { |
| 2048 | unsigned long t1 = jiffies; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2049 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2050 | |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2051 | if (no_timer_check) |
| 2052 | return 1; |
| 2053 | |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2054 | local_save_flags(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2055 | local_irq_enable(); |
| 2056 | /* Let ten ticks pass... */ |
| 2057 | mdelay((10 * 1000) / HZ); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2058 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2059 | |
| 2060 | /* |
| 2061 | * Expect a few ticks at least, to be sure some possible |
| 2062 | * glue logic does not lock up after one or two first |
| 2063 | * ticks in a non-ExtINT mode. Also the local APIC |
| 2064 | * might have cached one ExtINT interrupt. Finally, at |
| 2065 | * least one tick may be lost due to delays. |
| 2066 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2067 | |
| 2068 | /* jiffies wrap? */ |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 2069 | if (time_after(jiffies, t1 + 4)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2070 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2071 | return 0; |
| 2072 | } |
| 2073 | |
| 2074 | /* |
| 2075 | * In the SMP+IOAPIC case it might happen that there are an unspecified |
| 2076 | * number of pending IRQ events unhandled. These cases are very rare, |
| 2077 | * so we 'resend' these IRQs via IPIs, to the same CPU. It's much |
| 2078 | * better to do it this way as thus we do not have to be aware of |
| 2079 | * 'pending' interrupts in the IRQ path, except at this point. |
| 2080 | */ |
| 2081 | /* |
| 2082 | * Edge triggered needs to resend any interrupt |
| 2083 | * that was delayed but this is now handled in the device |
| 2084 | * independent code. |
| 2085 | */ |
| 2086 | |
| 2087 | /* |
| 2088 | * Starting up a edge-triggered IO-APIC interrupt is |
| 2089 | * nasty - we need to make sure that we get the edge. |
| 2090 | * If it is already asserted for some reason, we need |
| 2091 | * return 1 to indicate that is was pending. |
| 2092 | * |
| 2093 | * This is not complete - we should be able to fake |
| 2094 | * an edge even if it isn't on the 8259A... |
| 2095 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2096 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2097 | static unsigned int startup_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2098 | { |
| 2099 | int was_pending = 0; |
| 2100 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2101 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2102 | |
| 2103 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2104 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | disable_8259A_irq(irq); |
| 2106 | if (i8259A_irq_pending(irq)) |
| 2107 | was_pending = 1; |
| 2108 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2109 | cfg = irq_cfg(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2110 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2111 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2112 | |
| 2113 | return was_pending; |
| 2114 | } |
| 2115 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2116 | #ifdef CONFIG_X86_64 |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2117 | static int ioapic_retrigger_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2118 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2119 | |
| 2120 | struct irq_cfg *cfg = irq_cfg(irq); |
| 2121 | unsigned long flags; |
| 2122 | |
| 2123 | spin_lock_irqsave(&vector_lock, flags); |
| 2124 | send_IPI_mask(cpumask_of_cpu(first_cpu(cfg->domain)), cfg->vector); |
| 2125 | spin_unlock_irqrestore(&vector_lock, flags); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2126 | |
| 2127 | return 1; |
| 2128 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2129 | #else |
| 2130 | static int ioapic_retrigger_irq(unsigned int irq) |
| 2131 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2132 | send_IPI_self(irq_cfg(irq)->vector); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2133 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2134 | return 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2135 | } |
| 2136 | #endif |
| 2137 | |
| 2138 | /* |
| 2139 | * Level and edge triggered IO-APIC interrupts need different handling, |
| 2140 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
| 2141 | * handled with the level-triggered descriptor, but that one has slightly |
| 2142 | * more overhead. Level-triggered interrupts cannot be handled with the |
| 2143 | * edge-triggered handler, without risking IRQ storms and other ugly |
| 2144 | * races. |
| 2145 | */ |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2146 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2147 | #ifdef CONFIG_SMP |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2148 | |
| 2149 | #ifdef CONFIG_INTR_REMAP |
| 2150 | static void ir_irq_migration(struct work_struct *work); |
| 2151 | |
| 2152 | static DECLARE_DELAYED_WORK(ir_migration_work, ir_irq_migration); |
| 2153 | |
| 2154 | /* |
| 2155 | * Migrate the IO-APIC irq in the presence of intr-remapping. |
| 2156 | * |
| 2157 | * For edge triggered, irq migration is a simple atomic update(of vector |
| 2158 | * and cpu destination) of IRTE and flush the hardware cache. |
| 2159 | * |
| 2160 | * For level triggered, we need to modify the io-apic RTE aswell with the update |
| 2161 | * vector information, along with modifying IRTE with vector and destination. |
| 2162 | * So irq migration for level triggered is little bit more complex compared to |
| 2163 | * edge triggered migration. But the good news is, we use the same algorithm |
| 2164 | * for level triggered migration as we have today, only difference being, |
| 2165 | * we now initiate the irq migration from process context instead of the |
| 2166 | * interrupt context. |
| 2167 | * |
| 2168 | * In future, when we do a directed EOI (combined with cpu EOI broadcast |
| 2169 | * suppression) to the IO-APIC, level triggered irq migration will also be |
| 2170 | * as simple as edge triggered migration and we can do the irq migration |
| 2171 | * with a simple atomic update to IO-APIC RTE. |
| 2172 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2173 | static void migrate_ioapic_irq_desc(struct irq_desc *desc, cpumask_t mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2174 | { |
| 2175 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2176 | cpumask_t tmp, cleanup_mask; |
| 2177 | struct irte irte; |
| 2178 | int modify_ioapic_rte; |
| 2179 | unsigned int dest; |
| 2180 | unsigned long flags; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2181 | unsigned int irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2182 | |
| 2183 | cpus_and(tmp, mask, cpu_online_map); |
| 2184 | if (cpus_empty(tmp)) |
| 2185 | return; |
| 2186 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2187 | irq = desc->irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2188 | if (get_irte(irq, &irte)) |
| 2189 | return; |
| 2190 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2191 | cfg = desc->chip_data; |
| 2192 | if (assign_irq_vector(irq, cfg, mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2193 | return; |
| 2194 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2195 | set_extra_move_desc(desc, mask); |
| 2196 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2197 | cpus_and(tmp, cfg->domain, mask); |
| 2198 | dest = cpu_mask_to_apicid(tmp); |
| 2199 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2200 | modify_ioapic_rte = desc->status & IRQ_LEVEL; |
| 2201 | if (modify_ioapic_rte) { |
| 2202 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2203 | __target_IO_APIC_irq(irq, dest, cfg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2204 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2205 | } |
| 2206 | |
| 2207 | irte.vector = cfg->vector; |
| 2208 | irte.dest_id = IRTE_DEST(dest); |
| 2209 | |
| 2210 | /* |
| 2211 | * Modified the IRTE and flushes the Interrupt entry cache. |
| 2212 | */ |
| 2213 | modify_irte(irq, &irte); |
| 2214 | |
| 2215 | if (cfg->move_in_progress) { |
| 2216 | cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); |
| 2217 | cfg->move_cleanup_count = cpus_weight(cleanup_mask); |
| 2218 | send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
| 2219 | cfg->move_in_progress = 0; |
| 2220 | } |
| 2221 | |
| 2222 | desc->affinity = mask; |
| 2223 | } |
| 2224 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2225 | static int migrate_irq_remapped_level_desc(struct irq_desc *desc) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2226 | { |
| 2227 | int ret = -1; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2228 | struct irq_cfg *cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2229 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2230 | mask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2231 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2232 | if (io_apic_level_ack_pending(cfg)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2233 | /* |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2234 | * Interrupt in progress. Migrating irq now will change the |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2235 | * vector information in the IO-APIC RTE and that will confuse |
| 2236 | * the EOI broadcast performed by cpu. |
| 2237 | * So, delay the irq migration to the next instance. |
| 2238 | */ |
| 2239 | schedule_delayed_work(&ir_migration_work, 1); |
| 2240 | goto unmask; |
| 2241 | } |
| 2242 | |
| 2243 | /* everthing is clear. we have right of way */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2244 | migrate_ioapic_irq_desc(desc, desc->pending_mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2245 | |
| 2246 | ret = 0; |
| 2247 | desc->status &= ~IRQ_MOVE_PENDING; |
| 2248 | cpus_clear(desc->pending_mask); |
| 2249 | |
| 2250 | unmask: |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2251 | unmask_IO_APIC_irq_desc(desc); |
| 2252 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2253 | return ret; |
| 2254 | } |
| 2255 | |
| 2256 | static void ir_irq_migration(struct work_struct *work) |
| 2257 | { |
| 2258 | unsigned int irq; |
| 2259 | struct irq_desc *desc; |
| 2260 | |
| 2261 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2262 | if (!desc) |
| 2263 | continue; |
| 2264 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2265 | if (desc->status & IRQ_MOVE_PENDING) { |
| 2266 | unsigned long flags; |
| 2267 | |
| 2268 | spin_lock_irqsave(&desc->lock, flags); |
| 2269 | if (!desc->chip->set_affinity || |
| 2270 | !(desc->status & IRQ_MOVE_PENDING)) { |
| 2271 | desc->status &= ~IRQ_MOVE_PENDING; |
| 2272 | spin_unlock_irqrestore(&desc->lock, flags); |
| 2273 | continue; |
| 2274 | } |
| 2275 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 2276 | desc->chip->set_affinity(irq, &desc->pending_mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2277 | spin_unlock_irqrestore(&desc->lock, flags); |
| 2278 | } |
| 2279 | } |
| 2280 | } |
| 2281 | |
| 2282 | /* |
| 2283 | * Migrates the IRQ destination in the process context. |
| 2284 | */ |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 2285 | static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
| 2286 | const struct cpumask *mask) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2287 | { |
| 2288 | if (desc->status & IRQ_LEVEL) { |
| 2289 | desc->status |= IRQ_MOVE_PENDING; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 2290 | cpumask_copy(&desc->pending_mask, mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2291 | migrate_irq_remapped_level_desc(desc); |
| 2292 | return; |
| 2293 | } |
| 2294 | |
| 2295 | migrate_ioapic_irq_desc(desc, mask); |
| 2296 | } |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 2297 | static void set_ir_ioapic_affinity_irq(unsigned int irq, |
| 2298 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2299 | { |
| 2300 | struct irq_desc *desc = irq_to_desc(irq); |
| 2301 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2302 | set_ir_ioapic_affinity_irq_desc(desc, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2303 | } |
| 2304 | #endif |
| 2305 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2306 | asmlinkage void smp_irq_move_cleanup_interrupt(void) |
| 2307 | { |
| 2308 | unsigned vector, me; |
| 2309 | ack_APIC_irq(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2310 | #ifdef CONFIG_X86_64 |
| 2311 | exit_idle(); |
| 2312 | #endif |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2313 | irq_enter(); |
| 2314 | |
| 2315 | me = smp_processor_id(); |
| 2316 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) { |
| 2317 | unsigned int irq; |
| 2318 | struct irq_desc *desc; |
| 2319 | struct irq_cfg *cfg; |
| 2320 | irq = __get_cpu_var(vector_irq)[vector]; |
| 2321 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2322 | if (irq == -1) |
| 2323 | continue; |
| 2324 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2325 | desc = irq_to_desc(irq); |
| 2326 | if (!desc) |
| 2327 | continue; |
| 2328 | |
| 2329 | cfg = irq_cfg(irq); |
| 2330 | spin_lock(&desc->lock); |
| 2331 | if (!cfg->move_cleanup_count) |
| 2332 | goto unlock; |
| 2333 | |
| 2334 | if ((vector == cfg->vector) && cpu_isset(me, cfg->domain)) |
| 2335 | goto unlock; |
| 2336 | |
| 2337 | __get_cpu_var(vector_irq)[vector] = -1; |
| 2338 | cfg->move_cleanup_count--; |
| 2339 | unlock: |
| 2340 | spin_unlock(&desc->lock); |
| 2341 | } |
| 2342 | |
| 2343 | irq_exit(); |
| 2344 | } |
| 2345 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2346 | static void irq_complete_move(struct irq_desc **descp) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2347 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2348 | struct irq_desc *desc = *descp; |
| 2349 | struct irq_cfg *cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2350 | unsigned vector, me; |
| 2351 | |
| 2352 | if (likely(!cfg->move_in_progress)) |
| 2353 | return; |
| 2354 | |
| 2355 | vector = ~get_irq_regs()->orig_ax; |
| 2356 | me = smp_processor_id(); |
| 2357 | if ((vector == cfg->vector) && cpu_isset(me, cfg->domain)) { |
| 2358 | cpumask_t cleanup_mask; |
| 2359 | |
| 2360 | cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); |
| 2361 | cfg->move_cleanup_count = cpus_weight(cleanup_mask); |
| 2362 | send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
| 2363 | cfg->move_in_progress = 0; |
| 2364 | } |
| 2365 | } |
| 2366 | #else |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2367 | static inline void irq_complete_move(struct irq_desc **descp) {} |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2368 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2369 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2370 | #ifdef CONFIG_INTR_REMAP |
| 2371 | static void ack_x2apic_level(unsigned int irq) |
| 2372 | { |
| 2373 | ack_x2APIC_irq(); |
| 2374 | } |
| 2375 | |
| 2376 | static void ack_x2apic_edge(unsigned int irq) |
| 2377 | { |
| 2378 | ack_x2APIC_irq(); |
| 2379 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2380 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2381 | #endif |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2382 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2383 | static void ack_apic_edge(unsigned int irq) |
| 2384 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2385 | struct irq_desc *desc = irq_to_desc(irq); |
| 2386 | |
| 2387 | irq_complete_move(&desc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2388 | move_native_irq(irq); |
| 2389 | ack_APIC_irq(); |
| 2390 | } |
| 2391 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2392 | atomic_t irq_mis_count; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2393 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2394 | static void ack_apic_level(unsigned int irq) |
| 2395 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2396 | struct irq_desc *desc = irq_to_desc(irq); |
| 2397 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2398 | #ifdef CONFIG_X86_32 |
| 2399 | unsigned long v; |
| 2400 | int i; |
| 2401 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2402 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2403 | int do_unmask_irq = 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2404 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2405 | irq_complete_move(&desc); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2406 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2407 | /* If we are moving the irq we need to mask it */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2408 | if (unlikely(desc->status & IRQ_MOVE_PENDING)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2409 | do_unmask_irq = 1; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2410 | mask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2411 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2412 | #endif |
| 2413 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2414 | #ifdef CONFIG_X86_32 |
| 2415 | /* |
| 2416 | * It appears there is an erratum which affects at least version 0x11 |
| 2417 | * of I/O APIC (that's the 82093AA and cores integrated into various |
| 2418 | * chipsets). Under certain conditions a level-triggered interrupt is |
| 2419 | * erroneously delivered as edge-triggered one but the respective IRR |
| 2420 | * bit gets set nevertheless. As a result the I/O unit expects an EOI |
| 2421 | * message but it will never arrive and further interrupts are blocked |
| 2422 | * from the source. The exact reason is so far unknown, but the |
| 2423 | * phenomenon was observed when two consecutive interrupt requests |
| 2424 | * from a given source get delivered to the same CPU and the source is |
| 2425 | * temporarily disabled in between. |
| 2426 | * |
| 2427 | * A workaround is to simulate an EOI message manually. We achieve it |
| 2428 | * by setting the trigger mode to edge and then to level when the edge |
| 2429 | * trigger mode gets detected in the TMR of a local APIC for a |
| 2430 | * level-triggered interrupt. We mask the source for the time of the |
| 2431 | * operation to prevent an edge-triggered interrupt escaping meanwhile. |
| 2432 | * The idea is from Manfred Spraul. --macro |
| 2433 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2434 | cfg = desc->chip_data; |
| 2435 | i = cfg->vector; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2436 | |
| 2437 | v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); |
| 2438 | #endif |
| 2439 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2440 | /* |
| 2441 | * We must acknowledge the irq before we move it or the acknowledge will |
| 2442 | * not propagate properly. |
| 2443 | */ |
| 2444 | ack_APIC_irq(); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2445 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2446 | /* Now we can move and renable the irq */ |
| 2447 | if (unlikely(do_unmask_irq)) { |
| 2448 | /* Only migrate the irq if the ack has been received. |
| 2449 | * |
| 2450 | * On rare occasions the broadcast level triggered ack gets |
| 2451 | * delayed going to ioapics, and if we reprogram the |
| 2452 | * vector while Remote IRR is still set the irq will never |
| 2453 | * fire again. |
| 2454 | * |
| 2455 | * To prevent this scenario we read the Remote IRR bit |
| 2456 | * of the ioapic. This has two effects. |
| 2457 | * - On any sane system the read of the ioapic will |
| 2458 | * flush writes (and acks) going to the ioapic from |
| 2459 | * this cpu. |
| 2460 | * - We get to see if the ACK has actually been delivered. |
| 2461 | * |
| 2462 | * Based on failed experiments of reprogramming the |
| 2463 | * ioapic entry from outside of irq context starting |
| 2464 | * with masking the ioapic entry and then polling until |
| 2465 | * Remote IRR was clear before reprogramming the |
| 2466 | * ioapic I don't trust the Remote IRR bit to be |
| 2467 | * completey accurate. |
| 2468 | * |
| 2469 | * However there appears to be no other way to plug |
| 2470 | * this race, so if the Remote IRR bit is not |
| 2471 | * accurate and is causing problems then it is a hardware bug |
| 2472 | * and you can go talk to the chipset vendor about it. |
| 2473 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2474 | cfg = desc->chip_data; |
| 2475 | if (!io_apic_level_ack_pending(cfg)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2476 | move_masked_irq(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2477 | unmask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2478 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2479 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2480 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2481 | if (!(v & (1 << (i & 0x1f)))) { |
| 2482 | atomic_inc(&irq_mis_count); |
| 2483 | spin_lock(&ioapic_lock); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2484 | __mask_and_edge_IO_APIC_irq(cfg); |
| 2485 | __unmask_and_level_IO_APIC_irq(cfg); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2486 | spin_unlock(&ioapic_lock); |
| 2487 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2488 | #endif |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2489 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2490 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2491 | static struct irq_chip ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2492 | .name = "IO-APIC", |
| 2493 | .startup = startup_ioapic_irq, |
| 2494 | .mask = mask_IO_APIC_irq, |
| 2495 | .unmask = unmask_IO_APIC_irq, |
| 2496 | .ack = ack_apic_edge, |
| 2497 | .eoi = ack_apic_level, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2498 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2499 | .set_affinity = set_ioapic_affinity_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2500 | #endif |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2501 | .retrigger = ioapic_retrigger_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2502 | }; |
| 2503 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2504 | #ifdef CONFIG_INTR_REMAP |
| 2505 | static struct irq_chip ir_ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2506 | .name = "IR-IO-APIC", |
| 2507 | .startup = startup_ioapic_irq, |
| 2508 | .mask = mask_IO_APIC_irq, |
| 2509 | .unmask = unmask_IO_APIC_irq, |
| 2510 | .ack = ack_x2apic_edge, |
| 2511 | .eoi = ack_x2apic_level, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2512 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2513 | .set_affinity = set_ir_ioapic_affinity_irq, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2514 | #endif |
| 2515 | .retrigger = ioapic_retrigger_irq, |
| 2516 | }; |
| 2517 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2518 | |
| 2519 | static inline void init_IO_APIC_traps(void) |
| 2520 | { |
| 2521 | int irq; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2522 | struct irq_desc *desc; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame] | 2523 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2524 | |
| 2525 | /* |
| 2526 | * NOTE! The local APIC isn't very good at handling |
| 2527 | * multiple interrupts at the same interrupt level. |
| 2528 | * As the interrupt level is determined by taking the |
| 2529 | * vector number and shifting that right by 4, we |
| 2530 | * want to spread these out a bit so that they don't |
| 2531 | * all fall in the same interrupt level. |
| 2532 | * |
| 2533 | * Also, we've got to be careful not to trash gate |
| 2534 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 2535 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2536 | for_each_irq_desc(irq, desc) { |
| 2537 | if (!desc) |
| 2538 | continue; |
| 2539 | |
| 2540 | cfg = desc->chip_data; |
| 2541 | if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2542 | /* |
| 2543 | * Hmm.. We don't have an entry for this, |
| 2544 | * so default to an old-fashioned 8259 |
| 2545 | * interrupt if we can.. |
| 2546 | */ |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2547 | if (irq < NR_IRQS_LEGACY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2548 | make_8259A_irq(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2549 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2550 | /* Strange. Oh, well.. */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2551 | desc->chip = &no_irq_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2552 | } |
| 2553 | } |
| 2554 | } |
| 2555 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2556 | /* |
| 2557 | * The local APIC irq-chip implementation: |
| 2558 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2559 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2560 | static void mask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2561 | { |
| 2562 | unsigned long v; |
| 2563 | |
| 2564 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2565 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2566 | } |
| 2567 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2568 | static void unmask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2569 | { |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2570 | unsigned long v; |
| 2571 | |
| 2572 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2573 | apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2574 | } |
| 2575 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2576 | static void ack_lapic_irq(unsigned int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2577 | { |
| 2578 | ack_APIC_irq(); |
| 2579 | } |
| 2580 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2581 | static struct irq_chip lapic_chip __read_mostly = { |
Maciej W. Rozycki | 9a1c619 | 2008-05-27 21:19:09 +0100 | [diff] [blame] | 2582 | .name = "local-APIC", |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2583 | .mask = mask_lapic_irq, |
| 2584 | .unmask = unmask_lapic_irq, |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2585 | .ack = ack_lapic_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2586 | }; |
| 2587 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2588 | static void lapic_register_intr(int irq, struct irq_desc *desc) |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2589 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2590 | desc->status &= ~IRQ_LEVEL; |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2591 | set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, |
| 2592 | "edge"); |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2593 | } |
| 2594 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2595 | static void __init setup_nmi(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2596 | { |
| 2597 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2598 | * Dirty trick to enable the NMI watchdog ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2599 | * We put the 8259A master into AEOI mode and |
| 2600 | * unmask on all local APICs LVT0 as NMI. |
| 2601 | * |
| 2602 | * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') |
| 2603 | * is from Maciej W. Rozycki - so we do not have to EOI from |
| 2604 | * the NMI handler or the timer interrupt. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2605 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2606 | apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); |
| 2607 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2608 | enable_NMI_through_LVT0(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2609 | |
| 2610 | apic_printk(APIC_VERBOSE, " done.\n"); |
| 2611 | } |
| 2612 | |
| 2613 | /* |
| 2614 | * This looks a bit hackish but it's about the only one way of sending |
| 2615 | * a few INTA cycles to 8259As and any associated glue logic. ICR does |
| 2616 | * not support the ExtINT mode, unfortunately. We need to send these |
| 2617 | * cycles as some i82489DX-based boards have glue logic that keeps the |
| 2618 | * 8259A interrupt line asserted until INTA. --macro |
| 2619 | */ |
Jacek Luczak | 28acf28 | 2008-04-12 17:41:12 +0200 | [diff] [blame] | 2620 | static inline void __init unlock_ExtINT_logic(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2621 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2622 | int apic, pin, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2623 | struct IO_APIC_route_entry entry0, entry1; |
| 2624 | unsigned char save_control, save_freq_select; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2625 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2626 | pin = find_isa_irq_pin(8, mp_INT); |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2627 | if (pin == -1) { |
| 2628 | WARN_ON_ONCE(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2629 | return; |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2630 | } |
| 2631 | apic = find_isa_irq_apic(8, mp_INT); |
| 2632 | if (apic == -1) { |
| 2633 | WARN_ON_ONCE(1); |
| 2634 | return; |
| 2635 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2636 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2637 | entry0 = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2638 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2639 | |
| 2640 | memset(&entry1, 0, sizeof(entry1)); |
| 2641 | |
| 2642 | entry1.dest_mode = 0; /* physical delivery */ |
| 2643 | entry1.mask = 0; /* unmask IRQ now */ |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 2644 | entry1.dest = hard_smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2645 | entry1.delivery_mode = dest_ExtINT; |
| 2646 | entry1.polarity = entry0.polarity; |
| 2647 | entry1.trigger = 0; |
| 2648 | entry1.vector = 0; |
| 2649 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2650 | ioapic_write_entry(apic, pin, entry1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2651 | |
| 2652 | save_control = CMOS_READ(RTC_CONTROL); |
| 2653 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 2654 | CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, |
| 2655 | RTC_FREQ_SELECT); |
| 2656 | CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); |
| 2657 | |
| 2658 | i = 100; |
| 2659 | while (i-- > 0) { |
| 2660 | mdelay(10); |
| 2661 | if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF) |
| 2662 | i -= 10; |
| 2663 | } |
| 2664 | |
| 2665 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 2666 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2667 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2668 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2669 | ioapic_write_entry(apic, pin, entry0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2670 | } |
| 2671 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2672 | static int disable_timer_pin_1 __initdata; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2673 | /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2674 | static int __init disable_timer_pin_setup(char *arg) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2675 | { |
| 2676 | disable_timer_pin_1 = 1; |
| 2677 | return 0; |
| 2678 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2679 | early_param("disable_timer_pin_1", disable_timer_pin_setup); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2680 | |
| 2681 | int timer_through_8259 __initdata; |
| 2682 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2683 | /* |
| 2684 | * This code may look a bit paranoid, but it's supposed to cooperate with |
| 2685 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
| 2686 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
| 2687 | * fanatically on his truly buggy board. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2688 | * |
| 2689 | * FIXME: really need to revamp this for all platforms. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2690 | */ |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2691 | static inline void __init check_timer(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2692 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2693 | struct irq_desc *desc = irq_to_desc(0); |
| 2694 | struct irq_cfg *cfg = desc->chip_data; |
| 2695 | int cpu = boot_cpu_id; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2696 | int apic1, pin1, apic2, pin2; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2697 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2698 | unsigned int ver; |
| 2699 | int no_pin1 = 0; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2700 | |
| 2701 | local_irq_save(flags); |
Maciej W. Rozycki | d4d25de | 2007-11-26 20:42:19 +0100 | [diff] [blame] | 2702 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2703 | ver = apic_read(APIC_LVR); |
| 2704 | ver = GET_APIC_VERSION(ver); |
Ingo Molnar | 6e90894 | 2008-03-21 14:32:36 +0100 | [diff] [blame] | 2705 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2706 | /* |
| 2707 | * get/set the timer IRQ vector: |
| 2708 | */ |
| 2709 | disable_8259A_irq(0); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2710 | assign_irq_vector(0, cfg, TARGET_CPUS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2711 | |
| 2712 | /* |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2713 | * As IRQ0 is to be enabled in the 8259A, the virtual |
| 2714 | * wire has to be disabled in the local APIC. Also |
| 2715 | * timer interrupts need to be acknowledged manually in |
| 2716 | * the 8259A for the i82489DX when using the NMI |
| 2717 | * watchdog as that APIC treats NMIs as level-triggered. |
| 2718 | * The AEOI mode will finish them in the 8259A |
| 2719 | * automatically. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2720 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2721 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2722 | init_8259A(1); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2723 | #ifdef CONFIG_X86_32 |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2724 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2725 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2726 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2727 | pin1 = find_isa_irq_pin(0, mp_INT); |
| 2728 | apic1 = find_isa_irq_apic(0, mp_INT); |
| 2729 | pin2 = ioapic_i8259.pin; |
| 2730 | apic2 = ioapic_i8259.apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2731 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2732 | apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " |
| 2733 | "apic1=%d pin1=%d apic2=%d pin2=%d\n", |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2734 | cfg->vector, apic1, pin1, apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2735 | |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2736 | /* |
| 2737 | * Some BIOS writers are clueless and report the ExtINTA |
| 2738 | * I/O APIC input from the cascaded 8259A as the timer |
| 2739 | * interrupt input. So just in case, if only one pin |
| 2740 | * was found above, try it both directly and through the |
| 2741 | * 8259A. |
| 2742 | */ |
| 2743 | if (pin1 == -1) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2744 | #ifdef CONFIG_INTR_REMAP |
| 2745 | if (intr_remapping_enabled) |
| 2746 | panic("BIOS bug: timer not connected to IO-APIC"); |
| 2747 | #endif |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2748 | pin1 = pin2; |
| 2749 | apic1 = apic2; |
| 2750 | no_pin1 = 1; |
| 2751 | } else if (pin2 == -1) { |
| 2752 | pin2 = pin1; |
| 2753 | apic2 = apic1; |
| 2754 | } |
| 2755 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2756 | if (pin1 != -1) { |
| 2757 | /* |
| 2758 | * Ok, does IRQ0 through the IOAPIC work? |
| 2759 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2760 | if (no_pin1) { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2761 | add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2762 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2763 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2764 | unmask_IO_APIC_irq_desc(desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2765 | if (timer_irq_works()) { |
| 2766 | if (nmi_watchdog == NMI_IO_APIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2767 | setup_nmi(); |
| 2768 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2769 | } |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 2770 | if (disable_timer_pin_1 > 0) |
| 2771 | clear_IO_APIC_pin(0, pin1); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2772 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2773 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2774 | #ifdef CONFIG_INTR_REMAP |
| 2775 | if (intr_remapping_enabled) |
| 2776 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); |
| 2777 | #endif |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2778 | clear_IO_APIC_pin(apic1, pin1); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2779 | if (!no_pin1) |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2780 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
| 2781 | "8254 timer not connected to IO-APIC\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2782 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2783 | apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " |
| 2784 | "(IRQ0) through the 8259A ...\n"); |
| 2785 | apic_printk(APIC_QUIET, KERN_INFO |
| 2786 | "..... (found apic %d pin %d) ...\n", apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2787 | /* |
| 2788 | * legacy devices should be connected to IO APIC #0 |
| 2789 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2790 | replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2791 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2792 | unmask_IO_APIC_irq_desc(desc); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2793 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2794 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2795 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 2796 | timer_through_8259 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2797 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2798 | disable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2799 | setup_nmi(); |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2800 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2801 | } |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2802 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2803 | } |
| 2804 | /* |
| 2805 | * Cleanup, just in case ... |
| 2806 | */ |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2807 | disable_8259A_irq(0); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2808 | clear_IO_APIC_pin(apic2, pin2); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2809 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2810 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2811 | |
| 2812 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2813 | apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " |
| 2814 | "through the IO-APIC - disabling NMI Watchdog!\n"); |
Cyrill Gorcunov | 067fa0f | 2008-05-29 22:32:30 +0400 | [diff] [blame] | 2815 | nmi_watchdog = NMI_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2816 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2817 | #ifdef CONFIG_X86_32 |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2818 | timer_ack = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2819 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2820 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2821 | apic_printk(APIC_QUIET, KERN_INFO |
| 2822 | "...trying to set up timer as Virtual Wire IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2823 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2824 | lapic_register_intr(0, desc); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2825 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2826 | enable_8259A_irq(0); |
| 2827 | |
| 2828 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2829 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2830 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2831 | } |
Maciej W. Rozycki | e67465f | 2008-05-21 22:09:26 +0100 | [diff] [blame] | 2832 | disable_8259A_irq(0); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2833 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2834 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2835 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2836 | apic_printk(APIC_QUIET, KERN_INFO |
| 2837 | "...trying to set up timer as ExtINT IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2838 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2839 | init_8259A(0); |
| 2840 | make_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2841 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2842 | |
| 2843 | unlock_ExtINT_logic(); |
| 2844 | |
| 2845 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2846 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2847 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2848 | } |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2849 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2850 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2851 | "report. Then try booting with the 'noapic' option.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2852 | out: |
| 2853 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2854 | } |
| 2855 | |
| 2856 | /* |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 2857 | * Traditionally ISA IRQ2 is the cascade IRQ, and is not available |
| 2858 | * to devices. However there may be an I/O APIC pin available for |
| 2859 | * this interrupt regardless. The pin may be left unconnected, but |
| 2860 | * typically it will be reused as an ExtINT cascade interrupt for |
| 2861 | * the master 8259A. In the MPS case such a pin will normally be |
| 2862 | * reported as an ExtINT interrupt in the MP table. With ACPI |
| 2863 | * there is no provision for ExtINT interrupts, and in the absence |
| 2864 | * of an override it would be treated as an ordinary ISA I/O APIC |
| 2865 | * interrupt, that is edge-triggered and unmasked by default. We |
| 2866 | * used to do this, but it caused problems on some systems because |
| 2867 | * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using |
| 2868 | * the same ExtINT cascade interrupt to drive the local APIC of the |
| 2869 | * bootstrap processor. Therefore we refrain from routing IRQ2 to |
| 2870 | * the I/O APIC in all cases now. No actual device should request |
| 2871 | * it anyway. --macro |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2872 | */ |
| 2873 | #define PIC_IRQS (1 << PIC_CASCADE_IR) |
| 2874 | |
| 2875 | void __init setup_IO_APIC(void) |
| 2876 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2877 | |
| 2878 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2879 | enable_IO_APIC(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2880 | #else |
| 2881 | /* |
| 2882 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
| 2883 | */ |
| 2884 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2885 | |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 2886 | io_apic_irqs = ~PIC_IRQS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2887 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2888 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2889 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2890 | * Set up IO-APIC IRQ routing. |
| 2891 | */ |
| 2892 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2893 | if (!acpi_ioapic) |
| 2894 | setup_ioapic_ids_from_mpc(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2895 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2896 | sync_Arb_IDs(); |
| 2897 | setup_IO_APIC_irqs(); |
| 2898 | init_IO_APIC_traps(); |
Linus Torvalds | 1e4c85f | 2005-10-31 19:16:17 -0800 | [diff] [blame] | 2899 | check_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2900 | } |
| 2901 | |
| 2902 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2903 | * Called after all the initialization is done. If we didnt find any |
| 2904 | * APIC bugs then we can allow the modify fast path |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2905 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2906 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2907 | static int __init io_apic_bug_finalize(void) |
| 2908 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2909 | if (sis_apic_bug == -1) |
| 2910 | sis_apic_bug = 0; |
| 2911 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2912 | } |
| 2913 | |
| 2914 | late_initcall(io_apic_bug_finalize); |
| 2915 | |
| 2916 | struct sysfs_ioapic_data { |
| 2917 | struct sys_device dev; |
| 2918 | struct IO_APIC_route_entry entry[0]; |
| 2919 | }; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2920 | static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2921 | |
Pavel Machek | 438510f | 2005-04-16 15:25:24 -0700 | [diff] [blame] | 2922 | static int ioapic_suspend(struct sys_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2923 | { |
| 2924 | struct IO_APIC_route_entry *entry; |
| 2925 | struct sysfs_ioapic_data *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2926 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2927 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2928 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 2929 | entry = data->entry; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2930 | for (i = 0; i < nr_ioapic_registers[dev->id]; i ++, entry ++ ) |
| 2931 | *entry = ioapic_read_entry(dev->id, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2932 | |
| 2933 | return 0; |
| 2934 | } |
| 2935 | |
| 2936 | static int ioapic_resume(struct sys_device *dev) |
| 2937 | { |
| 2938 | struct IO_APIC_route_entry *entry; |
| 2939 | struct sysfs_ioapic_data *data; |
| 2940 | unsigned long flags; |
| 2941 | union IO_APIC_reg_00 reg_00; |
| 2942 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2943 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2944 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 2945 | entry = data->entry; |
| 2946 | |
| 2947 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2948 | reg_00.raw = io_apic_read(dev->id, 0); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2949 | if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { |
| 2950 | reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2951 | io_apic_write(dev->id, 0, reg_00.raw); |
| 2952 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2953 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2954 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2955 | ioapic_write_entry(dev->id, i, entry[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2956 | |
| 2957 | return 0; |
| 2958 | } |
| 2959 | |
| 2960 | static struct sysdev_class ioapic_sysdev_class = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 2961 | .name = "ioapic", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2962 | .suspend = ioapic_suspend, |
| 2963 | .resume = ioapic_resume, |
| 2964 | }; |
| 2965 | |
| 2966 | static int __init ioapic_init_sysfs(void) |
| 2967 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2968 | struct sys_device * dev; |
| 2969 | int i, size, error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2970 | |
| 2971 | error = sysdev_class_register(&ioapic_sysdev_class); |
| 2972 | if (error) |
| 2973 | return error; |
| 2974 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2975 | for (i = 0; i < nr_ioapics; i++ ) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2976 | size = sizeof(struct sys_device) + nr_ioapic_registers[i] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2977 | * sizeof(struct IO_APIC_route_entry); |
Christophe Jaillet | 25556c1 | 2008-06-22 22:13:48 +0200 | [diff] [blame] | 2978 | mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2979 | if (!mp_ioapic_data[i]) { |
| 2980 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 2981 | continue; |
| 2982 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2983 | dev = &mp_ioapic_data[i]->dev; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2984 | dev->id = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2985 | dev->cls = &ioapic_sysdev_class; |
| 2986 | error = sysdev_register(dev); |
| 2987 | if (error) { |
| 2988 | kfree(mp_ioapic_data[i]); |
| 2989 | mp_ioapic_data[i] = NULL; |
| 2990 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 2991 | continue; |
| 2992 | } |
| 2993 | } |
| 2994 | |
| 2995 | return 0; |
| 2996 | } |
| 2997 | |
| 2998 | device_initcall(ioapic_init_sysfs); |
| 2999 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3000 | /* |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 3001 | * Dynamic irq allocate and deallocation |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3002 | */ |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3003 | unsigned int create_irq_nr(unsigned int irq_want) |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3004 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3005 | /* Allocate an unused irq */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3006 | unsigned int irq; |
| 3007 | unsigned int new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3008 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3009 | struct irq_cfg *cfg_new = NULL; |
| 3010 | int cpu = boot_cpu_id; |
| 3011 | struct irq_desc *desc_new = NULL; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3012 | |
| 3013 | irq = 0; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3014 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3015 | for (new = irq_want; new < NR_IRQS; new++) { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3016 | if (platform_legacy_irq(new)) |
| 3017 | continue; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3018 | |
| 3019 | desc_new = irq_to_desc_alloc_cpu(new, cpu); |
| 3020 | if (!desc_new) { |
| 3021 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3022 | continue; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3023 | } |
| 3024 | cfg_new = desc_new->chip_data; |
| 3025 | |
| 3026 | if (cfg_new->vector != 0) |
| 3027 | continue; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3028 | if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3029 | irq = new; |
| 3030 | break; |
| 3031 | } |
| 3032 | spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3033 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3034 | if (irq > 0) { |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3035 | dynamic_irq_init(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3036 | /* restore it, in case dynamic_irq_init clear it */ |
| 3037 | if (desc_new) |
| 3038 | desc_new->chip_data = cfg_new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3039 | } |
| 3040 | return irq; |
| 3041 | } |
| 3042 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3043 | static int nr_irqs_gsi = NR_IRQS_LEGACY; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3044 | int create_irq(void) |
| 3045 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3046 | unsigned int irq_want; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3047 | int irq; |
| 3048 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3049 | irq_want = nr_irqs_gsi; |
| 3050 | irq = create_irq_nr(irq_want); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3051 | |
| 3052 | if (irq == 0) |
| 3053 | irq = -1; |
| 3054 | |
| 3055 | return irq; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3056 | } |
| 3057 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3058 | void destroy_irq(unsigned int irq) |
| 3059 | { |
| 3060 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3061 | struct irq_cfg *cfg; |
| 3062 | struct irq_desc *desc; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3063 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3064 | /* store it, in case dynamic_irq_cleanup clear it */ |
| 3065 | desc = irq_to_desc(irq); |
| 3066 | cfg = desc->chip_data; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3067 | dynamic_irq_cleanup(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3068 | /* connect back irq_cfg */ |
| 3069 | if (desc) |
| 3070 | desc->chip_data = cfg; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3071 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3072 | #ifdef CONFIG_INTR_REMAP |
| 3073 | free_irte(irq); |
| 3074 | #endif |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3075 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3076 | __clear_irq_vector(irq, cfg); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3077 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3078 | } |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3079 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3080 | /* |
Simon Arlott | 27b46d7 | 2007-10-20 01:13:56 +0200 | [diff] [blame] | 3081 | * MSI message composition |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3082 | */ |
| 3083 | #ifdef CONFIG_PCI_MSI |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3084 | static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3085 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3086 | struct irq_cfg *cfg; |
| 3087 | int err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3088 | unsigned dest; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3089 | cpumask_t tmp; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3090 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3091 | cfg = irq_cfg(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3092 | tmp = TARGET_CPUS; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3093 | err = assign_irq_vector(irq, cfg, tmp); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3094 | if (err) |
| 3095 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3096 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3097 | cpus_and(tmp, cfg->domain, tmp); |
| 3098 | dest = cpu_mask_to_apicid(tmp); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3099 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3100 | #ifdef CONFIG_INTR_REMAP |
| 3101 | if (irq_remapped(irq)) { |
| 3102 | struct irte irte; |
| 3103 | int ir_index; |
| 3104 | u16 sub_handle; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3105 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3106 | ir_index = map_irq_to_irte_handle(irq, &sub_handle); |
| 3107 | BUG_ON(ir_index == -1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3108 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3109 | memset (&irte, 0, sizeof(irte)); |
| 3110 | |
| 3111 | irte.present = 1; |
| 3112 | irte.dst_mode = INT_DEST_MODE; |
| 3113 | irte.trigger_mode = 0; /* edge */ |
| 3114 | irte.dlvry_mode = INT_DELIVERY_MODE; |
| 3115 | irte.vector = cfg->vector; |
| 3116 | irte.dest_id = IRTE_DEST(dest); |
| 3117 | |
| 3118 | modify_irte(irq, &irte); |
| 3119 | |
| 3120 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3121 | msg->data = sub_handle; |
| 3122 | msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | |
| 3123 | MSI_ADDR_IR_SHV | |
| 3124 | MSI_ADDR_IR_INDEX1(ir_index) | |
| 3125 | MSI_ADDR_IR_INDEX2(ir_index); |
| 3126 | } else |
| 3127 | #endif |
| 3128 | { |
| 3129 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3130 | msg->address_lo = |
| 3131 | MSI_ADDR_BASE_LO | |
| 3132 | ((INT_DEST_MODE == 0) ? |
| 3133 | MSI_ADDR_DEST_MODE_PHYSICAL: |
| 3134 | MSI_ADDR_DEST_MODE_LOGICAL) | |
| 3135 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
| 3136 | MSI_ADDR_REDIRECTION_CPU: |
| 3137 | MSI_ADDR_REDIRECTION_LOWPRI) | |
| 3138 | MSI_ADDR_DEST_ID(dest); |
| 3139 | |
| 3140 | msg->data = |
| 3141 | MSI_DATA_TRIGGER_EDGE | |
| 3142 | MSI_DATA_LEVEL_ASSERT | |
| 3143 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
| 3144 | MSI_DATA_DELIVERY_FIXED: |
| 3145 | MSI_DATA_DELIVERY_LOWPRI) | |
| 3146 | MSI_DATA_VECTOR(cfg->vector); |
| 3147 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3148 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3149 | } |
| 3150 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3151 | #ifdef CONFIG_SMP |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3152 | static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3153 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3154 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3155 | struct irq_cfg *cfg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3156 | struct msi_msg msg; |
| 3157 | unsigned int dest; |
| 3158 | cpumask_t tmp; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3159 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3160 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3161 | return; |
| 3162 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3163 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3164 | if (assign_irq_vector(irq, cfg, *mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3165 | return; |
| 3166 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3167 | set_extra_move_desc(desc, *mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3168 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3169 | cpumask_and(&tmp, &cfg->domain, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3170 | dest = cpu_mask_to_apicid(tmp); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3171 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3172 | read_msi_msg_desc(desc, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3173 | |
| 3174 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3175 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3176 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3177 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3178 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3179 | write_msi_msg_desc(desc, &msg); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3180 | cpumask_copy(&desc->affinity, mask); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3181 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3182 | #ifdef CONFIG_INTR_REMAP |
| 3183 | /* |
| 3184 | * Migrate the MSI irq to another cpumask. This migration is |
| 3185 | * done in the process context using interrupt-remapping hardware. |
| 3186 | */ |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3187 | static void ir_set_msi_irq_affinity(unsigned int irq, |
| 3188 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3189 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3190 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3191 | struct irq_cfg *cfg; |
| 3192 | unsigned int dest; |
| 3193 | cpumask_t tmp, cleanup_mask; |
| 3194 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3195 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3196 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3197 | return; |
| 3198 | |
| 3199 | if (get_irte(irq, &irte)) |
| 3200 | return; |
| 3201 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3202 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3203 | if (assign_irq_vector(irq, cfg, *mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3204 | return; |
| 3205 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3206 | set_extra_move_desc(desc, mask); |
| 3207 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3208 | cpumask_and(&tmp, &cfg->domain, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3209 | dest = cpu_mask_to_apicid(tmp); |
| 3210 | |
| 3211 | irte.vector = cfg->vector; |
| 3212 | irte.dest_id = IRTE_DEST(dest); |
| 3213 | |
| 3214 | /* |
| 3215 | * atomically update the IRTE with the new destination and vector. |
| 3216 | */ |
| 3217 | modify_irte(irq, &irte); |
| 3218 | |
| 3219 | /* |
| 3220 | * After this point, all the interrupts will start arriving |
| 3221 | * at the new destination. So, time to cleanup the previous |
| 3222 | * vector allocation. |
| 3223 | */ |
| 3224 | if (cfg->move_in_progress) { |
| 3225 | cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); |
| 3226 | cfg->move_cleanup_count = cpus_weight(cleanup_mask); |
| 3227 | send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
| 3228 | cfg->move_in_progress = 0; |
| 3229 | } |
| 3230 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3231 | cpumask_copy(&desc->affinity, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3232 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3233 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3234 | #endif |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3235 | #endif /* CONFIG_SMP */ |
| 3236 | |
| 3237 | /* |
| 3238 | * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices, |
| 3239 | * which implement the MSI or MSI-X Capability Structure. |
| 3240 | */ |
| 3241 | static struct irq_chip msi_chip = { |
| 3242 | .name = "PCI-MSI", |
| 3243 | .unmask = unmask_msi_irq, |
| 3244 | .mask = mask_msi_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3245 | .ack = ack_apic_edge, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3246 | #ifdef CONFIG_SMP |
| 3247 | .set_affinity = set_msi_irq_affinity, |
| 3248 | #endif |
| 3249 | .retrigger = ioapic_retrigger_irq, |
| 3250 | }; |
| 3251 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3252 | #ifdef CONFIG_INTR_REMAP |
| 3253 | static struct irq_chip msi_ir_chip = { |
| 3254 | .name = "IR-PCI-MSI", |
| 3255 | .unmask = unmask_msi_irq, |
| 3256 | .mask = mask_msi_irq, |
| 3257 | .ack = ack_x2apic_edge, |
| 3258 | #ifdef CONFIG_SMP |
| 3259 | .set_affinity = ir_set_msi_irq_affinity, |
| 3260 | #endif |
| 3261 | .retrigger = ioapic_retrigger_irq, |
| 3262 | }; |
| 3263 | |
| 3264 | /* |
| 3265 | * Map the PCI dev to the corresponding remapping hardware unit |
| 3266 | * and allocate 'nvec' consecutive interrupt-remapping table entries |
| 3267 | * in it. |
| 3268 | */ |
| 3269 | static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec) |
| 3270 | { |
| 3271 | struct intel_iommu *iommu; |
| 3272 | int index; |
| 3273 | |
| 3274 | iommu = map_dev_to_ir(dev); |
| 3275 | if (!iommu) { |
| 3276 | printk(KERN_ERR |
| 3277 | "Unable to map PCI %s to iommu\n", pci_name(dev)); |
| 3278 | return -ENOENT; |
| 3279 | } |
| 3280 | |
| 3281 | index = alloc_irte(iommu, irq, nvec); |
| 3282 | if (index < 0) { |
| 3283 | printk(KERN_ERR |
| 3284 | "Unable to allocate %d IRTE for PCI %s\n", nvec, |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3285 | pci_name(dev)); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3286 | return -ENOSPC; |
| 3287 | } |
| 3288 | return index; |
| 3289 | } |
| 3290 | #endif |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3291 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3292 | static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3293 | { |
| 3294 | int ret; |
| 3295 | struct msi_msg msg; |
| 3296 | |
| 3297 | ret = msi_compose_msg(dev, irq, &msg); |
| 3298 | if (ret < 0) |
| 3299 | return ret; |
| 3300 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3301 | set_irq_msi(irq, msidesc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3302 | write_msi_msg(irq, &msg); |
| 3303 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3304 | #ifdef CONFIG_INTR_REMAP |
| 3305 | if (irq_remapped(irq)) { |
| 3306 | struct irq_desc *desc = irq_to_desc(irq); |
| 3307 | /* |
| 3308 | * irq migration in process context |
| 3309 | */ |
| 3310 | desc->status |= IRQ_MOVE_PCNTXT; |
| 3311 | set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge"); |
| 3312 | } else |
| 3313 | #endif |
| 3314 | set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3315 | |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3316 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq); |
| 3317 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3318 | return 0; |
| 3319 | } |
| 3320 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3321 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3322 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3323 | unsigned int irq; |
| 3324 | int ret; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3325 | unsigned int irq_want; |
| 3326 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3327 | irq_want = nr_irqs_gsi; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3328 | irq = create_irq_nr(irq_want); |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3329 | if (irq == 0) |
| 3330 | return -1; |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3331 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3332 | #ifdef CONFIG_INTR_REMAP |
| 3333 | if (!intr_remapping_enabled) |
| 3334 | goto no_ir; |
| 3335 | |
| 3336 | ret = msi_alloc_irte(dev, irq, 1); |
| 3337 | if (ret < 0) |
| 3338 | goto error; |
| 3339 | no_ir: |
| 3340 | #endif |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3341 | ret = setup_msi_irq(dev, msidesc, irq); |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3342 | if (ret < 0) { |
| 3343 | destroy_irq(irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3344 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3345 | } |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 3346 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3347 | |
| 3348 | #ifdef CONFIG_INTR_REMAP |
| 3349 | error: |
| 3350 | destroy_irq(irq); |
| 3351 | return ret; |
| 3352 | #endif |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3353 | } |
| 3354 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3355 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 3356 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3357 | unsigned int irq; |
| 3358 | int ret, sub_handle; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3359 | struct msi_desc *msidesc; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3360 | unsigned int irq_want; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3361 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3362 | #ifdef CONFIG_INTR_REMAP |
| 3363 | struct intel_iommu *iommu = 0; |
| 3364 | int index = 0; |
| 3365 | #endif |
| 3366 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3367 | irq_want = nr_irqs_gsi; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3368 | sub_handle = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3369 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
| 3370 | irq = create_irq_nr(irq_want); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3371 | irq_want++; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3372 | if (irq == 0) |
| 3373 | return -1; |
| 3374 | #ifdef CONFIG_INTR_REMAP |
| 3375 | if (!intr_remapping_enabled) |
| 3376 | goto no_ir; |
| 3377 | |
| 3378 | if (!sub_handle) { |
| 3379 | /* |
| 3380 | * allocate the consecutive block of IRTE's |
| 3381 | * for 'nvec' |
| 3382 | */ |
| 3383 | index = msi_alloc_irte(dev, irq, nvec); |
| 3384 | if (index < 0) { |
| 3385 | ret = index; |
| 3386 | goto error; |
| 3387 | } |
| 3388 | } else { |
| 3389 | iommu = map_dev_to_ir(dev); |
| 3390 | if (!iommu) { |
| 3391 | ret = -ENOENT; |
| 3392 | goto error; |
| 3393 | } |
| 3394 | /* |
| 3395 | * setup the mapping between the irq and the IRTE |
| 3396 | * base index, the sub_handle pointing to the |
| 3397 | * appropriate interrupt remap table entry. |
| 3398 | */ |
| 3399 | set_irte_irq(irq, iommu, index, sub_handle); |
| 3400 | } |
| 3401 | no_ir: |
| 3402 | #endif |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3403 | ret = setup_msi_irq(dev, msidesc, irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3404 | if (ret < 0) |
| 3405 | goto error; |
| 3406 | sub_handle++; |
| 3407 | } |
| 3408 | return 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3409 | |
| 3410 | error: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3411 | destroy_irq(irq); |
| 3412 | return ret; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3413 | } |
| 3414 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3415 | void arch_teardown_msi_irq(unsigned int irq) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3416 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3417 | destroy_irq(irq); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3418 | } |
| 3419 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3420 | #ifdef CONFIG_DMAR |
| 3421 | #ifdef CONFIG_SMP |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3422 | static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3423 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3424 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3425 | struct irq_cfg *cfg; |
| 3426 | struct msi_msg msg; |
| 3427 | unsigned int dest; |
| 3428 | cpumask_t tmp; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3429 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3430 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3431 | return; |
| 3432 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3433 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3434 | if (assign_irq_vector(irq, cfg, *mask)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3435 | return; |
| 3436 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3437 | set_extra_move_desc(desc, *mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3438 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3439 | cpumask_and(&tmp, &cfg->domain, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3440 | dest = cpu_mask_to_apicid(tmp); |
| 3441 | |
| 3442 | dmar_msi_read(irq, &msg); |
| 3443 | |
| 3444 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3445 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3446 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3447 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3448 | |
| 3449 | dmar_msi_write(irq, &msg); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3450 | cpumask_copy(&desc->affinity, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3451 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3452 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3453 | #endif /* CONFIG_SMP */ |
| 3454 | |
| 3455 | struct irq_chip dmar_msi_type = { |
| 3456 | .name = "DMAR_MSI", |
| 3457 | .unmask = dmar_msi_unmask, |
| 3458 | .mask = dmar_msi_mask, |
| 3459 | .ack = ack_apic_edge, |
| 3460 | #ifdef CONFIG_SMP |
| 3461 | .set_affinity = dmar_msi_set_affinity, |
| 3462 | #endif |
| 3463 | .retrigger = ioapic_retrigger_irq, |
| 3464 | }; |
| 3465 | |
| 3466 | int arch_setup_dmar_msi(unsigned int irq) |
| 3467 | { |
| 3468 | int ret; |
| 3469 | struct msi_msg msg; |
| 3470 | |
| 3471 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3472 | if (ret < 0) |
| 3473 | return ret; |
| 3474 | dmar_msi_write(irq, &msg); |
| 3475 | set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 3476 | "edge"); |
| 3477 | return 0; |
| 3478 | } |
| 3479 | #endif |
| 3480 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3481 | #ifdef CONFIG_HPET_TIMER |
| 3482 | |
| 3483 | #ifdef CONFIG_SMP |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3484 | static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3485 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3486 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3487 | struct irq_cfg *cfg; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3488 | struct msi_msg msg; |
| 3489 | unsigned int dest; |
| 3490 | cpumask_t tmp; |
| 3491 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3492 | if (!cpumask_intersects(mask, cpu_online_mask)) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3493 | return; |
| 3494 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3495 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3496 | if (assign_irq_vector(irq, cfg, *mask)) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3497 | return; |
| 3498 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3499 | set_extra_move_desc(desc, *mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3500 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3501 | cpumask_and(&tmp, &cfg->domain, mask); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3502 | dest = cpu_mask_to_apicid(tmp); |
| 3503 | |
| 3504 | hpet_msi_read(irq, &msg); |
| 3505 | |
| 3506 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3507 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3508 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3509 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3510 | |
| 3511 | hpet_msi_write(irq, &msg); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3512 | cpumask_copy(&desc->affinity, mask); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3513 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3514 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3515 | #endif /* CONFIG_SMP */ |
| 3516 | |
| 3517 | struct irq_chip hpet_msi_type = { |
| 3518 | .name = "HPET_MSI", |
| 3519 | .unmask = hpet_msi_unmask, |
| 3520 | .mask = hpet_msi_mask, |
| 3521 | .ack = ack_apic_edge, |
| 3522 | #ifdef CONFIG_SMP |
| 3523 | .set_affinity = hpet_msi_set_affinity, |
| 3524 | #endif |
| 3525 | .retrigger = ioapic_retrigger_irq, |
| 3526 | }; |
| 3527 | |
| 3528 | int arch_setup_hpet_msi(unsigned int irq) |
| 3529 | { |
| 3530 | int ret; |
| 3531 | struct msi_msg msg; |
| 3532 | |
| 3533 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3534 | if (ret < 0) |
| 3535 | return ret; |
| 3536 | |
| 3537 | hpet_msi_write(irq, &msg); |
| 3538 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, |
| 3539 | "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3540 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3541 | return 0; |
| 3542 | } |
| 3543 | #endif |
| 3544 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3545 | #endif /* CONFIG_PCI_MSI */ |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3546 | /* |
| 3547 | * Hypertransport interrupt support |
| 3548 | */ |
| 3549 | #ifdef CONFIG_HT_IRQ |
| 3550 | |
| 3551 | #ifdef CONFIG_SMP |
| 3552 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3553 | static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3554 | { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3555 | struct ht_irq_msg msg; |
| 3556 | fetch_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3557 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3558 | msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3559 | msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3560 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3561 | msg.address_lo |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3562 | msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3563 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3564 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3565 | } |
| 3566 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3567 | static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3568 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3569 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3570 | struct irq_cfg *cfg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3571 | unsigned int dest; |
| 3572 | cpumask_t tmp; |
| 3573 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3574 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3575 | return; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3576 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3577 | cfg = desc->chip_data; |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3578 | if (assign_irq_vector(irq, cfg, *mask)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3579 | return; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3580 | |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3581 | set_extra_move_desc(desc, *mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3582 | |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3583 | cpumask_and(&tmp, &cfg->domain, mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3584 | dest = cpu_mask_to_apicid(tmp); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3585 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3586 | target_ht_irq(irq, dest, cfg->vector); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 3587 | cpumask_copy(&desc->affinity, mask); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3588 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3589 | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3590 | #endif |
| 3591 | |
Aneesh Kumar K.V | c37e108 | 2006-10-11 01:20:43 -0700 | [diff] [blame] | 3592 | static struct irq_chip ht_irq_chip = { |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3593 | .name = "PCI-HT", |
| 3594 | .mask = mask_ht_irq, |
| 3595 | .unmask = unmask_ht_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3596 | .ack = ack_apic_edge, |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3597 | #ifdef CONFIG_SMP |
| 3598 | .set_affinity = set_ht_irq_affinity, |
| 3599 | #endif |
| 3600 | .retrigger = ioapic_retrigger_irq, |
| 3601 | }; |
| 3602 | |
| 3603 | int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) |
| 3604 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3605 | struct irq_cfg *cfg; |
| 3606 | int err; |
| 3607 | cpumask_t tmp; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3608 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3609 | cfg = irq_cfg(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3610 | tmp = TARGET_CPUS; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3611 | err = assign_irq_vector(irq, cfg, tmp); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3612 | if (!err) { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3613 | struct ht_irq_msg msg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3614 | unsigned dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3615 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3616 | cpus_and(tmp, cfg->domain, tmp); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3617 | dest = cpu_mask_to_apicid(tmp); |
| 3618 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3619 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3620 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3621 | msg.address_lo = |
| 3622 | HT_IRQ_LOW_BASE | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3623 | HT_IRQ_LOW_DEST_ID(dest) | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3624 | HT_IRQ_LOW_VECTOR(cfg->vector) | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3625 | ((INT_DEST_MODE == 0) ? |
| 3626 | HT_IRQ_LOW_DM_PHYSICAL : |
| 3627 | HT_IRQ_LOW_DM_LOGICAL) | |
| 3628 | HT_IRQ_LOW_RQEOI_EDGE | |
| 3629 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
| 3630 | HT_IRQ_LOW_MT_FIXED : |
| 3631 | HT_IRQ_LOW_MT_ARBITRATED) | |
| 3632 | HT_IRQ_LOW_IRQ_MASKED; |
| 3633 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3634 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3635 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 3636 | set_irq_chip_and_handler_name(irq, &ht_irq_chip, |
| 3637 | handle_edge_irq, "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3638 | |
| 3639 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for HT\n", irq); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3640 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3641 | return err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3642 | } |
| 3643 | #endif /* CONFIG_HT_IRQ */ |
| 3644 | |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3645 | #ifdef CONFIG_X86_64 |
| 3646 | /* |
| 3647 | * Re-target the irq to the specified CPU and enable the specified MMR located |
| 3648 | * on the specified blade to allow the sending of MSIs to the specified CPU. |
| 3649 | */ |
| 3650 | int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, |
| 3651 | unsigned long mmr_offset) |
| 3652 | { |
| 3653 | const cpumask_t *eligible_cpu = get_cpu_mask(cpu); |
| 3654 | struct irq_cfg *cfg; |
| 3655 | int mmr_pnode; |
| 3656 | unsigned long mmr_value; |
| 3657 | struct uv_IO_APIC_route_entry *entry; |
| 3658 | unsigned long flags; |
| 3659 | int err; |
| 3660 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3661 | cfg = irq_cfg(irq); |
| 3662 | |
| 3663 | err = assign_irq_vector(irq, cfg, *eligible_cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3664 | if (err != 0) |
| 3665 | return err; |
| 3666 | |
| 3667 | spin_lock_irqsave(&vector_lock, flags); |
| 3668 | set_irq_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq, |
| 3669 | irq_name); |
| 3670 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3671 | |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3672 | mmr_value = 0; |
| 3673 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
| 3674 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3675 | |
| 3676 | entry->vector = cfg->vector; |
| 3677 | entry->delivery_mode = INT_DELIVERY_MODE; |
| 3678 | entry->dest_mode = INT_DEST_MODE; |
| 3679 | entry->polarity = 0; |
| 3680 | entry->trigger = 0; |
| 3681 | entry->mask = 0; |
| 3682 | entry->dest = cpu_mask_to_apicid(*eligible_cpu); |
| 3683 | |
| 3684 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3685 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3686 | |
| 3687 | return irq; |
| 3688 | } |
| 3689 | |
| 3690 | /* |
| 3691 | * Disable the specified MMR located on the specified blade so that MSIs are |
| 3692 | * longer allowed to be sent. |
| 3693 | */ |
| 3694 | void arch_disable_uv_irq(int mmr_blade, unsigned long mmr_offset) |
| 3695 | { |
| 3696 | unsigned long mmr_value; |
| 3697 | struct uv_IO_APIC_route_entry *entry; |
| 3698 | int mmr_pnode; |
| 3699 | |
| 3700 | mmr_value = 0; |
| 3701 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
| 3702 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3703 | |
| 3704 | entry->mask = 1; |
| 3705 | |
| 3706 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3707 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3708 | } |
| 3709 | #endif /* CONFIG_X86_64 */ |
| 3710 | |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3711 | int __init io_apic_get_redir_entries (int ioapic) |
| 3712 | { |
| 3713 | union IO_APIC_reg_01 reg_01; |
| 3714 | unsigned long flags; |
| 3715 | |
| 3716 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3717 | reg_01.raw = io_apic_read(ioapic, 1); |
| 3718 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3719 | |
| 3720 | return reg_01.bits.entries; |
| 3721 | } |
| 3722 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3723 | void __init probe_nr_irqs_gsi(void) |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3724 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3725 | int idx; |
| 3726 | int nr = 0; |
| 3727 | |
| 3728 | for (idx = 0; idx < nr_ioapics; idx++) |
| 3729 | nr += io_apic_get_redir_entries(idx) + 1; |
| 3730 | |
| 3731 | if (nr > nr_irqs_gsi) |
| 3732 | nr_irqs_gsi = nr; |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3733 | } |
| 3734 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3735 | /* -------------------------------------------------------------------------- |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3736 | ACPI-based IOAPIC Configuration |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3737 | -------------------------------------------------------------------------- */ |
| 3738 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 3739 | #ifdef CONFIG_ACPI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3740 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3741 | #ifdef CONFIG_X86_32 |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3742 | int __init io_apic_get_unique_id(int ioapic, int apic_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3743 | { |
| 3744 | union IO_APIC_reg_00 reg_00; |
| 3745 | static physid_mask_t apic_id_map = PHYSID_MASK_NONE; |
| 3746 | physid_mask_t tmp; |
| 3747 | unsigned long flags; |
| 3748 | int i = 0; |
| 3749 | |
| 3750 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3751 | * The P4 platform supports up to 256 APIC IDs on two separate APIC |
| 3752 | * buses (one for LAPICs, one for IOAPICs), where predecessors only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3753 | * supports up to 16 on one shared APIC bus. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3754 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3755 | * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full |
| 3756 | * advantage of new APIC bus architecture. |
| 3757 | */ |
| 3758 | |
| 3759 | if (physids_empty(apic_id_map)) |
| 3760 | apic_id_map = ioapic_phys_id_map(phys_cpu_present_map); |
| 3761 | |
| 3762 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3763 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3764 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3765 | |
| 3766 | if (apic_id >= get_physical_broadcast()) { |
| 3767 | printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " |
| 3768 | "%d\n", ioapic, apic_id, reg_00.bits.ID); |
| 3769 | apic_id = reg_00.bits.ID; |
| 3770 | } |
| 3771 | |
| 3772 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3773 | * Every APIC in a system must have a unique ID or we get lots of nice |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3774 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 3775 | */ |
| 3776 | if (check_apicid_used(apic_id_map, apic_id)) { |
| 3777 | |
| 3778 | for (i = 0; i < get_physical_broadcast(); i++) { |
| 3779 | if (!check_apicid_used(apic_id_map, i)) |
| 3780 | break; |
| 3781 | } |
| 3782 | |
| 3783 | if (i == get_physical_broadcast()) |
| 3784 | panic("Max apic_id exceeded!\n"); |
| 3785 | |
| 3786 | printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " |
| 3787 | "trying %d\n", ioapic, apic_id, i); |
| 3788 | |
| 3789 | apic_id = i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3790 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3791 | |
| 3792 | tmp = apicid_to_cpu_present(apic_id); |
| 3793 | physids_or(apic_id_map, apic_id_map, tmp); |
| 3794 | |
| 3795 | if (reg_00.bits.ID != apic_id) { |
| 3796 | reg_00.bits.ID = apic_id; |
| 3797 | |
| 3798 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3799 | io_apic_write(ioapic, 0, reg_00.raw); |
| 3800 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3801 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3802 | |
| 3803 | /* Sanity check */ |
Andreas Deresch | 6070f9e | 2006-02-26 04:18:34 +0100 | [diff] [blame] | 3804 | if (reg_00.bits.ID != apic_id) { |
| 3805 | printk("IOAPIC[%d]: Unable to change apic_id!\n", ioapic); |
| 3806 | return -1; |
| 3807 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3808 | } |
| 3809 | |
| 3810 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 3811 | "IOAPIC[%d]: Assigned apic_id %d\n", ioapic, apic_id); |
| 3812 | |
| 3813 | return apic_id; |
| 3814 | } |
| 3815 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3816 | int __init io_apic_get_version(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3817 | { |
| 3818 | union IO_APIC_reg_01 reg_01; |
| 3819 | unsigned long flags; |
| 3820 | |
| 3821 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3822 | reg_01.raw = io_apic_read(ioapic, 1); |
| 3823 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3824 | |
| 3825 | return reg_01.bits.version; |
| 3826 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3827 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3828 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3829 | int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int polarity) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3830 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3831 | struct irq_desc *desc; |
| 3832 | struct irq_cfg *cfg; |
| 3833 | int cpu = boot_cpu_id; |
| 3834 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3835 | if (!IO_APIC_IRQ(irq)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3836 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3837 | ioapic); |
| 3838 | return -EINVAL; |
| 3839 | } |
| 3840 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3841 | desc = irq_to_desc_alloc_cpu(irq, cpu); |
| 3842 | if (!desc) { |
| 3843 | printk(KERN_INFO "can not get irq_desc %d\n", irq); |
| 3844 | return 0; |
| 3845 | } |
| 3846 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3847 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3848 | * IRQs < 16 are already in the irq_2_pin[] map |
| 3849 | */ |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 3850 | if (irq >= NR_IRQS_LEGACY) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3851 | cfg = desc->chip_data; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3852 | add_pin_to_irq_cpu(cfg, cpu, ioapic, pin); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3853 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3854 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3855 | setup_IO_APIC_irq(ioapic, pin, irq, desc, triggering, polarity); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3856 | |
| 3857 | return 0; |
| 3858 | } |
| 3859 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3860 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 3861 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
| 3862 | { |
| 3863 | int i; |
| 3864 | |
| 3865 | if (skip_ioapic_setup) |
| 3866 | return -1; |
| 3867 | |
| 3868 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 3869 | if (mp_irqs[i].mp_irqtype == mp_INT && |
| 3870 | mp_irqs[i].mp_srcbusirq == bus_irq) |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 3871 | break; |
| 3872 | if (i >= mp_irq_entries) |
| 3873 | return -1; |
| 3874 | |
| 3875 | *trigger = irq_trigger(i); |
| 3876 | *polarity = irq_polarity(i); |
| 3877 | return 0; |
| 3878 | } |
| 3879 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 3880 | #endif /* CONFIG_ACPI */ |
Rusty Russell | 1a3f239 | 2006-09-26 10:52:32 +0200 | [diff] [blame] | 3881 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3882 | /* |
| 3883 | * This function currently is only a helper for the i386 smp boot process where |
| 3884 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
| 3885 | * so mask in all cases should simply be TARGET_CPUS |
| 3886 | */ |
| 3887 | #ifdef CONFIG_SMP |
| 3888 | void __init setup_ioapic_dest(void) |
| 3889 | { |
| 3890 | int pin, ioapic, irq, irq_entry; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3891 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3892 | struct irq_cfg *cfg; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3893 | cpumask_t mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3894 | |
| 3895 | if (skip_ioapic_setup == 1) |
| 3896 | return; |
| 3897 | |
| 3898 | for (ioapic = 0; ioapic < nr_ioapics; ioapic++) { |
| 3899 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
| 3900 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); |
| 3901 | if (irq_entry == -1) |
| 3902 | continue; |
| 3903 | irq = pin_2_irq(irq_entry, ioapic, pin); |
| 3904 | |
| 3905 | /* setup_IO_APIC_irqs could fail to get vector for some device |
| 3906 | * when you have too many devices, because at that time only boot |
| 3907 | * cpu is online. |
| 3908 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3909 | desc = irq_to_desc(irq); |
| 3910 | cfg = desc->chip_data; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3911 | if (!cfg->vector) { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3912 | setup_IO_APIC_irq(ioapic, pin, irq, desc, |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3913 | irq_trigger(irq_entry), |
| 3914 | irq_polarity(irq_entry)); |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3915 | continue; |
| 3916 | |
| 3917 | } |
| 3918 | |
| 3919 | /* |
| 3920 | * Honour affinities which have been set in early boot |
| 3921 | */ |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3922 | if (desc->status & |
| 3923 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
| 3924 | mask = desc->affinity; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3925 | else |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3926 | mask = TARGET_CPUS; |
| 3927 | |
| 3928 | #ifdef CONFIG_INTR_REMAP |
| 3929 | if (intr_remapping_enabled) |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3930 | set_ir_ioapic_affinity_irq_desc(desc, &mask); |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 3931 | else |
| 3932 | #endif |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame^] | 3933 | set_ioapic_affinity_irq_desc(desc, &mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3934 | } |
| 3935 | |
| 3936 | } |
| 3937 | } |
| 3938 | #endif |
| 3939 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3940 | #define IOAPIC_RESOURCE_NAME_SIZE 11 |
| 3941 | |
| 3942 | static struct resource *ioapic_resources; |
| 3943 | |
| 3944 | static struct resource * __init ioapic_setup_resources(void) |
| 3945 | { |
| 3946 | unsigned long n; |
| 3947 | struct resource *res; |
| 3948 | char *mem; |
| 3949 | int i; |
| 3950 | |
| 3951 | if (nr_ioapics <= 0) |
| 3952 | return NULL; |
| 3953 | |
| 3954 | n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource); |
| 3955 | n *= nr_ioapics; |
| 3956 | |
| 3957 | mem = alloc_bootmem(n); |
| 3958 | res = (void *)mem; |
| 3959 | |
| 3960 | if (mem != NULL) { |
| 3961 | mem += sizeof(struct resource) * nr_ioapics; |
| 3962 | |
| 3963 | for (i = 0; i < nr_ioapics; i++) { |
| 3964 | res[i].name = mem; |
| 3965 | res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 3966 | sprintf(mem, "IOAPIC %u", i); |
| 3967 | mem += IOAPIC_RESOURCE_NAME_SIZE; |
| 3968 | } |
| 3969 | } |
| 3970 | |
| 3971 | ioapic_resources = res; |
| 3972 | |
| 3973 | return res; |
| 3974 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3975 | |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 3976 | void __init ioapic_init_mappings(void) |
| 3977 | { |
| 3978 | unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3979 | struct resource *ioapic_res; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3980 | int i; |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 3981 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3982 | ioapic_res = ioapic_setup_resources(); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 3983 | for (i = 0; i < nr_ioapics; i++) { |
| 3984 | if (smp_found_config) { |
| 3985 | ioapic_phys = mp_ioapics[i].mp_apicaddr; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3986 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3987 | if (!ioapic_phys) { |
| 3988 | printk(KERN_ERR |
| 3989 | "WARNING: bogus zero IO-APIC " |
| 3990 | "address found in MPTABLE, " |
| 3991 | "disabling IO/APIC support!\n"); |
| 3992 | smp_found_config = 0; |
| 3993 | skip_ioapic_setup = 1; |
| 3994 | goto fake_ioapic_page; |
| 3995 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3996 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 3997 | } else { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3998 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 3999 | fake_ioapic_page: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4000 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4001 | ioapic_phys = (unsigned long) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4002 | alloc_bootmem_pages(PAGE_SIZE); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4003 | ioapic_phys = __pa(ioapic_phys); |
| 4004 | } |
| 4005 | set_fixmap_nocache(idx, ioapic_phys); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4006 | apic_printk(APIC_VERBOSE, |
| 4007 | "mapped IOAPIC to %08lx (%08lx)\n", |
| 4008 | __fix_to_virt(idx), ioapic_phys); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4009 | idx++; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4010 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4011 | if (ioapic_res != NULL) { |
| 4012 | ioapic_res->start = ioapic_phys; |
| 4013 | ioapic_res->end = ioapic_phys + (4 * 1024) - 1; |
| 4014 | ioapic_res++; |
| 4015 | } |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4016 | } |
| 4017 | } |
| 4018 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4019 | static int __init ioapic_insert_resources(void) |
| 4020 | { |
| 4021 | int i; |
| 4022 | struct resource *r = ioapic_resources; |
| 4023 | |
| 4024 | if (!r) { |
| 4025 | printk(KERN_ERR |
| 4026 | "IO APIC resources could be not be allocated.\n"); |
| 4027 | return -1; |
| 4028 | } |
| 4029 | |
| 4030 | for (i = 0; i < nr_ioapics; i++) { |
| 4031 | insert_resource(&iomem_resource, r); |
| 4032 | r++; |
| 4033 | } |
| 4034 | |
| 4035 | return 0; |
| 4036 | } |
| 4037 | |
| 4038 | /* Insert the IO APIC resources after PCI initialization has occured to handle |
| 4039 | * IO APICS that are mapped in on a BAR in PCI space. */ |
| 4040 | late_initcall(ioapic_insert_resources); |