blob: 548ff2c66431ee93a205b15d84362084da7486ce [file] [log] [blame]
Dave Airlie0d6aa602006-01-02 20:14:23 +11001/* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10006 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110027 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
29#include "drmP.h"
30#include "drm.h"
31#include "i915_drm.h"
32#include "i915_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080033#include "intel_drv.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#define MAX_NOPID ((u32)~0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Keith Packard7c463582008-11-04 02:03:27 -080037/**
38 * Interrupts that are always left unmasked.
39 *
40 * Since pipe events are edge-triggered from the PIPESTAT register to IIR,
41 * we leave them always unmasked in IMR and then control enabling them through
42 * PIPESTAT alone.
43 */
44#define I915_INTERRUPT_ENABLE_FIX (I915_ASLE_INTERRUPT | \
45 I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
46 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
47
48/** Interrupts that we mask and unmask at runtime. */
49#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
50
51/** These are all of the interrupts used by the driver */
52#define I915_INTERRUPT_ENABLE_MASK (I915_INTERRUPT_ENABLE_FIX | \
53 I915_INTERRUPT_ENABLE_VAR)
Eric Anholted4cb412008-07-29 12:10:39 -070054
Jesse Barnes79e53942008-11-07 14:24:08 -080055#define I915_PIPE_VBLANK_STATUS (PIPE_START_VBLANK_INTERRUPT_STATUS |\
56 PIPE_VBLANK_INTERRUPT_STATUS)
57
58#define I915_PIPE_VBLANK_ENABLE (PIPE_START_VBLANK_INTERRUPT_ENABLE |\
59 PIPE_VBLANK_INTERRUPT_ENABLE)
60
61#define DRM_I915_VBLANK_PIPE_ALL (DRM_I915_VBLANK_PIPE_A | \
62 DRM_I915_VBLANK_PIPE_B)
63
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +010064void
Eric Anholted4cb412008-07-29 12:10:39 -070065i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
66{
67 if ((dev_priv->irq_mask_reg & mask) != 0) {
68 dev_priv->irq_mask_reg &= ~mask;
69 I915_WRITE(IMR, dev_priv->irq_mask_reg);
70 (void) I915_READ(IMR);
71 }
72}
73
74static inline void
75i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)
76{
77 if ((dev_priv->irq_mask_reg & mask) != mask) {
78 dev_priv->irq_mask_reg |= mask;
79 I915_WRITE(IMR, dev_priv->irq_mask_reg);
80 (void) I915_READ(IMR);
81 }
82}
83
Keith Packard7c463582008-11-04 02:03:27 -080084static inline u32
85i915_pipestat(int pipe)
86{
87 if (pipe == 0)
88 return PIPEASTAT;
89 if (pipe == 1)
90 return PIPEBSTAT;
Andrew Morton9c84ba42008-12-01 13:14:08 -080091 BUG();
Keith Packard7c463582008-11-04 02:03:27 -080092}
93
94void
95i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
96{
97 if ((dev_priv->pipestat[pipe] & mask) != mask) {
98 u32 reg = i915_pipestat(pipe);
99
100 dev_priv->pipestat[pipe] |= mask;
101 /* Enable the interrupt, clear any pending status */
102 I915_WRITE(reg, dev_priv->pipestat[pipe] | (mask >> 16));
103 (void) I915_READ(reg);
104 }
105}
106
107void
108i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
109{
110 if ((dev_priv->pipestat[pipe] & mask) != 0) {
111 u32 reg = i915_pipestat(pipe);
112
113 dev_priv->pipestat[pipe] &= ~mask;
114 I915_WRITE(reg, dev_priv->pipestat[pipe]);
115 (void) I915_READ(reg);
116 }
117}
118
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000119/**
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700120 * i915_pipe_enabled - check if a pipe is enabled
121 * @dev: DRM device
122 * @pipe: pipe to check
123 *
124 * Reading certain registers when the pipe is disabled can hang the chip.
125 * Use this routine to make sure the PLL is running and the pipe is active
126 * before reading such registers if unsure.
127 */
128static int
129i915_pipe_enabled(struct drm_device *dev, int pipe)
130{
131 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
132 unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
133
134 if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
135 return 1;
136
137 return 0;
138}
139
Keith Packard42f52ef2008-10-18 19:39:29 -0700140/* Called from drm generic code, passed a 'crtc', which
141 * we use as a pipe index
142 */
143u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700144{
145 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
146 unsigned long high_frame;
147 unsigned long low_frame;
148 u32 high1, high2, low, count;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700149
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700150 high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
151 low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
152
153 if (!i915_pipe_enabled(dev, pipe)) {
154 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
155 return 0;
156 }
157
158 /*
159 * High & low register fields aren't synchronized, so make sure
160 * we get a low value that's stable across two reads of the high
161 * register.
162 */
163 do {
164 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
165 PIPE_FRAME_HIGH_SHIFT);
166 low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
167 PIPE_FRAME_LOW_SHIFT);
168 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
169 PIPE_FRAME_HIGH_SHIFT);
170 } while (high1 != high2);
171
172 count = (high1 << 8) | low;
173
174 return count;
175}
176
Jesse Barnes9880b7a2009-02-06 10:22:41 -0800177u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
178{
179 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
180 int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
181
182 if (!i915_pipe_enabled(dev, pipe)) {
183 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
184 return 0;
185 }
186
187 return I915_READ(reg);
188}
189
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
191{
Dave Airlie84b1fd12007-07-11 15:53:27 +1000192 struct drm_device *dev = (struct drm_device *) arg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Dave Airlie7c1c2872008-11-28 14:22:24 +1000194 struct drm_i915_master_private *master_priv;
Eric Anholtcdfbc412008-11-04 15:50:30 -0800195 u32 iir, new_iir;
196 u32 pipea_stats, pipeb_stats;
Keith Packard05eff842008-11-19 14:03:05 -0800197 u32 vblank_status;
198 u32 vblank_enable;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700199 int vblank = 0;
Keith Packard7c463582008-11-04 02:03:27 -0800200 unsigned long irqflags;
Keith Packard05eff842008-11-19 14:03:05 -0800201 int irq_received;
202 int ret = IRQ_NONE;
Dave Airlieaf6061a2008-05-07 12:15:39 +1000203
Eric Anholt630681d2008-10-06 15:14:12 -0700204 atomic_inc(&dev_priv->irq_received);
205
Eric Anholted4cb412008-07-29 12:10:39 -0700206 iir = I915_READ(IIR);
Dave Airlieaf6061a2008-05-07 12:15:39 +1000207
Keith Packard05eff842008-11-19 14:03:05 -0800208 if (IS_I965G(dev)) {
209 vblank_status = I915_START_VBLANK_INTERRUPT_STATUS;
210 vblank_enable = PIPE_START_VBLANK_INTERRUPT_ENABLE;
211 } else {
212 vblank_status = I915_VBLANK_INTERRUPT_STATUS;
213 vblank_enable = I915_VBLANK_INTERRUPT_ENABLE;
214 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
Keith Packard05eff842008-11-19 14:03:05 -0800216 for (;;) {
217 irq_received = iir != 0;
218
219 /* Can't rely on pipestat interrupt bit in iir as it might
220 * have been cleared after the pipestat interrupt was received.
221 * It doesn't set the bit in iir again, but it still produces
222 * interrupts (for non-MSI).
223 */
224 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
225 pipea_stats = I915_READ(PIPEASTAT);
226 pipeb_stats = I915_READ(PIPEBSTAT);
Jesse Barnes79e53942008-11-07 14:24:08 -0800227
Eric Anholtcdfbc412008-11-04 15:50:30 -0800228 /*
229 * Clear the PIPE(A|B)STAT regs before the IIR
230 */
Keith Packard05eff842008-11-19 14:03:05 -0800231 if (pipea_stats & 0x8000ffff) {
Eric Anholtcdfbc412008-11-04 15:50:30 -0800232 I915_WRITE(PIPEASTAT, pipea_stats);
Keith Packard05eff842008-11-19 14:03:05 -0800233 irq_received = 1;
Eric Anholtcdfbc412008-11-04 15:50:30 -0800234 }
Keith Packard7c463582008-11-04 02:03:27 -0800235
Keith Packard05eff842008-11-19 14:03:05 -0800236 if (pipeb_stats & 0x8000ffff) {
Eric Anholtcdfbc412008-11-04 15:50:30 -0800237 I915_WRITE(PIPEBSTAT, pipeb_stats);
Keith Packard05eff842008-11-19 14:03:05 -0800238 irq_received = 1;
Eric Anholtcdfbc412008-11-04 15:50:30 -0800239 }
Keith Packard05eff842008-11-19 14:03:05 -0800240 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
241
242 if (!irq_received)
243 break;
244
245 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246
Eric Anholtcdfbc412008-11-04 15:50:30 -0800247 I915_WRITE(IIR, iir);
248 new_iir = I915_READ(IIR); /* Flush posted writes */
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100249
Dave Airlie7c1c2872008-11-28 14:22:24 +1000250 if (dev->primary->master) {
251 master_priv = dev->primary->master->driver_priv;
252 if (master_priv->sarea_priv)
253 master_priv->sarea_priv->last_dispatch =
254 READ_BREADCRUMB(dev_priv);
255 }
Keith Packard7c463582008-11-04 02:03:27 -0800256
Eric Anholtcdfbc412008-11-04 15:50:30 -0800257 if (iir & I915_USER_INTERRUPT) {
258 dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
259 DRM_WAKEUP(&dev_priv->irq_queue);
260 }
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700261
Keith Packard05eff842008-11-19 14:03:05 -0800262 if (pipea_stats & vblank_status) {
Eric Anholtcdfbc412008-11-04 15:50:30 -0800263 vblank++;
264 drm_handle_vblank(dev, 0);
265 }
Eric Anholt673a3942008-07-30 12:06:12 -0700266
Keith Packard05eff842008-11-19 14:03:05 -0800267 if (pipeb_stats & vblank_status) {
Eric Anholtcdfbc412008-11-04 15:50:30 -0800268 vblank++;
269 drm_handle_vblank(dev, 1);
270 }
Keith Packard7c463582008-11-04 02:03:27 -0800271
Eric Anholtcdfbc412008-11-04 15:50:30 -0800272 if ((pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) ||
273 (iir & I915_ASLE_INTERRUPT))
274 opregion_asle_intr(dev);
Keith Packard7c463582008-11-04 02:03:27 -0800275
Eric Anholtcdfbc412008-11-04 15:50:30 -0800276 /* With MSI, interrupts are only generated when iir
277 * transitions from zero to nonzero. If another bit got
278 * set while we were handling the existing iir bits, then
279 * we would never get another interrupt.
280 *
281 * This is fine on non-MSI as well, as if we hit this path
282 * we avoid exiting the interrupt handler only to generate
283 * another one.
284 *
285 * Note that for MSI this could cause a stray interrupt report
286 * if an interrupt landed in the time between writing IIR and
287 * the posting read. This should be rare enough to never
288 * trigger the 99% of 100,000 interrupts test for disabling
289 * stray interrupts.
290 */
291 iir = new_iir;
Keith Packard05eff842008-11-19 14:03:05 -0800292 }
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700293
Keith Packard05eff842008-11-19 14:03:05 -0800294 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295}
296
Dave Airlieaf6061a2008-05-07 12:15:39 +1000297static int i915_emit_irq(struct drm_device * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298{
299 drm_i915_private_t *dev_priv = dev->dev_private;
Dave Airlie7c1c2872008-11-28 14:22:24 +1000300 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 RING_LOCALS;
302
303 i915_kernel_lost_context(dev);
304
Márton Németh3e684ea2008-01-24 15:58:57 +1000305 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306
Kristian Høgsbergc99b0582008-08-20 11:20:13 -0400307 dev_priv->counter++;
Alan Hourihanec29b6692006-08-12 16:29:24 +1000308 if (dev_priv->counter > 0x7FFFFFFFUL)
Kristian Høgsbergc99b0582008-08-20 11:20:13 -0400309 dev_priv->counter = 1;
Dave Airlie7c1c2872008-11-28 14:22:24 +1000310 if (master_priv->sarea_priv)
311 master_priv->sarea_priv->last_enqueue = dev_priv->counter;
Alan Hourihanec29b6692006-08-12 16:29:24 +1000312
Keith Packard0baf8232008-11-08 11:44:14 +1000313 BEGIN_LP_RING(4);
Jesse Barnes585fb112008-07-29 11:54:06 -0700314 OUT_RING(MI_STORE_DWORD_INDEX);
Keith Packard0baf8232008-11-08 11:44:14 +1000315 OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
Alan Hourihanec29b6692006-08-12 16:29:24 +1000316 OUT_RING(dev_priv->counter);
Jesse Barnes585fb112008-07-29 11:54:06 -0700317 OUT_RING(MI_USER_INTERRUPT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 ADVANCE_LP_RING();
Dave Airliebc5f4522007-11-05 12:50:58 +1000319
Alan Hourihanec29b6692006-08-12 16:29:24 +1000320 return dev_priv->counter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321}
322
Eric Anholt673a3942008-07-30 12:06:12 -0700323void i915_user_irq_get(struct drm_device *dev)
Eric Anholted4cb412008-07-29 12:10:39 -0700324{
325 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Keith Packarde9d21d72008-10-16 11:31:38 -0700326 unsigned long irqflags;
Eric Anholted4cb412008-07-29 12:10:39 -0700327
Keith Packarde9d21d72008-10-16 11:31:38 -0700328 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
Eric Anholted4cb412008-07-29 12:10:39 -0700329 if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1))
330 i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
Keith Packarde9d21d72008-10-16 11:31:38 -0700331 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
Eric Anholted4cb412008-07-29 12:10:39 -0700332}
333
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700334void i915_user_irq_put(struct drm_device *dev)
Eric Anholted4cb412008-07-29 12:10:39 -0700335{
336 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Keith Packarde9d21d72008-10-16 11:31:38 -0700337 unsigned long irqflags;
Eric Anholted4cb412008-07-29 12:10:39 -0700338
Keith Packarde9d21d72008-10-16 11:31:38 -0700339 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
Eric Anholted4cb412008-07-29 12:10:39 -0700340 BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0);
341 if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0))
342 i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
Keith Packarde9d21d72008-10-16 11:31:38 -0700343 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
Eric Anholted4cb412008-07-29 12:10:39 -0700344}
345
Dave Airlie84b1fd12007-07-11 15:53:27 +1000346static int i915_wait_irq(struct drm_device * dev, int irq_nr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347{
348 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Dave Airlie7c1c2872008-11-28 14:22:24 +1000349 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 int ret = 0;
351
Márton Németh3e684ea2008-01-24 15:58:57 +1000352 DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 READ_BREADCRUMB(dev_priv));
354
Eric Anholted4cb412008-07-29 12:10:39 -0700355 if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
Dave Airlie7c1c2872008-11-28 14:22:24 +1000356 if (master_priv->sarea_priv)
357 master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 return 0;
Eric Anholted4cb412008-07-29 12:10:39 -0700359 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360
Dave Airlie7c1c2872008-11-28 14:22:24 +1000361 if (master_priv->sarea_priv)
362 master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363
Eric Anholted4cb412008-07-29 12:10:39 -0700364 i915_user_irq_get(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
366 READ_BREADCRUMB(dev_priv) >= irq_nr);
Eric Anholted4cb412008-07-29 12:10:39 -0700367 i915_user_irq_put(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368
Eric Anholt20caafa2007-08-25 19:22:43 +1000369 if (ret == -EBUSY) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000370 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
372 }
373
Dave Airlieaf6061a2008-05-07 12:15:39 +1000374 return ret;
375}
376
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377/* Needs the lock as it touches the ring.
378 */
Eric Anholtc153f452007-09-03 12:06:45 +1000379int i915_irq_emit(struct drm_device *dev, void *data,
380 struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 drm_i915_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +1000383 drm_i915_irq_emit_t *emit = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 int result;
385
Eric Anholt546b0972008-09-01 16:45:29 -0700386 RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
388 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000389 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000390 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391 }
Eric Anholt546b0972008-09-01 16:45:29 -0700392 mutex_lock(&dev->struct_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393 result = i915_emit_irq(dev);
Eric Anholt546b0972008-09-01 16:45:29 -0700394 mutex_unlock(&dev->struct_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395
Eric Anholtc153f452007-09-03 12:06:45 +1000396 if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397 DRM_ERROR("copy_to_user\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000398 return -EFAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 }
400
401 return 0;
402}
403
404/* Doesn't need the hardware lock.
405 */
Eric Anholtc153f452007-09-03 12:06:45 +1000406int i915_irq_wait(struct drm_device *dev, void *data,
407 struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 drm_i915_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +1000410 drm_i915_irq_wait_t *irqwait = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
412 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000413 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000414 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 }
416
Eric Anholtc153f452007-09-03 12:06:45 +1000417 return i915_wait_irq(dev, irqwait->irq_seq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418}
419
Keith Packard42f52ef2008-10-18 19:39:29 -0700420/* Called from drm generic code, passed 'crtc' which
421 * we use as a pipe index
422 */
423int i915_enable_vblank(struct drm_device *dev, int pipe)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700424{
425 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Keith Packarde9d21d72008-10-16 11:31:38 -0700426 unsigned long irqflags;
Jesse Barnes71e0ffa2009-01-08 10:42:15 -0800427 int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
428 u32 pipeconf;
429
430 pipeconf = I915_READ(pipeconf_reg);
431 if (!(pipeconf & PIPEACONF_ENABLE))
432 return -EINVAL;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700433
Keith Packarde9d21d72008-10-16 11:31:38 -0700434 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
Keith Packarde9d21d72008-10-16 11:31:38 -0700435 if (IS_I965G(dev))
Keith Packard7c463582008-11-04 02:03:27 -0800436 i915_enable_pipestat(dev_priv, pipe,
437 PIPE_START_VBLANK_INTERRUPT_ENABLE);
Keith Packarde9d21d72008-10-16 11:31:38 -0700438 else
Keith Packard7c463582008-11-04 02:03:27 -0800439 i915_enable_pipestat(dev_priv, pipe,
440 PIPE_VBLANK_INTERRUPT_ENABLE);
Keith Packarde9d21d72008-10-16 11:31:38 -0700441 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700442 return 0;
443}
444
Keith Packard42f52ef2008-10-18 19:39:29 -0700445/* Called from drm generic code, passed 'crtc' which
446 * we use as a pipe index
447 */
448void i915_disable_vblank(struct drm_device *dev, int pipe)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700449{
450 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Keith Packarde9d21d72008-10-16 11:31:38 -0700451 unsigned long irqflags;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700452
Keith Packarde9d21d72008-10-16 11:31:38 -0700453 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
Keith Packard7c463582008-11-04 02:03:27 -0800454 i915_disable_pipestat(dev_priv, pipe,
455 PIPE_VBLANK_INTERRUPT_ENABLE |
456 PIPE_START_VBLANK_INTERRUPT_ENABLE);
Keith Packarde9d21d72008-10-16 11:31:38 -0700457 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700458}
459
Jesse Barnes79e53942008-11-07 14:24:08 -0800460void i915_enable_interrupt (struct drm_device *dev)
461{
462 struct drm_i915_private *dev_priv = dev->dev_private;
463 opregion_enable_asle(dev);
464 dev_priv->irq_enabled = 1;
465}
466
467
Dave Airlie702880f2006-06-24 17:07:34 +1000468/* Set the vblank monitor pipe
469 */
Eric Anholtc153f452007-09-03 12:06:45 +1000470int i915_vblank_pipe_set(struct drm_device *dev, void *data,
471 struct drm_file *file_priv)
Dave Airlie702880f2006-06-24 17:07:34 +1000472{
Dave Airlie702880f2006-06-24 17:07:34 +1000473 drm_i915_private_t *dev_priv = dev->dev_private;
Dave Airlie702880f2006-06-24 17:07:34 +1000474
475 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000476 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000477 return -EINVAL;
Dave Airlie702880f2006-06-24 17:07:34 +1000478 }
479
=?utf-8?q?Michel_D=C3=A4nzer?=5b516942006-10-25 00:08:23 +1000480 return 0;
Dave Airlie702880f2006-06-24 17:07:34 +1000481}
482
Eric Anholtc153f452007-09-03 12:06:45 +1000483int i915_vblank_pipe_get(struct drm_device *dev, void *data,
484 struct drm_file *file_priv)
Dave Airlie702880f2006-06-24 17:07:34 +1000485{
Dave Airlie702880f2006-06-24 17:07:34 +1000486 drm_i915_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +1000487 drm_i915_vblank_pipe_t *pipe = data;
Dave Airlie702880f2006-06-24 17:07:34 +1000488
489 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +1000490 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000491 return -EINVAL;
Dave Airlie702880f2006-06-24 17:07:34 +1000492 }
493
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700494 pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
Eric Anholtc153f452007-09-03 12:06:45 +1000495
Dave Airlie702880f2006-06-24 17:07:34 +1000496 return 0;
497}
498
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000499/**
500 * Schedule buffer swap at given vertical blank.
501 */
Eric Anholtc153f452007-09-03 12:06:45 +1000502int i915_vblank_swap(struct drm_device *dev, void *data,
503 struct drm_file *file_priv)
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000504{
Eric Anholtbd95e0a2008-11-04 12:01:24 -0800505 /* The delayed swap mechanism was fundamentally racy, and has been
506 * removed. The model was that the client requested a delayed flip/swap
507 * from the kernel, then waited for vblank before continuing to perform
508 * rendering. The problem was that the kernel might wake the client
509 * up before it dispatched the vblank swap (since the lock has to be
510 * held while touching the ringbuffer), in which case the client would
511 * clear and start the next frame before the swap occurred, and
512 * flicker would occur in addition to likely missing the vblank.
513 *
514 * In the absence of this ioctl, userland falls back to a correct path
515 * of waiting for a vblank, then dispatching the swap on its own.
516 * Context switching to userland and back is plenty fast enough for
517 * meeting the requirements of vblank swapping.
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700518 */
Eric Anholtbd95e0a2008-11-04 12:01:24 -0800519 return -EINVAL;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000520}
521
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522/* drm_dma.h hooks
523*/
Dave Airlie84b1fd12007-07-11 15:53:27 +1000524void i915_driver_irq_preinstall(struct drm_device * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525{
526 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
527
Jesse Barnes79e53942008-11-07 14:24:08 -0800528 atomic_set(&dev_priv->irq_received, 0);
529
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700530 I915_WRITE(HWSTAM, 0xeffe);
Keith Packard7c463582008-11-04 02:03:27 -0800531 I915_WRITE(PIPEASTAT, 0);
532 I915_WRITE(PIPEBSTAT, 0);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700533 I915_WRITE(IMR, 0xffffffff);
Eric Anholted4cb412008-07-29 12:10:39 -0700534 I915_WRITE(IER, 0x0);
Keith Packard7c463582008-11-04 02:03:27 -0800535 (void) I915_READ(IER);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536}
537
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700538int i915_driver_irq_postinstall(struct drm_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539{
540 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700541
542 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700543
544 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
Eric Anholted4cb412008-07-29 12:10:39 -0700545
Keith Packard7c463582008-11-04 02:03:27 -0800546 /* Unmask the interrupts that we always want on. */
547 dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100548
Keith Packard7c463582008-11-04 02:03:27 -0800549 dev_priv->pipestat[0] = 0;
550 dev_priv->pipestat[1] = 0;
551
552 /* Disable pipe interrupt enables, clear pending pipe status */
553 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
554 I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
555 /* Clear pending interrupt status */
556 I915_WRITE(IIR, I915_READ(IIR));
557
Eric Anholted4cb412008-07-29 12:10:39 -0700558 I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
Keith Packard7c463582008-11-04 02:03:27 -0800559 I915_WRITE(IMR, dev_priv->irq_mask_reg);
Eric Anholted4cb412008-07-29 12:10:39 -0700560 (void) I915_READ(IER);
561
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100562 opregion_enable_asle(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700564
565 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566}
567
Dave Airlie84b1fd12007-07-11 15:53:27 +1000568void i915_driver_irq_uninstall(struct drm_device * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569{
570 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
Dave Airlie91e37382006-02-18 15:17:04 +1100571
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572 if (!dev_priv)
573 return;
574
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700575 dev_priv->vblank_pipe = 0;
576
577 I915_WRITE(HWSTAM, 0xffffffff);
Keith Packard7c463582008-11-04 02:03:27 -0800578 I915_WRITE(PIPEASTAT, 0);
579 I915_WRITE(PIPEBSTAT, 0);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700580 I915_WRITE(IMR, 0xffffffff);
Eric Anholted4cb412008-07-29 12:10:39 -0700581 I915_WRITE(IER, 0x0);
Dave Airlie91e37382006-02-18 15:17:04 +1100582
Keith Packard7c463582008-11-04 02:03:27 -0800583 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
584 I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
585 I915_WRITE(IIR, I915_READ(IIR));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586}