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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
34/* supported VIO voltages in milivolts */
35static const u16 VIO_VSEL_table[] = {
36 1500, 1800, 2500, 3300,
37};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41/* supported VDD3 voltages in milivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050042static const u16 VDD3_VSEL_table[] = {
43 5000,
44};
45
46/* supported VDIG1 voltages in milivolts */
47static const u16 VDIG1_VSEL_table[] = {
48 1200, 1500, 1800, 2700,
49};
50
51/* supported VDIG2 voltages in milivolts */
52static const u16 VDIG2_VSEL_table[] = {
53 1000, 1100, 1200, 1800,
54};
55
56/* supported VPLL voltages in milivolts */
57static const u16 VPLL_VSEL_table[] = {
58 1000, 1100, 1800, 2500,
59};
60
61/* supported VDAC voltages in milivolts */
62static const u16 VDAC_VSEL_table[] = {
63 1800, 2600, 2800, 2850,
64};
65
66/* supported VAUX1 voltages in milivolts */
67static const u16 VAUX1_VSEL_table[] = {
68 1800, 2500, 2800, 2850,
69};
70
71/* supported VAUX2 voltages in milivolts */
72static const u16 VAUX2_VSEL_table[] = {
73 1800, 2800, 2900, 3300,
74};
75
76/* supported VAUX33 voltages in milivolts */
77static const u16 VAUX33_VSEL_table[] = {
78 1800, 2000, 2800, 3300,
79};
80
81/* supported VMMC voltages in milivolts */
82static const u16 VMMC_VSEL_table[] = {
83 1800, 2800, 3000, 3300,
84};
85
86struct tps_info {
87 const char *name;
88 unsigned min_uV;
89 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053090 u8 n_voltages;
91 const u16 *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053092 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050093};
94
95static struct tps_info tps65910_regs[] = {
96 {
97 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053098 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050099 },
100 {
101 .name = "VIO",
102 .min_uV = 1500000,
103 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530104 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
105 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
109 .name = "VDD1",
110 .min_uV = 600000,
111 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530112 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500113 },
114 {
115 .name = "VDD2",
116 .min_uV = 600000,
117 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530118 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500119 },
120 {
121 .name = "VDD3",
122 .min_uV = 5000000,
123 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530124 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
125 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530126 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500127 },
128 {
129 .name = "VDIG1",
130 .min_uV = 1200000,
131 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
133 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
137 .name = "VDIG2",
138 .min_uV = 1000000,
139 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530140 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
141 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530142 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500143 },
144 {
145 .name = "VPLL",
146 .min_uV = 1000000,
147 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530150 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500151 },
152 {
153 .name = "VDAC",
154 .min_uV = 1800000,
155 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
157 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
161 .name = "VAUX1",
162 .min_uV = 1800000,
163 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530164 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
165 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530166 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500167 },
168 {
169 .name = "VAUX2",
170 .min_uV = 1800000,
171 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530172 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
173 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530174 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500175 },
176 {
177 .name = "VAUX33",
178 .min_uV = 1800000,
179 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530180 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
181 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500183 },
184 {
185 .name = "VMMC",
186 .min_uV = 1800000,
187 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530190 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500191 },
192};
193
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500194static struct tps_info tps65911_regs[] = {
195 {
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530196 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530198 },
199 {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500200 .name = "VIO",
201 .min_uV = 1500000,
202 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530203 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
204 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530205 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500206 },
207 {
208 .name = "VDD1",
209 .min_uV = 600000,
210 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
215 .name = "VDD2",
216 .min_uV = 600000,
217 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530218 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530219 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500220 },
221 {
222 .name = "VDDCTRL",
223 .min_uV = 600000,
224 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530225 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530226 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500227 },
228 {
229 .name = "LDO1",
230 .min_uV = 1000000,
231 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530232 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530233 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500234 },
235 {
236 .name = "LDO2",
237 .min_uV = 1000000,
238 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530239 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530240 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500241 },
242 {
243 .name = "LDO3",
244 .min_uV = 1000000,
245 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530246 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530247 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500248 },
249 {
250 .name = "LDO4",
251 .min_uV = 1000000,
252 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530253 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530254 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500255 },
256 {
257 .name = "LDO5",
258 .min_uV = 1000000,
259 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530260 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530261 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500262 },
263 {
264 .name = "LDO6",
265 .min_uV = 1000000,
266 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530267 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530268 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500269 },
270 {
271 .name = "LDO7",
272 .min_uV = 1000000,
273 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530274 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530275 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500276 },
277 {
278 .name = "LDO8",
279 .min_uV = 1000000,
280 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530281 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530282 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500283 },
284};
285
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530286#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
287static unsigned int tps65910_ext_sleep_control[] = {
288 0,
289 EXT_CONTROL_REG_BITS(VIO, 1, 0),
290 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
291 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
292 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
293 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
294 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
295 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
296 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
297 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
298 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
299 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
300 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
301};
302
303static unsigned int tps65911_ext_sleep_control[] = {
304 0,
305 EXT_CONTROL_REG_BITS(VIO, 1, 0),
306 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
307 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
308 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
309 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
310 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
311 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
312 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
313 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
314 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
315 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
316 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
317};
318
Graeme Gregory518fb722011-05-02 16:20:08 -0500319struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800320 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500321 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800322 struct regulator_dev **rdev;
323 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500324 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800325 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500326 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500327 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530328 unsigned int *ext_sleep_control;
329 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500330};
331
332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
333{
334 u8 val;
335 int err;
336
337 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
338 if (err)
339 return err;
340
341 return val;
342}
343
344static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
345{
346 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
347}
348
349static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
350 u8 set_mask, u8 clear_mask)
351{
352 int err, data;
353
354 mutex_lock(&pmic->mutex);
355
356 data = tps65910_read(pmic, reg);
357 if (data < 0) {
358 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
359 err = data;
360 goto out;
361 }
362
363 data &= ~clear_mask;
364 data |= set_mask;
365 err = tps65910_write(pmic, reg, data);
366 if (err)
367 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
368
369out:
370 mutex_unlock(&pmic->mutex);
371 return err;
372}
373
374static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
375{
376 int data;
377
378 mutex_lock(&pmic->mutex);
379
380 data = tps65910_read(pmic, reg);
381 if (data < 0)
382 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
383
384 mutex_unlock(&pmic->mutex);
385 return data;
386}
387
388static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
389{
390 int err;
391
392 mutex_lock(&pmic->mutex);
393
394 err = tps65910_write(pmic, reg, val);
395 if (err < 0)
396 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
397
398 mutex_unlock(&pmic->mutex);
399 return err;
400}
401
402static int tps65910_get_ctrl_register(int id)
403{
404 switch (id) {
405 case TPS65910_REG_VRTC:
406 return TPS65910_VRTC;
407 case TPS65910_REG_VIO:
408 return TPS65910_VIO;
409 case TPS65910_REG_VDD1:
410 return TPS65910_VDD1;
411 case TPS65910_REG_VDD2:
412 return TPS65910_VDD2;
413 case TPS65910_REG_VDD3:
414 return TPS65910_VDD3;
415 case TPS65910_REG_VDIG1:
416 return TPS65910_VDIG1;
417 case TPS65910_REG_VDIG2:
418 return TPS65910_VDIG2;
419 case TPS65910_REG_VPLL:
420 return TPS65910_VPLL;
421 case TPS65910_REG_VDAC:
422 return TPS65910_VDAC;
423 case TPS65910_REG_VAUX1:
424 return TPS65910_VAUX1;
425 case TPS65910_REG_VAUX2:
426 return TPS65910_VAUX2;
427 case TPS65910_REG_VAUX33:
428 return TPS65910_VAUX33;
429 case TPS65910_REG_VMMC:
430 return TPS65910_VMMC;
431 default:
432 return -EINVAL;
433 }
434}
435
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500436static int tps65911_get_ctrl_register(int id)
437{
438 switch (id) {
439 case TPS65910_REG_VRTC:
440 return TPS65910_VRTC;
441 case TPS65910_REG_VIO:
442 return TPS65910_VIO;
443 case TPS65910_REG_VDD1:
444 return TPS65910_VDD1;
445 case TPS65910_REG_VDD2:
446 return TPS65910_VDD2;
447 case TPS65911_REG_VDDCTRL:
448 return TPS65911_VDDCTRL;
449 case TPS65911_REG_LDO1:
450 return TPS65911_LDO1;
451 case TPS65911_REG_LDO2:
452 return TPS65911_LDO2;
453 case TPS65911_REG_LDO3:
454 return TPS65911_LDO3;
455 case TPS65911_REG_LDO4:
456 return TPS65911_LDO4;
457 case TPS65911_REG_LDO5:
458 return TPS65911_LDO5;
459 case TPS65911_REG_LDO6:
460 return TPS65911_LDO6;
461 case TPS65911_REG_LDO7:
462 return TPS65911_LDO7;
463 case TPS65911_REG_LDO8:
464 return TPS65911_LDO8;
465 default:
466 return -EINVAL;
467 }
468}
469
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530470static int tps65910_enable_time(struct regulator_dev *dev)
471{
472 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
473 int id = rdev_get_id(dev);
474 return pmic->info[id]->enable_time_us;
475}
Graeme Gregory518fb722011-05-02 16:20:08 -0500476
477static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
478{
479 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
480 struct tps65910 *mfd = pmic->mfd;
481 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500482
483 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500484 if (reg < 0)
485 return reg;
486
487 switch (mode) {
488 case REGULATOR_MODE_NORMAL:
489 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
490 LDO_ST_MODE_BIT);
491 case REGULATOR_MODE_IDLE:
492 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
493 return tps65910_set_bits(mfd, reg, value);
494 case REGULATOR_MODE_STANDBY:
495 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
496 }
497
498 return -EINVAL;
499}
500
501static unsigned int tps65910_get_mode(struct regulator_dev *dev)
502{
503 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
504 int reg, value, id = rdev_get_id(dev);
505
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500506 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500507 if (reg < 0)
508 return reg;
509
510 value = tps65910_reg_read(pmic, reg);
511 if (value < 0)
512 return value;
513
Axel Lin58599392012-03-13 07:15:27 +0800514 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500515 return REGULATOR_MODE_STANDBY;
516 else if (value & LDO_ST_MODE_BIT)
517 return REGULATOR_MODE_IDLE;
518 else
519 return REGULATOR_MODE_NORMAL;
520}
521
Laxman Dewangan18039e02012-03-14 13:00:58 +0530522static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500523{
524 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530525 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500526 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500527
528 switch (id) {
529 case TPS65910_REG_VDD1:
530 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
531 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
532 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
533 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
534 sr = opvsel & VDD1_OP_CMD_MASK;
535 opvsel &= VDD1_OP_SEL_MASK;
536 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500537 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500538 break;
539 case TPS65910_REG_VDD2:
540 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
541 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
542 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
543 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
544 sr = opvsel & VDD2_OP_CMD_MASK;
545 opvsel &= VDD2_OP_SEL_MASK;
546 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500547 vselmax = 75;
548 break;
549 case TPS65911_REG_VDDCTRL:
550 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
551 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
552 sr = opvsel & VDDCTRL_OP_CMD_MASK;
553 opvsel &= VDDCTRL_OP_SEL_MASK;
554 srvsel &= VDDCTRL_SR_SEL_MASK;
555 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500556 break;
557 }
558
559 /* multiplier 0 == 1 but 2,3 normal */
560 if (!mult)
561 mult=1;
562
563 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500564 /* normalise to valid range */
565 if (srvsel < 3)
566 srvsel = 3;
567 if (srvsel > vselmax)
568 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530569 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500570 } else {
571
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500572 /* normalise to valid range*/
573 if (opvsel < 3)
574 opvsel = 3;
575 if (opvsel > vselmax)
576 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530577 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500578 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530579 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500580}
581
582static int tps65910_get_voltage(struct regulator_dev *dev)
583{
584 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
585 int reg, value, id = rdev_get_id(dev), voltage = 0;
586
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500587 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500588 if (reg < 0)
589 return reg;
590
591 value = tps65910_reg_read(pmic, reg);
592 if (value < 0)
593 return value;
594
595 switch (id) {
596 case TPS65910_REG_VIO:
597 case TPS65910_REG_VDIG1:
598 case TPS65910_REG_VDIG2:
599 case TPS65910_REG_VPLL:
600 case TPS65910_REG_VDAC:
601 case TPS65910_REG_VAUX1:
602 case TPS65910_REG_VAUX2:
603 case TPS65910_REG_VAUX33:
604 case TPS65910_REG_VMMC:
605 value &= LDO_SEL_MASK;
606 value >>= LDO_SEL_SHIFT;
607 break;
608 default:
609 return -EINVAL;
610 }
611
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530612 voltage = pmic->info[id]->voltage_table[value] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500613
614 return voltage;
615}
616
617static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
618{
619 return 5 * 1000 * 1000;
620}
621
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500622static int tps65911_get_voltage(struct regulator_dev *dev)
623{
624 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
625 int step_mv, id = rdev_get_id(dev);
626 u8 value, reg;
627
628 reg = pmic->get_ctrl_reg(id);
629
630 value = tps65910_reg_read(pmic, reg);
631
632 switch (id) {
633 case TPS65911_REG_LDO1:
634 case TPS65911_REG_LDO2:
635 case TPS65911_REG_LDO4:
636 value &= LDO1_SEL_MASK;
637 value >>= LDO_SEL_SHIFT;
638 /* The first 5 values of the selector correspond to 1V */
639 if (value < 5)
640 value = 0;
641 else
642 value -= 4;
643
644 step_mv = 50;
645 break;
646 case TPS65911_REG_LDO3:
647 case TPS65911_REG_LDO5:
648 case TPS65911_REG_LDO6:
649 case TPS65911_REG_LDO7:
650 case TPS65911_REG_LDO8:
651 value &= LDO3_SEL_MASK;
652 value >>= LDO_SEL_SHIFT;
653 /* The first 3 values of the selector correspond to 1V */
654 if (value < 3)
655 value = 0;
656 else
657 value -= 2;
658
659 step_mv = 100;
660 break;
661 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530662 value &= LDO_SEL_MASK;
663 value >>= LDO_SEL_SHIFT;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530664 return pmic->info[id]->voltage_table[value] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500665 default:
666 return -EINVAL;
667 }
668
669 return (LDO_MIN_VOLT + value * step_mv) * 1000;
670}
671
Axel Lin94732b92012-03-09 10:22:20 +0800672static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
673 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500674{
675 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
676 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500677 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500678
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500679 switch (id) {
680 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530681 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500682 if (dcdc_mult == 1)
683 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530684 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500685
Graeme Gregory518fb722011-05-02 16:20:08 -0500686 tps65910_modify_bits(pmic, TPS65910_VDD1,
687 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
688 VDD1_VGAIN_SEL_MASK);
689 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500690 break;
691 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530692 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500693 if (dcdc_mult == 1)
694 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530695 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500696
Graeme Gregory518fb722011-05-02 16:20:08 -0500697 tps65910_modify_bits(pmic, TPS65910_VDD2,
698 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
699 VDD1_VGAIN_SEL_MASK);
700 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500701 break;
702 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530703 vsel = selector + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500704 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500705 }
706
707 return 0;
708}
709
Axel Lin94732b92012-03-09 10:22:20 +0800710static int tps65910_set_voltage_sel(struct regulator_dev *dev,
711 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500712{
713 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
714 int reg, id = rdev_get_id(dev);
715
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500716 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500717 if (reg < 0)
718 return reg;
719
720 switch (id) {
721 case TPS65910_REG_VIO:
722 case TPS65910_REG_VDIG1:
723 case TPS65910_REG_VDIG2:
724 case TPS65910_REG_VPLL:
725 case TPS65910_REG_VDAC:
726 case TPS65910_REG_VAUX1:
727 case TPS65910_REG_VAUX2:
728 case TPS65910_REG_VAUX33:
729 case TPS65910_REG_VMMC:
730 return tps65910_modify_bits(pmic, reg,
731 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
732 }
733
734 return -EINVAL;
735}
736
Axel Lin94732b92012-03-09 10:22:20 +0800737static int tps65911_set_voltage_sel(struct regulator_dev *dev,
738 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500739{
740 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
741 int reg, id = rdev_get_id(dev);
742
743 reg = pmic->get_ctrl_reg(id);
744 if (reg < 0)
745 return reg;
746
747 switch (id) {
748 case TPS65911_REG_LDO1:
749 case TPS65911_REG_LDO2:
750 case TPS65911_REG_LDO4:
751 return tps65910_modify_bits(pmic, reg,
752 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
753 case TPS65911_REG_LDO3:
754 case TPS65911_REG_LDO5:
755 case TPS65911_REG_LDO6:
756 case TPS65911_REG_LDO7:
757 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500758 return tps65910_modify_bits(pmic, reg,
759 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530760 case TPS65910_REG_VIO:
761 return tps65910_modify_bits(pmic, reg,
762 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500763 }
764
765 return -EINVAL;
766}
767
768
Graeme Gregory518fb722011-05-02 16:20:08 -0500769static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
770 unsigned selector)
771{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500772 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500773
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500774 switch (id) {
775 case TPS65910_REG_VDD1:
776 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530777 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500778 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530779 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800780 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500781 case TPS65911_REG_VDDCTRL:
782 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800783 break;
784 default:
785 BUG();
786 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500787 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500788
789 return volt * 100 * mult;
790}
791
792static int tps65910_list_voltage(struct regulator_dev *dev,
793 unsigned selector)
794{
795 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
796 int id = rdev_get_id(dev), voltage;
797
798 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
799 return -EINVAL;
800
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530801 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500802 return -EINVAL;
803 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530804 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500805
806 return voltage;
807}
808
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500809static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
810{
811 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
812 int step_mv = 0, id = rdev_get_id(dev);
813
814 switch(id) {
815 case TPS65911_REG_LDO1:
816 case TPS65911_REG_LDO2:
817 case TPS65911_REG_LDO4:
818 /* The first 5 values of the selector correspond to 1V */
819 if (selector < 5)
820 selector = 0;
821 else
822 selector -= 4;
823
824 step_mv = 50;
825 break;
826 case TPS65911_REG_LDO3:
827 case TPS65911_REG_LDO5:
828 case TPS65911_REG_LDO6:
829 case TPS65911_REG_LDO7:
830 case TPS65911_REG_LDO8:
831 /* The first 3 values of the selector correspond to 1V */
832 if (selector < 3)
833 selector = 0;
834 else
835 selector -= 2;
836
837 step_mv = 100;
838 break;
839 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530840 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500841 default:
842 return -EINVAL;
843 }
844
845 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
846}
847
Laxman Dewangan18039e02012-03-14 13:00:58 +0530848static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
849 unsigned int old_selector, unsigned int new_selector)
850{
851 int id = rdev_get_id(dev);
852 int old_volt, new_volt;
853
854 old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
855 if (old_volt < 0)
856 return old_volt;
857
858 new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
859 if (new_volt < 0)
860 return new_volt;
861
862 /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
863 switch (id) {
864 case TPS65910_REG_VDD1:
865 case TPS65910_REG_VDD2:
866 return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
867 case TPS65911_REG_VDDCTRL:
868 return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
869 }
870 return -EINVAL;
871}
872
Graeme Gregory518fb722011-05-02 16:20:08 -0500873/* Regulator ops (except VRTC) */
874static struct regulator_ops tps65910_ops_dcdc = {
Axel Lina40a9c42012-04-17 14:34:46 +0800875 .is_enabled = regulator_is_enabled_regmap,
876 .enable = regulator_enable_regmap,
877 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530878 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500879 .set_mode = tps65910_set_mode,
880 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530881 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800882 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530883 .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500884 .list_voltage = tps65910_list_voltage_dcdc,
885};
886
887static struct regulator_ops tps65910_ops_vdd3 = {
Axel Lina40a9c42012-04-17 14:34:46 +0800888 .is_enabled = regulator_is_enabled_regmap,
889 .enable = regulator_enable_regmap,
890 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530891 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500892 .set_mode = tps65910_set_mode,
893 .get_mode = tps65910_get_mode,
894 .get_voltage = tps65910_get_voltage_vdd3,
895 .list_voltage = tps65910_list_voltage,
896};
897
898static struct regulator_ops tps65910_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800899 .is_enabled = regulator_is_enabled_regmap,
900 .enable = regulator_enable_regmap,
901 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530902 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500903 .set_mode = tps65910_set_mode,
904 .get_mode = tps65910_get_mode,
905 .get_voltage = tps65910_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800906 .set_voltage_sel = tps65910_set_voltage_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500907 .list_voltage = tps65910_list_voltage,
908};
909
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500910static struct regulator_ops tps65911_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800911 .is_enabled = regulator_is_enabled_regmap,
912 .enable = regulator_enable_regmap,
913 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530914 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500915 .set_mode = tps65910_set_mode,
916 .get_mode = tps65910_get_mode,
917 .get_voltage = tps65911_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800918 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500919 .list_voltage = tps65911_list_voltage,
920};
921
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530922static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
923 int id, int ext_sleep_config)
924{
925 struct tps65910 *mfd = pmic->mfd;
926 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
927 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
928 int ret;
929
930 /*
931 * Regulator can not be control from multiple external input EN1, EN2
932 * and EN3 together.
933 */
934 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
935 int en_count;
936 en_count = ((ext_sleep_config &
937 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
938 en_count += ((ext_sleep_config &
939 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
940 en_count += ((ext_sleep_config &
941 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530942 en_count += ((ext_sleep_config &
943 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530944 if (en_count > 1) {
945 dev_err(mfd->dev,
946 "External sleep control flag is not proper\n");
947 return -EINVAL;
948 }
949 }
950
951 pmic->board_ext_control[id] = ext_sleep_config;
952
953 /* External EN1 control */
954 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
955 ret = tps65910_set_bits(mfd,
956 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
957 else
958 ret = tps65910_clear_bits(mfd,
959 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
960 if (ret < 0) {
961 dev_err(mfd->dev,
962 "Error in configuring external control EN1\n");
963 return ret;
964 }
965
966 /* External EN2 control */
967 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
968 ret = tps65910_set_bits(mfd,
969 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
970 else
971 ret = tps65910_clear_bits(mfd,
972 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
973 if (ret < 0) {
974 dev_err(mfd->dev,
975 "Error in configuring external control EN2\n");
976 return ret;
977 }
978
979 /* External EN3 control for TPS65910 LDO only */
980 if ((tps65910_chip_id(mfd) == TPS65910) &&
981 (id >= TPS65910_REG_VDIG1)) {
982 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
983 ret = tps65910_set_bits(mfd,
984 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
985 else
986 ret = tps65910_clear_bits(mfd,
987 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
988 if (ret < 0) {
989 dev_err(mfd->dev,
990 "Error in configuring external control EN3\n");
991 return ret;
992 }
993 }
994
995 /* Return if no external control is selected */
996 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
997 /* Clear all sleep controls */
998 ret = tps65910_clear_bits(mfd,
999 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1000 if (!ret)
1001 ret = tps65910_clear_bits(mfd,
1002 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1003 if (ret < 0)
1004 dev_err(mfd->dev,
1005 "Error in configuring SLEEP register\n");
1006 return ret;
1007 }
1008
1009 /*
1010 * For regulator that has separate operational and sleep register make
1011 * sure that operational is used and clear sleep register to turn
1012 * regulator off when external control is inactive
1013 */
1014 if ((id == TPS65910_REG_VDD1) ||
1015 (id == TPS65910_REG_VDD2) ||
1016 ((id == TPS65911_REG_VDDCTRL) &&
1017 (tps65910_chip_id(mfd) == TPS65911))) {
1018 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1019 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1020 int opvsel = tps65910_reg_read(pmic, op_reg_add);
1021 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1022 if (opvsel & VDD1_OP_CMD_MASK) {
1023 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1024 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1025 if (ret < 0) {
1026 dev_err(mfd->dev,
1027 "Error in configuring op register\n");
1028 return ret;
1029 }
1030 }
1031 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1032 if (ret < 0) {
1033 dev_err(mfd->dev, "Error in settting sr register\n");
1034 return ret;
1035 }
1036 }
1037
1038 ret = tps65910_clear_bits(mfd,
1039 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301040 if (!ret) {
1041 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
1042 ret = tps65910_set_bits(mfd,
1043 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1044 else
1045 ret = tps65910_clear_bits(mfd,
1046 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1047 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301048 if (ret < 0)
1049 dev_err(mfd->dev,
1050 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301051
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301052 return ret;
1053}
1054
Graeme Gregory518fb722011-05-02 16:20:08 -05001055static __devinit int tps65910_probe(struct platform_device *pdev)
1056{
1057 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001058 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001059 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001060 struct regulator_init_data *reg_data;
1061 struct regulator_dev *rdev;
1062 struct tps65910_reg *pmic;
1063 struct tps65910_board *pmic_plat_data;
Graeme Gregory518fb722011-05-02 16:20:08 -05001064 int i, err;
1065
1066 pmic_plat_data = dev_get_platdata(tps65910->dev);
1067 if (!pmic_plat_data)
1068 return -EINVAL;
1069
Axel Lin9eb0c422012-04-11 14:40:18 +08001070 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Graeme Gregory518fb722011-05-02 16:20:08 -05001071 if (!pmic)
1072 return -ENOMEM;
1073
1074 mutex_init(&pmic->mutex);
1075 pmic->mfd = tps65910;
1076 platform_set_drvdata(pdev, pmic);
1077
1078 /* Give control of all register to control port */
1079 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1080 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1081
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001082 switch(tps65910_chip_id(tps65910)) {
1083 case TPS65910:
1084 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001085 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301086 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001087 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001088 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001089 case TPS65911:
1090 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001091 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301092 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001093 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001094 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001095 default:
1096 pr_err("Invalid tps chip version\n");
1097 return -ENODEV;
1098 }
1099
Axel Lin39aa9b62011-07-11 09:57:43 +08001100 pmic->desc = kcalloc(pmic->num_regulators,
1101 sizeof(struct regulator_desc), GFP_KERNEL);
1102 if (!pmic->desc) {
1103 err = -ENOMEM;
Axel Lin9eb0c422012-04-11 14:40:18 +08001104 goto err_out;
Axel Lin39aa9b62011-07-11 09:57:43 +08001105 }
1106
1107 pmic->info = kcalloc(pmic->num_regulators,
1108 sizeof(struct tps_info *), GFP_KERNEL);
1109 if (!pmic->info) {
1110 err = -ENOMEM;
1111 goto err_free_desc;
1112 }
1113
1114 pmic->rdev = kcalloc(pmic->num_regulators,
1115 sizeof(struct regulator_dev *), GFP_KERNEL);
1116 if (!pmic->rdev) {
1117 err = -ENOMEM;
1118 goto err_free_info;
1119 }
1120
Kyle Mannac1fc1482011-11-03 12:08:06 -05001121 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1122 i++, info++) {
1123
1124 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1125
1126 /* Regulator API handles empty constraints but not NULL
1127 * constraints */
1128 if (!reg_data)
1129 continue;
1130
Graeme Gregory518fb722011-05-02 16:20:08 -05001131 /* Register the regulators */
1132 pmic->info[i] = info;
1133
1134 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001135 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301136 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001137
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001138 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001139 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301140 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1141 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001142 } else if (i == TPS65910_REG_VDD3) {
1143 if (tps65910_chip_id(tps65910) == TPS65910)
1144 pmic->desc[i].ops = &tps65910_ops_vdd3;
1145 else
1146 pmic->desc[i].ops = &tps65910_ops_dcdc;
1147 } else {
1148 if (tps65910_chip_id(tps65910) == TPS65910)
1149 pmic->desc[i].ops = &tps65910_ops;
1150 else
1151 pmic->desc[i].ops = &tps65911_ops;
1152 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001153
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301154 err = tps65910_set_ext_sleep_config(pmic, i,
1155 pmic_plat_data->regulator_ext_sleep_control[i]);
1156 /*
1157 * Failing on regulator for configuring externally control
1158 * is not a serious issue, just throw warning.
1159 */
1160 if (err < 0)
1161 dev_warn(tps65910->dev,
1162 "Failed to initialise ext control config\n");
1163
Graeme Gregory518fb722011-05-02 16:20:08 -05001164 pmic->desc[i].type = REGULATOR_VOLTAGE;
1165 pmic->desc[i].owner = THIS_MODULE;
Axel Lina40a9c42012-04-17 14:34:46 +08001166 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1167 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
Graeme Gregory518fb722011-05-02 16:20:08 -05001168
Mark Brownc1727082012-04-04 00:50:22 +01001169 config.dev = tps65910->dev;
1170 config.init_data = reg_data;
1171 config.driver_data = pmic;
Axel Lina40a9c42012-04-17 14:34:46 +08001172 config.regmap = tps65910->regmap;
Mark Brownc1727082012-04-04 00:50:22 +01001173
1174 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001175 if (IS_ERR(rdev)) {
1176 dev_err(tps65910->dev,
1177 "failed to register %s regulator\n",
1178 pdev->name);
1179 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001180 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001181 }
1182
1183 /* Save regulator for cleanup */
1184 pmic->rdev[i] = rdev;
1185 }
1186 return 0;
1187
Axel Lin39aa9b62011-07-11 09:57:43 +08001188err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001189 while (--i >= 0)
1190 regulator_unregister(pmic->rdev[i]);
Axel Lin39aa9b62011-07-11 09:57:43 +08001191 kfree(pmic->rdev);
1192err_free_info:
1193 kfree(pmic->info);
1194err_free_desc:
1195 kfree(pmic->desc);
Axel Lin9eb0c422012-04-11 14:40:18 +08001196err_out:
Graeme Gregory518fb722011-05-02 16:20:08 -05001197 return err;
1198}
1199
1200static int __devexit tps65910_remove(struct platform_device *pdev)
1201{
Axel Lin39aa9b62011-07-11 09:57:43 +08001202 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001203 int i;
1204
Axel Lin39aa9b62011-07-11 09:57:43 +08001205 for (i = 0; i < pmic->num_regulators; i++)
1206 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001207
Axel Lin39aa9b62011-07-11 09:57:43 +08001208 kfree(pmic->rdev);
1209 kfree(pmic->info);
1210 kfree(pmic->desc);
Graeme Gregory518fb722011-05-02 16:20:08 -05001211 return 0;
1212}
1213
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301214static void tps65910_shutdown(struct platform_device *pdev)
1215{
1216 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1217 int i;
1218
1219 /*
1220 * Before bootloader jumps to kernel, it makes sure that required
1221 * external control signals are in desired state so that given rails
1222 * can be configure accordingly.
1223 * If rails are configured to be controlled from external control
1224 * then before shutting down/rebooting the system, the external
1225 * control configuration need to be remove from the rails so that
1226 * its output will be available as per register programming even
1227 * if external controls are removed. This is require when the POR
1228 * value of the control signals are not in active state and before
1229 * bootloader initializes it, the system requires the rail output
1230 * to be active for booting.
1231 */
1232 for (i = 0; i < pmic->num_regulators; i++) {
1233 int err;
1234 if (!pmic->rdev[i])
1235 continue;
1236
1237 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1238 if (err < 0)
1239 dev_err(&pdev->dev,
1240 "Error in clearing external control\n");
1241 }
1242}
1243
Graeme Gregory518fb722011-05-02 16:20:08 -05001244static struct platform_driver tps65910_driver = {
1245 .driver = {
1246 .name = "tps65910-pmic",
1247 .owner = THIS_MODULE,
1248 },
1249 .probe = tps65910_probe,
1250 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301251 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001252};
1253
1254static int __init tps65910_init(void)
1255{
1256 return platform_driver_register(&tps65910_driver);
1257}
1258subsys_initcall(tps65910_init);
1259
1260static void __exit tps65910_cleanup(void)
1261{
1262 platform_driver_unregister(&tps65910_driver);
1263}
1264module_exit(tps65910_cleanup);
1265
1266MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001267MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001268MODULE_LICENSE("GPL v2");
1269MODULE_ALIAS("platform:tps65910-pmic");