blob: 36698e57b97f659dbc20f03f4f6df6fe0e718694 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * probe.c - PCI detection and setup code
3 */
4
5#include <linux/kernel.h>
6#include <linux/delay.h>
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/cpumask.h>
Shaohua Li7d715a62008-02-25 09:46:41 +080012#include <linux/pci-aspm.h>
Greg KHbc56b9e2005-04-08 14:53:31 +090013#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
16#define CARDBUS_RESERVE_BUSNR 3
17#define PCI_CFG_SPACE_SIZE 256
18#define PCI_CFG_SPACE_EXP_SIZE 4096
19
20/* Ugh. Need to stop exporting this to modules. */
21LIST_HEAD(pci_root_buses);
22EXPORT_SYMBOL(pci_root_buses);
23
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080024
25static int find_anything(struct device *dev, void *data)
26{
27 return 1;
28}
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070030/*
31 * Some device drivers need know if pci is initiated.
32 * Basically, we think pci is not initiated when there
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080033 * is no device to be found on the pci_bus_type.
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070034 */
35int no_pci_devices(void)
36{
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080037 struct device *dev;
38 int no_devices;
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070039
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080040 dev = bus_find_device(&pci_bus_type, NULL, NULL, find_anything);
41 no_devices = (dev == NULL);
42 put_device(dev);
43 return no_devices;
44}
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070045EXPORT_SYMBOL(no_pci_devices);
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#ifdef HAVE_PCI_LEGACY
48/**
49 * pci_create_legacy_files - create legacy I/O port and memory files
50 * @b: bus to create files under
51 *
52 * Some platforms allow access to legacy I/O port and ISA memory space on
53 * a per-bus basis. This routine creates the files and ties them into
54 * their associated read, write and mmap files from pci-sysfs.c
Simon Hormana8441582008-08-07 14:56:34 +100055 *
56 * On error unwind, but don't propogate the error to the caller
57 * as it is ok to set up the PCI bus without these files.
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 */
59static void pci_create_legacy_files(struct pci_bus *b)
60{
Simon Hormana8441582008-08-07 14:56:34 +100061 int error;
62
Eric Sesterhennf5afe802006-02-28 15:34:49 +010063 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 GFP_ATOMIC);
Simon Hormana8441582008-08-07 14:56:34 +100065 if (!b->legacy_io)
66 goto kzalloc_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Simon Hormana8441582008-08-07 14:56:34 +100068 b->legacy_io->attr.name = "legacy_io";
69 b->legacy_io->size = 0xffff;
70 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
71 b->legacy_io->read = pci_read_legacy_io;
72 b->legacy_io->write = pci_write_legacy_io;
73 error = device_create_bin_file(&b->dev, b->legacy_io);
74 if (error)
75 goto legacy_io_err;
76
77 /* Allocated above after the legacy_io struct */
78 b->legacy_mem = b->legacy_io + 1;
79 b->legacy_mem->attr.name = "legacy_mem";
80 b->legacy_mem->size = 1024*1024;
81 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
82 b->legacy_mem->mmap = pci_mmap_legacy_mem;
83 error = device_create_bin_file(&b->dev, b->legacy_mem);
84 if (error)
85 goto legacy_mem_err;
86
87 return;
88
89legacy_mem_err:
90 device_remove_bin_file(&b->dev, b->legacy_io);
91legacy_io_err:
92 kfree(b->legacy_io);
93 b->legacy_io = NULL;
94kzalloc_err:
95 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
96 "and ISA memory resources to sysfs\n");
97 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -070098}
99
100void pci_remove_legacy_files(struct pci_bus *b)
101{
102 if (b->legacy_io) {
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400103 device_remove_bin_file(&b->dev, b->legacy_io);
104 device_remove_bin_file(&b->dev, b->legacy_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 kfree(b->legacy_io); /* both are allocated here */
106 }
107}
108#else /* !HAVE_PCI_LEGACY */
109static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
110void pci_remove_legacy_files(struct pci_bus *bus) { return; }
111#endif /* HAVE_PCI_LEGACY */
112
113/*
114 * PCI Bus Class Devices
115 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400116static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
Mike Travis39106dc2008-04-08 11:43:03 -0700117 int type,
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400118 struct device_attribute *attr,
Alan Cox4327edf2005-09-10 00:25:49 -0700119 char *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 int ret;
Alan Cox4327edf2005-09-10 00:25:49 -0700122 cpumask_t cpumask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400124 cpumask = pcibus_to_cpumask(to_pci_bus(dev));
Mike Travis39106dc2008-04-08 11:43:03 -0700125 ret = type?
126 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask):
127 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
128 buf[ret++] = '\n';
129 buf[ret] = '\0';
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 return ret;
131}
Mike Travis39106dc2008-04-08 11:43:03 -0700132
133static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
134 struct device_attribute *attr,
135 char *buf)
136{
137 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
138}
139
140static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
141 struct device_attribute *attr,
142 char *buf)
143{
144 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
145}
146
147DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
148DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149
150/*
151 * PCI Bus Class
152 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400153static void release_pcibus_dev(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154{
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400155 struct pci_bus *pci_bus = to_pci_bus(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
157 if (pci_bus->bridge)
158 put_device(pci_bus->bridge);
159 kfree(pci_bus);
160}
161
162static struct class pcibus_class = {
163 .name = "pci_bus",
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400164 .dev_release = &release_pcibus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165};
166
167static int __init pcibus_class_init(void)
168{
169 return class_register(&pcibus_class);
170}
171postcore_initcall(pcibus_class_init);
172
173/*
174 * Translate the low bits of the PCI base
175 * to the resource type
176 */
177static inline unsigned int pci_calc_resource_flags(unsigned int flags)
178{
179 if (flags & PCI_BASE_ADDRESS_SPACE_IO)
180 return IORESOURCE_IO;
181
182 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
183 return IORESOURCE_MEM | IORESOURCE_PREFETCH;
184
185 return IORESOURCE_MEM;
186}
187
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400188static u64 pci_size(u64 base, u64 maxbase, u64 mask)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800189{
190 u64 size = mask & maxbase; /* Find the significant bits */
191 if (!size)
192 return 0;
193
194 /* Get the lowest of them to find the decode size, and
195 from that the extent. */
196 size = (size & ~(size-1)) - 1;
197
198 /* base == maxbase can be valid only if the BAR has
199 already been programmed with all 1s. */
200 if (base == maxbase && ((base | size) & mask) != mask)
201 return 0;
202
203 return size;
204}
205
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400206enum pci_bar_type {
207 pci_bar_unknown, /* Standard PCI BAR probe */
208 pci_bar_io, /* An io port BAR */
209 pci_bar_mem32, /* A 32-bit memory BAR */
210 pci_bar_mem64, /* A 64-bit memory BAR */
211};
212
213static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800214{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400215 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
216 res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
217 return pci_bar_io;
218 }
219
220 res->flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK;
221
222 if (res->flags == PCI_BASE_ADDRESS_MEM_TYPE_64)
223 return pci_bar_mem64;
224 return pci_bar_mem32;
225}
226
227/*
228 * If the type is not unknown, we assume that the lowest bit is 'enable'.
229 * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
230 */
231static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
232 struct resource *res, unsigned int pos)
233{
234 u32 l, sz, mask;
235
236 mask = type ? ~PCI_ROM_ADDRESS_ENABLE : ~0;
237
238 res->name = pci_name(dev);
239
240 pci_read_config_dword(dev, pos, &l);
241 pci_write_config_dword(dev, pos, mask);
242 pci_read_config_dword(dev, pos, &sz);
243 pci_write_config_dword(dev, pos, l);
244
245 /*
246 * All bits set in sz means the device isn't working properly.
247 * If the BAR isn't implemented, all bits must be 0. If it's a
248 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
249 * 1 must be clear.
250 */
251 if (!sz || sz == 0xffffffff)
252 goto fail;
253
254 /*
255 * I don't know how l can have all bits set. Copied from old code.
256 * Maybe it fixes a bug on some ancient platform.
257 */
258 if (l == 0xffffffff)
259 l = 0;
260
261 if (type == pci_bar_unknown) {
262 type = decode_bar(res, l);
263 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
264 if (type == pci_bar_io) {
265 l &= PCI_BASE_ADDRESS_IO_MASK;
266 mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
267 } else {
268 l &= PCI_BASE_ADDRESS_MEM_MASK;
269 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
270 }
271 } else {
272 res->flags |= (l & IORESOURCE_ROM_ENABLE);
273 l &= PCI_ROM_ADDRESS_MASK;
274 mask = (u32)PCI_ROM_ADDRESS_MASK;
275 }
276
277 if (type == pci_bar_mem64) {
278 u64 l64 = l;
279 u64 sz64 = sz;
280 u64 mask64 = mask | (u64)~0 << 32;
281
282 pci_read_config_dword(dev, pos + 4, &l);
283 pci_write_config_dword(dev, pos + 4, ~0);
284 pci_read_config_dword(dev, pos + 4, &sz);
285 pci_write_config_dword(dev, pos + 4, l);
286
287 l64 |= ((u64)l << 32);
288 sz64 |= ((u64)sz << 32);
289
290 sz64 = pci_size(l64, sz64, mask64);
291
292 if (!sz64)
293 goto fail;
294
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400295 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400296 dev_err(&dev->dev, "can't handle 64-bit BAR\n");
297 goto fail;
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400298 } else if ((sizeof(resource_size_t) < 8) && l) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400299 /* Address above 32-bit boundary; disable the BAR */
300 pci_write_config_dword(dev, pos, 0);
301 pci_write_config_dword(dev, pos + 4, 0);
302 res->start = 0;
303 res->end = sz64;
304 } else {
305 res->start = l64;
306 res->end = l64 + sz64;
Yinghai Lu395a1252008-09-09 12:27:52 -0700307 printk(KERN_DEBUG "PCI: %s reg %x 64bit mmio: [%llx, %llx]\n",
308 pci_name(dev), pos, (unsigned long long)res->start,
309 (unsigned long long)res->end);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400310 }
311 } else {
312 sz = pci_size(l, sz, mask);
313
314 if (!sz)
315 goto fail;
316
317 res->start = l;
318 res->end = l + sz;
Yinghai Lu395a1252008-09-09 12:27:52 -0700319 printk(KERN_DEBUG "PCI: %s reg %x %s: [%llx, %llx]\n", pci_name(dev),
320 pos, (res->flags & IORESOURCE_IO) ? "io port":"32bit mmio",
321 (unsigned long long)res->start, (unsigned long long)res->end);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400322 }
323
324 out:
325 return (type == pci_bar_mem64) ? 1 : 0;
326 fail:
327 res->flags = 0;
328 goto out;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800329}
330
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
332{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400333 unsigned int pos, reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400335 for (pos = 0; pos < howmany; pos++) {
336 struct resource *res = &dev->resource[pos];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 reg = PCI_BASE_ADDRESS_0 + (pos << 2);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400338 pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 }
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400340
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 if (rom) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400342 struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 dev->rom_base_reg = rom;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400344 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
345 IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
346 IORESOURCE_SIZEALIGN;
347 __pci_read_base(dev, pci_bar_mem32, res, rom);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 }
349}
350
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100351void __devinit pci_read_bridge_bases(struct pci_bus *child)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352{
353 struct pci_dev *dev = child->self;
354 u8 io_base_lo, io_limit_lo;
355 u16 mem_base_lo, mem_limit_lo;
356 unsigned long base, limit;
357 struct resource *res;
358 int i;
359
360 if (!dev) /* It's a host bus, nothing to read */
361 return;
362
363 if (dev->transparent) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600364 dev_info(&dev->dev, "transparent bridge\n");
Ivan Kokshaysky90b54922005-06-07 04:07:02 +0400365 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
366 child->resource[i] = child->parent->resource[i - 3];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367 }
368
369 for(i=0; i<3; i++)
370 child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
371
372 res = child->resource[0];
373 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
374 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
375 base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
376 limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
377
378 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
379 u16 io_base_hi, io_limit_hi;
380 pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
381 pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
382 base |= (io_base_hi << 16);
383 limit |= (io_limit_hi << 16);
384 }
385
386 if (base <= limit) {
387 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
Daniel Yeisley9d265122005-12-05 07:06:43 -0500388 if (!res->start)
389 res->start = base;
390 if (!res->end)
391 res->end = limit + 0xfff;
Yinghai Lu395a1252008-09-09 12:27:52 -0700392 printk(KERN_DEBUG "PCI: bridge %s io port: [%llx, %llx]\n",
Johann Felix Soden4ca8a772008-08-22 20:46:59 +0200393 pci_name(dev), (unsigned long long) res->start,
394 (unsigned long long) res->end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 }
396
397 res = child->resource[1];
398 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
399 pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
400 base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
401 limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
402 if (base <= limit) {
403 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
404 res->start = base;
405 res->end = limit + 0xfffff;
Yinghai Lu395a1252008-09-09 12:27:52 -0700406 printk(KERN_DEBUG "PCI: bridge %s 32bit mmio: [%llx, %llx]\n",
407 pci_name(dev), (unsigned long long) res->start,
408 (unsigned long long) res->end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 }
410
411 res = child->resource[2];
412 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
413 pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
414 base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
415 limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
416
417 if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
418 u32 mem_base_hi, mem_limit_hi;
419 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
420 pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
421
422 /*
423 * Some bridges set the base > limit by default, and some
424 * (broken) BIOSes do not initialize them. If we find
425 * this, just assume they are not being used.
426 */
427 if (mem_base_hi <= mem_limit_hi) {
428#if BITS_PER_LONG == 64
429 base |= ((long) mem_base_hi) << 32;
430 limit |= ((long) mem_limit_hi) << 32;
431#else
432 if (mem_base_hi || mem_limit_hi) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600433 dev_err(&dev->dev, "can't handle 64-bit "
434 "address space for bridge\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 return;
436 }
437#endif
438 }
439 }
440 if (base <= limit) {
441 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
442 res->start = base;
443 res->end = limit + 0xfffff;
Yinghai Lu395a1252008-09-09 12:27:52 -0700444 printk(KERN_DEBUG "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n",
Johann Felix Soden4ca8a772008-08-22 20:46:59 +0200445 pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
446 (unsigned long long) res->start, (unsigned long long) res->end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 }
448}
449
Sam Ravnborg96bde062007-03-26 21:53:30 -0800450static struct pci_bus * pci_alloc_bus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451{
452 struct pci_bus *b;
453
Eric Sesterhennf5afe802006-02-28 15:34:49 +0100454 b = kzalloc(sizeof(*b), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 if (b) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 INIT_LIST_HEAD(&b->node);
457 INIT_LIST_HEAD(&b->children);
458 INIT_LIST_HEAD(&b->devices);
Alex Chiangf46753c2008-06-10 15:28:50 -0600459 INIT_LIST_HEAD(&b->slots);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 }
461 return b;
462}
463
Adrian Bunkcbd4e052008-04-18 13:53:55 -0700464static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
465 struct pci_dev *bridge, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466{
467 struct pci_bus *child;
468 int i;
469
470 /*
471 * Allocate a new bus, and inherit stuff from the parent..
472 */
473 child = pci_alloc_bus();
474 if (!child)
475 return NULL;
476
477 child->self = bridge;
478 child->parent = parent;
479 child->ops = parent->ops;
480 child->sysdata = parent->sysdata;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200481 child->bus_flags = parent->bus_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 child->bridge = get_device(&bridge->dev);
483
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400484 /* initialize some portions of the bus device, but don't register it
485 * now as the parent is not properly set up yet. This device will get
486 * registered later in pci_bus_add_devices()
487 */
488 child->dev.class = &pcibus_class;
489 sprintf(child->dev.bus_id, "%04x:%02x", pci_domain_nr(child), busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490
491 /*
492 * Set up the primary, secondary and subordinate
493 * bus numbers.
494 */
495 child->number = child->secondary = busnr;
496 child->primary = parent->secondary;
497 child->subordinate = 0xff;
498
499 /* Set up default resource pointers and names.. */
500 for (i = 0; i < 4; i++) {
501 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
502 child->resource[i]->name = child->name;
503 }
504 bridge->subordinate = child;
505
506 return child;
507}
508
Sam Ravnborg451124a2008-02-02 22:33:43 +0100509struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510{
511 struct pci_bus *child;
512
513 child = pci_alloc_child_bus(parent, dev, busnr);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700514 if (child) {
Zhang Yanmind71374d2006-06-02 12:35:43 +0800515 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 list_add_tail(&child->node, &parent->children);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800517 up_write(&pci_bus_sem);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700518 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519 return child;
520}
521
Sam Ravnborg96bde062007-03-26 21:53:30 -0800522static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700523{
524 struct pci_bus *parent = child->parent;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700525
526 /* Attempts to fix that up are really dangerous unless
527 we're going to re-assign all bus numbers. */
528 if (!pcibios_assign_all_busses())
529 return;
530
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700531 while (parent->parent && parent->subordinate < max) {
532 parent->subordinate = max;
533 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
534 parent = parent->parent;
535 }
536}
537
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538/*
539 * If it's a bridge, configure it and scan the bus behind it.
540 * For CardBus bridges, we don't scan behind as the devices will
541 * be handled by the bridge driver itself.
542 *
543 * We need to process bridges in two passes -- first we scan those
544 * already configured by the BIOS and after we are done with all of
545 * them, we proceed to assigning numbers to the remaining buses in
546 * order to avoid overlaps between old and new bus numbers.
547 */
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100548int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549{
550 struct pci_bus *child;
551 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
Dominik Brodowski49887942005-12-08 16:53:12 +0100552 u32 buses, i, j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 u16 bctl;
554
555 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
556
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600557 dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
558 buses & 0xffffff, pass);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559
560 /* Disable MasterAbortMode during probing to avoid reporting
561 of bus errors (in some architectures) */
562 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
563 pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
564 bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
565
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {
567 unsigned int cmax, busnr;
568 /*
569 * Bus already configured by firmware, process it in the first
570 * pass and just note the configuration.
571 */
572 if (pass)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000573 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 busnr = (buses >> 8) & 0xFF;
575
576 /*
577 * If we already got to this bus through a different bridge,
578 * ignore it. This can happen with the i450NX chipset.
579 */
580 if (pci_find_bus(pci_domain_nr(bus), busnr)) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600581 dev_info(&dev->dev, "bus %04x:%02x already known\n",
582 pci_domain_nr(bus), busnr);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000583 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 }
585
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700586 child = pci_add_new_bus(bus, dev, busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 if (!child)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000588 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700589 child->primary = buses & 0xFF;
590 child->subordinate = (buses >> 16) & 0xFF;
Gary Hade11949252007-10-08 16:24:16 -0700591 child->bridge_ctl = bctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592
593 cmax = pci_scan_child_bus(child);
594 if (cmax > max)
595 max = cmax;
596 if (child->subordinate > max)
597 max = child->subordinate;
598 } else {
599 /*
600 * We need to assign a number to this bus which we always
601 * do in the second pass.
602 */
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700603 if (!pass) {
604 if (pcibios_assign_all_busses())
605 /* Temporarily disable forwarding of the
606 configuration cycles on all bridges in
607 this bus segment to avoid possible
608 conflicts in the second pass between two
609 bridges programmed with overlapping
610 bus ranges. */
611 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
612 buses & ~0xffffff);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000613 goto out;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700614 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615
616 /* Clear errors */
617 pci_write_config_word(dev, PCI_STATUS, 0xffff);
618
Rajesh Shahcc574502005-04-28 00:25:47 -0700619 /* Prevent assigning a bus number that already exists.
620 * This can happen when a bridge is hot-plugged */
621 if (pci_find_bus(pci_domain_nr(bus), max+1))
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000622 goto out;
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700623 child = pci_add_new_bus(bus, dev, ++max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 buses = (buses & 0xff000000)
625 | ((unsigned int)(child->primary) << 0)
626 | ((unsigned int)(child->secondary) << 8)
627 | ((unsigned int)(child->subordinate) << 16);
628
629 /*
630 * yenta.c forces a secondary latency timer of 176.
631 * Copy that behaviour here.
632 */
633 if (is_cardbus) {
634 buses &= ~0xff000000;
635 buses |= CARDBUS_LATENCY_TIMER << 24;
636 }
637
638 /*
639 * We need to blast all three values with a single write.
640 */
641 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
642
643 if (!is_cardbus) {
Gary Hade11949252007-10-08 16:24:16 -0700644 child->bridge_ctl = bctl;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700645 /*
646 * Adjust subordinate busnr in parent buses.
647 * We do this before scanning for children because
648 * some devices may not be detected if the bios
649 * was lazy.
650 */
651 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 /* Now we can scan all subordinate buses... */
653 max = pci_scan_child_bus(child);
Kristen Accardie3ac86d2006-01-17 16:57:01 -0800654 /*
655 * now fix it up again since we have found
656 * the real value of max.
657 */
658 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 } else {
660 /*
661 * For CardBus bridges, we leave 4 bus numbers
662 * as cards with a PCI-to-PCI bridge can be
663 * inserted later.
664 */
Dominik Brodowski49887942005-12-08 16:53:12 +0100665 for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
666 struct pci_bus *parent = bus;
Rajesh Shahcc574502005-04-28 00:25:47 -0700667 if (pci_find_bus(pci_domain_nr(bus),
668 max+i+1))
669 break;
Dominik Brodowski49887942005-12-08 16:53:12 +0100670 while (parent->parent) {
671 if ((!pcibios_assign_all_busses()) &&
672 (parent->subordinate > max) &&
673 (parent->subordinate <= max+i)) {
674 j = 1;
675 }
676 parent = parent->parent;
677 }
678 if (j) {
679 /*
680 * Often, there are two cardbus bridges
681 * -- try to leave one valid bus number
682 * for each one.
683 */
684 i /= 2;
685 break;
686 }
687 }
Rajesh Shahcc574502005-04-28 00:25:47 -0700688 max += i;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700689 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 }
691 /*
692 * Set the subordinate bus number to its real value.
693 */
694 child->subordinate = max;
695 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
696 }
697
Gary Hadecb3576f2008-02-08 14:00:52 -0800698 sprintf(child->name,
699 (is_cardbus ? "PCI CardBus %04x:%02x" : "PCI Bus %04x:%02x"),
700 pci_domain_nr(bus), child->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200702 /* Has only triggered on CardBus, fixup is in yenta_socket */
Dominik Brodowski49887942005-12-08 16:53:12 +0100703 while (bus->parent) {
704 if ((child->subordinate > bus->subordinate) ||
705 (child->number > bus->subordinate) ||
706 (child->number < bus->number) ||
707 (child->subordinate < bus->number)) {
Joe Perchesa6f29a92007-11-19 17:48:29 -0800708 pr_debug("PCI: Bus #%02x (-#%02x) is %s "
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200709 "hidden behind%s bridge #%02x (-#%02x)\n",
710 child->number, child->subordinate,
711 (bus->number > child->subordinate &&
712 bus->subordinate < child->number) ?
Joe Perchesa6f29a92007-11-19 17:48:29 -0800713 "wholly" : "partially",
714 bus->self->transparent ? " transparent" : "",
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200715 bus->number, bus->subordinate);
Dominik Brodowski49887942005-12-08 16:53:12 +0100716 }
717 bus = bus->parent;
718 }
719
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000720out:
721 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
722
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723 return max;
724}
725
726/*
727 * Read interrupt line and base address registers.
728 * The architecture-dependent code can tweak these, of course.
729 */
730static void pci_read_irq(struct pci_dev *dev)
731{
732 unsigned char irq;
733
734 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
Kristen Accardiffeff782005-11-02 16:24:32 -0800735 dev->pin = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 if (irq)
737 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
738 dev->irq = irq;
739}
740
Bartlomiej Zolnierkiewicz01abc2a2007-04-23 23:19:36 +0200741#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
Randy Dunlap76e6a1d2006-12-29 16:47:29 -0800742
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743/**
744 * pci_setup_device - fill in class and map information of a device
745 * @dev: the device structure to fill
746 *
747 * Initialize the device structure with information about the device's
748 * vendor,class,memory and IO-space addresses,IRQ lines etc.
749 * Called at initialisation of the PCI subsystem and by CardBus services.
750 * Returns 0 on success and -1 if unknown type of device (not normal, bridge
751 * or CardBus).
752 */
753static int pci_setup_device(struct pci_dev * dev)
754{
755 u32 class;
756
Greg Kroah-Hartmaneebfcfb2008-07-02 13:24:49 -0700757 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
758 dev->bus->number, PCI_SLOT(dev->devfn),
759 PCI_FUNC(dev->devfn));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760
761 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
Auke Kokb8a3a522007-06-08 15:46:30 -0700762 dev->revision = class & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 class >>= 8; /* upper 3 bytes */
764 dev->class = class;
765 class >>= 8;
766
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600767 dev_dbg(&dev->dev, "found [%04x/%04x] class %06x header type %02x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768 dev->vendor, dev->device, class, dev->hdr_type);
769
770 /* "Unknown power state" */
Daniel Ritz3fe9d192005-08-17 15:32:19 -0700771 dev->current_state = PCI_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700772
773 /* Early fixups, before probing the BARs */
774 pci_fixup_device(pci_fixup_early, dev);
775 class = dev->class >> 8;
776
777 switch (dev->hdr_type) { /* header type */
778 case PCI_HEADER_TYPE_NORMAL: /* standard header */
779 if (class == PCI_CLASS_BRIDGE_PCI)
780 goto bad;
781 pci_read_irq(dev);
782 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
783 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
784 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
Alan Cox368c73d2006-10-04 00:41:26 +0100785
786 /*
787 * Do the ugly legacy mode stuff here rather than broken chip
788 * quirk code. Legacy mode ATA controllers have fixed
789 * addresses. These are not always echoed in BAR0-3, and
790 * BAR0-3 in a few cases contain junk!
791 */
792 if (class == PCI_CLASS_STORAGE_IDE) {
793 u8 progif;
794 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
795 if ((progif & 1) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800796 dev->resource[0].start = 0x1F0;
797 dev->resource[0].end = 0x1F7;
798 dev->resource[0].flags = LEGACY_IO_RESOURCE;
799 dev->resource[1].start = 0x3F6;
800 dev->resource[1].end = 0x3F6;
801 dev->resource[1].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100802 }
803 if ((progif & 4) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800804 dev->resource[2].start = 0x170;
805 dev->resource[2].end = 0x177;
806 dev->resource[2].flags = LEGACY_IO_RESOURCE;
807 dev->resource[3].start = 0x376;
808 dev->resource[3].end = 0x376;
809 dev->resource[3].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100810 }
811 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 break;
813
814 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
815 if (class != PCI_CLASS_BRIDGE_PCI)
816 goto bad;
817 /* The PCI-to-PCI bridge spec requires that subtractive
818 decoding (i.e. transparent) bridge must have programming
819 interface code of 0x01. */
Kristen Accardi3efd2732005-11-02 16:55:49 -0800820 pci_read_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 dev->transparent = ((dev->class & 0xff) == 1);
822 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
823 break;
824
825 case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */
826 if (class != PCI_CLASS_BRIDGE_CARDBUS)
827 goto bad;
828 pci_read_irq(dev);
829 pci_read_bases(dev, 1, 0);
830 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
831 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device);
832 break;
833
834 default: /* unknown header */
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600835 dev_err(&dev->dev, "unknown header type %02x, "
836 "ignoring device\n", dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 return -1;
838
839 bad:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600840 dev_err(&dev->dev, "ignoring class %02x (doesn't match header "
841 "type %02x)\n", class, dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842 dev->class = PCI_CLASS_NOT_DEFINED;
843 }
844
845 /* We found a fine healthy device, go go go... */
846 return 0;
847}
848
849/**
850 * pci_release_dev - free a pci device structure when all users of it are finished.
851 * @dev: device that's been disconnected
852 *
853 * Will be called only by the device core when all users of this pci device are
854 * done.
855 */
856static void pci_release_dev(struct device *dev)
857{
858 struct pci_dev *pci_dev;
859
860 pci_dev = to_pci_dev(dev);
Ben Hutchings94e61082008-03-05 16:52:39 +0000861 pci_vpd_release(pci_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700862 kfree(pci_dev);
863}
864
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700865static void set_pcie_port_type(struct pci_dev *pdev)
866{
867 int pos;
868 u16 reg16;
869
870 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
871 if (!pos)
872 return;
873 pdev->is_pcie = 1;
874 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
875 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
876}
877
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878/**
879 * pci_cfg_space_size - get the configuration space size of the PCI device.
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700880 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881 *
882 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
883 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
884 * access it. Maybe we don't have a way to generate extended config space
885 * accesses, or the device is behind a reverse Express bridge. So we try
886 * reading the dword at 0x100 which must either be 0 or a valid extended
887 * capability header.
888 */
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700889int pci_cfg_space_size_ext(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 u32 status;
892
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 if (pci_read_config_dword(dev, 256, &status) != PCIBIOS_SUCCESSFUL)
894 goto fail;
895 if (status == 0xffffffff)
896 goto fail;
897
898 return PCI_CFG_SPACE_EXP_SIZE;
899
900 fail:
901 return PCI_CFG_SPACE_SIZE;
902}
903
Yinghai Lu57741a72008-02-15 01:32:50 -0800904int pci_cfg_space_size(struct pci_dev *dev)
905{
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700906 int pos;
907 u32 status;
908
909 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
910 if (!pos) {
911 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
912 if (!pos)
913 goto fail;
914
915 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
916 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
917 goto fail;
918 }
919
920 return pci_cfg_space_size_ext(dev);
921
922 fail:
923 return PCI_CFG_SPACE_SIZE;
Yinghai Lu57741a72008-02-15 01:32:50 -0800924}
925
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926static void pci_release_bus_bridge_dev(struct device *dev)
927{
928 kfree(dev);
929}
930
Michael Ellerman65891212007-04-05 17:19:08 +1000931struct pci_dev *alloc_pci_dev(void)
932{
933 struct pci_dev *dev;
934
935 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
936 if (!dev)
937 return NULL;
938
Michael Ellerman65891212007-04-05 17:19:08 +1000939 INIT_LIST_HEAD(&dev->bus_list);
940
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000941 pci_msi_init_pci_dev(dev);
942
Michael Ellerman65891212007-04-05 17:19:08 +1000943 return dev;
944}
945EXPORT_SYMBOL(alloc_pci_dev);
946
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947/*
948 * Read the config data for a PCI device, sanity-check it
949 * and fill in the dev structure...
950 */
Adrian Bunk7f7b5de2008-04-18 13:53:55 -0700951static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952{
953 struct pci_dev *dev;
954 u32 l;
955 u8 hdr_type;
956 int delay = 1;
957
958 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
959 return NULL;
960
961 /* some broken boards return 0 or ~0 if a slot is empty: */
962 if (l == 0xffffffff || l == 0x00000000 ||
963 l == 0x0000ffff || l == 0xffff0000)
964 return NULL;
965
966 /* Configuration request Retry Status */
967 while (l == 0xffff0001) {
968 msleep(delay);
969 delay *= 2;
970 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
971 return NULL;
972 /* Card hasn't responded in 60 seconds? Must be stuck. */
973 if (delay > 60 * 1000) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600974 printk(KERN_WARNING "pci %04x:%02x:%02x.%d: not "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700975 "responding\n", pci_domain_nr(bus),
976 bus->number, PCI_SLOT(devfn),
977 PCI_FUNC(devfn));
978 return NULL;
979 }
980 }
981
982 if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
983 return NULL;
984
Michael Ellermanbab41e92007-04-05 17:19:09 +1000985 dev = alloc_pci_dev();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 if (!dev)
987 return NULL;
988
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989 dev->bus = bus;
990 dev->sysdata = bus->sysdata;
991 dev->dev.parent = bus->bridge;
992 dev->dev.bus = &pci_bus_type;
993 dev->devfn = devfn;
994 dev->hdr_type = hdr_type & 0x7f;
995 dev->multifunction = !!(hdr_type & 0x80);
996 dev->vendor = l & 0xffff;
997 dev->device = (l >> 16) & 0xffff;
998 dev->cfg_size = pci_cfg_space_size(dev);
Linas Vepstas82081792006-07-10 04:44:46 -0700999 dev->error_state = pci_channel_io_normal;
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -07001000 set_pcie_port_type(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001
1002 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
1003 set this higher, assuming the system even supports it. */
1004 dev->dma_mask = 0xffffffff;
1005 if (pci_setup_device(dev) < 0) {
1006 kfree(dev);
1007 return NULL;
1008 }
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001009
Ben Hutchings94e61082008-03-05 16:52:39 +00001010 pci_vpd_pci22_init(dev);
1011
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001012 return dev;
1013}
1014
Sam Ravnborg96bde062007-03-26 21:53:30 -08001015void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001016{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001017 device_initialize(&dev->dev);
1018 dev->dev.release = pci_release_dev;
1019 pci_dev_get(dev);
1020
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021 dev->dev.dma_mask = &dev->dma_mask;
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001022 dev->dev.dma_parms = &dev->dma_parms;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001023 dev->dev.coherent_dma_mask = 0xffffffffull;
1024
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001025 pci_set_dma_max_seg_size(dev, 65536);
FUJITA Tomonori59fc67d2008-02-04 22:28:14 -08001026 pci_set_dma_seg_boundary(dev, 0xffffffff);
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -08001027
Linus Torvalds1da177e2005-04-16 15:20:36 -07001028 /* Fix up broken headers */
1029 pci_fixup_device(pci_fixup_header, dev);
1030
Rafael J. Wysockieb9d0fe2008-07-07 03:34:48 +02001031 /* Initialize power management of the device */
1032 pci_pm_init(dev);
1033
Linus Torvalds1da177e2005-04-16 15:20:36 -07001034 /*
1035 * Add the device to our list of discovered devices
1036 * and the bus list for fixup functions, etc.
1037 */
Zhang Yanmind71374d2006-06-02 12:35:43 +08001038 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039 list_add_tail(&dev->bus_list, &bus->devices);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001040 up_write(&pci_bus_sem);
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001041}
1042
Sam Ravnborg451124a2008-02-02 22:33:43 +01001043struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001044{
1045 struct pci_dev *dev;
1046
1047 dev = pci_scan_device(bus, devfn);
1048 if (!dev)
1049 return NULL;
1050
1051 pci_device_add(dev, bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052
1053 return dev;
1054}
Adrian Bunkb73e9682007-11-21 15:07:11 -08001055EXPORT_SYMBOL(pci_scan_single_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056
1057/**
1058 * pci_scan_slot - scan a PCI slot on a bus for devices.
1059 * @bus: PCI bus to scan
1060 * @devfn: slot number to scan (must have zero function.)
1061 *
1062 * Scan a PCI slot on the specified PCI bus for devices, adding
1063 * discovered devices to the @bus->devices list. New devices
Greg Kroah-Hartman8a1bc902008-02-14 14:56:56 -08001064 * will not have is_added set.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 */
Sam Ravnborg96bde062007-03-26 21:53:30 -08001066int pci_scan_slot(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001067{
1068 int func, nr = 0;
1069 int scan_all_fns;
1070
1071 scan_all_fns = pcibios_scan_all_fns(bus, devfn);
1072
1073 for (func = 0; func < 8; func++, devfn++) {
1074 struct pci_dev *dev;
1075
1076 dev = pci_scan_single_device(bus, devfn);
1077 if (dev) {
1078 nr++;
1079
1080 /*
1081 * If this is a single function device,
1082 * don't scan past the first function.
1083 */
1084 if (!dev->multifunction) {
1085 if (func > 0) {
1086 dev->multifunction = 1;
1087 } else {
1088 break;
1089 }
1090 }
1091 } else {
1092 if (func == 0 && !scan_all_fns)
1093 break;
1094 }
1095 }
Shaohua Li7d715a62008-02-25 09:46:41 +08001096
Shaohua Li149e1632008-07-23 10:32:31 +08001097 /* only one slot has pcie device */
1098 if (bus->self && nr)
Shaohua Li7d715a62008-02-25 09:46:41 +08001099 pcie_aspm_init_link_state(bus->self);
1100
Linus Torvalds1da177e2005-04-16 15:20:36 -07001101 return nr;
1102}
1103
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001104unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001105{
1106 unsigned int devfn, pass, max = bus->secondary;
1107 struct pci_dev *dev;
1108
1109 pr_debug("PCI: Scanning bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1110
1111 /* Go find them, Rover! */
1112 for (devfn = 0; devfn < 0x100; devfn += 8)
1113 pci_scan_slot(bus, devfn);
1114
1115 /*
1116 * After performing arch-dependent fixup of the bus, look behind
1117 * all PCI-to-PCI bridges on this bus.
1118 */
1119 pr_debug("PCI: Fixups for bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1120 pcibios_fixup_bus(bus);
1121 for (pass=0; pass < 2; pass++)
1122 list_for_each_entry(dev, &bus->devices, bus_list) {
1123 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1124 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1125 max = pci_scan_bridge(bus, dev, max, pass);
1126 }
1127
1128 /*
1129 * We've scanned the bus and so we know all about what's on
1130 * the other side of any bridges that may be on this bus plus
1131 * any devices.
1132 *
1133 * Return how far we've got finding sub-buses.
1134 */
1135 pr_debug("PCI: Bus scan for %04x:%02x returning with max=%02x\n",
1136 pci_domain_nr(bus), bus->number, max);
1137 return max;
1138}
1139
Yinghai Lu30a18d62008-02-19 03:21:20 -08001140void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
1141{
1142}
1143
Sam Ravnborg96bde062007-03-26 21:53:30 -08001144struct pci_bus * pci_create_bus(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001145 int bus, struct pci_ops *ops, void *sysdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146{
1147 int error;
1148 struct pci_bus *b;
1149 struct device *dev;
1150
1151 b = pci_alloc_bus();
1152 if (!b)
1153 return NULL;
1154
1155 dev = kmalloc(sizeof(*dev), GFP_KERNEL);
1156 if (!dev){
1157 kfree(b);
1158 return NULL;
1159 }
1160
1161 b->sysdata = sysdata;
1162 b->ops = ops;
1163
1164 if (pci_find_bus(pci_domain_nr(b), bus)) {
1165 /* If we already got to this bus through a different bridge, ignore it */
1166 pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
1167 goto err_out;
1168 }
Zhang Yanmind71374d2006-06-02 12:35:43 +08001169
1170 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001171 list_add_tail(&b->node, &pci_root_buses);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001172 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001173
1174 memset(dev, 0, sizeof(*dev));
1175 dev->parent = parent;
1176 dev->release = pci_release_bus_bridge_dev;
1177 sprintf(dev->bus_id, "pci%04x:%02x", pci_domain_nr(b), bus);
1178 error = device_register(dev);
1179 if (error)
1180 goto dev_reg_err;
1181 b->bridge = get_device(dev);
1182
Yinghai Lu0d358f22008-02-19 03:20:41 -08001183 if (!parent)
1184 set_dev_node(b->bridge, pcibus_to_node(b));
1185
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001186 b->dev.class = &pcibus_class;
1187 b->dev.parent = b->bridge;
1188 sprintf(b->dev.bus_id, "%04x:%02x", pci_domain_nr(b), bus);
1189 error = device_register(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001190 if (error)
1191 goto class_dev_reg_err;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001192 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193 if (error)
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001194 goto dev_create_file_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001195
1196 /* Create legacy_io and legacy_mem files for this bus */
1197 pci_create_legacy_files(b);
1198
Linus Torvalds1da177e2005-04-16 15:20:36 -07001199 b->number = b->secondary = bus;
1200 b->resource[0] = &ioport_resource;
1201 b->resource[1] = &iomem_resource;
1202
Yinghai Lu30a18d62008-02-19 03:21:20 -08001203 set_pci_bus_resources_arch_default(b);
1204
Linus Torvalds1da177e2005-04-16 15:20:36 -07001205 return b;
1206
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001207dev_create_file_err:
1208 device_unregister(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001209class_dev_reg_err:
1210 device_unregister(dev);
1211dev_reg_err:
Zhang Yanmind71374d2006-06-02 12:35:43 +08001212 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213 list_del(&b->node);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001214 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215err_out:
1216 kfree(dev);
1217 kfree(b);
1218 return NULL;
1219}
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001220
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001221struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001222 int bus, struct pci_ops *ops, void *sysdata)
1223{
1224 struct pci_bus *b;
1225
1226 b = pci_create_bus(parent, bus, ops, sysdata);
1227 if (b)
1228 b->subordinate = pci_scan_child_bus(b);
1229 return b;
1230}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231EXPORT_SYMBOL(pci_scan_bus_parented);
1232
1233#ifdef CONFIG_HOTPLUG
1234EXPORT_SYMBOL(pci_add_new_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001235EXPORT_SYMBOL(pci_scan_slot);
1236EXPORT_SYMBOL(pci_scan_bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001237EXPORT_SYMBOL_GPL(pci_scan_child_bus);
1238#endif
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001239
1240static int __init pci_sort_bf_cmp(const struct pci_dev *a, const struct pci_dev *b)
1241{
1242 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1;
1243 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1;
1244
1245 if (a->bus->number < b->bus->number) return -1;
1246 else if (a->bus->number > b->bus->number) return 1;
1247
1248 if (a->devfn < b->devfn) return -1;
1249 else if (a->devfn > b->devfn) return 1;
1250
1251 return 0;
1252}
1253
1254/*
1255 * Yes, this forcably breaks the klist abstraction temporarily. It
1256 * just wants to sort the klist, not change reference counts and
1257 * take/drop locks rapidly in the process. It does all this while
1258 * holding the lock for the list, so objects can't otherwise be
1259 * added/removed while we're swizzling.
1260 */
1261static void __init pci_insertion_sort_klist(struct pci_dev *a, struct list_head *list)
1262{
1263 struct list_head *pos;
1264 struct klist_node *n;
1265 struct device *dev;
1266 struct pci_dev *b;
1267
1268 list_for_each(pos, list) {
1269 n = container_of(pos, struct klist_node, n_node);
1270 dev = container_of(n, struct device, knode_bus);
1271 b = to_pci_dev(dev);
1272 if (pci_sort_bf_cmp(a, b) <= 0) {
1273 list_move_tail(&a->dev.knode_bus.n_node, &b->dev.knode_bus.n_node);
1274 return;
1275 }
1276 }
1277 list_move_tail(&a->dev.knode_bus.n_node, list);
1278}
1279
Greg Kroah-Hartman5ff580c2008-02-14 14:56:56 -08001280void __init pci_sort_breadthfirst(void)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001281{
1282 LIST_HEAD(sorted_devices);
1283 struct list_head *pos, *tmp;
1284 struct klist_node *n;
1285 struct device *dev;
1286 struct pci_dev *pdev;
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001287 struct klist *device_klist;
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001288
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001289 device_klist = bus_get_device_klist(&pci_bus_type);
1290
1291 spin_lock(&device_klist->k_lock);
1292 list_for_each_safe(pos, tmp, &device_klist->k_list) {
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001293 n = container_of(pos, struct klist_node, n_node);
1294 dev = container_of(n, struct device, knode_bus);
1295 pdev = to_pci_dev(dev);
1296 pci_insertion_sort_klist(pdev, &sorted_devices);
1297 }
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001298 list_splice(&sorted_devices, &device_klist->k_list);
1299 spin_unlock(&device_klist->k_lock);
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001300}