Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/highmem.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/dma-mapping.h> |
| 18 | #include <linux/slab.h> |
| 19 | #include <linux/scatterlist.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/blkdev.h> |
| 22 | |
| 23 | #include <linux/mmc/mmc.h> |
| 24 | #include <linux/mmc/host.h> |
| 25 | #include <linux/mmc/card.h> |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 26 | #include <linux/pm_runtime.h> |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 27 | #include <linux/workqueue.h> |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 28 | |
| 29 | #include "cmdq_hci.h" |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 30 | #include "sdhci.h" |
| 31 | #include "sdhci-msm.h" |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 32 | |
| 33 | #define DCMD_SLOT 31 |
| 34 | #define NUM_SLOTS 32 |
| 35 | |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 36 | /* 1 sec */ |
| 37 | #define HALT_TIMEOUT_MS 1000 |
| 38 | |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 39 | static int cmdq_halt_poll(struct mmc_host *mmc); |
| 40 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 41 | #ifdef CONFIG_PM_RUNTIME |
| 42 | static int cmdq_runtime_pm_get(struct cmdq_host *host) |
| 43 | { |
| 44 | return pm_runtime_get_sync(host->mmc->parent); |
| 45 | } |
| 46 | static int cmdq_runtime_pm_put(struct cmdq_host *host) |
| 47 | { |
| 48 | pm_runtime_mark_last_busy(host->mmc->parent); |
| 49 | return pm_runtime_put_autosuspend(host->mmc->parent); |
| 50 | } |
| 51 | #else |
| 52 | static inline int cmdq_runtime_pm_get(struct cmdq_host *host) |
| 53 | { |
| 54 | return 0; |
| 55 | } |
| 56 | static inline int cmdq_runtime_pm_put(struct cmdq_host *host) |
| 57 | { |
| 58 | return 0; |
| 59 | } |
| 60 | #endif |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 61 | static inline struct mmc_request *get_req_by_tag(struct cmdq_host *cq_host, |
| 62 | unsigned int tag) |
| 63 | { |
| 64 | return cq_host->mrq_slot[tag]; |
| 65 | } |
| 66 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 67 | static inline u8 *get_desc(struct cmdq_host *cq_host, u8 tag) |
| 68 | { |
| 69 | return cq_host->desc_base + (tag * cq_host->slot_sz); |
| 70 | } |
| 71 | |
| 72 | static inline u8 *get_link_desc(struct cmdq_host *cq_host, u8 tag) |
| 73 | { |
| 74 | u8 *desc = get_desc(cq_host, tag); |
| 75 | |
| 76 | return desc + cq_host->task_desc_len; |
| 77 | } |
| 78 | |
| 79 | static inline dma_addr_t get_trans_desc_dma(struct cmdq_host *cq_host, u8 tag) |
| 80 | { |
| 81 | return cq_host->trans_desc_dma_base + |
| 82 | (cq_host->mmc->max_segs * tag * |
| 83 | cq_host->trans_desc_len); |
| 84 | } |
| 85 | |
| 86 | static inline u8 *get_trans_desc(struct cmdq_host *cq_host, u8 tag) |
| 87 | { |
| 88 | return cq_host->trans_desc_base + |
| 89 | (cq_host->trans_desc_len * cq_host->mmc->max_segs * tag); |
| 90 | } |
| 91 | |
| 92 | static void setup_trans_desc(struct cmdq_host *cq_host, u8 tag) |
| 93 | { |
| 94 | u8 *link_temp; |
| 95 | dma_addr_t trans_temp; |
| 96 | |
| 97 | link_temp = get_link_desc(cq_host, tag); |
| 98 | trans_temp = get_trans_desc_dma(cq_host, tag); |
| 99 | |
| 100 | memset(link_temp, 0, cq_host->link_desc_len); |
| 101 | if (cq_host->link_desc_len > 8) |
| 102 | *(link_temp + 8) = 0; |
| 103 | |
| 104 | if (tag == DCMD_SLOT) { |
| 105 | *link_temp = VALID(0) | ACT(0) | END(1); |
| 106 | return; |
| 107 | } |
| 108 | |
| 109 | *link_temp = VALID(1) | ACT(0x6) | END(0); |
| 110 | |
| 111 | if (cq_host->dma64) { |
| 112 | __le64 *data_addr = (__le64 __force *)(link_temp + 4); |
| 113 | data_addr[0] = cpu_to_le64(trans_temp); |
| 114 | } else { |
| 115 | __le32 *data_addr = (__le32 __force *)(link_temp + 4); |
| 116 | data_addr[0] = cpu_to_le32(trans_temp); |
| 117 | } |
| 118 | } |
| 119 | |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 120 | static void cmdq_set_halt_irq(struct cmdq_host *cq_host, bool enable) |
| 121 | { |
| 122 | u32 ier; |
| 123 | |
| 124 | ier = cmdq_readl(cq_host, CQISTE); |
| 125 | if (enable) { |
| 126 | cmdq_writel(cq_host, ier | HALT, CQISTE); |
| 127 | cmdq_writel(cq_host, ier | HALT, CQISGE); |
| 128 | } else { |
| 129 | cmdq_writel(cq_host, ier & ~HALT, CQISTE); |
| 130 | cmdq_writel(cq_host, ier & ~HALT, CQISGE); |
| 131 | } |
| 132 | } |
| 133 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 134 | static void cmdq_clear_set_irqs(struct cmdq_host *cq_host, u32 clear, u32 set) |
| 135 | { |
| 136 | u32 ier; |
| 137 | |
| 138 | ier = cmdq_readl(cq_host, CQISTE); |
| 139 | ier &= ~clear; |
| 140 | ier |= set; |
| 141 | cmdq_writel(cq_host, ier, CQISTE); |
| 142 | cmdq_writel(cq_host, ier, CQISGE); |
| 143 | /* ensure the writes are done */ |
| 144 | mb(); |
| 145 | } |
| 146 | |
| 147 | |
| 148 | #define DRV_NAME "cmdq-host" |
| 149 | |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 150 | static void cmdq_dump_task_history(struct cmdq_host *cq_host) |
| 151 | { |
| 152 | int i; |
| 153 | |
| 154 | if (likely(!cq_host->mmc->cmdq_thist_enabled)) |
| 155 | return; |
| 156 | |
| 157 | if (!cq_host->thist) { |
| 158 | pr_err("%s: %s: CMDQ task history buffer not allocated\n", |
| 159 | mmc_hostname(cq_host->mmc), __func__); |
| 160 | return; |
| 161 | } |
| 162 | |
| 163 | pr_err("---- Circular Task History ----\n"); |
| 164 | pr_err(DRV_NAME ": Last entry index: %d", cq_host->thist_idx - 1); |
| 165 | |
| 166 | for (i = 0; i < cq_host->num_slots; i++) { |
| 167 | pr_err(DRV_NAME ": [%02d]%s Task: 0x%08x | Args: 0x%08x\n", i, |
| 168 | (cq_host->thist[i].is_dcmd) ? "DCMD" : "DATA", |
| 169 | lower_32_bits(cq_host->thist[i].task), |
| 170 | upper_32_bits(cq_host->thist[i].task)); |
| 171 | } |
| 172 | pr_err("-------------------------\n"); |
| 173 | } |
| 174 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 175 | static void cmdq_dumpregs(struct cmdq_host *cq_host) |
| 176 | { |
| 177 | struct mmc_host *mmc = cq_host->mmc; |
| 178 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 179 | pr_err(DRV_NAME ": ========== REGISTER DUMP (%s)==========\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 180 | mmc_hostname(mmc)); |
| 181 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 182 | pr_err(DRV_NAME ": Caps: 0x%08x | Version: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 183 | cmdq_readl(cq_host, CQCAP), |
| 184 | cmdq_readl(cq_host, CQVER)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 185 | pr_err(DRV_NAME ": Queing config: 0x%08x | Queue Ctrl: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 186 | cmdq_readl(cq_host, CQCFG), |
| 187 | cmdq_readl(cq_host, CQCTL)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 188 | pr_err(DRV_NAME ": Int stat: 0x%08x | Int enab: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 189 | cmdq_readl(cq_host, CQIS), |
| 190 | cmdq_readl(cq_host, CQISTE)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 191 | pr_err(DRV_NAME ": Int sig: 0x%08x | Int Coal: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 192 | cmdq_readl(cq_host, CQISGE), |
| 193 | cmdq_readl(cq_host, CQIC)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 194 | pr_err(DRV_NAME ": TDL base: 0x%08x | TDL up32: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 195 | cmdq_readl(cq_host, CQTDLBA), |
| 196 | cmdq_readl(cq_host, CQTDLBAU)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 197 | pr_err(DRV_NAME ": Doorbell: 0x%08x | Comp Notif: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 198 | cmdq_readl(cq_host, CQTDBR), |
| 199 | cmdq_readl(cq_host, CQTCN)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 200 | pr_err(DRV_NAME ": Dev queue: 0x%08x | Dev Pend: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 201 | cmdq_readl(cq_host, CQDQS), |
| 202 | cmdq_readl(cq_host, CQDPT)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 203 | pr_err(DRV_NAME ": Task clr: 0x%08x | Send stat 1: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 204 | cmdq_readl(cq_host, CQTCLR), |
| 205 | cmdq_readl(cq_host, CQSSC1)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 206 | pr_err(DRV_NAME ": Send stat 2: 0x%08x | DCMD resp: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 207 | cmdq_readl(cq_host, CQSSC2), |
| 208 | cmdq_readl(cq_host, CQCRDCT)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 209 | pr_err(DRV_NAME ": Resp err mask: 0x%08x | Task err: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 210 | cmdq_readl(cq_host, CQRMEM), |
| 211 | cmdq_readl(cq_host, CQTERRI)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 212 | pr_err(DRV_NAME ": Resp idx 0x%08x | Resp arg: 0x%08x\n", |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 213 | cmdq_readl(cq_host, CQCRI), |
| 214 | cmdq_readl(cq_host, CQCRA)); |
Asutosh Das | c0ed9c4 | 2015-05-29 15:39:37 +0530 | [diff] [blame] | 215 | pr_err(DRV_NAME": Vendor cfg 0x%08x\n", |
| 216 | cmdq_readl(cq_host, CQ_VENDOR_CFG)); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 217 | pr_err(DRV_NAME ": ===========================================\n"); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 218 | |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 219 | cmdq_dump_task_history(cq_host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 220 | if (cq_host->ops->dump_vendor_regs) |
| 221 | cq_host->ops->dump_vendor_regs(mmc); |
| 222 | } |
| 223 | |
| 224 | /** |
| 225 | * The allocated descriptor table for task, link & transfer descritors |
| 226 | * looks like: |
| 227 | * |----------| |
| 228 | * |task desc | |->|----------| |
| 229 | * |----------| | |trans desc| |
| 230 | * |link desc-|->| |----------| |
| 231 | * |----------| . |
| 232 | * . . |
| 233 | * no. of slots max-segs |
| 234 | * . |----------| |
| 235 | * |----------| |
| 236 | * The idea here is to create the [task+trans] table and mark & point the |
| 237 | * link desc to the transfer desc table on a per slot basis. |
| 238 | */ |
| 239 | static int cmdq_host_alloc_tdl(struct cmdq_host *cq_host) |
| 240 | { |
| 241 | |
| 242 | size_t desc_size; |
| 243 | size_t data_size; |
| 244 | int i = 0; |
| 245 | |
| 246 | /* task descriptor can be 64/128 bit irrespective of arch */ |
| 247 | if (cq_host->caps & CMDQ_TASK_DESC_SZ_128) { |
| 248 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQCFG) | |
| 249 | CQ_TASK_DESC_SZ, CQCFG); |
| 250 | cq_host->task_desc_len = 16; |
| 251 | } else { |
| 252 | cq_host->task_desc_len = 8; |
| 253 | } |
| 254 | |
| 255 | /* |
| 256 | * 96 bits length of transfer desc instead of 128 bits which means |
| 257 | * ADMA would expect next valid descriptor at the 96th bit |
| 258 | * or 128th bit |
| 259 | */ |
| 260 | if (cq_host->dma64) { |
| 261 | if (cq_host->quirks & CMDQ_QUIRK_SHORT_TXFR_DESC_SZ) |
| 262 | cq_host->trans_desc_len = 12; |
| 263 | else |
| 264 | cq_host->trans_desc_len = 16; |
| 265 | cq_host->link_desc_len = 16; |
| 266 | } else { |
| 267 | cq_host->trans_desc_len = 8; |
| 268 | cq_host->link_desc_len = 8; |
| 269 | } |
| 270 | |
| 271 | /* total size of a slot: 1 task & 1 transfer (link) */ |
| 272 | cq_host->slot_sz = cq_host->task_desc_len + cq_host->link_desc_len; |
| 273 | |
| 274 | desc_size = cq_host->slot_sz * cq_host->num_slots; |
| 275 | |
| 276 | data_size = cq_host->trans_desc_len * cq_host->mmc->max_segs * |
| 277 | (cq_host->num_slots - 1); |
| 278 | |
| 279 | pr_info("%s: desc_size: %d data_sz: %d slot-sz: %d\n", __func__, |
| 280 | (int)desc_size, (int)data_size, cq_host->slot_sz); |
| 281 | |
| 282 | /* |
| 283 | * allocate a dma-mapped chunk of memory for the descriptors |
| 284 | * allocate a dma-mapped chunk of memory for link descriptors |
| 285 | * setup each link-desc memory offset per slot-number to |
| 286 | * the descriptor table. |
| 287 | */ |
| 288 | cq_host->desc_base = dmam_alloc_coherent(mmc_dev(cq_host->mmc), |
| 289 | desc_size, |
| 290 | &cq_host->desc_dma_base, |
| 291 | GFP_KERNEL); |
| 292 | cq_host->trans_desc_base = dmam_alloc_coherent(mmc_dev(cq_host->mmc), |
| 293 | data_size, |
| 294 | &cq_host->trans_desc_dma_base, |
| 295 | GFP_KERNEL); |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 296 | cq_host->thist = devm_kzalloc(mmc_dev(cq_host->mmc), |
| 297 | (sizeof(*cq_host->thist) * |
| 298 | cq_host->num_slots), |
| 299 | GFP_KERNEL); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 300 | if (!cq_host->desc_base || !cq_host->trans_desc_base) |
| 301 | return -ENOMEM; |
| 302 | |
| 303 | pr_info("desc-base: 0x%p trans-base: 0x%p\n desc_dma 0x%llx trans_dma: 0x%llx\n", |
| 304 | cq_host->desc_base, cq_host->trans_desc_base, |
| 305 | (unsigned long long)cq_host->desc_dma_base, |
| 306 | (unsigned long long) cq_host->trans_desc_dma_base); |
| 307 | |
| 308 | for (; i < (cq_host->num_slots); i++) |
| 309 | setup_trans_desc(cq_host, i); |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | static int cmdq_enable(struct mmc_host *mmc) |
| 315 | { |
| 316 | int err = 0; |
| 317 | u32 cqcfg; |
| 318 | bool dcmd_enable; |
| 319 | struct cmdq_host *cq_host = mmc_cmdq_private(mmc); |
| 320 | |
| 321 | if (!cq_host || !mmc->card || !mmc_card_cmdq(mmc->card)) { |
| 322 | err = -EINVAL; |
| 323 | goto out; |
| 324 | } |
| 325 | |
| 326 | if (cq_host->enabled) |
| 327 | goto out; |
| 328 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 329 | cmdq_runtime_pm_get(cq_host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 330 | cqcfg = cmdq_readl(cq_host, CQCFG); |
| 331 | if (cqcfg & 0x1) { |
| 332 | pr_info("%s: %s: cq_host is already enabled\n", |
| 333 | mmc_hostname(mmc), __func__); |
| 334 | WARN_ON(1); |
Venkat Gopalakrishnan | 632b13b | 2015-08-24 14:36:59 -0700 | [diff] [blame] | 335 | goto pm_ref_count; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | if (cq_host->quirks & CMDQ_QUIRK_NO_DCMD) |
| 339 | dcmd_enable = false; |
| 340 | else |
| 341 | dcmd_enable = true; |
| 342 | |
| 343 | cqcfg = ((cq_host->caps & CMDQ_TASK_DESC_SZ_128 ? CQ_TASK_DESC_SZ : 0) | |
| 344 | (dcmd_enable ? CQ_DCMD : 0)); |
| 345 | |
| 346 | cmdq_writel(cq_host, cqcfg, CQCFG); |
| 347 | /* enable CQ_HOST */ |
| 348 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQCFG) | CQ_ENABLE, |
| 349 | CQCFG); |
| 350 | |
| 351 | if (!cq_host->desc_base || |
| 352 | !cq_host->trans_desc_base) { |
| 353 | err = cmdq_host_alloc_tdl(cq_host); |
| 354 | if (err) |
Venkat Gopalakrishnan | 632b13b | 2015-08-24 14:36:59 -0700 | [diff] [blame] | 355 | goto pm_ref_count; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 356 | } |
| 357 | |
Konstantin Dorfman | 14c902d | 2015-06-11 11:33:23 +0300 | [diff] [blame] | 358 | cmdq_writel(cq_host, lower_32_bits(cq_host->desc_dma_base), CQTDLBA); |
| 359 | cmdq_writel(cq_host, upper_32_bits(cq_host->desc_dma_base), CQTDLBAU); |
| 360 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 361 | /* |
| 362 | * disable all vendor interrupts |
| 363 | * enable CMDQ interrupts |
| 364 | * enable the vendor error interrupts |
| 365 | */ |
| 366 | if (cq_host->ops->clear_set_irqs) |
| 367 | cq_host->ops->clear_set_irqs(mmc, true); |
| 368 | |
| 369 | cmdq_clear_set_irqs(cq_host, 0x0, CQ_INT_ALL); |
| 370 | |
| 371 | /* cq_host would use this rca to address the card */ |
| 372 | cmdq_writel(cq_host, mmc->card->rca, CQSSC2); |
| 373 | |
| 374 | /* send QSR at lesser intervals than the default */ |
Asutosh Das | 5b81f13 | 2015-10-06 09:53:33 +0530 | [diff] [blame] | 375 | cmdq_writel(cq_host, SEND_QSR_INTERVAL, CQSSC1); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 376 | |
Dov Levenglick | 2b67830 | 2015-07-01 14:24:20 +0300 | [diff] [blame] | 377 | /* enable bkops exception indication */ |
Dov Levenglick | aea348b | 2015-07-20 11:59:52 +0300 | [diff] [blame] | 378 | if (mmc_card_configured_manual_bkops(mmc->card) && |
| 379 | !mmc_card_configured_auto_bkops(mmc->card)) |
Dov Levenglick | 2b67830 | 2015-07-01 14:24:20 +0300 | [diff] [blame] | 380 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQRMEM) | CQ_EXCEPTION, |
| 381 | CQRMEM); |
| 382 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 383 | /* ensure the writes are done before enabling CQE */ |
| 384 | mb(); |
| 385 | |
| 386 | cq_host->enabled = true; |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 387 | mmc_host_clr_cq_disable(mmc); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 388 | |
| 389 | if (cq_host->ops->set_block_size) |
| 390 | cq_host->ops->set_block_size(cq_host->mmc); |
| 391 | |
| 392 | if (cq_host->ops->set_data_timeout) |
| 393 | cq_host->ops->set_data_timeout(mmc, 0xf); |
| 394 | |
| 395 | if (cq_host->ops->clear_set_dumpregs) |
| 396 | cq_host->ops->clear_set_dumpregs(mmc, 1); |
| 397 | |
Ritesh Harjani | 6b2ea57 | 2015-07-15 13:23:05 +0530 | [diff] [blame] | 398 | if (cq_host->ops->enhanced_strobe_mask) |
| 399 | cq_host->ops->enhanced_strobe_mask(mmc, true); |
Venkat Gopalakrishnan | 632b13b | 2015-08-24 14:36:59 -0700 | [diff] [blame] | 400 | |
| 401 | pm_ref_count: |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 402 | cmdq_runtime_pm_put(cq_host); |
Venkat Gopalakrishnan | 632b13b | 2015-08-24 14:36:59 -0700 | [diff] [blame] | 403 | out: |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 404 | return err; |
| 405 | } |
| 406 | |
| 407 | static void cmdq_disable(struct mmc_host *mmc, bool soft) |
| 408 | { |
| 409 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
| 410 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 411 | cmdq_runtime_pm_get(cq_host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 412 | if (soft) { |
| 413 | cmdq_writel(cq_host, cmdq_readl( |
| 414 | cq_host, CQCFG) & ~(CQ_ENABLE), |
| 415 | CQCFG); |
| 416 | } |
Ritesh Harjani | 6b2ea57 | 2015-07-15 13:23:05 +0530 | [diff] [blame] | 417 | if (cq_host->ops->enhanced_strobe_mask) |
| 418 | cq_host->ops->enhanced_strobe_mask(mmc, false); |
| 419 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 420 | cmdq_runtime_pm_put(cq_host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 421 | cq_host->enabled = false; |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 422 | mmc_host_set_cq_disable(mmc); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 423 | } |
| 424 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 425 | static void cmdq_reset(struct mmc_host *mmc, bool soft) |
| 426 | { |
| 427 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
| 428 | unsigned int cqcfg; |
| 429 | unsigned int tdlba; |
| 430 | unsigned int tdlbau; |
| 431 | unsigned int rca; |
| 432 | int ret; |
| 433 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 434 | cmdq_runtime_pm_get(cq_host); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 435 | cqcfg = cmdq_readl(cq_host, CQCFG); |
| 436 | tdlba = cmdq_readl(cq_host, CQTDLBA); |
| 437 | tdlbau = cmdq_readl(cq_host, CQTDLBAU); |
| 438 | rca = cmdq_readl(cq_host, CQSSC2); |
| 439 | |
| 440 | cmdq_disable(mmc, true); |
| 441 | |
| 442 | if (cq_host->ops->reset) { |
| 443 | ret = cq_host->ops->reset(mmc); |
| 444 | if (ret) { |
| 445 | pr_crit("%s: reset CMDQ controller: failed\n", |
| 446 | mmc_hostname(mmc)); |
| 447 | BUG(); |
| 448 | } |
| 449 | } |
| 450 | |
| 451 | cmdq_writel(cq_host, tdlba, CQTDLBA); |
| 452 | cmdq_writel(cq_host, tdlbau, CQTDLBAU); |
| 453 | |
| 454 | if (cq_host->ops->clear_set_irqs) |
| 455 | cq_host->ops->clear_set_irqs(mmc, true); |
| 456 | |
| 457 | cmdq_clear_set_irqs(cq_host, 0x0, CQ_INT_ALL); |
| 458 | |
| 459 | /* cq_host would use this rca to address the card */ |
| 460 | cmdq_writel(cq_host, rca, CQSSC2); |
| 461 | |
| 462 | /* ensure the writes are done before enabling CQE */ |
| 463 | mb(); |
| 464 | |
| 465 | cmdq_writel(cq_host, cqcfg, CQCFG); |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 466 | cmdq_runtime_pm_put(cq_host); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 467 | cq_host->enabled = true; |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 468 | mmc_host_clr_cq_disable(mmc); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 469 | } |
| 470 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 471 | static void cmdq_prep_task_desc(struct mmc_request *mrq, |
| 472 | u64 *data, bool intr, bool qbr) |
| 473 | { |
| 474 | struct mmc_cmdq_req *cmdq_req = mrq->cmdq_req; |
| 475 | u32 req_flags = cmdq_req->cmdq_req_flags; |
| 476 | |
| 477 | pr_debug("%s: %s: data-tag: 0x%08x - dir: %d - prio: %d - cnt: 0x%08x - addr: 0x%llx\n", |
| 478 | mmc_hostname(mrq->host), __func__, |
| 479 | !!(req_flags & DAT_TAG), !!(req_flags & DIR), |
| 480 | !!(req_flags & PRIO), cmdq_req->data.blocks, |
| 481 | (u64)mrq->cmdq_req->blk_addr); |
| 482 | |
| 483 | *data = VALID(1) | |
| 484 | END(1) | |
| 485 | INT(intr) | |
| 486 | ACT(0x5) | |
| 487 | FORCED_PROG(!!(req_flags & FORCED_PRG)) | |
| 488 | CONTEXT(mrq->cmdq_req->ctx_id) | |
| 489 | DATA_TAG(!!(req_flags & DAT_TAG)) | |
| 490 | DATA_DIR(!!(req_flags & DIR)) | |
| 491 | PRIORITY(!!(req_flags & PRIO)) | |
| 492 | QBAR(qbr) | |
| 493 | REL_WRITE(!!(req_flags & REL_WR)) | |
| 494 | BLK_COUNT(mrq->cmdq_req->data.blocks) | |
| 495 | BLK_ADDR((u64)mrq->cmdq_req->blk_addr); |
| 496 | } |
| 497 | |
| 498 | static int cmdq_dma_map(struct mmc_host *host, struct mmc_request *mrq) |
| 499 | { |
| 500 | int sg_count; |
| 501 | struct mmc_data *data = mrq->data; |
| 502 | |
| 503 | if (!data) |
| 504 | return -EINVAL; |
| 505 | |
| 506 | sg_count = dma_map_sg(mmc_dev(host), data->sg, |
| 507 | data->sg_len, |
| 508 | (data->flags & MMC_DATA_WRITE) ? |
| 509 | DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 510 | if (!sg_count) { |
| 511 | pr_err("%s: sg-len: %d\n", __func__, data->sg_len); |
| 512 | return -ENOMEM; |
| 513 | } |
| 514 | |
| 515 | return sg_count; |
| 516 | } |
| 517 | |
Sahitya Tummala | 78a68e5 | 2015-09-30 15:55:41 +0530 | [diff] [blame] | 518 | static void cmdq_set_tran_desc(u8 *desc, dma_addr_t addr, int len, |
| 519 | bool end, bool is_dma64) |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 520 | { |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 521 | __le32 *attr = (__le32 __force *)desc; |
| 522 | |
| 523 | *attr = (VALID(1) | |
| 524 | END(end ? 1 : 0) | |
| 525 | INT(0) | |
| 526 | ACT(0x4) | |
| 527 | DAT_LENGTH(len)); |
| 528 | |
Sahitya Tummala | 78a68e5 | 2015-09-30 15:55:41 +0530 | [diff] [blame] | 529 | if (is_dma64) { |
| 530 | __le64 *dataddr = (__le64 __force *)(desc + 4); |
| 531 | |
| 532 | dataddr[0] = cpu_to_le64(addr); |
| 533 | } else { |
| 534 | __le32 *dataddr = (__le32 __force *)(desc + 4); |
| 535 | |
| 536 | dataddr[0] = cpu_to_le32(addr); |
| 537 | } |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 538 | } |
| 539 | |
| 540 | static int cmdq_prep_tran_desc(struct mmc_request *mrq, |
| 541 | struct cmdq_host *cq_host, int tag) |
| 542 | { |
| 543 | struct mmc_data *data = mrq->data; |
| 544 | int i, sg_count, len; |
| 545 | bool end = false; |
| 546 | dma_addr_t addr; |
| 547 | u8 *desc; |
| 548 | struct scatterlist *sg; |
| 549 | |
| 550 | sg_count = cmdq_dma_map(mrq->host, mrq); |
| 551 | if (sg_count < 0) { |
| 552 | pr_err("%s: %s: unable to map sg lists, %d\n", |
| 553 | mmc_hostname(mrq->host), __func__, sg_count); |
| 554 | return sg_count; |
| 555 | } |
| 556 | |
| 557 | desc = get_trans_desc(cq_host, tag); |
| 558 | memset(desc, 0, cq_host->trans_desc_len * cq_host->mmc->max_segs); |
| 559 | |
| 560 | for_each_sg(data->sg, sg, sg_count, i) { |
| 561 | addr = sg_dma_address(sg); |
| 562 | len = sg_dma_len(sg); |
| 563 | |
| 564 | if ((i+1) == sg_count) |
| 565 | end = true; |
Sahitya Tummala | 78a68e5 | 2015-09-30 15:55:41 +0530 | [diff] [blame] | 566 | cmdq_set_tran_desc(desc, addr, len, end, cq_host->dma64); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 567 | desc += cq_host->trans_desc_len; |
| 568 | } |
| 569 | |
| 570 | pr_debug("%s: req: 0x%p tag: %d calc_trans_des: 0x%p sg-cnt: %d\n", |
| 571 | __func__, mrq->req, tag, desc, sg_count); |
| 572 | |
| 573 | return 0; |
| 574 | } |
| 575 | |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 576 | static void cmdq_log_task_desc_history(struct cmdq_host *cq_host, u64 task, |
| 577 | bool is_dcmd) |
| 578 | { |
| 579 | if (likely(!cq_host->mmc->cmdq_thist_enabled)) |
| 580 | return; |
| 581 | |
| 582 | if (!cq_host->thist) { |
| 583 | pr_err("%s: %s: CMDQ task history buffer not allocated\n", |
| 584 | mmc_hostname(cq_host->mmc), __func__); |
| 585 | return; |
| 586 | } |
| 587 | |
| 588 | if (cq_host->thist_idx >= cq_host->num_slots) |
| 589 | cq_host->thist_idx = 0; |
| 590 | |
| 591 | cq_host->thist[cq_host->thist_idx].is_dcmd = is_dcmd; |
| 592 | memcpy(&cq_host->thist[cq_host->thist_idx++].task, |
| 593 | &task, cq_host->task_desc_len); |
| 594 | } |
| 595 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 596 | static void cmdq_prep_dcmd_desc(struct mmc_host *mmc, |
| 597 | struct mmc_request *mrq) |
| 598 | { |
| 599 | u64 *task_desc = NULL; |
| 600 | u64 data = 0; |
| 601 | u8 resp_type; |
| 602 | u8 *desc; |
| 603 | __le64 *dataddr; |
| 604 | struct cmdq_host *cq_host = mmc_cmdq_private(mmc); |
| 605 | u8 timing; |
| 606 | |
| 607 | if (!(mrq->cmd->flags & MMC_RSP_PRESENT)) { |
| 608 | resp_type = 0x0; |
| 609 | timing = 0x1; |
| 610 | } else { |
Sahitya Tummala | 72bd840 | 2015-05-29 13:27:38 +0530 | [diff] [blame] | 611 | if (mrq->cmd->flags & MMC_RSP_BUSY) { |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 612 | resp_type = 0x3; |
| 613 | timing = 0x0; |
| 614 | } else { |
| 615 | resp_type = 0x2; |
| 616 | timing = 0x1; |
| 617 | } |
| 618 | } |
| 619 | |
| 620 | task_desc = (__le64 __force *)get_desc(cq_host, cq_host->dcmd_slot); |
| 621 | memset(task_desc, 0, cq_host->task_desc_len); |
| 622 | data |= (VALID(1) | |
| 623 | END(1) | |
| 624 | INT(1) | |
| 625 | QBAR(1) | |
| 626 | ACT(0x5) | |
| 627 | CMD_INDEX(mrq->cmd->opcode) | |
| 628 | CMD_TIMING(timing) | RESP_TYPE(resp_type)); |
| 629 | *task_desc |= data; |
| 630 | desc = (u8 *)task_desc; |
| 631 | pr_debug("cmdq: dcmd: cmd: %d timing: %d resp: %d\n", |
| 632 | mrq->cmd->opcode, timing, resp_type); |
| 633 | dataddr = (__le64 __force *)(desc + 4); |
| 634 | dataddr[0] = cpu_to_le64((u64)mrq->cmd->arg); |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 635 | cmdq_log_task_desc_history(cq_host, *task_desc, true); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 636 | } |
| 637 | |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 638 | static void cmdq_pm_qos_vote(struct sdhci_host *host, struct mmc_request *mrq) |
| 639 | { |
| 640 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 641 | struct sdhci_msm_host *msm_host = pltfm_host->priv; |
| 642 | |
| 643 | sdhci_msm_pm_qos_cpu_vote(host, |
| 644 | msm_host->pdata->pm_qos_data.cmdq_latency, mrq->req->cpu); |
| 645 | } |
| 646 | |
| 647 | static void cmdq_pm_qos_unvote(struct sdhci_host *host, struct mmc_request *mrq) |
| 648 | { |
| 649 | /* use async as we're inside an atomic context (soft-irq) */ |
| 650 | sdhci_msm_pm_qos_cpu_unvote(host, mrq->req->cpu, true); |
| 651 | } |
| 652 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 653 | static int cmdq_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 654 | { |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 655 | int err = 0; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 656 | u64 data = 0; |
| 657 | u64 *task_desc = NULL; |
| 658 | u32 tag = mrq->cmdq_req->tag; |
| 659 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 660 | struct sdhci_host *host = mmc_priv(mmc); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 661 | |
| 662 | if (!cq_host->enabled) { |
| 663 | pr_err("%s: CMDQ host not enabled yet !!!\n", |
| 664 | mmc_hostname(mmc)); |
| 665 | err = -EINVAL; |
| 666 | goto out; |
| 667 | } |
| 668 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 669 | cmdq_runtime_pm_get(cq_host); |
| 670 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 671 | if (mrq->cmdq_req->cmdq_req_flags & DCMD) { |
| 672 | cmdq_prep_dcmd_desc(mmc, mrq); |
| 673 | cq_host->mrq_slot[DCMD_SLOT] = mrq; |
Venkat Gopalakrishnan | f1329ce | 2015-08-10 14:55:23 -0700 | [diff] [blame] | 674 | /* DCMD's are always issued on a fixed slot */ |
| 675 | tag = DCMD_SLOT; |
| 676 | goto ring_doorbell; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 677 | } |
| 678 | |
| 679 | task_desc = (__le64 __force *)get_desc(cq_host, tag); |
| 680 | |
| 681 | cmdq_prep_task_desc(mrq, &data, 1, |
| 682 | (mrq->cmdq_req->cmdq_req_flags & QBR)); |
| 683 | *task_desc = cpu_to_le64(data); |
Venkat Gopalakrishnan | e77c64d | 2015-09-28 18:53:18 -0700 | [diff] [blame] | 684 | cmdq_log_task_desc_history(cq_host, *task_desc, false); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 685 | |
| 686 | err = cmdq_prep_tran_desc(mrq, cq_host, tag); |
| 687 | if (err) { |
| 688 | pr_err("%s: %s: failed to setup tx desc: %d\n", |
| 689 | mmc_hostname(mmc), __func__, err); |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 690 | goto out; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 691 | } |
| 692 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 693 | cq_host->mrq_slot[tag] = mrq; |
| 694 | if (cq_host->ops->set_tranfer_params) |
| 695 | cq_host->ops->set_tranfer_params(mmc); |
| 696 | |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 697 | /* PM QoS */ |
| 698 | sdhci_msm_pm_qos_irq_vote(host); |
| 699 | cmdq_pm_qos_vote(host, mrq); |
Venkat Gopalakrishnan | f1329ce | 2015-08-10 14:55:23 -0700 | [diff] [blame] | 700 | ring_doorbell: |
| 701 | /* Ensure the task descriptor list is flushed before ringing doorbell */ |
| 702 | wmb(); |
Venkat Gopalakrishnan | 7d53e83 | 2015-10-01 14:34:10 -0700 | [diff] [blame] | 703 | if (cmdq_readl(cq_host, CQTDBR) & (1 << tag)) { |
| 704 | cmdq_dumpregs(cq_host); |
| 705 | BUG_ON(1); |
| 706 | } |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 707 | cmdq_writel(cq_host, 1 << tag, CQTDBR); |
Venkat Gopalakrishnan | f1329ce | 2015-08-10 14:55:23 -0700 | [diff] [blame] | 708 | /* Commit the doorbell write immediately */ |
| 709 | wmb(); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 710 | |
| 711 | out: |
| 712 | return err; |
| 713 | } |
| 714 | |
| 715 | static void cmdq_finish_data(struct mmc_host *mmc, unsigned int tag) |
| 716 | { |
| 717 | struct mmc_request *mrq; |
| 718 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
| 719 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 720 | mrq = get_req_by_tag(cq_host, tag); |
Sahitya Tummala | 9549d56 | 2015-05-29 15:41:18 +0530 | [diff] [blame] | 721 | if (tag == cq_host->dcmd_slot) |
| 722 | mrq->cmd->resp[0] = cmdq_readl(cq_host, CQCRDCT); |
| 723 | |
Asutosh Das | c0ed9c4 | 2015-05-29 15:39:37 +0530 | [diff] [blame] | 724 | if (mrq->cmdq_req->cmdq_req_flags & DCMD) |
| 725 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQ_VENDOR_CFG) | |
Sahitya Tummala | b9ed561 | 2015-10-05 16:20:10 +0530 | [diff] [blame] | 726 | CMDQ_SEND_STATUS_TRIGGER, CQ_VENDOR_CFG); |
Konstantin Dorfman | 27af9a9 | 2015-08-02 17:06:18 +0300 | [diff] [blame] | 727 | |
| 728 | cmdq_runtime_pm_put(cq_host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 729 | mrq->done(mrq); |
| 730 | } |
| 731 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 732 | irqreturn_t cmdq_irq(struct mmc_host *mmc, int err) |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 733 | { |
| 734 | u32 status; |
| 735 | unsigned long tag = 0, comp_status; |
| 736 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 737 | unsigned long err_info = 0; |
| 738 | struct mmc_request *mrq; |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 739 | int ret; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 740 | |
| 741 | status = cmdq_readl(cq_host, CQIS); |
| 742 | cmdq_writel(cq_host, status, CQIS); |
| 743 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 744 | if (!status && !err) |
| 745 | return IRQ_NONE; |
| 746 | |
| 747 | if (err || (status & CQIS_RED)) { |
| 748 | err_info = cmdq_readl(cq_host, CQTERRI); |
| 749 | pr_err("%s: err: %d status: 0x%08x task-err-info (0x%08lx)\n", |
| 750 | mmc_hostname(mmc), err, status, err_info); |
| 751 | |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 752 | /* |
| 753 | * Need to halt CQE in case of error in interrupt context itself |
| 754 | * otherwise CQE may proceed with sending CMD to device even if |
| 755 | * CQE/card is in error state. |
| 756 | * CMDQ error handling will make sure that it is unhalted after |
| 757 | * handling all the errors. |
| 758 | */ |
| 759 | ret = cmdq_halt_poll(mmc); |
| 760 | if (ret) |
| 761 | pr_err("%s: %s: halt failed ret=%d\n", |
| 762 | mmc_hostname(mmc), __func__, ret); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 763 | cmdq_dumpregs(cq_host); |
| 764 | |
| 765 | if (err_info & CQ_RMEFV) { |
| 766 | tag = GET_CMD_ERR_TAG(err_info); |
| 767 | pr_err("%s: CMD err tag: %lu\n", __func__, tag); |
| 768 | |
| 769 | mrq = get_req_by_tag(cq_host, tag); |
| 770 | /* CMD44/45/46/47 will not have a valid cmd */ |
| 771 | if (mrq->cmd) |
| 772 | mrq->cmd->error = err; |
| 773 | else |
| 774 | mrq->data->error = err; |
| 775 | } else { |
| 776 | tag = GET_DAT_ERR_TAG(err_info); |
| 777 | pr_err("%s: Dat err tag: %lu\n", __func__, tag); |
| 778 | mrq = get_req_by_tag(cq_host, tag); |
| 779 | mrq->data->error = err; |
| 780 | } |
| 781 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 782 | /* |
| 783 | * CQE detected a response error from device |
| 784 | * In most cases, this would require a reset. |
| 785 | */ |
| 786 | if (status & CQIS_RED) { |
Dov Levenglick | 2b67830 | 2015-07-01 14:24:20 +0300 | [diff] [blame] | 787 | /* |
| 788 | * will check if the RED error is due to a bkops |
| 789 | * exception once the queue is empty |
| 790 | */ |
| 791 | BUG_ON(!mmc->card); |
| 792 | if (mmc_card_configured_manual_bkops(mmc->card) && |
| 793 | !mmc_card_configured_auto_bkops(mmc->card)) |
| 794 | mmc->card->bkops.needs_check = true; |
| 795 | |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 796 | mrq->cmdq_req->resp_err = true; |
| 797 | pr_err("%s: Response error (0x%08x) from card !!!", |
Dov Levenglick | 2b67830 | 2015-07-01 14:24:20 +0300 | [diff] [blame] | 798 | mmc_hostname(mmc), status); |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 799 | } else { |
| 800 | mrq->cmdq_req->resp_idx = cmdq_readl(cq_host, CQCRI); |
| 801 | mrq->cmdq_req->resp_arg = cmdq_readl(cq_host, CQCRA); |
| 802 | } |
| 803 | |
| 804 | mmc->err_mrq = mrq; |
| 805 | cmdq_finish_data(mmc, tag); |
| 806 | } |
| 807 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 808 | if (status & CQIS_TCC) { |
Konstantin Dorfman | af1713c | 2015-10-06 13:25:45 +0300 | [diff] [blame] | 809 | /* read CQTCN and complete the request */ |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 810 | comp_status = cmdq_readl(cq_host, CQTCN); |
| 811 | if (!comp_status) |
| 812 | goto out; |
Konstantin Dorfman | af1713c | 2015-10-06 13:25:45 +0300 | [diff] [blame] | 813 | /* |
| 814 | * The CQTCN must be cleared before notifying req completion |
| 815 | * to upper layers to avoid missing completion notification |
| 816 | * of new requests with the same tag. |
| 817 | */ |
| 818 | cmdq_writel(cq_host, comp_status, CQTCN); |
| 819 | /* |
| 820 | * A write memory barrier is necessary to guarantee that CQTCN |
| 821 | * gets cleared first before next doorbell for the same tag is |
| 822 | * set but that is already achieved by the barrier present |
| 823 | * before setting doorbell, hence one is not needed here. |
| 824 | */ |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 825 | for_each_set_bit(tag, &comp_status, cq_host->num_slots) { |
| 826 | /* complete the corresponding mrq */ |
| 827 | pr_debug("%s: completing tag -> %lu\n", |
| 828 | mmc_hostname(mmc), tag); |
| 829 | cmdq_finish_data(mmc, tag); |
| 830 | } |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 831 | } |
| 832 | |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 833 | if (status & CQIS_HAC) { |
Konstantin Dorfman | fa32107 | 2015-05-31 10:10:13 +0300 | [diff] [blame] | 834 | if (cq_host->ops->post_cqe_halt) |
| 835 | cq_host->ops->post_cqe_halt(mmc); |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 836 | /* halt is completed, wakeup waiting thread */ |
| 837 | complete(&cq_host->halt_comp); |
| 838 | } |
| 839 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 840 | out: |
| 841 | return IRQ_HANDLED; |
| 842 | } |
| 843 | EXPORT_SYMBOL(cmdq_irq); |
| 844 | |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 845 | /* cmdq_halt_poll - Halting CQE using polling method. |
| 846 | * @mmc: struct mmc_host |
| 847 | * This is used mainly from interrupt context to halt |
| 848 | * CQE engine. |
| 849 | */ |
| 850 | static int cmdq_halt_poll(struct mmc_host *mmc) |
| 851 | { |
| 852 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
| 853 | int retries = 100; |
| 854 | |
| 855 | cmdq_set_halt_irq(cq_host, false); |
| 856 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQCTL) | HALT, CQCTL); |
| 857 | while (retries) { |
| 858 | if (!(cmdq_readl(cq_host, CQCTL) & HALT)) { |
| 859 | udelay(5); |
| 860 | retries--; |
| 861 | continue; |
| 862 | } else { |
| 863 | if (cq_host->ops->post_cqe_halt) |
| 864 | cq_host->ops->post_cqe_halt(mmc); |
| 865 | /* halt done: re-enable legacy interrupts */ |
| 866 | if (cq_host->ops->clear_set_irqs) |
| 867 | cq_host->ops->clear_set_irqs(mmc, |
| 868 | false); |
| 869 | mmc_host_set_halt(mmc); |
| 870 | break; |
| 871 | } |
| 872 | } |
| 873 | cmdq_set_halt_irq(cq_host, true); |
| 874 | return retries ? 0 : -ETIMEDOUT; |
| 875 | } |
| 876 | |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 877 | /* May sleep */ |
| 878 | static int cmdq_halt(struct mmc_host *mmc, bool halt) |
| 879 | { |
| 880 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 881 | u32 ret = 0; |
Ritesh Harjani | 442c60a | 2015-09-15 19:21:32 +0530 | [diff] [blame] | 882 | int retries = 3; |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 883 | |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 884 | cmdq_runtime_pm_get(cq_host); |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 885 | if (halt) { |
Ritesh Harjani | 442c60a | 2015-09-15 19:21:32 +0530 | [diff] [blame] | 886 | while (retries) { |
| 887 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQCTL) | HALT, |
| 888 | CQCTL); |
| 889 | ret = wait_for_completion_timeout(&cq_host->halt_comp, |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 890 | msecs_to_jiffies(HALT_TIMEOUT_MS)); |
Ritesh Harjani | 442c60a | 2015-09-15 19:21:32 +0530 | [diff] [blame] | 891 | if (!ret && !(cmdq_readl(cq_host, CQCTL) & HALT)) { |
| 892 | retries--; |
| 893 | continue; |
| 894 | } else { |
| 895 | /* halt done: re-enable legacy interrupts */ |
| 896 | if (cq_host->ops->clear_set_irqs) |
| 897 | cq_host->ops->clear_set_irqs(mmc, |
| 898 | false); |
| 899 | break; |
| 900 | } |
| 901 | } |
Subhash Jadavani | 6a718e1 | 2015-10-19 17:25:22 -0700 | [diff] [blame] | 902 | ret = retries ? 0 : -ETIMEDOUT; |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 903 | } else { |
Asutosh Das | 3f730d1 | 2015-07-08 11:41:35 +0530 | [diff] [blame] | 904 | if (cq_host->ops->set_data_timeout) |
| 905 | cq_host->ops->set_data_timeout(mmc, 0xf); |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 906 | if (cq_host->ops->clear_set_irqs) |
| 907 | cq_host->ops->clear_set_irqs(mmc, true); |
| 908 | cmdq_writel(cq_host, cmdq_readl(cq_host, CQCTL) & ~HALT, |
| 909 | CQCTL); |
| 910 | } |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 911 | cmdq_runtime_pm_put(cq_host); |
| 912 | return ret; |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 913 | } |
| 914 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 915 | static void cmdq_post_req(struct mmc_host *host, struct mmc_request *mrq, |
| 916 | int err) |
| 917 | { |
| 918 | struct mmc_data *data = mrq->data; |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 919 | struct sdhci_host *sdhci_host = mmc_priv(host); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 920 | |
| 921 | if (data) { |
| 922 | data->error = err; |
| 923 | dma_unmap_sg(mmc_dev(host), data->sg, data->sg_len, |
| 924 | (data->flags & MMC_DATA_READ) ? |
| 925 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
| 926 | if (err) |
| 927 | data->bytes_xfered = 0; |
| 928 | else |
| 929 | data->bytes_xfered = blk_rq_bytes(mrq->req); |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 930 | |
| 931 | /* we're in atomic context (soft-irq) so unvote async. */ |
| 932 | sdhci_msm_pm_qos_irq_unvote(sdhci_host, true); |
| 933 | cmdq_pm_qos_unvote(sdhci_host, mrq); |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 934 | } |
| 935 | } |
| 936 | |
Asutosh Das | fa8836b | 2015-03-02 23:14:05 +0530 | [diff] [blame] | 937 | static void cmdq_dumpstate(struct mmc_host *mmc) |
| 938 | { |
| 939 | struct cmdq_host *cq_host = (struct cmdq_host *)mmc_cmdq_private(mmc); |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 940 | cmdq_runtime_pm_get(cq_host); |
Asutosh Das | fa8836b | 2015-03-02 23:14:05 +0530 | [diff] [blame] | 941 | cmdq_dumpregs(cq_host); |
Konstantin Dorfman | 4d40cf2 | 2015-06-11 11:41:53 +0300 | [diff] [blame] | 942 | cmdq_runtime_pm_put(cq_host); |
Asutosh Das | fa8836b | 2015-03-02 23:14:05 +0530 | [diff] [blame] | 943 | } |
| 944 | |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 945 | static int cmdq_late_init(struct mmc_host *mmc) |
| 946 | { |
| 947 | struct sdhci_host *host = mmc_priv(mmc); |
| 948 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 949 | struct sdhci_msm_host *msm_host = pltfm_host->priv; |
| 950 | |
| 951 | /* |
| 952 | * TODO: This should basically move to something like "sdhci-cmdq-msm" |
| 953 | * for msm specific implementation. |
| 954 | */ |
| 955 | sdhci_msm_pm_qos_irq_init(host); |
| 956 | |
| 957 | if (msm_host->pdata->pm_qos_data.cmdq_valid) |
| 958 | sdhci_msm_pm_qos_cpu_init(host, |
| 959 | msm_host->pdata->pm_qos_data.cmdq_latency); |
| 960 | return 0; |
| 961 | } |
| 962 | |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 963 | static const struct mmc_cmdq_host_ops cmdq_host_ops = { |
Gilad Broner | 4444599 | 2015-09-29 16:05:39 +0300 | [diff] [blame] | 964 | .init = cmdq_late_init, |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 965 | .enable = cmdq_enable, |
| 966 | .disable = cmdq_disable, |
| 967 | .request = cmdq_request, |
| 968 | .post_req = cmdq_post_req, |
Asutosh Das | aa1e1c7 | 2015-05-21 17:22:10 +0530 | [diff] [blame] | 969 | .halt = cmdq_halt, |
Asutosh Das | 02e3086 | 2015-05-20 16:52:04 +0530 | [diff] [blame] | 970 | .reset = cmdq_reset, |
Asutosh Das | fa8836b | 2015-03-02 23:14:05 +0530 | [diff] [blame] | 971 | .dumpstate = cmdq_dumpstate, |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 972 | }; |
| 973 | |
| 974 | struct cmdq_host *cmdq_pltfm_init(struct platform_device *pdev) |
| 975 | { |
| 976 | struct cmdq_host *cq_host; |
| 977 | struct resource *cmdq_memres = NULL; |
| 978 | |
| 979 | /* check and setup CMDQ interface */ |
| 980 | cmdq_memres = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 981 | "cmdq_mem"); |
| 982 | if (!cmdq_memres) { |
| 983 | dev_dbg(&pdev->dev, "CMDQ not supported\n"); |
| 984 | return ERR_PTR(-EINVAL); |
| 985 | } |
| 986 | |
| 987 | cq_host = kzalloc(sizeof(*cq_host), GFP_KERNEL); |
| 988 | if (!cq_host) { |
| 989 | dev_err(&pdev->dev, "failed to allocate memory for CMDQ\n"); |
| 990 | return ERR_PTR(-ENOMEM); |
| 991 | } |
| 992 | cq_host->mmio = devm_ioremap(&pdev->dev, |
| 993 | cmdq_memres->start, |
| 994 | resource_size(cmdq_memres)); |
| 995 | if (!cq_host->mmio) { |
| 996 | dev_err(&pdev->dev, "failed to remap cmdq regs\n"); |
| 997 | kfree(cq_host); |
| 998 | return ERR_PTR(-EBUSY); |
| 999 | } |
| 1000 | dev_dbg(&pdev->dev, "CMDQ ioremap: done\n"); |
| 1001 | |
| 1002 | return cq_host; |
| 1003 | } |
| 1004 | EXPORT_SYMBOL(cmdq_pltfm_init); |
| 1005 | |
| 1006 | int cmdq_init(struct cmdq_host *cq_host, struct mmc_host *mmc, |
| 1007 | bool dma64) |
| 1008 | { |
| 1009 | int err = 0; |
| 1010 | |
| 1011 | cq_host->dma64 = dma64; |
| 1012 | cq_host->mmc = mmc; |
| 1013 | cq_host->mmc->cmdq_private = cq_host; |
| 1014 | |
| 1015 | cq_host->num_slots = NUM_SLOTS; |
| 1016 | cq_host->dcmd_slot = DCMD_SLOT; |
| 1017 | |
| 1018 | mmc->cmdq_ops = &cmdq_host_ops; |
Ritesh Harjani | b0280c2 | 2015-10-27 11:51:25 +0530 | [diff] [blame^] | 1019 | mmc->num_cq_slots = NUM_SLOTS; |
| 1020 | mmc->dcmd_cq_slot = DCMD_SLOT; |
Venkat Gopalakrishnan | 0225ff9 | 2015-05-29 17:25:46 -0700 | [diff] [blame] | 1021 | |
| 1022 | cq_host->mrq_slot = kzalloc(sizeof(cq_host->mrq_slot) * |
| 1023 | cq_host->num_slots, GFP_KERNEL); |
| 1024 | if (!cq_host->mrq_slot) |
| 1025 | return -ENOMEM; |
| 1026 | |
| 1027 | init_completion(&cq_host->halt_comp); |
| 1028 | return err; |
| 1029 | } |
| 1030 | EXPORT_SYMBOL(cmdq_init); |