Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/pci/setup-bus.c |
| 3 | * |
| 4 | * Extruded from code written by |
| 5 | * Dave Rusling (david.rusling@reo.mts.dec.com) |
| 6 | * David Mosberger (davidm@cs.arizona.edu) |
| 7 | * David Miller (davem@redhat.com) |
| 8 | * |
| 9 | * Support routines for initializing a PCI subsystem. |
| 10 | */ |
| 11 | |
| 12 | /* |
| 13 | * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| 14 | * PCI-PCI bridges cleanup, sorted resource allocation. |
| 15 | * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| 16 | * Converted to allocation in 3 passes, which gives |
| 17 | * tighter packing. Prefetchable range support. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/pci.h> |
| 24 | #include <linux/errno.h> |
| 25 | #include <linux/ioport.h> |
| 26 | #include <linux/cache.h> |
| 27 | #include <linux/slab.h> |
Chris Wright | 6faf17f | 2009-08-28 13:00:06 -0700 | [diff] [blame] | 28 | #include "pci.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 30 | struct pci_dev_resource { |
| 31 | struct list_head list; |
Yinghai Lu | 2934a0d | 2012-01-21 02:08:26 -0800 | [diff] [blame] | 32 | struct resource *res; |
| 33 | struct pci_dev *dev; |
| 34 | }; |
| 35 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 36 | struct pci_dev_resource_x { |
| 37 | struct list_head list; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 38 | struct resource *res; |
| 39 | struct pci_dev *dev; |
| 40 | resource_size_t start; |
| 41 | resource_size_t end; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 42 | resource_size_t add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 43 | resource_size_t min_align; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 44 | unsigned long flags; |
| 45 | }; |
| 46 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 47 | #define free_list(type, head) do { \ |
| 48 | struct type *dev_res, *tmp; \ |
| 49 | list_for_each_entry_safe(dev_res, tmp, head, list) { \ |
| 50 | list_del(&dev_res->list); \ |
| 51 | kfree(dev_res); \ |
| 52 | } \ |
Ram Pai | 094732a | 2011-02-14 17:43:18 -0800 | [diff] [blame] | 53 | } while (0) |
| 54 | |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 55 | int pci_realloc_enable = 0; |
| 56 | #define pci_realloc_enabled() pci_realloc_enable |
| 57 | void pci_realloc(void) |
| 58 | { |
| 59 | pci_realloc_enable = 1; |
| 60 | } |
| 61 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 62 | /** |
| 63 | * add_to_list() - add a new resource tracker to the list |
| 64 | * @head: Head of the list |
| 65 | * @dev: device corresponding to which the resource |
| 66 | * belongs |
| 67 | * @res: The resource to be tracked |
| 68 | * @add_size: additional size to be optionally added |
| 69 | * to the resource |
| 70 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 71 | static int add_to_list(struct list_head *head, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 72 | struct pci_dev *dev, struct resource *res, |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 73 | resource_size_t add_size, resource_size_t min_align) |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 74 | { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 75 | struct pci_dev_resource_x *tmp; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 76 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 77 | tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 78 | if (!tmp) { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 79 | pr_warning("add_to_list: kmalloc() failed!\n"); |
Yinghai Lu | ef62dfe | 2012-01-21 02:08:18 -0800 | [diff] [blame] | 80 | return -ENOMEM; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 81 | } |
| 82 | |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 83 | tmp->res = res; |
| 84 | tmp->dev = dev; |
| 85 | tmp->start = res->start; |
| 86 | tmp->end = res->end; |
| 87 | tmp->flags = res->flags; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 88 | tmp->add_size = add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 89 | tmp->min_align = min_align; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 90 | |
| 91 | list_add(&tmp->list, head); |
Yinghai Lu | ef62dfe | 2012-01-21 02:08:18 -0800 | [diff] [blame] | 92 | |
| 93 | return 0; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 94 | } |
| 95 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 96 | static void add_to_failed_list(struct list_head *head, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 97 | struct pci_dev *dev, struct resource *res) |
| 98 | { |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 99 | add_to_list(head, dev, res, |
| 100 | 0 /* dont care */, |
| 101 | 0 /* dont care */); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 102 | } |
| 103 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 104 | static void remove_from_list(struct list_head *realloc_head, |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 105 | struct resource *res) |
| 106 | { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 107 | struct pci_dev_resource_x *dev_res_x, *tmp; |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 108 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 109 | list_for_each_entry_safe(dev_res_x, tmp, realloc_head, list) { |
| 110 | if (dev_res_x->res == res) { |
| 111 | list_del(&dev_res_x->list); |
| 112 | kfree(dev_res_x); |
| 113 | break; |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 114 | } |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 115 | } |
| 116 | } |
| 117 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 118 | static resource_size_t get_res_add_size(struct list_head *realloc_head, |
Yinghai Lu | 1c37235 | 2012-01-21 02:08:19 -0800 | [diff] [blame] | 119 | struct resource *res) |
| 120 | { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 121 | struct pci_dev_resource_x *dev_res_x; |
Yinghai Lu | 1c37235 | 2012-01-21 02:08:19 -0800 | [diff] [blame] | 122 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 123 | list_for_each_entry(dev_res_x, realloc_head, list) { |
| 124 | if (dev_res_x->res == res) { |
| 125 | dev_printk(KERN_DEBUG, &dev_res_x->dev->dev, |
| 126 | "%pR get_res_add_size add_size %llx\n", |
| 127 | dev_res_x->res, |
| 128 | (unsigned long long)dev_res_x->add_size); |
| 129 | return dev_res_x->add_size; |
| 130 | } |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 131 | } |
Yinghai Lu | 1c37235 | 2012-01-21 02:08:19 -0800 | [diff] [blame] | 132 | |
| 133 | return 0; |
| 134 | } |
| 135 | |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 136 | /* Sort resources by alignment */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 137 | static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head) |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 138 | { |
| 139 | int i; |
| 140 | |
| 141 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 142 | struct resource *r; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 143 | struct pci_dev_resource *dev_res, *tmp; |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 144 | resource_size_t r_align; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 145 | struct list_head *n; |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 146 | |
| 147 | r = &dev->resource[i]; |
| 148 | |
| 149 | if (r->flags & IORESOURCE_PCI_FIXED) |
| 150 | continue; |
| 151 | |
| 152 | if (!(r->flags) || r->parent) |
| 153 | continue; |
| 154 | |
| 155 | r_align = pci_resource_alignment(dev, r); |
| 156 | if (!r_align) { |
| 157 | dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", |
| 158 | i, r); |
| 159 | continue; |
| 160 | } |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 161 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 162 | tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); |
| 163 | if (!tmp) |
| 164 | panic("pdev_sort_resources(): " |
| 165 | "kmalloc() failed!\n"); |
| 166 | tmp->res = r; |
| 167 | tmp->dev = dev; |
| 168 | |
| 169 | /* fallback is smallest one or list is empty*/ |
| 170 | n = head; |
| 171 | list_for_each_entry(dev_res, head, list) { |
| 172 | resource_size_t align; |
| 173 | |
| 174 | align = pci_resource_alignment(dev_res->dev, |
| 175 | dev_res->res); |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 176 | |
| 177 | if (r_align > align) { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 178 | n = &dev_res->list; |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 179 | break; |
| 180 | } |
| 181 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 182 | /* Insert it just before n*/ |
| 183 | list_add_tail(&tmp->list, n); |
Yinghai Lu | 78c3b32 | 2012-01-21 02:08:25 -0800 | [diff] [blame] | 184 | } |
| 185 | } |
| 186 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 187 | static void __dev_sort_resources(struct pci_dev *dev, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 188 | struct list_head *head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | { |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 190 | u16 class = dev->class >> 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 192 | /* Don't touch classless devices or host bridges or ioapics. */ |
| 193 | if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST) |
| 194 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 196 | /* Don't touch ioapic devices already enabled by firmware */ |
| 197 | if (class == PCI_CLASS_SYSTEM_PIC) { |
| 198 | u16 command; |
| 199 | pci_read_config_word(dev, PCI_COMMAND, &command); |
| 200 | if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) |
| 201 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | } |
| 203 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 204 | pdev_sort_resources(dev, head); |
| 205 | } |
| 206 | |
Ram Pai | fc075e1 | 2011-02-14 17:43:19 -0800 | [diff] [blame] | 207 | static inline void reset_resource(struct resource *res) |
| 208 | { |
| 209 | res->start = 0; |
| 210 | res->end = 0; |
| 211 | res->flags = 0; |
| 212 | } |
| 213 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 214 | /** |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 215 | * reassign_resources_sorted() - satisfy any additional resource requests |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 216 | * |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 217 | * @realloc_head : head of the list tracking requests requiring additional |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 218 | * resources |
| 219 | * @head : head of the list tracking requests with allocated |
| 220 | * resources |
| 221 | * |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 222 | * Walk through each element of the realloc_head and try to procure |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 223 | * additional resources for the element, provided the element |
| 224 | * is in the head list. |
| 225 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 226 | static void reassign_resources_sorted(struct list_head *realloc_head, |
| 227 | struct list_head *head) |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 228 | { |
| 229 | struct resource *res; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 230 | struct pci_dev_resource_x *dev_res_x, *tmp; |
| 231 | struct pci_dev_resource *dev_res; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 232 | resource_size_t add_size; |
| 233 | int idx; |
| 234 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 235 | list_for_each_entry_safe(dev_res_x, tmp, realloc_head, list) { |
| 236 | bool found_match = false; |
| 237 | |
| 238 | res = dev_res_x->res; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 239 | /* skip resource that has been reset */ |
| 240 | if (!res->flags) |
| 241 | goto out; |
| 242 | |
| 243 | /* skip this resource if not found in head list */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 244 | list_for_each_entry(dev_res, head, list) { |
| 245 | if (dev_res->res == res) { |
| 246 | found_match = true; |
| 247 | break; |
| 248 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 249 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 250 | if (!found_match)/* just skip */ |
| 251 | continue; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 252 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 253 | idx = res - &dev_res_x->dev->resource[0]; |
| 254 | add_size = dev_res_x->add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 255 | if (!resource_size(res)) { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 256 | res->start = dev_res_x->start; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 257 | res->end = res->start + add_size - 1; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 258 | if (pci_assign_resource(dev_res_x->dev, idx)) |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 259 | reset_resource(res); |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 260 | } else { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 261 | resource_size_t align = dev_res_x->min_align; |
| 262 | res->flags |= dev_res_x->flags & |
| 263 | (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN); |
| 264 | if (pci_reassign_resource(dev_res_x->dev, idx, |
| 265 | add_size, align)) |
| 266 | dev_printk(KERN_DEBUG, &dev_res_x->dev->dev, |
| 267 | "failed to add optional resources res=%pR\n", |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 268 | res); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 269 | } |
| 270 | out: |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 271 | list_del(&dev_res_x->list); |
| 272 | kfree(dev_res_x); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 273 | } |
| 274 | } |
| 275 | |
| 276 | /** |
| 277 | * assign_requested_resources_sorted() - satisfy resource requests |
| 278 | * |
| 279 | * @head : head of the list tracking requests for resources |
| 280 | * @failed_list : head of the list tracking requests that could |
| 281 | * not be allocated |
| 282 | * |
| 283 | * Satisfy resource requests of each element in the list. Add |
| 284 | * requests that could not satisfied to the failed_list. |
| 285 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 286 | static void assign_requested_resources_sorted(struct list_head *head, |
| 287 | struct list_head *fail_head) |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 288 | { |
| 289 | struct resource *res; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 290 | struct pci_dev_resource *dev_res; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 291 | int idx; |
| 292 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 293 | list_for_each_entry(dev_res, head, list) { |
| 294 | res = dev_res->res; |
| 295 | idx = res - &dev_res->dev->resource[0]; |
| 296 | if (resource_size(res) && |
| 297 | pci_assign_resource(dev_res->dev, idx)) { |
| 298 | if (fail_head && !pci_is_root_bus(dev_res->dev->bus)) { |
Yinghai Lu | 9a92866 | 2010-02-28 15:49:39 -0800 | [diff] [blame] | 299 | /* |
| 300 | * if the failed res is for ROM BAR, and it will |
| 301 | * be enabled later, don't add it to the list |
| 302 | */ |
| 303 | if (!((idx == PCI_ROM_RESOURCE) && |
| 304 | (!(res->flags & IORESOURCE_ROM_ENABLE)))) |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 305 | add_to_failed_list(fail_head, |
| 306 | dev_res->dev, res); |
Yinghai Lu | 9a92866 | 2010-02-28 15:49:39 -0800 | [diff] [blame] | 307 | } |
Ram Pai | fc075e1 | 2011-02-14 17:43:19 -0800 | [diff] [blame] | 308 | reset_resource(res); |
Rajesh Shah | 542df5d | 2005-04-28 00:25:50 -0700 | [diff] [blame] | 309 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | } |
| 311 | } |
| 312 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 313 | static void __assign_resources_sorted(struct list_head *head, |
| 314 | struct list_head *realloc_head, |
| 315 | struct list_head *fail_head) |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 316 | { |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 317 | /* |
| 318 | * Should not assign requested resources at first. |
| 319 | * they could be adjacent, so later reassign can not reallocate |
| 320 | * them one by one in parent resource window. |
| 321 | * Try to assign requested + add_size at begining |
| 322 | * if could do that, could get out early. |
| 323 | * if could not do that, we still try to assign requested at first, |
| 324 | * then try to reassign add_size for some resources. |
| 325 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 326 | LIST_HEAD(save_head); |
| 327 | LIST_HEAD(local_fail_head); |
| 328 | struct pci_dev_resource_x *dev_res_x; |
| 329 | struct pci_dev_resource *dev_res; |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 330 | |
| 331 | /* Check if optional add_size is there */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 332 | if (!realloc_head || list_empty(realloc_head)) |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 333 | goto requested_and_reassign; |
| 334 | |
| 335 | /* Save original start, end, flags etc at first */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 336 | list_for_each_entry(dev_res, head, list) { |
| 337 | if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) { |
| 338 | free_list(pci_dev_resource_x, &save_head); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 339 | goto requested_and_reassign; |
| 340 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 341 | } |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 342 | |
| 343 | /* Update res in head list with add_size in realloc_head list */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 344 | list_for_each_entry(dev_res, head, list) |
| 345 | dev_res->res->end += get_res_add_size(realloc_head, |
| 346 | dev_res->res); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 347 | |
| 348 | /* Try updated head list with add_size added */ |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 349 | assign_requested_resources_sorted(head, &local_fail_head); |
| 350 | |
| 351 | /* all assigned with add_size ? */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 352 | if (list_empty(&local_fail_head)) { |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 353 | /* Remove head list from realloc_head list */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 354 | list_for_each_entry(dev_res, head, list) |
| 355 | remove_from_list(realloc_head, dev_res->res); |
| 356 | free_list(pci_dev_resource_x, &save_head); |
| 357 | free_list(pci_dev_resource, head); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 358 | return; |
| 359 | } |
| 360 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 361 | free_list(pci_dev_resource_x, &local_fail_head); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 362 | /* Release assigned resource */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 363 | list_for_each_entry(dev_res, head, list) |
| 364 | if (dev_res->res->parent) |
| 365 | release_resource(dev_res->res); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 366 | /* Restore start/end/flags from saved list */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 367 | list_for_each_entry(dev_res_x, &save_head, list) { |
| 368 | struct resource *res = dev_res_x->res; |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 369 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 370 | res->start = dev_res_x->start; |
| 371 | res->end = dev_res_x->end; |
| 372 | res->flags = dev_res_x->flags; |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 373 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 374 | free_list(pci_dev_resource_x, &save_head); |
Yinghai Lu | 3e6e0d8 | 2012-01-21 02:08:20 -0800 | [diff] [blame] | 375 | |
| 376 | requested_and_reassign: |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 377 | /* Satisfy the must-have resource requests */ |
| 378 | assign_requested_resources_sorted(head, fail_head); |
| 379 | |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 380 | /* Try to satisfy any additional optional resource |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 381 | requests */ |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 382 | if (realloc_head) |
| 383 | reassign_resources_sorted(realloc_head, head); |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 384 | free_list(pci_dev_resource, head); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 385 | } |
| 386 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 387 | static void pdev_assign_resources_sorted(struct pci_dev *dev, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 388 | struct list_head *add_head, |
| 389 | struct list_head *fail_head) |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 390 | { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 391 | LIST_HEAD(head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 392 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 393 | __dev_sort_resources(dev, &head); |
Yinghai Lu | 8424d75 | 2012-01-21 02:08:21 -0800 | [diff] [blame] | 394 | __assign_resources_sorted(&head, add_head, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 395 | |
| 396 | } |
| 397 | |
| 398 | static void pbus_assign_resources_sorted(const struct pci_bus *bus, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 399 | struct list_head *realloc_head, |
| 400 | struct list_head *fail_head) |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 401 | { |
| 402 | struct pci_dev *dev; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 403 | LIST_HEAD(head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 404 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 405 | list_for_each_entry(dev, &bus->devices, bus_list) |
| 406 | __dev_sort_resources(dev, &head); |
| 407 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 408 | __assign_resources_sorted(&head, realloc_head, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 409 | } |
| 410 | |
Dominik Brodowski | b3743fa | 2005-09-09 13:03:23 -0700 | [diff] [blame] | 411 | void pci_setup_cardbus(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | { |
| 413 | struct pci_dev *bridge = bus->self; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 414 | struct resource *res; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | struct pci_bus_region region; |
| 416 | |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 417 | dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n", |
| 418 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 420 | res = bus->resource[0]; |
| 421 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 422 | if (res->flags & IORESOURCE_IO) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | /* |
| 424 | * The IO resource is allocated a range twice as large as it |
| 425 | * would normally need. This allows us to set both IO regs. |
| 426 | */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 427 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, |
| 429 | region.start); |
| 430 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, |
| 431 | region.end); |
| 432 | } |
| 433 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 434 | res = bus->resource[1]; |
| 435 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 436 | if (res->flags & IORESOURCE_IO) { |
| 437 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, |
| 439 | region.start); |
| 440 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, |
| 441 | region.end); |
| 442 | } |
| 443 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 444 | res = bus->resource[2]; |
| 445 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 446 | if (res->flags & IORESOURCE_MEM) { |
| 447 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, |
| 449 | region.start); |
| 450 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, |
| 451 | region.end); |
| 452 | } |
| 453 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 454 | res = bus->resource[3]; |
| 455 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 456 | if (res->flags & IORESOURCE_MEM) { |
| 457 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, |
| 459 | region.start); |
| 460 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, |
| 461 | region.end); |
| 462 | } |
| 463 | } |
Dominik Brodowski | b3743fa | 2005-09-09 13:03:23 -0700 | [diff] [blame] | 464 | EXPORT_SYMBOL(pci_setup_cardbus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | |
| 466 | /* Initialize bridges with base/limit values we have collected. |
| 467 | PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998) |
| 468 | requires that if there is no I/O ports or memory behind the |
| 469 | bridge, corresponding range must be turned off by writing base |
| 470 | value greater than limit to the bridge's base/limit registers. |
| 471 | |
| 472 | Note: care must be taken when updating I/O base/limit registers |
| 473 | of bridges which support 32-bit I/O. This update requires two |
| 474 | config space writes, so it's quite possible that an I/O window of |
| 475 | the bridge will have some undesirable address (e.g. 0) after the |
| 476 | first write. Ditto 64-bit prefetchable MMIO. */ |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 477 | static void pci_setup_bridge_io(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | { |
| 479 | struct pci_dev *bridge = bus->self; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 480 | struct resource *res; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | struct pci_bus_region region; |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 482 | u32 l, io_upper16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 483 | |
| 484 | /* Set up the top and bottom of the PCI I/O segment for this bus. */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 485 | res = bus->resource[0]; |
| 486 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 487 | if (res->flags & IORESOURCE_IO) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | pci_read_config_dword(bridge, PCI_IO_BASE, &l); |
| 489 | l &= 0xffff0000; |
| 490 | l |= (region.start >> 8) & 0x00f0; |
| 491 | l |= region.end & 0xf000; |
| 492 | /* Set up upper 16 bits of I/O base/limit. */ |
| 493 | io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 494 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 495 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | /* Clear upper 16 bits of I/O base/limit. */ |
| 497 | io_upper16 = 0; |
| 498 | l = 0x00f0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | } |
| 500 | /* Temporarily disable the I/O range before updating PCI_IO_BASE. */ |
| 501 | pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff); |
| 502 | /* Update lower 16 bits of I/O base/limit. */ |
| 503 | pci_write_config_dword(bridge, PCI_IO_BASE, l); |
| 504 | /* Update upper 16 bits of I/O base/limit. */ |
| 505 | pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 506 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 507 | |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 508 | static void pci_setup_bridge_mmio(struct pci_bus *bus) |
| 509 | { |
| 510 | struct pci_dev *bridge = bus->self; |
| 511 | struct resource *res; |
| 512 | struct pci_bus_region region; |
| 513 | u32 l; |
| 514 | |
| 515 | /* Set up the top and bottom of the PCI Memory segment for this bus. */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 516 | res = bus->resource[1]; |
| 517 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 518 | if (res->flags & IORESOURCE_MEM) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | l = (region.start >> 16) & 0xfff0; |
| 520 | l |= region.end & 0xfff00000; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 521 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 522 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | l = 0x0000fff0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | } |
| 525 | pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 526 | } |
| 527 | |
| 528 | static void pci_setup_bridge_mmio_pref(struct pci_bus *bus) |
| 529 | { |
| 530 | struct pci_dev *bridge = bus->self; |
| 531 | struct resource *res; |
| 532 | struct pci_bus_region region; |
| 533 | u32 l, bu, lu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | |
| 535 | /* Clear out the upper 32 bits of PREF limit. |
| 536 | If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily |
| 537 | disables PREF range, which is ok. */ |
| 538 | pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0); |
| 539 | |
| 540 | /* Set up PREF base/limit. */ |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 541 | bu = lu = 0; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 542 | res = bus->resource[2]; |
| 543 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 544 | if (res->flags & IORESOURCE_PREFETCH) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 545 | l = (region.start >> 16) & 0xfff0; |
| 546 | l |= region.end & 0xfff00000; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 547 | if (res->flags & IORESOURCE_MEM_64) { |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 548 | bu = upper_32_bits(region.start); |
| 549 | lu = upper_32_bits(region.end); |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 550 | } |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 551 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 552 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | l = 0x0000fff0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | } |
| 555 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); |
| 556 | |
Alex Williamson | 59353ea | 2009-11-30 14:51:44 -0700 | [diff] [blame] | 557 | /* Set the upper 32 bits of PREF base & limit. */ |
| 558 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu); |
| 559 | pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 560 | } |
| 561 | |
| 562 | static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type) |
| 563 | { |
| 564 | struct pci_dev *bridge = bus->self; |
| 565 | |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 566 | dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n", |
| 567 | bus->secondary, bus->subordinate); |
| 568 | |
| 569 | if (type & IORESOURCE_IO) |
| 570 | pci_setup_bridge_io(bus); |
| 571 | |
| 572 | if (type & IORESOURCE_MEM) |
| 573 | pci_setup_bridge_mmio(bus); |
| 574 | |
| 575 | if (type & IORESOURCE_PREFETCH) |
| 576 | pci_setup_bridge_mmio_pref(bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | |
| 578 | pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); |
| 579 | } |
| 580 | |
Benjamin Herrenschmidt | e244427 | 2011-09-11 14:08:38 -0300 | [diff] [blame] | 581 | void pci_setup_bridge(struct pci_bus *bus) |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 582 | { |
| 583 | unsigned long type = IORESOURCE_IO | IORESOURCE_MEM | |
| 584 | IORESOURCE_PREFETCH; |
| 585 | |
| 586 | __pci_setup_bridge(bus, type); |
| 587 | } |
| 588 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | /* Check whether the bridge supports optional I/O and |
| 590 | prefetchable memory ranges. If not, the respective |
| 591 | base/limit registers must be read-only and read as 0. */ |
Sam Ravnborg | 96bde06 | 2007-03-26 21:53:30 -0800 | [diff] [blame] | 592 | static void pci_bridge_check_ranges(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | { |
| 594 | u16 io; |
| 595 | u32 pmem; |
| 596 | struct pci_dev *bridge = bus->self; |
| 597 | struct resource *b_res; |
| 598 | |
| 599 | b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; |
| 600 | b_res[1].flags |= IORESOURCE_MEM; |
| 601 | |
| 602 | pci_read_config_word(bridge, PCI_IO_BASE, &io); |
| 603 | if (!io) { |
| 604 | pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); |
| 605 | pci_read_config_word(bridge, PCI_IO_BASE, &io); |
| 606 | pci_write_config_word(bridge, PCI_IO_BASE, 0x0); |
| 607 | } |
| 608 | if (io) |
| 609 | b_res[0].flags |= IORESOURCE_IO; |
| 610 | /* DECchip 21050 pass 2 errata: the bridge may miss an address |
| 611 | disconnect boundary by one PCI data phase. |
| 612 | Workaround: do not use prefetching on this device. */ |
| 613 | if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001) |
| 614 | return; |
| 615 | pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); |
| 616 | if (!pmem) { |
| 617 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, |
| 618 | 0xfff0fff0); |
| 619 | pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); |
| 620 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0); |
| 621 | } |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 622 | if (pmem) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Yinghai Lu | 9958610 | 2010-01-22 01:02:28 -0800 | [diff] [blame] | 624 | if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == |
| 625 | PCI_PREF_RANGE_TYPE_64) { |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 626 | b_res[2].flags |= IORESOURCE_MEM_64; |
Yinghai Lu | 9958610 | 2010-01-22 01:02:28 -0800 | [diff] [blame] | 627 | b_res[2].flags |= PCI_PREF_RANGE_TYPE_64; |
| 628 | } |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 629 | } |
| 630 | |
| 631 | /* double check if bridge does support 64 bit pref */ |
| 632 | if (b_res[2].flags & IORESOURCE_MEM_64) { |
| 633 | u32 mem_base_hi, tmp; |
| 634 | pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 635 | &mem_base_hi); |
| 636 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 637 | 0xffffffff); |
| 638 | pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp); |
| 639 | if (!tmp) |
| 640 | b_res[2].flags &= ~IORESOURCE_MEM_64; |
| 641 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 642 | mem_base_hi); |
| 643 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | } |
| 645 | |
| 646 | /* Helper function for sizing routines: find first available |
| 647 | bus resource of a given type. Note: we intentionally skip |
| 648 | the bus resources which have already been assigned (that is, |
| 649 | have non-NULL parent resource). */ |
Sam Ravnborg | 96bde06 | 2007-03-26 21:53:30 -0800 | [diff] [blame] | 650 | static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned long type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | { |
| 652 | int i; |
| 653 | struct resource *r; |
| 654 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 655 | IORESOURCE_PREFETCH; |
| 656 | |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 657 | pci_bus_for_each_resource(bus, r, i) { |
Ivan Kokshaysky | 299de03 | 2005-06-15 18:59:27 +0400 | [diff] [blame] | 658 | if (r == &ioport_resource || r == &iomem_resource) |
| 659 | continue; |
Jesse Barnes | 55a1098 | 2009-10-27 09:39:18 -0700 | [diff] [blame] | 660 | if (r && (r->flags & type_mask) == type && !r->parent) |
| 661 | return r; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | } |
| 663 | return NULL; |
| 664 | } |
| 665 | |
Ram Pai | 13583b1 | 2011-02-14 17:43:17 -0800 | [diff] [blame] | 666 | static resource_size_t calculate_iosize(resource_size_t size, |
| 667 | resource_size_t min_size, |
| 668 | resource_size_t size1, |
| 669 | resource_size_t old_size, |
| 670 | resource_size_t align) |
| 671 | { |
| 672 | if (size < min_size) |
| 673 | size = min_size; |
| 674 | if (old_size == 1 ) |
| 675 | old_size = 0; |
| 676 | /* To be fixed in 2.5: we should have sort of HAVE_ISA |
| 677 | flag in the struct pci_bus. */ |
| 678 | #if defined(CONFIG_ISA) || defined(CONFIG_EISA) |
| 679 | size = (size & 0xff) + ((size & ~0xffUL) << 2); |
| 680 | #endif |
| 681 | size = ALIGN(size + size1, align); |
| 682 | if (size < old_size) |
| 683 | size = old_size; |
| 684 | return size; |
| 685 | } |
| 686 | |
| 687 | static resource_size_t calculate_memsize(resource_size_t size, |
| 688 | resource_size_t min_size, |
| 689 | resource_size_t size1, |
| 690 | resource_size_t old_size, |
| 691 | resource_size_t align) |
| 692 | { |
| 693 | if (size < min_size) |
| 694 | size = min_size; |
| 695 | if (old_size == 1 ) |
| 696 | old_size = 0; |
| 697 | if (size < old_size) |
| 698 | size = old_size; |
| 699 | size = ALIGN(size + size1, align); |
| 700 | return size; |
| 701 | } |
| 702 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 703 | /** |
| 704 | * pbus_size_io() - size the io window of a given bus |
| 705 | * |
| 706 | * @bus : the bus |
| 707 | * @min_size : the minimum io window that must to be allocated |
| 708 | * @add_size : additional optional io window |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 709 | * @realloc_head : track the additional io window on this list |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 710 | * |
| 711 | * Sizing the IO windows of the PCI-PCI bridge is trivial, |
| 712 | * since these windows have 4K granularity and the IO ranges |
| 713 | * of non-bridge PCI devices are limited to 256 bytes. |
| 714 | * We must be careful with the ISA aliasing though. |
| 715 | */ |
| 716 | static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 717 | resource_size_t add_size, struct list_head *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | { |
| 719 | struct pci_dev *dev; |
| 720 | struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 721 | unsigned long size = 0, size0 = 0, size1 = 0; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 722 | resource_size_t children_add_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | |
| 724 | if (!b_res) |
| 725 | return; |
| 726 | |
| 727 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 728 | int i; |
| 729 | |
| 730 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 731 | struct resource *r = &dev->resource[i]; |
| 732 | unsigned long r_size; |
| 733 | |
| 734 | if (r->parent || !(r->flags & IORESOURCE_IO)) |
| 735 | continue; |
Zhao, Yu | 022edd8 | 2008-10-13 19:24:28 +0800 | [diff] [blame] | 736 | r_size = resource_size(r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | |
| 738 | if (r_size < 0x400) |
| 739 | /* Might be re-aligned for ISA */ |
| 740 | size += r_size; |
| 741 | else |
| 742 | size1 += r_size; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 743 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 744 | if (realloc_head) |
| 745 | children_add_size += get_res_add_size(realloc_head, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | } |
| 747 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 748 | size0 = calculate_iosize(size, min_size, size1, |
Ram Pai | 13583b1 | 2011-02-14 17:43:17 -0800 | [diff] [blame] | 749 | resource_size(b_res), 4096); |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 750 | if (children_add_size > add_size) |
| 751 | add_size = children_add_size; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 752 | size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 : |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 753 | calculate_iosize(size, min_size, add_size + size1, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 754 | resource_size(b_res), 4096); |
| 755 | if (!size0 && !size1) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 756 | if (b_res->start || b_res->end) |
| 757 | dev_info(&bus->self->dev, "disabling bridge window " |
| 758 | "%pR to [bus %02x-%02x] (unused)\n", b_res, |
| 759 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | b_res->flags = 0; |
| 761 | return; |
| 762 | } |
| 763 | /* Alignment of the IO window is always 4K */ |
| 764 | b_res->start = 4096; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 765 | b_res->end = b_res->start + size0 - 1; |
Ivan Kokshaysky | 8845256 | 2008-03-30 19:50:14 +0400 | [diff] [blame] | 766 | b_res->flags |= IORESOURCE_STARTALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 767 | if (size1 > size0 && realloc_head) |
| 768 | add_to_list(realloc_head, bus->self, b_res, size1-size0, 4096); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | } |
| 770 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 771 | /** |
| 772 | * pbus_size_mem() - size the memory window of a given bus |
| 773 | * |
| 774 | * @bus : the bus |
| 775 | * @min_size : the minimum memory window that must to be allocated |
| 776 | * @add_size : additional optional memory window |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 777 | * @realloc_head : track the additional memory window on this list |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 778 | * |
| 779 | * Calculate the size of the bus and minimal alignment which |
| 780 | * guarantees that all child resources fit in this size. |
| 781 | */ |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 782 | static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 783 | unsigned long type, resource_size_t min_size, |
| 784 | resource_size_t add_size, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 785 | struct list_head *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | { |
| 787 | struct pci_dev *dev; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 788 | resource_size_t min_align, align, size, size0, size1; |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 789 | resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 790 | int order, max_order; |
| 791 | struct resource *b_res = find_free_bus_resource(bus, type); |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 792 | unsigned int mem64_mask = 0; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 793 | resource_size_t children_add_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
| 795 | if (!b_res) |
| 796 | return 0; |
| 797 | |
| 798 | memset(aligns, 0, sizeof(aligns)); |
| 799 | max_order = 0; |
| 800 | size = 0; |
| 801 | |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 802 | mem64_mask = b_res->flags & IORESOURCE_MEM_64; |
| 803 | b_res->flags &= ~IORESOURCE_MEM_64; |
| 804 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 806 | int i; |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 807 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 809 | struct resource *r = &dev->resource[i]; |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 810 | resource_size_t r_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | |
| 812 | if (r->parent || (r->flags & mask) != type) |
| 813 | continue; |
Zhao, Yu | 022edd8 | 2008-10-13 19:24:28 +0800 | [diff] [blame] | 814 | r_size = resource_size(r); |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 815 | #ifdef CONFIG_PCI_IOV |
| 816 | /* put SRIOV requested res to the optional list */ |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 817 | if (realloc_head && i >= PCI_IOV_RESOURCES && |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 818 | i <= PCI_IOV_RESOURCE_END) { |
| 819 | r->end = r->start - 1; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 820 | add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */); |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 821 | children_add_size += r_size; |
| 822 | continue; |
| 823 | } |
| 824 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 825 | /* For bridges size != alignment */ |
Chris Wright | 6faf17f | 2009-08-28 13:00:06 -0700 | [diff] [blame] | 826 | align = pci_resource_alignment(dev, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | order = __ffs(align) - 20; |
| 828 | if (order > 11) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 829 | dev_warn(&dev->dev, "disabling BAR %d: %pR " |
| 830 | "(bad alignment %#llx)\n", i, r, |
| 831 | (unsigned long long) align); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | r->flags = 0; |
| 833 | continue; |
| 834 | } |
| 835 | size += r_size; |
| 836 | if (order < 0) |
| 837 | order = 0; |
| 838 | /* Exclude ranges with size > align from |
| 839 | calculation of the alignment. */ |
| 840 | if (r_size == align) |
| 841 | aligns[order] += align; |
| 842 | if (order > max_order) |
| 843 | max_order = order; |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 844 | mem64_mask &= r->flags & IORESOURCE_MEM_64; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 845 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 846 | if (realloc_head) |
| 847 | children_add_size += get_res_add_size(realloc_head, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | } |
| 849 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | align = 0; |
| 851 | min_align = 0; |
| 852 | for (order = 0; order <= max_order; order++) { |
Jeremy Fitzhardinge | 8308c54 | 2008-09-11 01:31:50 -0700 | [diff] [blame] | 853 | resource_size_t align1 = 1; |
| 854 | |
| 855 | align1 <<= (order + 20); |
| 856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | if (!align) |
| 858 | min_align = align1; |
Milind Arun Choudhary | 6f6f8c2 | 2007-07-09 11:55:51 -0700 | [diff] [blame] | 859 | else if (ALIGN(align + min_align, min_align) < align1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 860 | min_align = align1 >> 1; |
| 861 | align += aligns[order]; |
| 862 | } |
Linus Torvalds | b42282e | 2011-04-11 10:53:11 -0700 | [diff] [blame] | 863 | size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align); |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 864 | if (children_add_size > add_size) |
| 865 | add_size = children_add_size; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 866 | size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 : |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 867 | calculate_memsize(size, min_size, add_size, |
Linus Torvalds | b42282e | 2011-04-11 10:53:11 -0700 | [diff] [blame] | 868 | resource_size(b_res), min_align); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 869 | if (!size0 && !size1) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 870 | if (b_res->start || b_res->end) |
| 871 | dev_info(&bus->self->dev, "disabling bridge window " |
| 872 | "%pR to [bus %02x-%02x] (unused)\n", b_res, |
| 873 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | b_res->flags = 0; |
| 875 | return 1; |
| 876 | } |
| 877 | b_res->start = min_align; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 878 | b_res->end = size0 + min_align - 1; |
| 879 | b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 880 | if (size1 > size0 && realloc_head) |
| 881 | add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | return 1; |
| 883 | } |
| 884 | |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 885 | unsigned long pci_cardbus_resource_alignment(struct resource *res) |
| 886 | { |
| 887 | if (res->flags & IORESOURCE_IO) |
| 888 | return pci_cardbus_io_size; |
| 889 | if (res->flags & IORESOURCE_MEM) |
| 890 | return pci_cardbus_mem_size; |
| 891 | return 0; |
| 892 | } |
| 893 | |
| 894 | static void pci_bus_size_cardbus(struct pci_bus *bus, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 895 | struct list_head *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | { |
| 897 | struct pci_dev *bridge = bus->self; |
| 898 | struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; |
| 899 | u16 ctrl; |
| 900 | |
| 901 | /* |
| 902 | * Reserve some resources for CardBus. We reserve |
| 903 | * a fixed amount of bus space for CardBus bridges. |
| 904 | */ |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 905 | b_res[0].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 906 | b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 907 | if (realloc_head) |
| 908 | add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 909 | |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 910 | b_res[1].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 911 | b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 912 | if (realloc_head) |
| 913 | add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | |
| 915 | /* |
| 916 | * Check whether prefetchable memory is supported |
| 917 | * by this bridge. |
| 918 | */ |
| 919 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); |
| 920 | if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) { |
| 921 | ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; |
| 922 | pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); |
| 923 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); |
| 924 | } |
| 925 | |
| 926 | /* |
| 927 | * If we have prefetchable memory support, allocate |
| 928 | * two regions. Otherwise, allocate one region of |
| 929 | * twice the size. |
| 930 | */ |
| 931 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 932 | b_res[2].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 933 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 934 | if (realloc_head) |
| 935 | add_to_list(realloc_head, bridge, b_res+2, pci_cardbus_mem_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 936 | |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 937 | b_res[3].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 938 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 939 | if (realloc_head) |
| 940 | add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 941 | } else { |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 942 | b_res[3].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 943 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 944 | if (realloc_head) |
| 945 | add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size * 2, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | } |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 947 | |
| 948 | /* set the size of the resource to zero, so that the resource does not |
| 949 | * get assigned during required-resource allocation cycle but gets assigned |
| 950 | * during the optional-resource allocation cycle. |
| 951 | */ |
| 952 | b_res[0].start = b_res[1].start = b_res[2].start = b_res[3].start = 1; |
| 953 | b_res[0].end = b_res[1].end = b_res[2].end = b_res[3].end = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | } |
| 955 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 956 | void __ref __pci_bus_size_bridges(struct pci_bus *bus, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 957 | struct list_head *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 958 | { |
| 959 | struct pci_dev *dev; |
| 960 | unsigned long mask, prefmask; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 961 | resource_size_t additional_mem_size = 0, additional_io_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | |
| 963 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 964 | struct pci_bus *b = dev->subordinate; |
| 965 | if (!b) |
| 966 | continue; |
| 967 | |
| 968 | switch (dev->class >> 8) { |
| 969 | case PCI_CLASS_BRIDGE_CARDBUS: |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 970 | pci_bus_size_cardbus(b, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 971 | break; |
| 972 | |
| 973 | case PCI_CLASS_BRIDGE_PCI: |
| 974 | default: |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 975 | __pci_bus_size_bridges(b, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | break; |
| 977 | } |
| 978 | } |
| 979 | |
| 980 | /* The root bus? */ |
| 981 | if (!bus->self) |
| 982 | return; |
| 983 | |
| 984 | switch (bus->self->class >> 8) { |
| 985 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 986 | /* don't size cardbuses yet. */ |
| 987 | break; |
| 988 | |
| 989 | case PCI_CLASS_BRIDGE_PCI: |
| 990 | pci_bridge_check_ranges(bus); |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 991 | if (bus->self->is_hotplug_bridge) { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 992 | additional_io_size = pci_hotplug_io_size; |
| 993 | additional_mem_size = pci_hotplug_mem_size; |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 994 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 995 | /* |
| 996 | * Follow thru |
| 997 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | default: |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 999 | pbus_size_io(bus, realloc_head ? 0 : additional_io_size, |
| 1000 | additional_io_size, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1001 | /* If the bridge supports prefetchable range, size it |
| 1002 | separately. If it doesn't, or its prefetchable window |
| 1003 | has already been allocated by arch code, try |
| 1004 | non-prefetchable range for both types of PCI memory |
| 1005 | resources. */ |
| 1006 | mask = IORESOURCE_MEM; |
| 1007 | prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1008 | if (pbus_size_mem(bus, prefmask, prefmask, |
| 1009 | realloc_head ? 0 : additional_mem_size, |
| 1010 | additional_mem_size, realloc_head)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1011 | mask = prefmask; /* Success, size non-prefetch only. */ |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 1012 | else |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1013 | additional_mem_size += additional_mem_size; |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1014 | pbus_size_mem(bus, mask, IORESOURCE_MEM, |
| 1015 | realloc_head ? 0 : additional_mem_size, |
| 1016 | additional_mem_size, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | break; |
| 1018 | } |
| 1019 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1020 | |
| 1021 | void __ref pci_bus_size_bridges(struct pci_bus *bus) |
| 1022 | { |
| 1023 | __pci_bus_size_bridges(bus, NULL); |
| 1024 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1025 | EXPORT_SYMBOL(pci_bus_size_bridges); |
| 1026 | |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 1027 | static void __ref __pci_bus_assign_resources(const struct pci_bus *bus, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1028 | struct list_head *realloc_head, |
| 1029 | struct list_head *fail_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | { |
| 1031 | struct pci_bus *b; |
| 1032 | struct pci_dev *dev; |
| 1033 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1034 | pbus_assign_resources_sorted(bus, realloc_head, fail_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1037 | b = dev->subordinate; |
| 1038 | if (!b) |
| 1039 | continue; |
| 1040 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1041 | __pci_bus_assign_resources(b, realloc_head, fail_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1042 | |
| 1043 | switch (dev->class >> 8) { |
| 1044 | case PCI_CLASS_BRIDGE_PCI: |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1045 | if (!pci_is_enabled(dev)) |
| 1046 | pci_setup_bridge(b); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1047 | break; |
| 1048 | |
| 1049 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 1050 | pci_setup_cardbus(b); |
| 1051 | break; |
| 1052 | |
| 1053 | default: |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 1054 | dev_info(&dev->dev, "not setting up bridge for bus " |
| 1055 | "%04x:%02x\n", pci_domain_nr(b), b->number); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1056 | break; |
| 1057 | } |
| 1058 | } |
| 1059 | } |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 1060 | |
| 1061 | void __ref pci_bus_assign_resources(const struct pci_bus *bus) |
| 1062 | { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1063 | __pci_bus_assign_resources(bus, NULL, NULL); |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 1064 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | EXPORT_SYMBOL(pci_bus_assign_resources); |
| 1066 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1067 | static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge, |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1068 | struct list_head *add_head, |
| 1069 | struct list_head *fail_head) |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1070 | { |
| 1071 | struct pci_bus *b; |
| 1072 | |
Yinghai Lu | 8424d75 | 2012-01-21 02:08:21 -0800 | [diff] [blame] | 1073 | pdev_assign_resources_sorted((struct pci_dev *)bridge, |
| 1074 | add_head, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1075 | |
| 1076 | b = bridge->subordinate; |
| 1077 | if (!b) |
| 1078 | return; |
| 1079 | |
Yinghai Lu | 8424d75 | 2012-01-21 02:08:21 -0800 | [diff] [blame] | 1080 | __pci_bus_assign_resources(b, add_head, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1081 | |
| 1082 | switch (bridge->class >> 8) { |
| 1083 | case PCI_CLASS_BRIDGE_PCI: |
| 1084 | pci_setup_bridge(b); |
| 1085 | break; |
| 1086 | |
| 1087 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 1088 | pci_setup_cardbus(b); |
| 1089 | break; |
| 1090 | |
| 1091 | default: |
| 1092 | dev_info(&bridge->dev, "not setting up bridge for bus " |
| 1093 | "%04x:%02x\n", pci_domain_nr(b), b->number); |
| 1094 | break; |
| 1095 | } |
| 1096 | } |
Yinghai Lu | 5009b46 | 2010-01-22 01:02:20 -0800 | [diff] [blame] | 1097 | static void pci_bridge_release_resources(struct pci_bus *bus, |
| 1098 | unsigned long type) |
| 1099 | { |
| 1100 | int idx; |
| 1101 | bool changed = false; |
| 1102 | struct pci_dev *dev; |
| 1103 | struct resource *r; |
| 1104 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 1105 | IORESOURCE_PREFETCH; |
| 1106 | |
| 1107 | dev = bus->self; |
| 1108 | for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END; |
| 1109 | idx++) { |
| 1110 | r = &dev->resource[idx]; |
| 1111 | if ((r->flags & type_mask) != type) |
| 1112 | continue; |
| 1113 | if (!r->parent) |
| 1114 | continue; |
| 1115 | /* |
| 1116 | * if there are children under that, we should release them |
| 1117 | * all |
| 1118 | */ |
| 1119 | release_child_resources(r); |
| 1120 | if (!release_resource(r)) { |
| 1121 | dev_printk(KERN_DEBUG, &dev->dev, |
| 1122 | "resource %d %pR released\n", idx, r); |
| 1123 | /* keep the old size */ |
| 1124 | r->end = resource_size(r) - 1; |
| 1125 | r->start = 0; |
| 1126 | r->flags = 0; |
| 1127 | changed = true; |
| 1128 | } |
| 1129 | } |
| 1130 | |
| 1131 | if (changed) { |
| 1132 | /* avoiding touch the one without PREF */ |
| 1133 | if (type & IORESOURCE_PREFETCH) |
| 1134 | type = IORESOURCE_PREFETCH; |
| 1135 | __pci_setup_bridge(bus, type); |
| 1136 | } |
| 1137 | } |
| 1138 | |
| 1139 | enum release_type { |
| 1140 | leaf_only, |
| 1141 | whole_subtree, |
| 1142 | }; |
| 1143 | /* |
| 1144 | * try to release pci bridge resources that is from leaf bridge, |
| 1145 | * so we can allocate big new one later |
| 1146 | */ |
| 1147 | static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus, |
| 1148 | unsigned long type, |
| 1149 | enum release_type rel_type) |
| 1150 | { |
| 1151 | struct pci_dev *dev; |
| 1152 | bool is_leaf_bridge = true; |
| 1153 | |
| 1154 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1155 | struct pci_bus *b = dev->subordinate; |
| 1156 | if (!b) |
| 1157 | continue; |
| 1158 | |
| 1159 | is_leaf_bridge = false; |
| 1160 | |
| 1161 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 1162 | continue; |
| 1163 | |
| 1164 | if (rel_type == whole_subtree) |
| 1165 | pci_bus_release_bridge_resources(b, type, |
| 1166 | whole_subtree); |
| 1167 | } |
| 1168 | |
| 1169 | if (pci_is_root_bus(bus)) |
| 1170 | return; |
| 1171 | |
| 1172 | if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 1173 | return; |
| 1174 | |
| 1175 | if ((rel_type == whole_subtree) || is_leaf_bridge) |
| 1176 | pci_bridge_release_resources(bus, type); |
| 1177 | } |
| 1178 | |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1179 | static void pci_bus_dump_res(struct pci_bus *bus) |
| 1180 | { |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 1181 | struct resource *res; |
| 1182 | int i; |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1183 | |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 1184 | pci_bus_for_each_resource(bus, res, i) { |
Yinghai Lu | 7c9342b | 2009-12-22 15:02:24 -0800 | [diff] [blame] | 1185 | if (!res || !res->end || !res->flags) |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1186 | continue; |
| 1187 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 1188 | dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res); |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1189 | } |
| 1190 | } |
| 1191 | |
| 1192 | static void pci_bus_dump_resources(struct pci_bus *bus) |
| 1193 | { |
| 1194 | struct pci_bus *b; |
| 1195 | struct pci_dev *dev; |
| 1196 | |
| 1197 | |
| 1198 | pci_bus_dump_res(bus); |
| 1199 | |
| 1200 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1201 | b = dev->subordinate; |
| 1202 | if (!b) |
| 1203 | continue; |
| 1204 | |
| 1205 | pci_bus_dump_resources(b); |
| 1206 | } |
| 1207 | } |
| 1208 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1209 | static int __init pci_bus_get_depth(struct pci_bus *bus) |
| 1210 | { |
| 1211 | int depth = 0; |
| 1212 | struct pci_dev *dev; |
| 1213 | |
| 1214 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1215 | int ret; |
| 1216 | struct pci_bus *b = dev->subordinate; |
| 1217 | if (!b) |
| 1218 | continue; |
| 1219 | |
| 1220 | ret = pci_bus_get_depth(b); |
| 1221 | if (ret + 1 > depth) |
| 1222 | depth = ret + 1; |
| 1223 | } |
| 1224 | |
| 1225 | return depth; |
| 1226 | } |
| 1227 | static int __init pci_get_max_depth(void) |
| 1228 | { |
| 1229 | int depth = 0; |
| 1230 | struct pci_bus *bus; |
| 1231 | |
| 1232 | list_for_each_entry(bus, &pci_root_buses, node) { |
| 1233 | int ret; |
| 1234 | |
| 1235 | ret = pci_bus_get_depth(bus); |
| 1236 | if (ret > depth) |
| 1237 | depth = ret; |
| 1238 | } |
| 1239 | |
| 1240 | return depth; |
| 1241 | } |
| 1242 | |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 1243 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1244 | /* |
| 1245 | * first try will not touch pci bridge res |
| 1246 | * second and later try will clear small leaf bridge res |
| 1247 | * will stop till to the max deepth if can not find good one |
| 1248 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1249 | void __init |
| 1250 | pci_assign_unassigned_resources(void) |
| 1251 | { |
| 1252 | struct pci_bus *bus; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1253 | LIST_HEAD(realloc_head); /* list of resources that |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1254 | want additional resources */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1255 | struct list_head *add_list = NULL; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1256 | int tried_times = 0; |
| 1257 | enum release_type rel_type = leaf_only; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1258 | LIST_HEAD(fail_head); |
| 1259 | struct pci_dev_resource_x *dev_res_x; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1260 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 1261 | IORESOURCE_PREFETCH; |
| 1262 | unsigned long failed_type; |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1263 | int pci_try_num = 1; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1264 | |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1265 | /* don't realloc if asked to do so */ |
| 1266 | if (pci_realloc_enabled()) { |
| 1267 | int max_depth = pci_get_max_depth(); |
| 1268 | |
| 1269 | pci_try_num = max_depth + 1; |
| 1270 | printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n", |
| 1271 | max_depth, pci_try_num); |
| 1272 | } |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1273 | |
| 1274 | again: |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1275 | /* |
| 1276 | * last try will use add_list, otherwise will try good to have as |
| 1277 | * must have, so can realloc parent bridge resource |
| 1278 | */ |
| 1279 | if (tried_times + 1 == pci_try_num) |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1280 | add_list = &realloc_head; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | /* Depth first, calculate sizes and alignments of all |
| 1282 | subordinate buses. */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1283 | list_for_each_entry(bus, &pci_root_buses, node) |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1284 | __pci_bus_size_bridges(bus, add_list); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1286 | /* Depth last, allocate resources and update the hardware. */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1287 | list_for_each_entry(bus, &pci_root_buses, node) |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1288 | __pci_bus_assign_resources(bus, add_list, &fail_head); |
Yinghai Lu | 19aa7ee | 2012-01-21 02:08:24 -0800 | [diff] [blame] | 1289 | if (add_list) |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1290 | BUG_ON(!list_empty(add_list)); |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1291 | tried_times++; |
| 1292 | |
| 1293 | /* any device complain? */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1294 | if (list_empty(&fail_head)) |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1295 | goto enable_and_dump; |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 1296 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1297 | failed_type = 0; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1298 | list_for_each_entry(dev_res_x, &fail_head, list) |
| 1299 | failed_type |= dev_res_x->flags; |
| 1300 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1301 | /* |
| 1302 | * io port are tight, don't try extra |
| 1303 | * or if reach the limit, don't want to try more |
| 1304 | */ |
| 1305 | failed_type &= type_mask; |
| 1306 | if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) { |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1307 | free_list(pci_dev_resource_x, &fail_head); |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1308 | goto enable_and_dump; |
| 1309 | } |
| 1310 | |
| 1311 | printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n", |
| 1312 | tried_times + 1); |
| 1313 | |
| 1314 | /* third times and later will not check if it is leaf */ |
| 1315 | if ((tried_times + 1) > 2) |
| 1316 | rel_type = whole_subtree; |
| 1317 | |
| 1318 | /* |
| 1319 | * Try to release leaf bridge's resources that doesn't fit resource of |
| 1320 | * child device under that bridge |
| 1321 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1322 | list_for_each_entry(dev_res_x, &fail_head, list) { |
| 1323 | bus = dev_res_x->dev->bus; |
| 1324 | pci_bus_release_bridge_resources(bus, |
| 1325 | dev_res_x->flags & type_mask, |
| 1326 | rel_type); |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1327 | } |
| 1328 | /* restore size and flags */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1329 | list_for_each_entry(dev_res_x, &fail_head, list) { |
| 1330 | struct resource *res = dev_res_x->res; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1331 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1332 | res->start = dev_res_x->start; |
| 1333 | res->end = dev_res_x->end; |
| 1334 | res->flags = dev_res_x->flags; |
| 1335 | if (dev_res_x->dev->subordinate) |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1336 | res->flags = 0; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1337 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1338 | free_list(pci_dev_resource_x, &fail_head); |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1339 | |
| 1340 | goto again; |
| 1341 | |
| 1342 | enable_and_dump: |
| 1343 | /* Depth last, update the hardware. */ |
| 1344 | list_for_each_entry(bus, &pci_root_buses, node) |
| 1345 | pci_enable_bridges(bus); |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1346 | |
| 1347 | /* dump the resource on buses */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1348 | list_for_each_entry(bus, &pci_root_buses, node) |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1349 | pci_bus_dump_resources(bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1350 | } |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1351 | |
| 1352 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) |
| 1353 | { |
| 1354 | struct pci_bus *parent = bridge->subordinate; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1355 | LIST_HEAD(add_list); /* list of resources that |
Yinghai Lu | 8424d75 | 2012-01-21 02:08:21 -0800 | [diff] [blame] | 1356 | want additional resources */ |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1357 | int tried_times = 0; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1358 | LIST_HEAD(fail_head); |
| 1359 | struct pci_dev_resource_x *dev_res_x; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1360 | int retval; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1361 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 1362 | IORESOURCE_PREFETCH; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1363 | |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1364 | again: |
Yinghai Lu | 8424d75 | 2012-01-21 02:08:21 -0800 | [diff] [blame] | 1365 | __pci_bus_size_bridges(parent, &add_list); |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1366 | __pci_bridge_assign_resources(bridge, &add_list, &fail_head); |
| 1367 | BUG_ON(!list_empty(&add_list)); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1368 | tried_times++; |
| 1369 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1370 | if (list_empty(&fail_head)) |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1371 | goto enable_all; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1372 | |
| 1373 | if (tried_times >= 2) { |
| 1374 | /* still fail, don't need to try more */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1375 | free_list(pci_dev_resource_x, &fail_head); |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1376 | goto enable_all; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1377 | } |
| 1378 | |
| 1379 | printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n", |
| 1380 | tried_times + 1); |
| 1381 | |
| 1382 | /* |
| 1383 | * Try to release leaf bridge's resources that doesn't fit resource of |
| 1384 | * child device under that bridge |
| 1385 | */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1386 | list_for_each_entry(dev_res_x, &fail_head, list) { |
| 1387 | struct pci_bus *bus = dev_res_x->dev->bus; |
| 1388 | unsigned long flags = dev_res_x->flags; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1389 | |
| 1390 | pci_bus_release_bridge_resources(bus, flags & type_mask, |
| 1391 | whole_subtree); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1392 | } |
| 1393 | /* restore size and flags */ |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1394 | list_for_each_entry(dev_res_x, &fail_head, list) { |
| 1395 | struct resource *res = dev_res_x->res; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1396 | |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1397 | res->start = dev_res_x->start; |
| 1398 | res->end = dev_res_x->end; |
| 1399 | res->flags = dev_res_x->flags; |
| 1400 | if (dev_res_x->dev->subordinate) |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1401 | res->flags = 0; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1402 | } |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1403 | free_list(pci_dev_resource_x, &fail_head); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1404 | |
| 1405 | goto again; |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1406 | |
| 1407 | enable_all: |
| 1408 | retval = pci_reenable_device(bridge); |
| 1409 | pci_set_master(bridge); |
| 1410 | pci_enable_bridges(parent); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1411 | } |
| 1412 | EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); |
Yinghai Lu | 9b03088 | 2012-01-21 02:08:23 -0800 | [diff] [blame] | 1413 | |
| 1414 | #ifdef CONFIG_HOTPLUG |
| 1415 | /** |
| 1416 | * pci_rescan_bus - scan a PCI bus for devices. |
| 1417 | * @bus: PCI bus to scan |
| 1418 | * |
| 1419 | * Scan a PCI bus and child buses for new devices, adds them, |
| 1420 | * and enables them. |
| 1421 | * |
| 1422 | * Returns the max number of subordinate bus discovered. |
| 1423 | */ |
| 1424 | unsigned int __ref pci_rescan_bus(struct pci_bus *bus) |
| 1425 | { |
| 1426 | unsigned int max; |
| 1427 | struct pci_dev *dev; |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1428 | LIST_HEAD(add_list); /* list of resources that |
Yinghai Lu | 9b03088 | 2012-01-21 02:08:23 -0800 | [diff] [blame] | 1429 | want additional resources */ |
| 1430 | |
| 1431 | max = pci_scan_child_bus(bus); |
| 1432 | |
Yinghai Lu | 9b03088 | 2012-01-21 02:08:23 -0800 | [diff] [blame] | 1433 | down_read(&pci_bus_sem); |
| 1434 | list_for_each_entry(dev, &bus->devices, bus_list) |
| 1435 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || |
| 1436 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
| 1437 | if (dev->subordinate) |
| 1438 | __pci_bus_size_bridges(dev->subordinate, |
| 1439 | &add_list); |
| 1440 | up_read(&pci_bus_sem); |
| 1441 | __pci_bus_assign_resources(bus, &add_list, NULL); |
Yinghai Lu | bdc4abe | 2012-01-21 02:08:27 -0800 | [diff] [blame^] | 1442 | BUG_ON(!list_empty(&add_list)); |
Yinghai Lu | 9b03088 | 2012-01-21 02:08:23 -0800 | [diff] [blame] | 1443 | |
| 1444 | pci_enable_bridges(bus); |
| 1445 | pci_bus_add_devices(bus); |
| 1446 | |
| 1447 | return max; |
| 1448 | } |
| 1449 | EXPORT_SYMBOL_GPL(pci_rescan_bus); |
| 1450 | #endif |