blob: 8bfdc36279712eaeb190383090bb75a87cbcd496 [file] [log] [blame]
Magnus Damm0468b2d2013-03-28 00:49:34 +09001/*
2 * r8a7790 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/irq.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090022#include <linux/kernel.h>
23#include <linux/of_platform.h>
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020024#include <linux/platform_data/gpio-rcar.h>
Magnus Damm8f5ec0a2013-03-28 00:49:54 +090025#include <linux/platform_data/irq-renesas-irqc.h>
Magnus Damm99ade1a2013-06-28 20:27:04 +090026#include <linux/serial_sci.h>
27#include <linux/sh_timer.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090028#include <mach/common.h>
29#include <mach/irqs.h>
30#include <mach/r8a7790.h>
31#include <asm/mach/arch.h>
32
Laurent Pinchartcde214a2013-08-08 00:34:53 +020033static const struct resource pfc_resources[] __initconst = {
Magnus Damm69e351d2013-03-28 00:50:03 +090034 DEFINE_RES_MEM(0xe6060000, 0x250),
35};
36
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020037#define R8A7790_GPIO(idx) \
Laurent Pinchartcde214a2013-08-08 00:34:53 +020038static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020039 DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
40 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
41}; \
42 \
Laurent Pinchartcde214a2013-08-08 00:34:53 +020043static const struct gpio_rcar_config \
44r8a7790_gpio##idx##_platform_data __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020045 .gpio_base = 32 * (idx), \
46 .irq_base = 0, \
47 .number_of_pins = 32, \
48 .pctl_name = "pfc-r8a7790", \
Simon Hormand93906b82013-05-13 17:53:52 +090049 .has_both_edge_trigger = 1, \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020050}; \
51
52R8A7790_GPIO(0);
53R8A7790_GPIO(1);
54R8A7790_GPIO(2);
55R8A7790_GPIO(3);
56R8A7790_GPIO(4);
57R8A7790_GPIO(5);
58
59#define r8a7790_register_gpio(idx) \
60 platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
61 r8a7790_gpio##idx##_resources, \
62 ARRAY_SIZE(r8a7790_gpio##idx##_resources), \
63 &r8a7790_gpio##idx##_platform_data, \
64 sizeof(r8a7790_gpio##idx##_platform_data))
65
Kuninori Morimotob448c902013-11-28 19:02:12 -080066static struct resource i2c_resources[] __initdata = {
67 /* I2C0 */
68 DEFINE_RES_MEM(0xE6508000, 0x40),
69 DEFINE_RES_IRQ(gic_spi(287)),
70 /* I2C1 */
71 DEFINE_RES_MEM(0xE6518000, 0x40),
72 DEFINE_RES_IRQ(gic_spi(288)),
73 /* I2C2 */
74 DEFINE_RES_MEM(0xE6530000, 0x40),
75 DEFINE_RES_IRQ(gic_spi(286)),
76 /* I2C3 */
77 DEFINE_RES_MEM(0xE6540000, 0x40),
78 DEFINE_RES_IRQ(gic_spi(290)),
79
80};
81
82#define r8a7790_register_i2c(idx) \
83 platform_device_register_simple( \
84 "i2c-rcar", idx, \
85 i2c_resources + (2 * idx), 2); \
86
Magnus Damm69e351d2013-03-28 00:50:03 +090087void __init r8a7790_pinmux_init(void)
88{
89 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
90 ARRAY_SIZE(pfc_resources));
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020091 r8a7790_register_gpio(0);
92 r8a7790_register_gpio(1);
93 r8a7790_register_gpio(2);
94 r8a7790_register_gpio(3);
95 r8a7790_register_gpio(4);
96 r8a7790_register_gpio(5);
Kuninori Morimotob448c902013-11-28 19:02:12 -080097 r8a7790_register_i2c(0);
98 r8a7790_register_i2c(1);
99 r8a7790_register_i2c(2);
100 r8a7790_register_i2c(3);
Magnus Damm69e351d2013-03-28 00:50:03 +0900101}
102
Laurent Pinchart302d8892013-11-03 13:50:31 +0100103#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \
104static struct plat_sci_port scif##index##_platform_data = { \
105 .type = scif_type, \
Laurent Pinchart302d8892013-11-03 13:50:31 +0100106 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
107 .scbrr_algo_id = algo, \
108 .scscr = _scscr, \
Laurent Pinchartc0a384f2013-11-01 01:44:07 +0100109}; \
110 \
111static struct resource scif##index##_resources[] = { \
112 DEFINE_RES_MEM(baseaddr, 0x100), \
113 DEFINE_RES_IRQ(irq), \
Magnus Damm55d9fab2013-03-28 00:49:44 +0900114}
115
Laurent Pinchart302d8892013-11-03 13:50:31 +0100116#define R8A7790_SCIF(index, baseaddr, irq) \
117 __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
118 SCBRR_ALGO_2, index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900119
Laurent Pinchart302d8892013-11-03 13:50:31 +0100120#define R8A7790_SCIFA(index, baseaddr, irq) \
121 __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
122 SCBRR_ALGO_4, index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900123
Laurent Pinchart302d8892013-11-03 13:50:31 +0100124#define R8A7790_SCIFB(index, baseaddr, irq) \
125 __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
126 SCBRR_ALGO_4, index, baseaddr, irq)
Ulrich Hechtd44f8302013-05-31 17:57:02 +0200127
Laurent Pinchart302d8892013-11-03 13:50:31 +0100128#define R8A7790_HSCIF(index, baseaddr, irq) \
129 __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
130 SCBRR_ALGO_6, index, baseaddr, irq)
Magnus Damm55d9fab2013-03-28 00:49:44 +0900131
Laurent Pinchart302d8892013-11-03 13:50:31 +0100132R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
133R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
134R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
135R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
136R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
137R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
138R8A7790_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
139R8A7790_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
140R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
141R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
Magnus Damm55d9fab2013-03-28 00:49:44 +0900142
Laurent Pinchart302d8892013-11-03 13:50:31 +0100143#define r8a7790_register_scif(index) \
Laurent Pinchartc0a384f2013-11-01 01:44:07 +0100144 platform_device_register_resndata(&platform_bus, "sh-sci", index, \
145 scif##index##_resources, \
146 ARRAY_SIZE(scif##index##_resources), \
147 &scif##index##_platform_data, \
148 sizeof(scif##index##_platform_data))
Magnus Damm55d9fab2013-03-28 00:49:44 +0900149
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200150static const struct renesas_irqc_config irqc0_data __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900151 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
152};
153
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200154static const struct resource irqc0_resources[] __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900155 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
156 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
157 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
158 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
159 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
160};
161
162#define r8a7790_register_irqc(idx) \
163 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
164 idx, irqc##idx##_resources, \
165 ARRAY_SIZE(irqc##idx##_resources), \
166 &irqc##idx##_data, \
167 sizeof(struct renesas_irqc_config))
168
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200169static const struct resource thermal_resources[] __initconst = {
Simon Horman0b8eeba2013-06-26 16:22:21 +0900170 DEFINE_RES_MEM(0xe61f0000, 0x14),
171 DEFINE_RES_MEM(0xe61f0100, 0x38),
172 DEFINE_RES_IRQ(gic_spi(69)),
173};
174
175#define r8a7790_register_thermal() \
176 platform_device_register_simple("rcar_thermal", -1, \
177 thermal_resources, \
178 ARRAY_SIZE(thermal_resources))
179
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200180static const struct sh_timer_config cmt00_platform_data __initconst = {
Magnus Damm99ade1a2013-06-28 20:27:04 +0900181 .name = "CMT00",
182 .timer_bit = 0,
183 .clockevent_rating = 80,
184};
185
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200186static const struct resource cmt00_resources[] __initconst = {
Magnus Damm99ade1a2013-06-28 20:27:04 +0900187 DEFINE_RES_MEM(0xffca0510, 0x0c),
188 DEFINE_RES_MEM(0xffca0500, 0x04),
189 DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
190};
191
192#define r8a7790_register_cmt(idx) \
193 platform_device_register_resndata(&platform_bus, "sh_cmt", \
194 idx, cmt##idx##_resources, \
195 ARRAY_SIZE(cmt##idx##_resources), \
196 &cmt##idx##_platform_data, \
197 sizeof(struct sh_timer_config))
198
Simon Horman6dace672013-06-28 13:42:16 +0900199void __init r8a7790_add_dt_devices(void)
Magnus Damm0468b2d2013-03-28 00:49:34 +0900200{
Laurent Pinchart302d8892013-11-03 13:50:31 +0100201 r8a7790_register_scif(0);
202 r8a7790_register_scif(1);
203 r8a7790_register_scif(2);
204 r8a7790_register_scif(3);
205 r8a7790_register_scif(4);
206 r8a7790_register_scif(5);
207 r8a7790_register_scif(6);
208 r8a7790_register_scif(7);
209 r8a7790_register_scif(8);
210 r8a7790_register_scif(9);
Simon Horman6dace672013-06-28 13:42:16 +0900211 r8a7790_register_cmt(00);
212}
213
214void __init r8a7790_add_standard_devices(void)
215{
216 r8a7790_add_dt_devices();
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900217 r8a7790_register_irqc(0);
Simon Horman0b8eeba2013-06-26 16:22:21 +0900218 r8a7790_register_thermal();
Magnus Damm0468b2d2013-03-28 00:49:34 +0900219}
220
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900221void __init r8a7790_init_early(void)
Magnus Damm8333d8c2013-06-28 20:27:13 +0900222{
223#ifndef CONFIG_ARM_ARCH_TIMER
224 shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
225#endif
226}
227
Magnus Damm0468b2d2013-03-28 00:49:34 +0900228#ifdef CONFIG_USE_OF
Magnus Damm0468b2d2013-03-28 00:49:34 +0900229
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200230static const char * const r8a7790_boards_compat_dt[] __initconst = {
Magnus Damm0468b2d2013-03-28 00:49:34 +0900231 "renesas,r8a7790",
232 NULL,
233};
234
235DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
Magnus Dammad09cb82013-08-29 08:22:07 +0900236 .smp = smp_ops(r8a7790_smp_ops),
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900237 .init_early = r8a7790_init_early,
Magnus Damm50c517d2013-09-12 09:32:49 +0900238 .init_time = rcar_gen2_timer_init,
Magnus Damm0468b2d2013-03-28 00:49:34 +0900239 .dt_compat = r8a7790_boards_compat_dt,
240MACHINE_END
241#endif /* CONFIG_USE_OF */