Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #ifndef __VIDC_HFI_API_H__ |
| 15 | #define __VIDC_HFI_API_H__ |
| 16 | |
| 17 | #include <linux/log2.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/types.h> |
| 20 | #include <media/msm_vidc.h> |
| 21 | #include "msm_vidc_resources.h" |
| 22 | |
Chinmay Sawarkar | cbd3f59 | 2017-04-10 15:42:30 -0700 | [diff] [blame] | 23 | #define CONTAINS(__a, __sz, __t) (\ |
| 24 | (__t >= __a) && \ |
| 25 | (__t < __a + __sz) \ |
| 26 | ) |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 27 | |
Chinmay Sawarkar | cbd3f59 | 2017-04-10 15:42:30 -0700 | [diff] [blame] | 28 | #define OVERLAPS(__t, __tsz, __a, __asz) (\ |
| 29 | (__t <= __a) && \ |
| 30 | (__t + __tsz >= __a + __asz) \ |
| 31 | ) |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 32 | |
| 33 | #define HAL_BUFFERFLAG_EOS 0x00000001 |
| 34 | #define HAL_BUFFERFLAG_STARTTIME 0x00000002 |
| 35 | #define HAL_BUFFERFLAG_DECODEONLY 0x00000004 |
| 36 | #define HAL_BUFFERFLAG_DATACORRUPT 0x00000008 |
| 37 | #define HAL_BUFFERFLAG_ENDOFFRAME 0x00000010 |
| 38 | #define HAL_BUFFERFLAG_SYNCFRAME 0x00000020 |
| 39 | #define HAL_BUFFERFLAG_EXTRADATA 0x00000040 |
| 40 | #define HAL_BUFFERFLAG_CODECCONFIG 0x00000080 |
| 41 | #define HAL_BUFFERFLAG_TIMESTAMPINVALID 0x00000100 |
| 42 | #define HAL_BUFFERFLAG_READONLY 0x00000200 |
| 43 | #define HAL_BUFFERFLAG_ENDOFSUBFRAME 0x00000400 |
| 44 | #define HAL_BUFFERFLAG_EOSEQ 0x00200000 |
| 45 | #define HAL_BUFFERFLAG_MBAFF 0x08000000 |
| 46 | #define HAL_BUFFERFLAG_YUV_601_709_CSC_CLAMP 0x10000000 |
| 47 | #define HAL_BUFFERFLAG_DROP_FRAME 0x20000000 |
| 48 | #define HAL_BUFFERFLAG_TS_DISCONTINUITY 0x40000000 |
| 49 | #define HAL_BUFFERFLAG_TS_ERROR 0x80000000 |
| 50 | |
| 51 | |
| 52 | |
| 53 | #define HAL_DEBUG_MSG_LOW 0x00000001 |
| 54 | #define HAL_DEBUG_MSG_MEDIUM 0x00000002 |
| 55 | #define HAL_DEBUG_MSG_HIGH 0x00000004 |
| 56 | #define HAL_DEBUG_MSG_ERROR 0x00000008 |
| 57 | #define HAL_DEBUG_MSG_FATAL 0x00000010 |
| 58 | #define MAX_PROFILE_COUNT 16 |
| 59 | |
| 60 | #define HAL_MAX_MATRIX_COEFFS 9 |
| 61 | #define HAL_MAX_BIAS_COEFFS 3 |
| 62 | #define HAL_MAX_LIMIT_COEFFS 6 |
| 63 | #define VENUS_VERSION_LENGTH 128 |
| 64 | |
| 65 | /* 16 encoder and 16 decoder sessions */ |
| 66 | #define VIDC_MAX_SESSIONS 32 |
| 67 | |
| 68 | enum vidc_status { |
| 69 | VIDC_ERR_NONE = 0x0, |
| 70 | VIDC_ERR_FAIL = 0x80000000, |
| 71 | VIDC_ERR_ALLOC_FAIL, |
| 72 | VIDC_ERR_ILLEGAL_OP, |
| 73 | VIDC_ERR_BAD_PARAM, |
| 74 | VIDC_ERR_BAD_HANDLE, |
| 75 | VIDC_ERR_NOT_SUPPORTED, |
| 76 | VIDC_ERR_BAD_STATE, |
| 77 | VIDC_ERR_MAX_CLIENTS, |
| 78 | VIDC_ERR_IFRAME_EXPECTED, |
| 79 | VIDC_ERR_HW_FATAL, |
| 80 | VIDC_ERR_BITSTREAM_ERR, |
| 81 | VIDC_ERR_INDEX_NOMORE, |
| 82 | VIDC_ERR_SEQHDR_PARSE_FAIL, |
| 83 | VIDC_ERR_INSUFFICIENT_BUFFER, |
| 84 | VIDC_ERR_BAD_POWER_STATE, |
| 85 | VIDC_ERR_NO_VALID_SESSION, |
| 86 | VIDC_ERR_TIMEOUT, |
| 87 | VIDC_ERR_CMDQFULL, |
| 88 | VIDC_ERR_START_CODE_NOT_FOUND, |
| 89 | VIDC_ERR_CLIENT_PRESENT = 0x90000001, |
| 90 | VIDC_ERR_CLIENT_FATAL, |
| 91 | VIDC_ERR_CMD_QUEUE_FULL, |
| 92 | VIDC_ERR_UNUSED = 0x10000000 |
| 93 | }; |
| 94 | |
| 95 | enum hal_extradata_id { |
| 96 | HAL_EXTRADATA_NONE, |
| 97 | HAL_EXTRADATA_MB_QUANTIZATION, |
| 98 | HAL_EXTRADATA_INTERLACE_VIDEO, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 99 | HAL_EXTRADATA_TIMESTAMP, |
| 100 | HAL_EXTRADATA_S3D_FRAME_PACKING, |
| 101 | HAL_EXTRADATA_FRAME_RATE, |
| 102 | HAL_EXTRADATA_PANSCAN_WINDOW, |
| 103 | HAL_EXTRADATA_RECOVERY_POINT_SEI, |
| 104 | HAL_EXTRADATA_MULTISLICE_INFO, |
| 105 | HAL_EXTRADATA_INDEX, |
| 106 | HAL_EXTRADATA_NUM_CONCEALED_MB, |
| 107 | HAL_EXTRADATA_METADATA_FILLER, |
| 108 | HAL_EXTRADATA_ASPECT_RATIO, |
| 109 | HAL_EXTRADATA_MPEG2_SEQDISP, |
| 110 | HAL_EXTRADATA_STREAM_USERDATA, |
| 111 | HAL_EXTRADATA_FRAME_QP, |
| 112 | HAL_EXTRADATA_FRAME_BITS_INFO, |
| 113 | HAL_EXTRADATA_INPUT_CROP, |
| 114 | HAL_EXTRADATA_DIGITAL_ZOOM, |
| 115 | HAL_EXTRADATA_LTR_INFO, |
| 116 | HAL_EXTRADATA_METADATA_MBI, |
| 117 | HAL_EXTRADATA_VQZIP_SEI, |
| 118 | HAL_EXTRADATA_YUV_STATS, |
| 119 | HAL_EXTRADATA_ROI_QP, |
| 120 | HAL_EXTRADATA_OUTPUT_CROP, |
| 121 | HAL_EXTRADATA_MASTERING_DISPLAY_COLOUR_SEI, |
| 122 | HAL_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI, |
| 123 | HAL_EXTRADATA_PQ_INFO, |
| 124 | HAL_EXTRADATA_VUI_DISPLAY_INFO, |
| 125 | HAL_EXTRADATA_VPX_COLORSPACE, |
| 126 | }; |
| 127 | |
| 128 | enum hal_property { |
| 129 | HAL_CONFIG_FRAME_RATE = 0x04000001, |
| 130 | HAL_PARAM_UNCOMPRESSED_FORMAT_SELECT, |
| 131 | HAL_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO, |
| 132 | HAL_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 133 | HAL_PARAM_INDEX_EXTRADATA, |
| 134 | HAL_PARAM_FRAME_SIZE, |
| 135 | HAL_CONFIG_REALTIME, |
| 136 | HAL_PARAM_BUFFER_COUNT_ACTUAL, |
| 137 | HAL_PARAM_BUFFER_SIZE_MINIMUM, |
| 138 | HAL_PARAM_NAL_STREAM_FORMAT_SELECT, |
| 139 | HAL_PARAM_VDEC_OUTPUT_ORDER, |
| 140 | HAL_PARAM_VDEC_PICTURE_TYPE_DECODE, |
| 141 | HAL_PARAM_VDEC_OUTPUT2_KEEP_ASPECT_RATIO, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 142 | HAL_PARAM_VDEC_MULTI_STREAM, |
| 143 | HAL_PARAM_VDEC_DISPLAY_PICTURE_BUFFER_COUNT, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 144 | HAL_CONFIG_VDEC_MB_ERROR_MAP_REPORTING, |
| 145 | HAL_PARAM_VDEC_CONTINUE_DATA_TRANSFER, |
| 146 | HAL_CONFIG_VDEC_MB_ERROR_MAP, |
| 147 | HAL_CONFIG_VENC_REQUEST_IFRAME, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 148 | HAL_CONFIG_VENC_TARGET_BITRATE, |
| 149 | HAL_PARAM_PROFILE_LEVEL_CURRENT, |
| 150 | HAL_PARAM_VENC_H264_ENTROPY_CONTROL, |
| 151 | HAL_PARAM_VENC_RATE_CONTROL, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 152 | HAL_PARAM_VENC_H264_DEBLOCK_CONTROL, |
| 153 | HAL_PARAM_VENC_TEMPORAL_SPATIAL_TRADEOFF, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 154 | HAL_PARAM_VENC_SESSION_QP_RANGE, |
| 155 | HAL_CONFIG_VENC_INTRA_PERIOD, |
| 156 | HAL_CONFIG_VENC_IDR_PERIOD, |
| 157 | HAL_CONFIG_VPE_OPERATIONS, |
| 158 | HAL_PARAM_VENC_INTRA_REFRESH, |
| 159 | HAL_PARAM_VENC_MULTI_SLICE_CONTROL, |
| 160 | HAL_CONFIG_VPE_DEINTERLACE, |
| 161 | HAL_SYS_DEBUG_CONFIG, |
| 162 | HAL_CONFIG_BUFFER_REQUIREMENTS, |
| 163 | HAL_CONFIG_PRIORITY, |
| 164 | HAL_CONFIG_BATCH_INFO, |
| 165 | HAL_PARAM_METADATA_PASS_THROUGH, |
| 166 | HAL_SYS_IDLE_INDICATOR, |
| 167 | HAL_PARAM_UNCOMPRESSED_FORMAT_SUPPORTED, |
| 168 | HAL_PARAM_INTERLACE_FORMAT_SUPPORTED, |
| 169 | HAL_PARAM_CHROMA_SITE, |
| 170 | HAL_PARAM_PROPERTIES_SUPPORTED, |
| 171 | HAL_PARAM_PROFILE_LEVEL_SUPPORTED, |
| 172 | HAL_PARAM_CAPABILITY_SUPPORTED, |
| 173 | HAL_PARAM_NAL_STREAM_FORMAT_SUPPORTED, |
| 174 | HAL_PARAM_MULTI_VIEW_FORMAT, |
| 175 | HAL_PARAM_MAX_SEQUENCE_HEADER_SIZE, |
| 176 | HAL_PARAM_CODEC_SUPPORTED, |
| 177 | HAL_PARAM_VDEC_MULTI_VIEW_SELECT, |
| 178 | HAL_PARAM_VDEC_MB_QUANTIZATION, |
| 179 | HAL_PARAM_VDEC_NUM_CONCEALED_MB, |
| 180 | HAL_PARAM_VDEC_H264_ENTROPY_SWITCHING, |
| 181 | HAL_PARAM_VENC_SLICE_DELIVERY_MODE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 182 | HAL_CONFIG_BUFFER_COUNT_ACTUAL, |
| 183 | HAL_CONFIG_VDEC_MULTI_STREAM, |
| 184 | HAL_PARAM_VENC_MULTI_SLICE_INFO, |
| 185 | HAL_CONFIG_VENC_TIMESTAMP_SCALE, |
| 186 | HAL_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER, |
| 187 | HAL_PARAM_VDEC_SYNC_FRAME_DECODE, |
| 188 | HAL_PARAM_VENC_H264_ENTROPY_CABAC_MODEL, |
| 189 | HAL_CONFIG_VENC_MAX_BITRATE, |
Chinmay Sawarkar | d005462 | 2017-05-04 13:50:59 -0700 | [diff] [blame] | 190 | HAL_PARAM_VENC_VUI_TIMING_INFO, |
Umesh Pandey | 7fce7ee | 2017-03-13 17:59:48 -0700 | [diff] [blame] | 191 | HAL_PARAM_VENC_GENERATE_AUDNAL, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 192 | HAL_PARAM_BUFFER_ALLOC_MODE, |
| 193 | HAL_PARAM_VDEC_FRAME_ASSEMBLY, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 194 | HAL_PARAM_VENC_PRESERVE_TEXT_QUALITY, |
| 195 | HAL_PARAM_VDEC_CONCEAL_COLOR, |
| 196 | HAL_PARAM_VDEC_SCS_THRESHOLD, |
| 197 | HAL_PARAM_GET_BUFFER_REQUIREMENTS, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 198 | HAL_PARAM_VENC_LTRMODE, |
| 199 | HAL_CONFIG_VENC_MARKLTRFRAME, |
| 200 | HAL_CONFIG_VENC_USELTRFRAME, |
| 201 | HAL_CONFIG_VENC_LTRPERIOD, |
| 202 | HAL_CONFIG_VENC_HIER_P_NUM_FRAMES, |
| 203 | HAL_PARAM_VENC_HIER_P_MAX_ENH_LAYERS, |
| 204 | HAL_PARAM_VENC_DISABLE_RC_TIMESTAMP, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 205 | HAL_PARAM_VENC_SEARCH_RANGE, |
| 206 | HAL_PARAM_VPE_COLOR_SPACE_CONVERSION, |
| 207 | HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 208 | HAL_CONFIG_VENC_PERF_MODE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 209 | HAL_PARAM_VDEC_NON_SECURE_OUTPUT2, |
| 210 | HAL_PARAM_VENC_HIER_P_HYBRID_MODE, |
| 211 | HAL_PARAM_VENC_MBI_STATISTICS_MODE, |
| 212 | HAL_PARAM_SYNC_BASED_INTERRUPT, |
| 213 | HAL_CONFIG_VENC_FRAME_QP, |
| 214 | HAL_CONFIG_VENC_BASELAYER_PRIORITYID, |
| 215 | HAL_PARAM_VENC_VQZIP_SEI, |
| 216 | HAL_PROPERTY_PARAM_VENC_ASPECT_RATIO, |
| 217 | HAL_CONFIG_VDEC_ENTROPY, |
| 218 | HAL_PARAM_VENC_BITRATE_TYPE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 219 | HAL_PARAM_VENC_LOW_LATENCY, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 220 | HAL_CONFIG_VENC_BLUR_RESOLUTION, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 221 | HAL_PARAM_VENC_H264_TRANSFORM_8x8, |
| 222 | HAL_PARAM_VENC_VIDEO_SIGNAL_INFO, |
| 223 | HAL_PARAM_VENC_IFRAMESIZE_TYPE, |
Praneeth Paladugu | 238977b | 2016-12-06 12:51:26 -0800 | [diff] [blame] | 224 | HAL_PARAM_VIDEO_CORES_USAGE, |
| 225 | HAL_PARAM_VIDEO_WORK_MODE, |
Karthikeyan Periasamy | a0e4bad | 2017-04-26 12:51:10 -0700 | [diff] [blame] | 226 | HAL_PARAM_SECURE, |
Shivendra Kakrania | c1f60e0 | 2017-04-13 00:07:26 -0700 | [diff] [blame^] | 227 | HAL_PARAM_USE_SYS_CACHE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 228 | }; |
| 229 | |
| 230 | enum hal_domain { |
| 231 | HAL_VIDEO_DOMAIN_VPE, |
| 232 | HAL_VIDEO_DOMAIN_ENCODER, |
| 233 | HAL_VIDEO_DOMAIN_DECODER, |
| 234 | HAL_UNUSED_DOMAIN = 0x10000000, |
| 235 | }; |
| 236 | |
| 237 | enum multi_stream { |
| 238 | HAL_VIDEO_DECODER_NONE = 0x00000000, |
| 239 | HAL_VIDEO_DECODER_PRIMARY = 0x00000001, |
| 240 | HAL_VIDEO_DECODER_SECONDARY = 0x00000002, |
| 241 | HAL_VIDEO_DECODER_BOTH_OUTPUTS = 0x00000004, |
| 242 | HAL_VIDEO_UNUSED_OUTPUTS = 0x10000000, |
| 243 | }; |
| 244 | |
| 245 | enum hal_core_capabilities { |
| 246 | HAL_VIDEO_ENCODER_ROTATION_CAPABILITY = 0x00000001, |
| 247 | HAL_VIDEO_ENCODER_SCALING_CAPABILITY = 0x00000002, |
| 248 | HAL_VIDEO_ENCODER_DEINTERLACE_CAPABILITY = 0x00000004, |
| 249 | HAL_VIDEO_DECODER_MULTI_STREAM_CAPABILITY = 0x00000008, |
| 250 | HAL_VIDEO_UNUSED_CAPABILITY = 0x10000000, |
| 251 | }; |
| 252 | |
| 253 | enum hal_default_properties { |
| 254 | HAL_VIDEO_DYNAMIC_BUF_MODE = 0x00000001, |
| 255 | HAL_VIDEO_CONTINUE_DATA_TRANSFER = 0x00000002, |
| 256 | }; |
| 257 | |
| 258 | enum hal_video_codec { |
| 259 | HAL_VIDEO_CODEC_UNKNOWN = 0x00000000, |
| 260 | HAL_VIDEO_CODEC_MVC = 0x00000001, |
| 261 | HAL_VIDEO_CODEC_H264 = 0x00000002, |
| 262 | HAL_VIDEO_CODEC_H263 = 0x00000004, |
| 263 | HAL_VIDEO_CODEC_MPEG1 = 0x00000008, |
| 264 | HAL_VIDEO_CODEC_MPEG2 = 0x00000010, |
| 265 | HAL_VIDEO_CODEC_MPEG4 = 0x00000020, |
| 266 | HAL_VIDEO_CODEC_DIVX_311 = 0x00000040, |
| 267 | HAL_VIDEO_CODEC_DIVX = 0x00000080, |
| 268 | HAL_VIDEO_CODEC_VC1 = 0x00000100, |
| 269 | HAL_VIDEO_CODEC_SPARK = 0x00000200, |
| 270 | HAL_VIDEO_CODEC_VP6 = 0x00000400, |
| 271 | HAL_VIDEO_CODEC_VP7 = 0x00000800, |
| 272 | HAL_VIDEO_CODEC_VP8 = 0x00001000, |
| 273 | HAL_VIDEO_CODEC_HEVC = 0x00002000, |
| 274 | HAL_VIDEO_CODEC_VP9 = 0x00004000, |
| 275 | HAL_VIDEO_CODEC_HEVC_HYBRID = 0x80000000, |
| 276 | HAL_UNUSED_CODEC = 0x10000000, |
| 277 | }; |
| 278 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 279 | enum hal_mpeg2_profile { |
| 280 | HAL_MPEG2_PROFILE_SIMPLE = 0x00000001, |
| 281 | HAL_MPEG2_PROFILE_MAIN = 0x00000002, |
| 282 | HAL_MPEG2_PROFILE_422 = 0x00000004, |
| 283 | HAL_MPEG2_PROFILE_SNR = 0x00000008, |
| 284 | HAL_MPEG2_PROFILE_SPATIAL = 0x00000010, |
| 285 | HAL_MPEG2_PROFILE_HIGH = 0x00000020, |
| 286 | HAL_UNUSED_MPEG2_PROFILE = 0x10000000, |
| 287 | }; |
| 288 | |
| 289 | enum hal_mpeg2_level { |
| 290 | HAL_MPEG2_LEVEL_LL = 0x00000001, |
| 291 | HAL_MPEG2_LEVEL_ML = 0x00000002, |
| 292 | HAL_MPEG2_LEVEL_H14 = 0x00000004, |
| 293 | HAL_MPEG2_LEVEL_HL = 0x00000008, |
| 294 | HAL_UNUSED_MEPG2_LEVEL = 0x10000000, |
| 295 | }; |
| 296 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 297 | enum hal_h264_profile { |
| 298 | HAL_H264_PROFILE_BASELINE = 0x00000001, |
| 299 | HAL_H264_PROFILE_MAIN = 0x00000002, |
| 300 | HAL_H264_PROFILE_HIGH = 0x00000004, |
| 301 | HAL_H264_PROFILE_EXTENDED = 0x00000008, |
| 302 | HAL_H264_PROFILE_HIGH10 = 0x00000010, |
| 303 | HAL_H264_PROFILE_HIGH422 = 0x00000020, |
| 304 | HAL_H264_PROFILE_HIGH444 = 0x00000040, |
| 305 | HAL_H264_PROFILE_CONSTRAINED_BASE = 0x00000080, |
| 306 | HAL_H264_PROFILE_CONSTRAINED_HIGH = 0x00000100, |
| 307 | HAL_UNUSED_H264_PROFILE = 0x10000000, |
| 308 | }; |
| 309 | |
| 310 | enum hal_h264_level { |
Vaibhav Deshu Venkatesh | 234b4dc | 2017-03-21 16:54:28 -0700 | [diff] [blame] | 311 | HAL_H264_LEVEL_UNKNOWN = 0x00000000, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 312 | HAL_H264_LEVEL_1 = 0x00000001, |
| 313 | HAL_H264_LEVEL_1b = 0x00000002, |
| 314 | HAL_H264_LEVEL_11 = 0x00000004, |
| 315 | HAL_H264_LEVEL_12 = 0x00000008, |
| 316 | HAL_H264_LEVEL_13 = 0x00000010, |
| 317 | HAL_H264_LEVEL_2 = 0x00000020, |
| 318 | HAL_H264_LEVEL_21 = 0x00000040, |
| 319 | HAL_H264_LEVEL_22 = 0x00000080, |
| 320 | HAL_H264_LEVEL_3 = 0x00000100, |
| 321 | HAL_H264_LEVEL_31 = 0x00000200, |
| 322 | HAL_H264_LEVEL_32 = 0x00000400, |
| 323 | HAL_H264_LEVEL_4 = 0x00000800, |
| 324 | HAL_H264_LEVEL_41 = 0x00001000, |
| 325 | HAL_H264_LEVEL_42 = 0x00002000, |
| 326 | HAL_H264_LEVEL_5 = 0x00004000, |
| 327 | HAL_H264_LEVEL_51 = 0x00008000, |
| 328 | HAL_H264_LEVEL_52 = 0x00010000, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 329 | }; |
| 330 | |
| 331 | enum hal_hevc_profile { |
| 332 | HAL_HEVC_PROFILE_MAIN = 0x00000001, |
| 333 | HAL_HEVC_PROFILE_MAIN10 = 0x00000002, |
| 334 | HAL_HEVC_PROFILE_MAIN_STILL_PIC = 0x00000004, |
| 335 | HAL_UNUSED_HEVC_PROFILE = 0x10000000, |
| 336 | }; |
| 337 | |
| 338 | enum hal_hevc_level { |
Vaibhav Deshu Venkatesh | 234b4dc | 2017-03-21 16:54:28 -0700 | [diff] [blame] | 339 | HAL_HEVC_TIER_LEVEL_UNKNOWN = 0x00000000, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 340 | HAL_HEVC_MAIN_TIER_LEVEL_1 = 0x10000001, |
| 341 | HAL_HEVC_MAIN_TIER_LEVEL_2 = 0x10000002, |
| 342 | HAL_HEVC_MAIN_TIER_LEVEL_2_1 = 0x10000004, |
| 343 | HAL_HEVC_MAIN_TIER_LEVEL_3 = 0x10000008, |
| 344 | HAL_HEVC_MAIN_TIER_LEVEL_3_1 = 0x10000010, |
| 345 | HAL_HEVC_MAIN_TIER_LEVEL_4 = 0x10000020, |
| 346 | HAL_HEVC_MAIN_TIER_LEVEL_4_1 = 0x10000040, |
| 347 | HAL_HEVC_MAIN_TIER_LEVEL_5 = 0x10000080, |
| 348 | HAL_HEVC_MAIN_TIER_LEVEL_5_1 = 0x10000100, |
| 349 | HAL_HEVC_MAIN_TIER_LEVEL_5_2 = 0x10000200, |
| 350 | HAL_HEVC_MAIN_TIER_LEVEL_6 = 0x10000400, |
| 351 | HAL_HEVC_MAIN_TIER_LEVEL_6_1 = 0x10000800, |
| 352 | HAL_HEVC_MAIN_TIER_LEVEL_6_2 = 0x10001000, |
| 353 | HAL_HEVC_HIGH_TIER_LEVEL_1 = 0x20000001, |
| 354 | HAL_HEVC_HIGH_TIER_LEVEL_2 = 0x20000002, |
| 355 | HAL_HEVC_HIGH_TIER_LEVEL_2_1 = 0x20000004, |
| 356 | HAL_HEVC_HIGH_TIER_LEVEL_3 = 0x20000008, |
| 357 | HAL_HEVC_HIGH_TIER_LEVEL_3_1 = 0x20000010, |
| 358 | HAL_HEVC_HIGH_TIER_LEVEL_4 = 0x20000020, |
| 359 | HAL_HEVC_HIGH_TIER_LEVEL_4_1 = 0x20000040, |
| 360 | HAL_HEVC_HIGH_TIER_LEVEL_5 = 0x20000080, |
| 361 | HAL_HEVC_HIGH_TIER_LEVEL_5_1 = 0x20000100, |
| 362 | HAL_HEVC_HIGH_TIER_LEVEL_5_2 = 0x20000200, |
| 363 | HAL_HEVC_HIGH_TIER_LEVEL_6 = 0x20000400, |
| 364 | HAL_HEVC_HIGH_TIER_LEVEL_6_1 = 0x20000800, |
| 365 | HAL_HEVC_HIGH_TIER_LEVEL_6_2 = 0x20001000, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 366 | }; |
| 367 | |
| 368 | enum hal_hevc_tier { |
| 369 | HAL_HEVC_TIER_MAIN = 0x00000001, |
| 370 | HAL_HEVC_TIER_HIGH = 0x00000002, |
| 371 | HAL_UNUSED_HEVC_TIER = 0x10000000, |
| 372 | }; |
| 373 | |
| 374 | enum hal_vpx_profile { |
Chinmay Sawarkar | 7f1cc15 | 2017-05-05 18:16:36 -0700 | [diff] [blame] | 375 | HAL_VPX_PROFILE_MAIN = 0x00000001, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 376 | HAL_VPX_PROFILE_UNUSED = 0x10000000, |
| 377 | }; |
| 378 | |
Chinmay Sawarkar | 7f1cc15 | 2017-05-05 18:16:36 -0700 | [diff] [blame] | 379 | enum hal_vpx_level { |
| 380 | HAL_VPX_LEVEL_VERSION_0 = 0x00000001, |
| 381 | HAL_VPX_LEVEL_VERSION_1 = 0x00000002, |
| 382 | HAL_VPX_LEVEL_VERSION_2 = 0x00000004, |
| 383 | HAL_VPX_LEVEL_VERSION_3 = 0x00000008, |
| 384 | HAL_VPX_LEVEL_UNUSED = 0x10000000, |
| 385 | }; |
| 386 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 387 | struct hal_frame_rate { |
| 388 | enum hal_buffer buffer_type; |
| 389 | u32 frame_rate; |
| 390 | }; |
| 391 | |
| 392 | enum hal_uncompressed_format { |
| 393 | HAL_COLOR_FORMAT_MONOCHROME = 0x00000001, |
| 394 | HAL_COLOR_FORMAT_NV12 = 0x00000002, |
| 395 | HAL_COLOR_FORMAT_NV21 = 0x00000004, |
| 396 | HAL_COLOR_FORMAT_NV12_4x4TILE = 0x00000008, |
| 397 | HAL_COLOR_FORMAT_NV21_4x4TILE = 0x00000010, |
| 398 | HAL_COLOR_FORMAT_YUYV = 0x00000020, |
| 399 | HAL_COLOR_FORMAT_YVYU = 0x00000040, |
| 400 | HAL_COLOR_FORMAT_UYVY = 0x00000080, |
| 401 | HAL_COLOR_FORMAT_VYUY = 0x00000100, |
| 402 | HAL_COLOR_FORMAT_RGB565 = 0x00000200, |
| 403 | HAL_COLOR_FORMAT_BGR565 = 0x00000400, |
| 404 | HAL_COLOR_FORMAT_RGB888 = 0x00000800, |
| 405 | HAL_COLOR_FORMAT_BGR888 = 0x00001000, |
| 406 | HAL_COLOR_FORMAT_NV12_UBWC = 0x00002000, |
| 407 | HAL_COLOR_FORMAT_NV12_TP10_UBWC = 0x00004000, |
| 408 | HAL_COLOR_FORMAT_RGBA8888 = 0x00008000, |
| 409 | HAL_COLOR_FORMAT_RGBA8888_UBWC = 0x00010000, |
| 410 | HAL_UNUSED_COLOR = 0x10000000, |
| 411 | }; |
| 412 | |
| 413 | enum hal_statistics_mode_type { |
| 414 | HAL_STATISTICS_MODE_DEFAULT = 0x00000001, |
| 415 | HAL_STATISTICS_MODE_1 = 0x00000002, |
| 416 | HAL_STATISTICS_MODE_2 = 0x00000004, |
| 417 | HAL_STATISTICS_MODE_3 = 0x00000008, |
| 418 | }; |
| 419 | |
| 420 | enum hal_ssr_trigger_type { |
| 421 | SSR_ERR_FATAL = 1, |
| 422 | SSR_SW_DIV_BY_ZERO, |
| 423 | SSR_HW_WDOG_IRQ, |
| 424 | }; |
| 425 | |
| 426 | struct hal_uncompressed_format_select { |
| 427 | enum hal_buffer buffer_type; |
| 428 | enum hal_uncompressed_format format; |
| 429 | }; |
| 430 | |
| 431 | struct hal_uncompressed_plane_actual { |
| 432 | int actual_stride; |
| 433 | u32 actual_plane_buffer_height; |
| 434 | }; |
| 435 | |
| 436 | struct hal_uncompressed_plane_actual_info { |
| 437 | enum hal_buffer buffer_type; |
| 438 | u32 num_planes; |
| 439 | struct hal_uncompressed_plane_actual rg_plane_format[1]; |
| 440 | }; |
| 441 | |
| 442 | struct hal_uncompressed_plane_constraints { |
| 443 | u32 stride_multiples; |
| 444 | u32 max_stride; |
| 445 | u32 min_plane_buffer_height_multiple; |
| 446 | u32 buffer_alignment; |
| 447 | }; |
| 448 | |
| 449 | struct hal_uncompressed_plane_actual_constraints_info { |
| 450 | enum hal_buffer buffer_type; |
| 451 | u32 num_planes; |
| 452 | struct hal_uncompressed_plane_constraints rg_plane_format[1]; |
| 453 | }; |
| 454 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 455 | struct hal_frame_size { |
| 456 | enum hal_buffer buffer_type; |
| 457 | u32 width; |
| 458 | u32 height; |
| 459 | }; |
| 460 | |
| 461 | struct hal_enable { |
| 462 | bool enable; |
| 463 | }; |
| 464 | |
| 465 | struct hal_buffer_count_actual { |
| 466 | enum hal_buffer buffer_type; |
| 467 | u32 buffer_count_actual; |
Praneeth Paladugu | defea4e | 2017-02-09 23:44:08 -0800 | [diff] [blame] | 468 | u32 buffer_count_min_host; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 469 | }; |
| 470 | |
| 471 | struct hal_buffer_size_minimum { |
| 472 | enum hal_buffer buffer_type; |
| 473 | u32 buffer_size; |
| 474 | }; |
| 475 | |
| 476 | struct hal_buffer_display_hold_count_actual { |
| 477 | enum hal_buffer buffer_type; |
| 478 | u32 hold_count; |
| 479 | }; |
| 480 | |
| 481 | enum hal_nal_stream_format { |
| 482 | HAL_NAL_FORMAT_STARTCODES = 0x00000001, |
| 483 | HAL_NAL_FORMAT_ONE_NAL_PER_BUFFER = 0x00000002, |
| 484 | HAL_NAL_FORMAT_ONE_BYTE_LENGTH = 0x00000004, |
| 485 | HAL_NAL_FORMAT_TWO_BYTE_LENGTH = 0x00000008, |
| 486 | HAL_NAL_FORMAT_FOUR_BYTE_LENGTH = 0x00000010, |
| 487 | }; |
| 488 | |
| 489 | enum hal_output_order { |
| 490 | HAL_OUTPUT_ORDER_DISPLAY, |
| 491 | HAL_OUTPUT_ORDER_DECODE, |
| 492 | HAL_UNUSED_OUTPUT = 0x10000000, |
| 493 | }; |
| 494 | |
| 495 | enum hal_picture { |
| 496 | HAL_PICTURE_I = 0x01, |
| 497 | HAL_PICTURE_P = 0x02, |
| 498 | HAL_PICTURE_B = 0x04, |
| 499 | HAL_PICTURE_IDR = 0x08, |
| 500 | HAL_PICTURE_CRA = 0x10, |
| 501 | HAL_FRAME_NOTCODED = 0x7F002000, |
| 502 | HAL_FRAME_YUV = 0x7F004000, |
| 503 | HAL_UNUSED_PICT = 0x10000000, |
| 504 | }; |
| 505 | |
| 506 | struct hal_extradata_enable { |
| 507 | u32 enable; |
| 508 | enum hal_extradata_id index; |
| 509 | }; |
| 510 | |
| 511 | struct hal_enable_picture { |
| 512 | u32 picture_type; |
| 513 | }; |
| 514 | |
| 515 | struct hal_multi_stream { |
| 516 | enum hal_buffer buffer_type; |
| 517 | u32 enable; |
| 518 | u32 width; |
| 519 | u32 height; |
| 520 | }; |
| 521 | |
| 522 | struct hal_display_picture_buffer_count { |
| 523 | u32 enable; |
| 524 | u32 count; |
| 525 | }; |
| 526 | |
| 527 | struct hal_mb_error_map { |
| 528 | u32 error_map_size; |
| 529 | u8 rg_error_map[1]; |
| 530 | }; |
| 531 | |
| 532 | struct hal_request_iframe { |
| 533 | u32 enable; |
| 534 | }; |
| 535 | |
| 536 | struct hal_bitrate { |
| 537 | u32 bit_rate; |
| 538 | u32 layer_id; |
| 539 | }; |
| 540 | |
| 541 | struct hal_profile_level { |
| 542 | u32 profile; |
| 543 | u32 level; |
| 544 | }; |
| 545 | |
| 546 | struct hal_profile_level_supported { |
| 547 | u32 profile_count; |
| 548 | struct hal_profile_level profile_level[MAX_PROFILE_COUNT]; |
| 549 | }; |
| 550 | |
| 551 | enum hal_h264_entropy { |
| 552 | HAL_H264_ENTROPY_CAVLC = 1, |
| 553 | HAL_H264_ENTROPY_CABAC = 2, |
| 554 | HAL_UNUSED_ENTROPY = 0x10000000, |
| 555 | }; |
| 556 | |
| 557 | enum hal_h264_cabac_model { |
| 558 | HAL_H264_CABAC_MODEL_0 = 1, |
| 559 | HAL_H264_CABAC_MODEL_1 = 2, |
| 560 | HAL_H264_CABAC_MODEL_2 = 4, |
| 561 | HAL_UNUSED_CABAC = 0x10000000, |
| 562 | }; |
| 563 | |
| 564 | struct hal_h264_entropy_control { |
| 565 | enum hal_h264_entropy entropy_mode; |
| 566 | enum hal_h264_cabac_model cabac_model; |
| 567 | }; |
| 568 | |
| 569 | enum hal_rate_control { |
| 570 | HAL_RATE_CONTROL_OFF, |
| 571 | HAL_RATE_CONTROL_VBR_VFR, |
| 572 | HAL_RATE_CONTROL_VBR_CFR, |
| 573 | HAL_RATE_CONTROL_CBR_VFR, |
| 574 | HAL_RATE_CONTROL_CBR_CFR, |
| 575 | HAL_RATE_CONTROL_MBR_CFR, |
| 576 | HAL_RATE_CONTROL_MBR_VFR, |
| 577 | HAL_UNUSED_RC = 0x10000000, |
| 578 | }; |
| 579 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 580 | enum hal_h264_db_mode { |
| 581 | HAL_H264_DB_MODE_DISABLE, |
| 582 | HAL_H264_DB_MODE_SKIP_SLICE_BOUNDARY, |
| 583 | HAL_H264_DB_MODE_ALL_BOUNDARY, |
| 584 | HAL_UNUSED_H264_DB = 0x10000000, |
| 585 | }; |
| 586 | |
| 587 | struct hal_h264_db_control { |
| 588 | enum hal_h264_db_mode mode; |
| 589 | int slice_alpha_offset; |
| 590 | int slice_beta_offset; |
| 591 | }; |
| 592 | |
| 593 | struct hal_temporal_spatial_tradeoff { |
| 594 | u32 ts_factor; |
| 595 | }; |
| 596 | |
| 597 | struct hal_quantization { |
| 598 | u32 qpi; |
| 599 | u32 qpp; |
| 600 | u32 qpb; |
| 601 | u32 layer_id; |
Vaibhav Deshu Venkatesh | 3a14716 | 2017-04-27 16:21:12 -0700 | [diff] [blame] | 602 | u32 enable; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 603 | }; |
| 604 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 605 | struct hal_quantization_range { |
Praneeth Paladugu | 7fbd279 | 2017-01-27 13:39:03 -0800 | [diff] [blame] | 606 | u32 qpi_min; |
| 607 | u32 qpp_min; |
| 608 | u32 qpb_min; |
| 609 | u32 qpi_max; |
| 610 | u32 qpp_max; |
| 611 | u32 qpb_max; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 612 | u32 layer_id; |
| 613 | }; |
| 614 | |
| 615 | struct hal_intra_period { |
| 616 | u32 pframes; |
| 617 | u32 bframes; |
| 618 | }; |
| 619 | |
| 620 | struct hal_idr_period { |
| 621 | u32 idr_period; |
| 622 | }; |
| 623 | |
| 624 | enum hal_rotate { |
| 625 | HAL_ROTATE_NONE, |
| 626 | HAL_ROTATE_90, |
| 627 | HAL_ROTATE_180, |
| 628 | HAL_ROTATE_270, |
| 629 | HAL_UNUSED_ROTATE = 0x10000000, |
| 630 | }; |
| 631 | |
| 632 | enum hal_flip { |
| 633 | HAL_FLIP_NONE, |
| 634 | HAL_FLIP_HORIZONTAL, |
| 635 | HAL_FLIP_VERTICAL, |
| 636 | HAL_UNUSED_FLIP = 0x10000000, |
| 637 | }; |
| 638 | |
| 639 | struct hal_operations { |
| 640 | enum hal_rotate rotate; |
| 641 | enum hal_flip flip; |
| 642 | }; |
| 643 | |
| 644 | enum hal_intra_refresh_mode { |
| 645 | HAL_INTRA_REFRESH_NONE, |
| 646 | HAL_INTRA_REFRESH_CYCLIC, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 647 | HAL_INTRA_REFRESH_RANDOM, |
| 648 | HAL_UNUSED_INTRA = 0x10000000, |
| 649 | }; |
| 650 | |
| 651 | struct hal_intra_refresh { |
| 652 | enum hal_intra_refresh_mode mode; |
Saurabh Kothawade | abed16c | 2017-03-22 17:06:40 -0700 | [diff] [blame] | 653 | u32 ir_mbs; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 654 | }; |
| 655 | |
| 656 | enum hal_multi_slice { |
| 657 | HAL_MULTI_SLICE_OFF, |
| 658 | HAL_MULTI_SLICE_BY_MB_COUNT, |
| 659 | HAL_MULTI_SLICE_BY_BYTE_COUNT, |
| 660 | HAL_MULTI_SLICE_GOB, |
| 661 | HAL_UNUSED_SLICE = 0x10000000, |
| 662 | }; |
| 663 | |
| 664 | struct hal_multi_slice_control { |
| 665 | enum hal_multi_slice multi_slice; |
| 666 | u32 slice_size; |
| 667 | }; |
| 668 | |
| 669 | struct hal_debug_config { |
| 670 | u32 debug_config; |
| 671 | }; |
| 672 | |
| 673 | struct hal_buffer_requirements { |
| 674 | enum hal_buffer buffer_type; |
| 675 | u32 buffer_size; |
| 676 | u32 buffer_region_size; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 677 | u32 buffer_count_min; |
Praneeth Paladugu | defea4e | 2017-02-09 23:44:08 -0800 | [diff] [blame] | 678 | u32 buffer_count_min_host; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 679 | u32 buffer_count_actual; |
| 680 | u32 contiguous; |
| 681 | u32 buffer_alignment; |
| 682 | }; |
| 683 | |
| 684 | enum hal_priority {/* Priority increases with number */ |
| 685 | HAL_PRIORITY_LOW = 10, |
| 686 | HAL_PRIOIRTY_MEDIUM = 20, |
| 687 | HAL_PRIORITY_HIGH = 30, |
| 688 | HAL_UNUSED_PRIORITY = 0x10000000, |
| 689 | }; |
| 690 | |
| 691 | struct hal_batch_info { |
| 692 | u32 input_batch_count; |
| 693 | u32 output_batch_count; |
| 694 | }; |
| 695 | |
| 696 | struct hal_metadata_pass_through { |
| 697 | u32 enable; |
| 698 | u32 size; |
| 699 | }; |
| 700 | |
| 701 | struct hal_uncompressed_format_supported { |
| 702 | enum hal_buffer buffer_type; |
| 703 | u32 format_entries; |
| 704 | u32 rg_format_info[1]; |
| 705 | }; |
| 706 | |
| 707 | enum hal_interlace_format { |
| 708 | HAL_INTERLACE_FRAME_PROGRESSIVE = 0x01, |
| 709 | HAL_INTERLACE_INTERLEAVE_FRAME_TOPFIELDFIRST = 0x02, |
| 710 | HAL_INTERLACE_INTERLEAVE_FRAME_BOTTOMFIELDFIRST = 0x04, |
| 711 | HAL_INTERLACE_FRAME_TOPFIELDFIRST = 0x08, |
| 712 | HAL_INTERLACE_FRAME_BOTTOMFIELDFIRST = 0x10, |
| 713 | HAL_UNUSED_INTERLACE = 0x10000000, |
| 714 | }; |
| 715 | |
| 716 | struct hal_interlace_format_supported { |
| 717 | enum hal_buffer buffer_type; |
| 718 | enum hal_interlace_format format; |
| 719 | }; |
| 720 | |
| 721 | enum hal_chroma_site { |
| 722 | HAL_CHROMA_SITE_0, |
| 723 | HAL_CHROMA_SITE_1, |
| 724 | HAL_UNUSED_CHROMA = 0x10000000, |
| 725 | }; |
| 726 | |
| 727 | struct hal_properties_supported { |
| 728 | u32 num_properties; |
| 729 | u32 rg_properties[1]; |
| 730 | }; |
| 731 | |
| 732 | enum hal_capability { |
| 733 | HAL_CAPABILITY_FRAME_WIDTH = 0x1, |
| 734 | HAL_CAPABILITY_FRAME_HEIGHT, |
| 735 | HAL_CAPABILITY_MBS_PER_FRAME, |
| 736 | HAL_CAPABILITY_MBS_PER_SECOND, |
| 737 | HAL_CAPABILITY_FRAMERATE, |
| 738 | HAL_CAPABILITY_SCALE_X, |
| 739 | HAL_CAPABILITY_SCALE_Y, |
| 740 | HAL_CAPABILITY_BITRATE, |
| 741 | HAL_CAPABILITY_BFRAME, |
| 742 | HAL_CAPABILITY_PEAKBITRATE, |
| 743 | HAL_CAPABILITY_HIER_P_NUM_ENH_LAYERS, |
| 744 | HAL_CAPABILITY_ENC_LTR_COUNT, |
| 745 | HAL_CAPABILITY_SECURE_OUTPUT2_THRESHOLD, |
| 746 | HAL_CAPABILITY_HIER_B_NUM_ENH_LAYERS, |
| 747 | HAL_CAPABILITY_LCU_SIZE, |
| 748 | HAL_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, |
| 749 | HAL_CAPABILITY_MBS_PER_SECOND_POWER_SAVE, |
Praneeth Paladugu | 520c759 | 2017-01-26 13:53:14 -0800 | [diff] [blame] | 750 | HAL_CAPABILITY_EXTRADATA, |
| 751 | HAL_CAPABILITY_PROFILE, |
| 752 | HAL_CAPABILITY_LEVEL, |
| 753 | HAL_CAPABILITY_I_FRAME_QP, |
| 754 | HAL_CAPABILITY_P_FRAME_QP, |
| 755 | HAL_CAPABILITY_B_FRAME_QP, |
| 756 | HAL_CAPABILITY_RATE_CONTROL_MODES, |
| 757 | HAL_CAPABILITY_BLUR_WIDTH, |
| 758 | HAL_CAPABILITY_BLUR_HEIGHT, |
| 759 | HAL_CAPABILITY_SLICE_DELIVERY_MODES, |
| 760 | HAL_CAPABILITY_SLICE_BYTE, |
| 761 | HAL_CAPABILITY_SLICE_MB, |
| 762 | HAL_CAPABILITY_SECURE, |
| 763 | HAL_CAPABILITY_MAX_NUM_B_FRAMES, |
| 764 | HAL_CAPABILITY_MAX_VIDEOCORES, |
| 765 | HAL_CAPABILITY_MAX_WORKMODES, |
| 766 | HAL_CAPABILITY_UBWC_CR_STATS, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 767 | HAL_UNUSED_CAPABILITY = 0x10000000, |
| 768 | }; |
| 769 | |
| 770 | struct hal_capability_supported { |
| 771 | enum hal_capability capability_type; |
| 772 | u32 min; |
| 773 | u32 max; |
| 774 | u32 step_size; |
| 775 | }; |
| 776 | |
| 777 | struct hal_capability_supported_info { |
| 778 | u32 num_capabilities; |
| 779 | struct hal_capability_supported rg_data[1]; |
| 780 | }; |
| 781 | |
| 782 | struct hal_nal_stream_format_supported { |
| 783 | u32 nal_stream_format_supported; |
| 784 | }; |
| 785 | |
| 786 | struct hal_nal_stream_format_select { |
| 787 | u32 nal_stream_format_select; |
| 788 | }; |
| 789 | |
| 790 | struct hal_multi_view_format { |
| 791 | u32 views; |
| 792 | u32 rg_view_order[1]; |
| 793 | }; |
| 794 | |
| 795 | enum hal_buffer_layout_type { |
| 796 | HAL_BUFFER_LAYOUT_TOP_BOTTOM, |
| 797 | HAL_BUFFER_LAYOUT_SEQ, |
| 798 | HAL_UNUSED_BUFFER_LAYOUT = 0x10000000, |
| 799 | }; |
| 800 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 801 | struct hal_aspect_ratio { |
| 802 | u32 aspect_width; |
| 803 | u32 aspect_height; |
| 804 | }; |
| 805 | |
| 806 | struct hal_codec_supported { |
| 807 | u32 decoder_codec_supported; |
| 808 | u32 encoder_codec_supported; |
| 809 | }; |
| 810 | |
| 811 | struct hal_multi_view_select { |
| 812 | u32 view_index; |
| 813 | }; |
| 814 | |
| 815 | struct hal_timestamp_scale { |
| 816 | u32 time_stamp_scale; |
| 817 | }; |
| 818 | |
| 819 | |
Chinmay Sawarkar | d005462 | 2017-05-04 13:50:59 -0700 | [diff] [blame] | 820 | struct hal_vui_timing_info { |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 821 | u32 enable; |
| 822 | u32 fixed_frame_rate; |
| 823 | u32 time_scale; |
| 824 | }; |
| 825 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 826 | struct hal_preserve_text_quality { |
| 827 | u32 enable; |
| 828 | }; |
| 829 | |
Praneeth Paladugu | 238977b | 2016-12-06 12:51:26 -0800 | [diff] [blame] | 830 | enum hal_core_id { |
| 831 | VIDC_CORE_ID_DEFAULT = 0, |
| 832 | VIDC_CORE_ID_1 = 1, /* 0b01 */ |
| 833 | VIDC_CORE_ID_2 = 2, /* 0b10 */ |
| 834 | VIDC_CORE_ID_3 = 3, /* 0b11 */ |
| 835 | VIDC_CORE_ID_UNUSED = 0x10000000, |
| 836 | }; |
| 837 | |
| 838 | struct hal_videocores_usage_info { |
| 839 | u32 video_core_enable_mask; |
| 840 | }; |
| 841 | |
| 842 | enum hal_work_mode { |
| 843 | VIDC_WORK_MODE_1, |
| 844 | VIDC_WORK_MODE_2, |
| 845 | VIDC_WORK_MODE_UNUSED = 0x10000000, |
| 846 | }; |
| 847 | |
| 848 | struct hal_video_work_mode { |
| 849 | u32 video_work_mode; |
| 850 | }; |
| 851 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 852 | struct hal_vpe_color_space_conversion { |
| 853 | u32 csc_matrix[HAL_MAX_MATRIX_COEFFS]; |
| 854 | u32 csc_bias[HAL_MAX_BIAS_COEFFS]; |
| 855 | u32 csc_limit[HAL_MAX_LIMIT_COEFFS]; |
| 856 | }; |
| 857 | |
| 858 | struct hal_video_signal_info { |
| 859 | u32 color_space; |
| 860 | u32 transfer_chars; |
| 861 | u32 matrix_coeffs; |
| 862 | bool full_range; |
| 863 | }; |
| 864 | |
| 865 | enum hal_iframesize_type { |
| 866 | HAL_IFRAMESIZE_TYPE_DEFAULT, |
| 867 | HAL_IFRAMESIZE_TYPE_MEDIUM, |
| 868 | HAL_IFRAMESIZE_TYPE_HUGE, |
| 869 | HAL_IFRAMESIZE_TYPE_UNLIMITED, |
| 870 | }; |
| 871 | |
| 872 | enum vidc_resource_id { |
| 873 | VIDC_RESOURCE_NONE, |
Shivendra Kakrania | c1f60e0 | 2017-04-13 00:07:26 -0700 | [diff] [blame^] | 874 | VIDC_RESOURCE_SYSCACHE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 875 | VIDC_UNUSED_RESOURCE = 0x10000000, |
| 876 | }; |
| 877 | |
| 878 | struct vidc_resource_hdr { |
| 879 | enum vidc_resource_id resource_id; |
| 880 | void *resource_handle; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 881 | }; |
| 882 | |
| 883 | struct vidc_buffer_addr_info { |
| 884 | enum hal_buffer buffer_type; |
| 885 | u32 buffer_size; |
| 886 | u32 num_buffers; |
| 887 | ion_phys_addr_t align_device_addr; |
| 888 | ion_phys_addr_t extradata_addr; |
| 889 | u32 extradata_size; |
| 890 | u32 response_required; |
| 891 | }; |
| 892 | |
| 893 | /* Needs to be exactly the same as hfi_buffer_info */ |
| 894 | struct hal_buffer_info { |
| 895 | u32 buffer_addr; |
| 896 | u32 extra_data_addr; |
| 897 | }; |
| 898 | |
| 899 | struct vidc_frame_plane_config { |
| 900 | u32 left; |
| 901 | u32 top; |
| 902 | u32 width; |
| 903 | u32 height; |
| 904 | u32 stride; |
| 905 | u32 scan_lines; |
| 906 | }; |
| 907 | |
| 908 | struct vidc_uncompressed_frame_config { |
| 909 | struct vidc_frame_plane_config luma_plane; |
| 910 | struct vidc_frame_plane_config chroma_plane; |
| 911 | }; |
| 912 | |
| 913 | struct vidc_frame_data { |
| 914 | enum hal_buffer buffer_type; |
| 915 | ion_phys_addr_t device_addr; |
| 916 | ion_phys_addr_t extradata_addr; |
| 917 | int64_t timestamp; |
| 918 | u32 flags; |
| 919 | u32 offset; |
| 920 | u32 alloc_len; |
| 921 | u32 filled_len; |
| 922 | u32 mark_target; |
| 923 | u32 mark_data; |
| 924 | u32 clnt_data; |
| 925 | u32 extradata_size; |
| 926 | }; |
| 927 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 928 | struct hal_fw_info { |
| 929 | char version[VENUS_VERSION_LENGTH]; |
| 930 | phys_addr_t base_addr; |
| 931 | int register_base; |
| 932 | int register_size; |
| 933 | int irq; |
| 934 | }; |
| 935 | |
| 936 | enum hal_flush { |
| 937 | HAL_FLUSH_INPUT, |
| 938 | HAL_FLUSH_OUTPUT, |
| 939 | HAL_FLUSH_ALL, |
| 940 | HAL_UNUSED_FLUSH = 0x10000000, |
| 941 | }; |
| 942 | |
| 943 | enum hal_event_type { |
| 944 | HAL_EVENT_SEQ_CHANGED_SUFFICIENT_RESOURCES, |
| 945 | HAL_EVENT_SEQ_CHANGED_INSUFFICIENT_RESOURCES, |
| 946 | HAL_EVENT_RELEASE_BUFFER_REFERENCE, |
| 947 | HAL_UNUSED_SEQCHG = 0x10000000, |
| 948 | }; |
| 949 | |
| 950 | enum buffer_mode_type { |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 951 | HAL_BUFFER_MODE_DYNAMIC = 0x100, |
Chinmay Sawarkar | 2de3f77 | 2017-02-07 12:03:44 -0800 | [diff] [blame] | 952 | HAL_BUFFER_MODE_STATIC = 0x001, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 953 | }; |
| 954 | |
| 955 | struct hal_buffer_alloc_mode { |
| 956 | enum hal_buffer buffer_type; |
| 957 | enum buffer_mode_type buffer_mode; |
| 958 | }; |
| 959 | |
| 960 | enum ltr_mode { |
| 961 | HAL_LTR_MODE_DISABLE, |
| 962 | HAL_LTR_MODE_MANUAL, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 963 | }; |
| 964 | |
| 965 | struct hal_ltr_mode { |
| 966 | enum ltr_mode mode; |
| 967 | u32 count; |
| 968 | u32 trust_mode; |
| 969 | }; |
| 970 | |
| 971 | struct hal_ltr_use { |
| 972 | u32 ref_ltr; |
| 973 | u32 use_constraint; |
| 974 | u32 frames; |
| 975 | }; |
| 976 | |
| 977 | struct hal_ltr_mark { |
| 978 | u32 mark_frame; |
| 979 | }; |
| 980 | |
| 981 | enum hal_perf_mode { |
| 982 | HAL_PERF_MODE_POWER_SAVE, |
| 983 | HAL_PERF_MODE_POWER_MAX_QUALITY, |
| 984 | }; |
| 985 | |
| 986 | struct hal_hybrid_hierp { |
| 987 | u32 layers; |
| 988 | }; |
| 989 | |
| 990 | struct hal_scs_threshold { |
| 991 | u32 threshold_value; |
| 992 | }; |
| 993 | |
| 994 | struct buffer_requirements { |
| 995 | struct hal_buffer_requirements buffer[HAL_BUFFER_MAX]; |
| 996 | }; |
| 997 | |
| 998 | union hal_get_property { |
| 999 | struct hal_frame_rate frame_rate; |
| 1000 | struct hal_uncompressed_format_select format_select; |
| 1001 | struct hal_uncompressed_plane_actual plane_actual; |
| 1002 | struct hal_uncompressed_plane_actual_info plane_actual_info; |
| 1003 | struct hal_uncompressed_plane_constraints plane_constraints; |
| 1004 | struct hal_uncompressed_plane_actual_constraints_info |
| 1005 | plane_constraints_info; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1006 | struct hal_frame_size frame_size; |
| 1007 | struct hal_enable enable; |
| 1008 | struct hal_buffer_count_actual buffer_count_actual; |
| 1009 | struct hal_extradata_enable extradata_enable; |
| 1010 | struct hal_enable_picture enable_picture; |
| 1011 | struct hal_multi_stream multi_stream; |
| 1012 | struct hal_display_picture_buffer_count display_picture_buffer_count; |
| 1013 | struct hal_mb_error_map mb_error_map; |
| 1014 | struct hal_request_iframe request_iframe; |
| 1015 | struct hal_bitrate bitrate; |
| 1016 | struct hal_profile_level profile_level; |
| 1017 | struct hal_profile_level_supported profile_level_supported; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1018 | struct hal_h264_db_control h264_db_control; |
| 1019 | struct hal_temporal_spatial_tradeoff temporal_spatial_tradeoff; |
| 1020 | struct hal_quantization quantization; |
| 1021 | struct hal_quantization_range quantization_range; |
| 1022 | struct hal_intra_period intra_period; |
| 1023 | struct hal_idr_period idr_period; |
| 1024 | struct hal_operations operations; |
| 1025 | struct hal_intra_refresh intra_refresh; |
| 1026 | struct hal_multi_slice_control multi_slice_control; |
| 1027 | struct hal_debug_config debug_config; |
| 1028 | struct hal_batch_info batch_info; |
| 1029 | struct hal_metadata_pass_through metadata_pass_through; |
| 1030 | struct hal_uncompressed_format_supported uncompressed_format_supported; |
| 1031 | struct hal_interlace_format_supported interlace_format_supported; |
| 1032 | struct hal_properties_supported properties_supported; |
| 1033 | struct hal_capability_supported capability_supported; |
| 1034 | struct hal_capability_supported_info capability_supported_info; |
| 1035 | struct hal_nal_stream_format_supported nal_stream_format_supported; |
| 1036 | struct hal_nal_stream_format_select nal_stream_format_select; |
| 1037 | struct hal_multi_view_format multi_view_format; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1038 | struct hal_codec_supported codec_supported; |
| 1039 | struct hal_multi_view_select multi_view_select; |
| 1040 | struct hal_timestamp_scale timestamp_scale; |
Chinmay Sawarkar | d005462 | 2017-05-04 13:50:59 -0700 | [diff] [blame] | 1041 | struct hal_vui_timing_info vui_timing_info; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1042 | struct hal_preserve_text_quality preserve_text_quality; |
| 1043 | struct hal_buffer_info buffer_info; |
| 1044 | struct hal_buffer_alloc_mode buffer_alloc_mode; |
| 1045 | struct buffer_requirements buf_req; |
| 1046 | enum hal_h264_entropy h264_entropy; |
| 1047 | }; |
| 1048 | |
| 1049 | /* HAL Response */ |
| 1050 | #define IS_HAL_SYS_CMD(cmd) ((cmd) >= HAL_SYS_INIT_DONE && \ |
| 1051 | (cmd) <= HAL_SYS_ERROR) |
| 1052 | #define IS_HAL_SESSION_CMD(cmd) ((cmd) >= HAL_SESSION_EVENT_CHANGE && \ |
| 1053 | (cmd) <= HAL_SESSION_ERROR) |
| 1054 | enum hal_command_response { |
| 1055 | /* SYSTEM COMMANDS_DONE*/ |
| 1056 | HAL_SYS_INIT_DONE, |
| 1057 | HAL_SYS_SET_RESOURCE_DONE, |
| 1058 | HAL_SYS_RELEASE_RESOURCE_DONE, |
| 1059 | HAL_SYS_PING_ACK_DONE, |
| 1060 | HAL_SYS_PC_PREP_DONE, |
| 1061 | HAL_SYS_IDLE, |
| 1062 | HAL_SYS_DEBUG, |
| 1063 | HAL_SYS_WATCHDOG_TIMEOUT, |
| 1064 | HAL_SYS_ERROR, |
| 1065 | /* SESSION COMMANDS_DONE */ |
| 1066 | HAL_SESSION_EVENT_CHANGE, |
| 1067 | HAL_SESSION_LOAD_RESOURCE_DONE, |
| 1068 | HAL_SESSION_INIT_DONE, |
| 1069 | HAL_SESSION_END_DONE, |
| 1070 | HAL_SESSION_ABORT_DONE, |
| 1071 | HAL_SESSION_START_DONE, |
| 1072 | HAL_SESSION_STOP_DONE, |
| 1073 | HAL_SESSION_ETB_DONE, |
| 1074 | HAL_SESSION_FTB_DONE, |
| 1075 | HAL_SESSION_FLUSH_DONE, |
| 1076 | HAL_SESSION_SUSPEND_DONE, |
| 1077 | HAL_SESSION_RESUME_DONE, |
| 1078 | HAL_SESSION_SET_PROP_DONE, |
| 1079 | HAL_SESSION_GET_PROP_DONE, |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1080 | HAL_SESSION_RELEASE_BUFFER_DONE, |
| 1081 | HAL_SESSION_RELEASE_RESOURCE_DONE, |
| 1082 | HAL_SESSION_PROPERTY_INFO, |
| 1083 | HAL_SESSION_ERROR, |
| 1084 | HAL_RESPONSE_UNUSED = 0x10000000, |
| 1085 | }; |
| 1086 | |
| 1087 | struct vidc_hal_ebd { |
| 1088 | u32 timestamp_hi; |
| 1089 | u32 timestamp_lo; |
| 1090 | u32 flags; |
| 1091 | enum vidc_status status; |
| 1092 | u32 mark_target; |
| 1093 | u32 mark_data; |
| 1094 | u32 stats; |
| 1095 | u32 offset; |
| 1096 | u32 alloc_len; |
| 1097 | u32 filled_len; |
| 1098 | enum hal_picture picture_type; |
| 1099 | ion_phys_addr_t packet_buffer; |
| 1100 | ion_phys_addr_t extra_data_buffer; |
| 1101 | }; |
| 1102 | |
| 1103 | struct vidc_hal_fbd { |
| 1104 | u32 stream_id; |
| 1105 | u32 view_id; |
| 1106 | u32 timestamp_hi; |
| 1107 | u32 timestamp_lo; |
| 1108 | u32 flags1; |
| 1109 | u32 mark_target; |
| 1110 | u32 mark_data; |
| 1111 | u32 stats; |
| 1112 | u32 alloc_len1; |
| 1113 | u32 filled_len1; |
| 1114 | u32 offset1; |
| 1115 | u32 frame_width; |
| 1116 | u32 frame_height; |
| 1117 | u32 start_x_coord; |
| 1118 | u32 start_y_coord; |
| 1119 | u32 input_tag; |
| 1120 | u32 input_tag1; |
| 1121 | enum hal_picture picture_type; |
| 1122 | ion_phys_addr_t packet_buffer1; |
| 1123 | ion_phys_addr_t extra_data_buffer; |
| 1124 | u32 flags2; |
| 1125 | u32 alloc_len2; |
| 1126 | u32 filled_len2; |
| 1127 | u32 offset2; |
| 1128 | ion_phys_addr_t packet_buffer2; |
| 1129 | u32 flags3; |
| 1130 | u32 alloc_len3; |
| 1131 | u32 filled_len3; |
| 1132 | u32 offset3; |
| 1133 | ion_phys_addr_t packet_buffer3; |
| 1134 | enum hal_buffer buffer_type; |
| 1135 | }; |
| 1136 | |
| 1137 | struct msm_vidc_capability { |
| 1138 | enum hal_domain domain; |
| 1139 | enum hal_video_codec codec; |
| 1140 | struct hal_capability_supported width; |
| 1141 | struct hal_capability_supported height; |
| 1142 | struct hal_capability_supported mbs_per_frame; |
| 1143 | struct hal_capability_supported mbs_per_sec; |
| 1144 | struct hal_capability_supported frame_rate; |
| 1145 | struct hal_capability_supported scale_x; |
| 1146 | struct hal_capability_supported scale_y; |
| 1147 | struct hal_capability_supported bitrate; |
| 1148 | struct hal_capability_supported bframe; |
| 1149 | struct hal_capability_supported peakbitrate; |
| 1150 | struct hal_capability_supported hier_p; |
| 1151 | struct hal_capability_supported ltr_count; |
| 1152 | struct hal_capability_supported secure_output2_threshold; |
| 1153 | struct hal_capability_supported hier_b; |
| 1154 | struct hal_capability_supported lcu_size; |
| 1155 | struct hal_capability_supported hier_p_hybrid; |
| 1156 | struct hal_capability_supported mbs_per_sec_power_save; |
Praneeth Paladugu | 520c759 | 2017-01-26 13:53:14 -0800 | [diff] [blame] | 1157 | struct hal_capability_supported extradata; |
| 1158 | struct hal_capability_supported profile; |
| 1159 | struct hal_capability_supported level; |
| 1160 | struct hal_capability_supported i_qp; |
| 1161 | struct hal_capability_supported p_qp; |
| 1162 | struct hal_capability_supported b_qp; |
| 1163 | struct hal_capability_supported rc_modes; |
| 1164 | struct hal_capability_supported blur_width; |
| 1165 | struct hal_capability_supported blur_height; |
| 1166 | struct hal_capability_supported slice_delivery_mode; |
| 1167 | struct hal_capability_supported slice_bytes; |
| 1168 | struct hal_capability_supported slice_mbs; |
| 1169 | struct hal_capability_supported secure; |
| 1170 | struct hal_capability_supported max_num_b_frames; |
| 1171 | struct hal_capability_supported max_video_cores; |
| 1172 | struct hal_capability_supported max_work_modes; |
| 1173 | struct hal_capability_supported ubwc_cr_stats; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1174 | struct hal_profile_level_supported profile_level; |
| 1175 | struct hal_uncompressed_format_supported uncomp_format; |
| 1176 | struct hal_interlace_format_supported HAL_format; |
| 1177 | struct hal_nal_stream_format_supported nal_stream_format; |
| 1178 | struct hal_intra_refresh intra_refresh; |
| 1179 | enum buffer_mode_type alloc_mode_out; |
| 1180 | enum buffer_mode_type alloc_mode_in; |
| 1181 | u32 pixelprocess_capabilities; |
| 1182 | }; |
| 1183 | |
| 1184 | struct vidc_hal_sys_init_done { |
| 1185 | u32 dec_codec_supported; |
| 1186 | u32 enc_codec_supported; |
| 1187 | u32 codec_count; |
| 1188 | struct msm_vidc_capability *capabilities; |
| 1189 | u32 max_sessions_supported; |
| 1190 | }; |
| 1191 | |
| 1192 | struct vidc_hal_session_init_done { |
| 1193 | struct msm_vidc_capability capability; |
| 1194 | }; |
| 1195 | |
| 1196 | struct msm_vidc_cb_cmd_done { |
| 1197 | u32 device_id; |
| 1198 | void *session_id; |
| 1199 | enum vidc_status status; |
| 1200 | u32 size; |
| 1201 | union { |
| 1202 | struct vidc_resource_hdr resource_hdr; |
| 1203 | struct vidc_buffer_addr_info buffer_addr_info; |
| 1204 | struct vidc_frame_plane_config frame_plane_config; |
| 1205 | struct vidc_uncompressed_frame_config uncompressed_frame_config; |
| 1206 | struct vidc_frame_data frame_data; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1207 | struct vidc_hal_ebd ebd; |
| 1208 | struct vidc_hal_fbd fbd; |
| 1209 | struct vidc_hal_sys_init_done sys_init_done; |
| 1210 | struct vidc_hal_session_init_done session_init_done; |
| 1211 | struct hal_buffer_info buffer_info; |
| 1212 | union hal_get_property property; |
| 1213 | enum hal_flush flush_type; |
| 1214 | } data; |
| 1215 | }; |
| 1216 | |
| 1217 | struct msm_vidc_cb_event { |
| 1218 | u32 device_id; |
| 1219 | void *session_id; |
| 1220 | enum vidc_status status; |
| 1221 | u32 height; |
| 1222 | u32 width; |
| 1223 | enum msm_vidc_pixel_depth bit_depth; |
| 1224 | u32 hal_event_type; |
| 1225 | ion_phys_addr_t packet_buffer; |
| 1226 | ion_phys_addr_t extra_data_buffer; |
| 1227 | u32 pic_struct; |
| 1228 | u32 colour_space; |
Chinmay Sawarkar | b3c6ccb | 2017-02-23 18:01:32 -0800 | [diff] [blame] | 1229 | u32 profile; |
| 1230 | u32 level; |
| 1231 | u32 entropy_mode; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1232 | }; |
| 1233 | |
| 1234 | struct msm_vidc_cb_data_done { |
| 1235 | u32 device_id; |
| 1236 | void *session_id; |
| 1237 | enum vidc_status status; |
| 1238 | u32 size; |
| 1239 | u32 clnt_data; |
| 1240 | union { |
| 1241 | struct vidc_hal_ebd input_done; |
| 1242 | struct vidc_hal_fbd output_done; |
| 1243 | }; |
| 1244 | }; |
| 1245 | |
| 1246 | struct msm_vidc_cb_info { |
| 1247 | enum hal_command_response response_type; |
| 1248 | union { |
| 1249 | struct msm_vidc_cb_cmd_done cmd; |
| 1250 | struct msm_vidc_cb_event event; |
| 1251 | struct msm_vidc_cb_data_done data; |
| 1252 | } response; |
| 1253 | }; |
| 1254 | |
| 1255 | enum msm_vidc_hfi_type { |
| 1256 | VIDC_HFI_VENUS, |
| 1257 | }; |
| 1258 | |
| 1259 | enum msm_vidc_thermal_level { |
| 1260 | VIDC_THERMAL_NORMAL = 0, |
| 1261 | VIDC_THERMAL_LOW, |
| 1262 | VIDC_THERMAL_HIGH, |
| 1263 | VIDC_THERMAL_CRITICAL |
| 1264 | }; |
| 1265 | |
| 1266 | enum vidc_vote_data_session { |
| 1267 | VIDC_BUS_VOTE_DATA_SESSION_INVALID = 0, |
| 1268 | /* |
| 1269 | * No declarations exist. Values generated by VIDC_VOTE_DATA_SESSION_VAL |
| 1270 | * describe the enumerations e.g.: |
| 1271 | * |
| 1272 | * enum vidc_bus_vote_data_session_type h264_decoder_session = |
| 1273 | * VIDC_VOTE_DATA_SESSION_VAL(HAL_VIDEO_CODEC_H264, |
| 1274 | * HAL_VIDEO_DOMAIN_DECODER); |
| 1275 | */ |
| 1276 | }; |
| 1277 | |
| 1278 | /* |
| 1279 | * Careful modifying VIDC_VOTE_DATA_SESSION_VAL(). |
| 1280 | * |
| 1281 | * This macro assigns two bits to each codec: the lower bit denoting the codec |
| 1282 | * type, and the higher bit denoting session type. |
| 1283 | */ |
| 1284 | static inline enum vidc_vote_data_session VIDC_VOTE_DATA_SESSION_VAL( |
| 1285 | enum hal_video_codec c, enum hal_domain d) { |
| 1286 | if (d != HAL_VIDEO_DOMAIN_ENCODER && d != HAL_VIDEO_DOMAIN_DECODER) |
| 1287 | return VIDC_BUS_VOTE_DATA_SESSION_INVALID; |
| 1288 | |
| 1289 | return (1 << ilog2(c) * 2) | ((d - 1) << (ilog2(c) * 2 + 1)); |
| 1290 | } |
| 1291 | |
| 1292 | struct msm_vidc_gov_data { |
| 1293 | struct vidc_bus_vote_data *data; |
| 1294 | u32 data_count; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1295 | }; |
| 1296 | |
| 1297 | enum msm_vidc_power_mode { |
| 1298 | VIDC_POWER_NORMAL = 0, |
| 1299 | VIDC_POWER_LOW, |
| 1300 | VIDC_POWER_TURBO |
| 1301 | }; |
| 1302 | |
| 1303 | struct vidc_bus_vote_data { |
| 1304 | enum hal_domain domain; |
| 1305 | enum hal_video_codec codec; |
| 1306 | enum hal_uncompressed_format color_formats[2]; |
| 1307 | int num_formats; /* 1 = DPB-OPB unified; 2 = split */ |
| 1308 | int height, width, fps; |
| 1309 | enum msm_vidc_power_mode power_mode; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1310 | }; |
| 1311 | |
| 1312 | struct vidc_clk_scale_data { |
| 1313 | enum vidc_vote_data_session session[VIDC_MAX_SESSIONS]; |
| 1314 | enum msm_vidc_power_mode power_mode[VIDC_MAX_SESSIONS]; |
| 1315 | u32 load[VIDC_MAX_SESSIONS]; |
| 1316 | int num_sessions; |
| 1317 | }; |
| 1318 | |
| 1319 | struct hal_index_extradata_input_crop_payload { |
| 1320 | u32 size; |
| 1321 | u32 version; |
| 1322 | u32 port_index; |
| 1323 | u32 left; |
| 1324 | u32 top; |
| 1325 | u32 width; |
| 1326 | u32 height; |
| 1327 | }; |
| 1328 | |
| 1329 | struct hal_cmd_sys_get_property_packet { |
| 1330 | u32 size; |
| 1331 | u32 packet_type; |
| 1332 | u32 num_properties; |
| 1333 | u32 rg_property_data[1]; |
| 1334 | }; |
| 1335 | |
| 1336 | #define call_hfi_op(q, op, args...) \ |
| 1337 | (((q) && (q)->op) ? ((q)->op(args)) : 0) |
| 1338 | |
| 1339 | struct hfi_device { |
| 1340 | void *hfi_device_data; |
| 1341 | |
| 1342 | /*Add function pointers for all the hfi functions below*/ |
| 1343 | int (*core_init)(void *device); |
| 1344 | int (*core_release)(void *device); |
| 1345 | int (*core_ping)(void *device); |
| 1346 | int (*core_trigger_ssr)(void *device, enum hal_ssr_trigger_type); |
| 1347 | int (*session_init)(void *device, void *session_id, |
| 1348 | enum hal_domain session_type, enum hal_video_codec codec_type, |
| 1349 | void **new_session); |
| 1350 | int (*session_end)(void *session); |
| 1351 | int (*session_abort)(void *session); |
| 1352 | int (*session_set_buffers)(void *sess, |
| 1353 | struct vidc_buffer_addr_info *buffer_info); |
| 1354 | int (*session_release_buffers)(void *sess, |
| 1355 | struct vidc_buffer_addr_info *buffer_info); |
| 1356 | int (*session_load_res)(void *sess); |
| 1357 | int (*session_release_res)(void *sess); |
| 1358 | int (*session_start)(void *sess); |
| 1359 | int (*session_continue)(void *sess); |
| 1360 | int (*session_stop)(void *sess); |
| 1361 | int (*session_etb)(void *sess, struct vidc_frame_data *input_frame); |
| 1362 | int (*session_ftb)(void *sess, struct vidc_frame_data *output_frame); |
| 1363 | int (*session_process_batch)(void *sess, |
| 1364 | int num_etbs, struct vidc_frame_data etbs[], |
| 1365 | int num_ftbs, struct vidc_frame_data ftbs[]); |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1366 | int (*session_get_buf_req)(void *sess); |
| 1367 | int (*session_flush)(void *sess, enum hal_flush flush_mode); |
| 1368 | int (*session_set_property)(void *sess, enum hal_property ptype, |
| 1369 | void *pdata); |
| 1370 | int (*session_get_property)(void *sess, enum hal_property ptype); |
Praneeth Paladugu | b71968b | 2015-08-19 20:47:57 -0700 | [diff] [blame] | 1371 | int (*scale_clocks)(void *dev, u32 freq); |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1372 | int (*vote_bus)(void *dev, struct vidc_bus_vote_data *data, |
| 1373 | int num_data); |
| 1374 | int (*get_fw_info)(void *dev, struct hal_fw_info *fw_info); |
| 1375 | int (*session_clean)(void *sess); |
| 1376 | int (*get_core_capabilities)(void *dev); |
| 1377 | int (*suspend)(void *dev); |
| 1378 | int (*flush_debug_queue)(void *dev); |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1379 | enum hal_default_properties (*get_default_properties)(void *dev); |
| 1380 | }; |
| 1381 | |
| 1382 | typedef void (*hfi_cmd_response_callback) (enum hal_command_response cmd, |
| 1383 | void *data); |
| 1384 | typedef void (*msm_vidc_callback) (u32 response, void *callback); |
| 1385 | |
| 1386 | struct hfi_device *vidc_hfi_initialize(enum msm_vidc_hfi_type hfi_type, |
| 1387 | u32 device_id, struct msm_vidc_platform_resources *res, |
| 1388 | hfi_cmd_response_callback callback); |
| 1389 | void vidc_hfi_deinitialize(enum msm_vidc_hfi_type hfi_type, |
| 1390 | struct hfi_device *hdev); |
| 1391 | u32 vidc_get_hfi_domain(enum hal_domain hal_domain); |
| 1392 | u32 vidc_get_hfi_codec(enum hal_video_codec hal_codec); |
| 1393 | enum hal_domain vidc_get_hal_domain(u32 hfi_domain); |
| 1394 | enum hal_video_codec vidc_get_hal_codec(u32 hfi_codec); |
| 1395 | |
| 1396 | #endif /*__VIDC_HFI_API_H__ */ |