blob: 5faae476954cdb3d6972d4480c15801db8a76f40 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Ben Gamari20172632009-02-17 20:08:50 -050032#include "drmP.h"
33#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000035#include "intel_ringbuffer.h"
Ben Gamari20172632009-02-17 20:08:50 -050036#include "i915_drm.h"
37#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
Chris Wilsonf13d3f72010-09-20 17:36:15 +010044enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010045 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010046 FLUSHING_LIST,
47 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010048 PINNED_LIST,
49 DEFERRED_FREE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010050};
Ben Gamari433e12f2009-02-17 20:08:51 -050051
Chris Wilson70d39fe2010-08-25 16:03:34 +010052static const char *yesno(int v)
53{
54 return v ? "yes" : "no";
55}
56
57static int i915_capabilities(struct seq_file *m, void *data)
58{
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
Chris Wilson70d39fe2010-08-25 16:03:34 +010066 B(is_i85x);
67 B(is_i915g);
Chris Wilson70d39fe2010-08-25 16:03:34 +010068 B(is_i945gm);
Chris Wilson70d39fe2010-08-25 16:03:34 +010069 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
Chris Wilson70d39fe2010-08-25 16:03:34 +010075 B(has_fbc);
76 B(has_rc6);
77 B(has_pipe_cxsr);
78 B(has_hotplug);
79 B(cursor_needs_physical);
80 B(has_overlay);
81 B(overlay_needs_physical);
Chris Wilsona6c45cf2010-09-17 00:32:17 +010082 B(supports_tv);
Chris Wilson549f7362010-10-19 11:19:32 +010083 B(has_bsd_ring);
84 B(has_blt_ring);
Chris Wilson70d39fe2010-08-25 16:03:34 +010085#undef B
86
87 return 0;
88}
Ben Gamari433e12f2009-02-17 20:08:51 -050089
Chris Wilson05394f32010-11-08 19:18:58 +000090static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000091{
Chris Wilson05394f32010-11-08 19:18:58 +000092 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000093 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000094 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000095 return "p";
96 else
97 return " ";
98}
99
Chris Wilson05394f32010-11-08 19:18:58 +0000100static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +0000101{
Chris Wilson05394f32010-11-08 19:18:58 +0000102 switch (obj->tiling_mode) {
Chris Wilsona6172a82009-02-11 14:26:38 +0000103 default:
104 case I915_TILING_NONE: return " ";
105 case I915_TILING_X: return "X";
106 case I915_TILING_Y: return "Y";
107 }
108}
109
Chris Wilson37811fc2010-08-25 22:45:57 +0100110static void
111describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
112{
Chris Wilsoncaea7472010-11-12 13:53:37 +0000113 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100114 &obj->base,
115 get_pin_flag(obj),
116 get_tiling_flag(obj),
117 obj->base.size,
118 obj->base.read_domains,
119 obj->base.write_domain,
120 obj->last_rendering_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000121 obj->last_fenced_seqno,
Chris Wilson37811fc2010-08-25 22:45:57 +0100122 obj->dirty ? " dirty" : "",
123 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
124 if (obj->base.name)
125 seq_printf(m, " (name: %d)", obj->base.name);
126 if (obj->fence_reg != I915_FENCE_REG_NONE)
127 seq_printf(m, " (fence: %d)", obj->fence_reg);
128 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100129 seq_printf(m, " (gtt offset: %08x, size: %08x)",
130 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Daniel Vetterfb7d5162010-10-01 22:05:20 +0200131 if (obj->pin_mappable || obj->fault_mappable)
132 seq_printf(m, " (mappable)");
Chris Wilson69dc4982010-10-19 10:36:51 +0100133 if (obj->ring != NULL)
134 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100135}
136
Ben Gamari433e12f2009-02-17 20:08:51 -0500137static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500138{
139 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500140 uintptr_t list = (uintptr_t) node->info_ent->data;
141 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500142 struct drm_device *dev = node->minor->dev;
143 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000144 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100145 size_t total_obj_size, total_gtt_size;
146 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100147
148 ret = mutex_lock_interruptible(&dev->struct_mutex);
149 if (ret)
150 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500151
Ben Gamari433e12f2009-02-17 20:08:51 -0500152 switch (list) {
153 case ACTIVE_LIST:
154 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100155 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500156 break;
157 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400158 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500159 head = &dev_priv->mm.inactive_list;
160 break;
Chris Wilsonf13d3f72010-09-20 17:36:15 +0100161 case PINNED_LIST:
162 seq_printf(m, "Pinned:\n");
163 head = &dev_priv->mm.pinned_list;
164 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500165 case FLUSHING_LIST:
166 seq_printf(m, "Flushing:\n");
167 head = &dev_priv->mm.flushing_list;
168 break;
Chris Wilsond21d5972010-09-26 11:19:33 +0100169 case DEFERRED_FREE_LIST:
170 seq_printf(m, "Deferred free:\n");
171 head = &dev_priv->mm.deferred_free_list;
172 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500173 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100174 mutex_unlock(&dev->struct_mutex);
175 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500176 }
177
Chris Wilson8f2480f2010-09-26 11:44:19 +0100178 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000179 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100180 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000181 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800182 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000183 total_obj_size += obj->base.size;
184 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100185 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500186 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100187 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700188
Chris Wilson8f2480f2010-09-26 11:44:19 +0100189 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
190 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500191 return 0;
192}
193
Chris Wilson73aa8082010-09-30 11:46:12 +0100194static int i915_gem_object_info(struct seq_file *m, void* data)
195{
196 struct drm_info_node *node = (struct drm_info_node *) m->private;
197 struct drm_device *dev = node->minor->dev;
198 struct drm_i915_private *dev_priv = dev->dev_private;
199 int ret;
200
201 ret = mutex_lock_interruptible(&dev->struct_mutex);
202 if (ret)
203 return ret;
204
205 seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
206 seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
207 seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
208 seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
Daniel Vetterfb7d5162010-10-01 22:05:20 +0200209 seq_printf(m, "%u mappable objects in gtt\n", dev_priv->mm.gtt_mappable_count);
210 seq_printf(m, "%zu mappable gtt bytes\n", dev_priv->mm.gtt_mappable_memory);
211 seq_printf(m, "%zu mappable gtt used bytes\n", dev_priv->mm.mappable_gtt_used);
212 seq_printf(m, "%zu mappable gtt total\n", dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100213 seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
214 seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
215 seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
216
217 mutex_unlock(&dev->struct_mutex);
218
219 return 0;
220}
221
222
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100223static int i915_gem_pageflip_info(struct seq_file *m, void *data)
224{
225 struct drm_info_node *node = (struct drm_info_node *) m->private;
226 struct drm_device *dev = node->minor->dev;
227 unsigned long flags;
228 struct intel_crtc *crtc;
229
230 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
231 const char *pipe = crtc->pipe ? "B" : "A";
232 const char *plane = crtc->plane ? "B" : "A";
233 struct intel_unpin_work *work;
234
235 spin_lock_irqsave(&dev->event_lock, flags);
236 work = crtc->unpin_work;
237 if (work == NULL) {
238 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
239 pipe, plane);
240 } else {
241 if (!work->pending) {
242 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
243 pipe, plane);
244 } else {
245 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
246 pipe, plane);
247 }
248 if (work->enable_stall_check)
249 seq_printf(m, "Stall check enabled, ");
250 else
251 seq_printf(m, "Stall check waiting for page flip ioctl, ");
252 seq_printf(m, "%d prepares\n", work->pending);
253
254 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000255 struct drm_i915_gem_object *obj = work->old_fb_obj;
256 if (obj)
257 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100258 }
259 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000260 struct drm_i915_gem_object *obj = work->pending_flip_obj;
261 if (obj)
262 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100263 }
264 }
265 spin_unlock_irqrestore(&dev->event_lock, flags);
266 }
267
268 return 0;
269}
270
Ben Gamari20172632009-02-17 20:08:50 -0500271static int i915_gem_request_info(struct seq_file *m, void *data)
272{
273 struct drm_info_node *node = (struct drm_info_node *) m->private;
274 struct drm_device *dev = node->minor->dev;
275 drm_i915_private_t *dev_priv = dev->dev_private;
276 struct drm_i915_gem_request *gem_request;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100277 int ret, count;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100278
279 ret = mutex_lock_interruptible(&dev->struct_mutex);
280 if (ret)
281 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500282
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100283 count = 0;
284 if (!list_empty(&dev_priv->render_ring.request_list)) {
285 seq_printf(m, "Render requests:\n");
286 list_for_each_entry(gem_request,
287 &dev_priv->render_ring.request_list,
288 list) {
289 seq_printf(m, " %d @ %d\n",
290 gem_request->seqno,
291 (int) (jiffies - gem_request->emitted_jiffies));
292 }
293 count++;
294 }
295 if (!list_empty(&dev_priv->bsd_ring.request_list)) {
296 seq_printf(m, "BSD requests:\n");
297 list_for_each_entry(gem_request,
298 &dev_priv->bsd_ring.request_list,
299 list) {
300 seq_printf(m, " %d @ %d\n",
301 gem_request->seqno,
302 (int) (jiffies - gem_request->emitted_jiffies));
303 }
304 count++;
305 }
306 if (!list_empty(&dev_priv->blt_ring.request_list)) {
307 seq_printf(m, "BLT requests:\n");
308 list_for_each_entry(gem_request,
309 &dev_priv->blt_ring.request_list,
310 list) {
311 seq_printf(m, " %d @ %d\n",
312 gem_request->seqno,
313 (int) (jiffies - gem_request->emitted_jiffies));
314 }
315 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500316 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100317 mutex_unlock(&dev->struct_mutex);
318
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100319 if (count == 0)
320 seq_printf(m, "No requests\n");
321
Ben Gamari20172632009-02-17 20:08:50 -0500322 return 0;
323}
324
Chris Wilsonb2223492010-10-27 15:27:33 +0100325static void i915_ring_seqno_info(struct seq_file *m,
326 struct intel_ring_buffer *ring)
327{
328 if (ring->get_seqno) {
329 seq_printf(m, "Current sequence (%s): %d\n",
330 ring->name, ring->get_seqno(ring));
331 seq_printf(m, "Waiter sequence (%s): %d\n",
332 ring->name, ring->waiting_seqno);
333 seq_printf(m, "IRQ sequence (%s): %d\n",
334 ring->name, ring->irq_seqno);
335 }
336}
337
Ben Gamari20172632009-02-17 20:08:50 -0500338static int i915_gem_seqno_info(struct seq_file *m, void *data)
339{
340 struct drm_info_node *node = (struct drm_info_node *) m->private;
341 struct drm_device *dev = node->minor->dev;
342 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100343 int ret;
344
345 ret = mutex_lock_interruptible(&dev->struct_mutex);
346 if (ret)
347 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500348
Chris Wilsonb2223492010-10-27 15:27:33 +0100349 i915_ring_seqno_info(m, &dev_priv->render_ring);
350 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
351 i915_ring_seqno_info(m, &dev_priv->blt_ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100352
353 mutex_unlock(&dev->struct_mutex);
354
Ben Gamari20172632009-02-17 20:08:50 -0500355 return 0;
356}
357
358
359static int i915_interrupt_info(struct seq_file *m, void *data)
360{
361 struct drm_info_node *node = (struct drm_info_node *) m->private;
362 struct drm_device *dev = node->minor->dev;
363 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100364 int ret;
365
366 ret = mutex_lock_interruptible(&dev->struct_mutex);
367 if (ret)
368 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500369
Eric Anholtbad720f2009-10-22 16:11:14 -0700370 if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800371 seq_printf(m, "Interrupt enable: %08x\n",
372 I915_READ(IER));
373 seq_printf(m, "Interrupt identity: %08x\n",
374 I915_READ(IIR));
375 seq_printf(m, "Interrupt mask: %08x\n",
376 I915_READ(IMR));
377 seq_printf(m, "Pipe A stat: %08x\n",
378 I915_READ(PIPEASTAT));
379 seq_printf(m, "Pipe B stat: %08x\n",
380 I915_READ(PIPEBSTAT));
381 } else {
382 seq_printf(m, "North Display Interrupt enable: %08x\n",
383 I915_READ(DEIER));
384 seq_printf(m, "North Display Interrupt identity: %08x\n",
385 I915_READ(DEIIR));
386 seq_printf(m, "North Display Interrupt mask: %08x\n",
387 I915_READ(DEIMR));
388 seq_printf(m, "South Display Interrupt enable: %08x\n",
389 I915_READ(SDEIER));
390 seq_printf(m, "South Display Interrupt identity: %08x\n",
391 I915_READ(SDEIIR));
392 seq_printf(m, "South Display Interrupt mask: %08x\n",
393 I915_READ(SDEIMR));
394 seq_printf(m, "Graphics Interrupt enable: %08x\n",
395 I915_READ(GTIER));
396 seq_printf(m, "Graphics Interrupt identity: %08x\n",
397 I915_READ(GTIIR));
398 seq_printf(m, "Graphics Interrupt mask: %08x\n",
399 I915_READ(GTIMR));
400 }
Ben Gamari20172632009-02-17 20:08:50 -0500401 seq_printf(m, "Interrupts received: %d\n",
402 atomic_read(&dev_priv->irq_received));
Chris Wilsonb2223492010-10-27 15:27:33 +0100403 i915_ring_seqno_info(m, &dev_priv->render_ring);
404 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
405 i915_ring_seqno_info(m, &dev_priv->blt_ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100406 mutex_unlock(&dev->struct_mutex);
407
Ben Gamari20172632009-02-17 20:08:50 -0500408 return 0;
409}
410
Chris Wilsona6172a82009-02-11 14:26:38 +0000411static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
412{
413 struct drm_info_node *node = (struct drm_info_node *) m->private;
414 struct drm_device *dev = node->minor->dev;
415 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100416 int i, ret;
417
418 ret = mutex_lock_interruptible(&dev->struct_mutex);
419 if (ret)
420 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000421
422 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
423 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
424 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000425 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000426
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100427 seq_printf(m, "Fenced object[%2d] = ", i);
428 if (obj == NULL)
429 seq_printf(m, "unused");
430 else
Chris Wilson05394f32010-11-08 19:18:58 +0000431 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100432 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000433 }
434
Chris Wilson05394f32010-11-08 19:18:58 +0000435 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000436 return 0;
437}
438
Ben Gamari20172632009-02-17 20:08:50 -0500439static int i915_hws_info(struct seq_file *m, void *data)
440{
441 struct drm_info_node *node = (struct drm_info_node *) m->private;
442 struct drm_device *dev = node->minor->dev;
443 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100444 struct intel_ring_buffer *ring;
Ben Gamari20172632009-02-17 20:08:50 -0500445 volatile u32 *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100446 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500447
Chris Wilson4066c0a2010-10-29 21:00:54 +0100448 switch ((uintptr_t)node->info_ent->data) {
Chris Wilsone5c65262010-11-01 11:35:28 +0000449 case RING_RENDER: ring = &dev_priv->render_ring; break;
450 case RING_BSD: ring = &dev_priv->bsd_ring; break;
451 case RING_BLT: ring = &dev_priv->blt_ring; break;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100452 default: return -EINVAL;
453 }
454
455 hws = (volatile u32 *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500456 if (hws == NULL)
457 return 0;
458
459 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
460 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
461 i * 4,
462 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
463 }
464 return 0;
465}
466
Chris Wilson5cdf5882010-09-27 15:51:07 +0100467static void i915_dump_object(struct seq_file *m,
468 struct io_mapping *mapping,
Chris Wilson05394f32010-11-08 19:18:58 +0000469 struct drm_i915_gem_object *obj)
Ben Gamari6911a9b2009-04-02 11:24:54 -0700470{
Chris Wilson5cdf5882010-09-27 15:51:07 +0100471 int page, page_count, i;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700472
Chris Wilson05394f32010-11-08 19:18:58 +0000473 page_count = obj->base.size / PAGE_SIZE;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700474 for (page = 0; page < page_count; page++) {
Chris Wilson5cdf5882010-09-27 15:51:07 +0100475 u32 *mem = io_mapping_map_wc(mapping,
Chris Wilson05394f32010-11-08 19:18:58 +0000476 obj->gtt_offset + page * PAGE_SIZE);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700477 for (i = 0; i < PAGE_SIZE; i += 4)
478 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
Chris Wilson5cdf5882010-09-27 15:51:07 +0100479 io_mapping_unmap(mem);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700480 }
481}
482
483static int i915_batchbuffer_info(struct seq_file *m, void *data)
484{
485 struct drm_info_node *node = (struct drm_info_node *) m->private;
486 struct drm_device *dev = node->minor->dev;
487 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000488 struct drm_i915_gem_object *obj;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700489 int ret;
490
Chris Wilsonde227ef2010-07-03 07:58:38 +0100491 ret = mutex_lock_interruptible(&dev->struct_mutex);
492 if (ret)
493 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700494
Chris Wilson05394f32010-11-08 19:18:58 +0000495 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
496 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
497 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
498 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700499 }
500 }
501
Chris Wilsonde227ef2010-07-03 07:58:38 +0100502 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700503 return 0;
504}
505
506static int i915_ringbuffer_data(struct seq_file *m, void *data)
507{
508 struct drm_info_node *node = (struct drm_info_node *) m->private;
509 struct drm_device *dev = node->minor->dev;
510 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100511 struct intel_ring_buffer *ring;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100512 int ret;
513
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100514 switch ((uintptr_t)node->info_ent->data) {
Chris Wilsone5c65262010-11-01 11:35:28 +0000515 case RING_RENDER: ring = &dev_priv->render_ring; break;
516 case RING_BSD: ring = &dev_priv->bsd_ring; break;
517 case RING_BLT: ring = &dev_priv->blt_ring; break;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100518 default: return -EINVAL;
519 }
520
Chris Wilsonde227ef2010-07-03 07:58:38 +0100521 ret = mutex_lock_interruptible(&dev->struct_mutex);
522 if (ret)
523 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700524
Chris Wilson05394f32010-11-08 19:18:58 +0000525 if (!ring->obj) {
Ben Gamari6911a9b2009-04-02 11:24:54 -0700526 seq_printf(m, "No ringbuffer setup\n");
Chris Wilsonde227ef2010-07-03 07:58:38 +0100527 } else {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100528 u8 *virt = ring->virtual_start;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100529 uint32_t off;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700530
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100531 for (off = 0; off < ring->size; off += 4) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100532 uint32_t *ptr = (uint32_t *)(virt + off);
533 seq_printf(m, "%08x : %08x\n", off, *ptr);
534 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700535 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100536 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700537
538 return 0;
539}
540
541static int i915_ringbuffer_info(struct seq_file *m, void *data)
542{
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100546 struct intel_ring_buffer *ring;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700547
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100548 switch ((uintptr_t)node->info_ent->data) {
Chris Wilsone5c65262010-11-01 11:35:28 +0000549 case RING_RENDER: ring = &dev_priv->render_ring; break;
550 case RING_BSD: ring = &dev_priv->bsd_ring; break;
551 case RING_BLT: ring = &dev_priv->blt_ring; break;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100552 default: return -EINVAL;
553 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700554
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100555 if (ring->size == 0)
556 return 0;
557
558 seq_printf(m, "Ring %s:\n", ring->name);
559 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
560 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
561 seq_printf(m, " Size : %08x\n", ring->size);
562 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
563 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
564 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
Ben Gamari6911a9b2009-04-02 11:24:54 -0700565
566 return 0;
567}
568
Chris Wilsone5c65262010-11-01 11:35:28 +0000569static const char *ring_str(int ring)
570{
571 switch (ring) {
Chris Wilson36850922010-11-23 08:49:38 +0000572 case RING_RENDER: return " render";
573 case RING_BSD: return " bsd";
574 case RING_BLT: return " blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000575 default: return "";
576 }
577}
578
Chris Wilson9df30792010-02-18 10:24:56 +0000579static const char *pin_flag(int pinned)
580{
581 if (pinned > 0)
582 return " P";
583 else if (pinned < 0)
584 return " p";
585 else
586 return "";
587}
588
589static const char *tiling_flag(int tiling)
590{
591 switch (tiling) {
592 default:
593 case I915_TILING_NONE: return "";
594 case I915_TILING_X: return " X";
595 case I915_TILING_Y: return " Y";
596 }
597}
598
599static const char *dirty_flag(int dirty)
600{
601 return dirty ? " dirty" : "";
602}
603
604static const char *purgeable_flag(int purgeable)
605{
606 return purgeable ? " purgeable" : "";
607}
608
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000609static void print_error_buffers(struct seq_file *m,
610 const char *name,
611 struct drm_i915_error_buffer *err,
612 int count)
613{
614 seq_printf(m, "%s [%d]:\n", name, count);
615
616 while (count--) {
617 seq_printf(m, " %08x %8zd %04x %04x %08x%s%s%s%s%s",
618 err->gtt_offset,
619 err->size,
620 err->read_domains,
621 err->write_domain,
622 err->seqno,
623 pin_flag(err->pinned),
624 tiling_flag(err->tiling),
625 dirty_flag(err->dirty),
626 purgeable_flag(err->purgeable),
627 ring_str(err->ring));
628
629 if (err->name)
630 seq_printf(m, " (name: %d)", err->name);
631 if (err->fence_reg != I915_FENCE_REG_NONE)
632 seq_printf(m, " (fence: %d)", err->fence_reg);
633
634 seq_printf(m, "\n");
635 err++;
636 }
637}
638
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700639static int i915_error_state(struct seq_file *m, void *unused)
640{
641 struct drm_info_node *node = (struct drm_info_node *) m->private;
642 struct drm_device *dev = node->minor->dev;
643 drm_i915_private_t *dev_priv = dev->dev_private;
644 struct drm_i915_error_state *error;
645 unsigned long flags;
Chris Wilson9df30792010-02-18 10:24:56 +0000646 int i, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700647
648 spin_lock_irqsave(&dev_priv->error_lock, flags);
649 if (!dev_priv->first_error) {
650 seq_printf(m, "no error state collected\n");
651 goto out;
652 }
653
654 error = dev_priv->first_error;
655
Jesse Barnes8a905232009-07-11 16:48:03 -0400656 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
657 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000658 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100659 seq_printf(m, "EIR: 0x%08x\n", error->eir);
660 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Chris Wilsonf4068392010-10-27 20:36:41 +0100661 if (INTEL_INFO(dev)->gen >= 6) {
662 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100663 seq_printf(m, "Blitter command stream:\n");
664 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100665 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
Chris Wilsone5c65262010-11-01 11:35:28 +0000666 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100667 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
668 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100669 seq_printf(m, "Video (BSD) command stream:\n");
670 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100671 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
Chris Wilsone5c65262010-11-01 11:35:28 +0000672 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100673 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
674 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
Chris Wilsonf4068392010-10-27 20:36:41 +0100675 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100676 seq_printf(m, "Render command stream:\n");
677 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700678 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
679 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
680 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100681 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700682 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100683 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700684 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100685 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
686 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
Chris Wilson9df30792010-02-18 10:24:56 +0000687
Chris Wilson748ebc62010-10-24 10:28:47 +0100688 for (i = 0; i < 16; i++)
689 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
690
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000691 if (error->active_bo)
692 print_error_buffers(m, "Active",
693 error->active_bo,
694 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000695
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000696 if (error->pinned_bo)
697 print_error_buffers(m, "Pinned",
698 error->pinned_bo,
699 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000700
701 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
702 if (error->batchbuffer[i]) {
703 struct drm_i915_error_object *obj = error->batchbuffer[i];
704
705 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
706 offset = 0;
707 for (page = 0; page < obj->page_count; page++) {
708 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
709 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
710 offset += 4;
711 }
712 }
713 }
714 }
715
716 if (error->ringbuffer) {
717 struct drm_i915_error_object *obj = error->ringbuffer;
718
719 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
720 offset = 0;
721 for (page = 0; page < obj->page_count; page++) {
722 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
723 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
724 offset += 4;
725 }
726 }
727 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700728
Chris Wilson6ef3d422010-08-04 20:26:07 +0100729 if (error->overlay)
730 intel_overlay_print_error_state(m, error->overlay);
731
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000732 if (error->display)
733 intel_display_print_error_state(m, dev, error->display);
734
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700735out:
736 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
737
738 return 0;
739}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700740
Jesse Barnesf97108d2010-01-29 11:27:07 -0800741static int i915_rstdby_delays(struct seq_file *m, void *unused)
742{
743 struct drm_info_node *node = (struct drm_info_node *) m->private;
744 struct drm_device *dev = node->minor->dev;
745 drm_i915_private_t *dev_priv = dev->dev_private;
746 u16 crstanddelay = I915_READ16(CRSTANDVID);
747
748 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
749
750 return 0;
751}
752
753static int i915_cur_delayinfo(struct seq_file *m, void *unused)
754{
755 struct drm_info_node *node = (struct drm_info_node *) m->private;
756 struct drm_device *dev = node->minor->dev;
757 drm_i915_private_t *dev_priv = dev->dev_private;
758 u16 rgvswctl = I915_READ16(MEMSWCTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700759 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800760
Jesse Barnes7648fa92010-05-20 14:28:11 -0700761 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
762 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
763 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
764 MEMSTAT_VID_SHIFT);
765 seq_printf(m, "Current P-state: %d\n",
766 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800767
768 return 0;
769}
770
771static int i915_delayfreq_table(struct seq_file *m, void *unused)
772{
773 struct drm_info_node *node = (struct drm_info_node *) m->private;
774 struct drm_device *dev = node->minor->dev;
775 drm_i915_private_t *dev_priv = dev->dev_private;
776 u32 delayfreq;
777 int i;
778
779 for (i = 0; i < 16; i++) {
780 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700781 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
782 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800783 }
784
785 return 0;
786}
787
788static inline int MAP_TO_MV(int map)
789{
790 return 1250 - (map * 25);
791}
792
793static int i915_inttoext_table(struct seq_file *m, void *unused)
794{
795 struct drm_info_node *node = (struct drm_info_node *) m->private;
796 struct drm_device *dev = node->minor->dev;
797 drm_i915_private_t *dev_priv = dev->dev_private;
798 u32 inttoext;
799 int i;
800
801 for (i = 1; i <= 32; i++) {
802 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
803 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
804 }
805
806 return 0;
807}
808
809static int i915_drpc_info(struct seq_file *m, void *unused)
810{
811 struct drm_info_node *node = (struct drm_info_node *) m->private;
812 struct drm_device *dev = node->minor->dev;
813 drm_i915_private_t *dev_priv = dev->dev_private;
814 u32 rgvmodectl = I915_READ(MEMMODECTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700815 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
816 u16 crstandvid = I915_READ16(CRSTANDVID);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800817
818 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
819 "yes" : "no");
820 seq_printf(m, "Boost freq: %d\n",
821 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
822 MEMMODE_BOOST_FREQ_SHIFT);
823 seq_printf(m, "HW control enabled: %s\n",
824 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
825 seq_printf(m, "SW control enabled: %s\n",
826 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
827 seq_printf(m, "Gated voltage change: %s\n",
828 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
829 seq_printf(m, "Starting frequency: P%d\n",
830 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700831 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -0800832 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700833 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
834 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
835 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
836 seq_printf(m, "Render standby enabled: %s\n",
837 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnesf97108d2010-01-29 11:27:07 -0800838
839 return 0;
840}
841
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800842static int i915_fbc_status(struct seq_file *m, void *unused)
843{
844 struct drm_info_node *node = (struct drm_info_node *) m->private;
845 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800846 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800847
Adam Jacksonee5382a2010-04-23 11:17:39 -0400848 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800849 seq_printf(m, "FBC unsupported on this chipset\n");
850 return 0;
851 }
852
Adam Jacksonee5382a2010-04-23 11:17:39 -0400853 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800854 seq_printf(m, "FBC enabled\n");
855 } else {
856 seq_printf(m, "FBC disabled: ");
857 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +0100858 case FBC_NO_OUTPUT:
859 seq_printf(m, "no outputs");
860 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800861 case FBC_STOLEN_TOO_SMALL:
862 seq_printf(m, "not enough stolen memory");
863 break;
864 case FBC_UNSUPPORTED_MODE:
865 seq_printf(m, "mode not supported");
866 break;
867 case FBC_MODE_TOO_LARGE:
868 seq_printf(m, "mode too large");
869 break;
870 case FBC_BAD_PLANE:
871 seq_printf(m, "FBC unsupported on plane");
872 break;
873 case FBC_NOT_TILED:
874 seq_printf(m, "scanout buffer not tiled");
875 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -0700876 case FBC_MULTIPLE_PIPES:
877 seq_printf(m, "multiple pipes are enabled");
878 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800879 default:
880 seq_printf(m, "unknown reason");
881 }
882 seq_printf(m, "\n");
883 }
884 return 0;
885}
886
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800887static int i915_sr_status(struct seq_file *m, void *unused)
888{
889 struct drm_info_node *node = (struct drm_info_node *) m->private;
890 struct drm_device *dev = node->minor->dev;
891 drm_i915_private_t *dev_priv = dev->dev_private;
892 bool sr_enabled = false;
893
Chris Wilsonf00a3dd2010-10-21 14:57:17 +0100894 if (IS_GEN5(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100895 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100896 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800897 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
898 else if (IS_I915GM(dev))
899 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
900 else if (IS_PINEVIEW(dev))
901 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
902
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100903 seq_printf(m, "self-refresh: %s\n",
904 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800905
906 return 0;
907}
908
Jesse Barnes7648fa92010-05-20 14:28:11 -0700909static int i915_emon_status(struct seq_file *m, void *unused)
910{
911 struct drm_info_node *node = (struct drm_info_node *) m->private;
912 struct drm_device *dev = node->minor->dev;
913 drm_i915_private_t *dev_priv = dev->dev_private;
914 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100915 int ret;
916
917 ret = mutex_lock_interruptible(&dev->struct_mutex);
918 if (ret)
919 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -0700920
921 temp = i915_mch_val(dev_priv);
922 chipset = i915_chipset_val(dev_priv);
923 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100924 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700925
926 seq_printf(m, "GMCH temp: %ld\n", temp);
927 seq_printf(m, "Chipset power: %ld\n", chipset);
928 seq_printf(m, "GFX power: %ld\n", gfx);
929 seq_printf(m, "Total power: %ld\n", chipset + gfx);
930
931 return 0;
932}
933
934static int i915_gfxec(struct seq_file *m, void *unused)
935{
936 struct drm_info_node *node = (struct drm_info_node *) m->private;
937 struct drm_device *dev = node->minor->dev;
938 drm_i915_private_t *dev_priv = dev->dev_private;
939
940 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
941
942 return 0;
943}
944
Chris Wilson44834a62010-08-19 16:09:23 +0100945static int i915_opregion(struct seq_file *m, void *unused)
946{
947 struct drm_info_node *node = (struct drm_info_node *) m->private;
948 struct drm_device *dev = node->minor->dev;
949 drm_i915_private_t *dev_priv = dev->dev_private;
950 struct intel_opregion *opregion = &dev_priv->opregion;
951 int ret;
952
953 ret = mutex_lock_interruptible(&dev->struct_mutex);
954 if (ret)
955 return ret;
956
957 if (opregion->header)
958 seq_write(m, opregion->header, OPREGION_SIZE);
959
960 mutex_unlock(&dev->struct_mutex);
961
962 return 0;
963}
964
Chris Wilson37811fc2010-08-25 22:45:57 +0100965static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
966{
967 struct drm_info_node *node = (struct drm_info_node *) m->private;
968 struct drm_device *dev = node->minor->dev;
969 drm_i915_private_t *dev_priv = dev->dev_private;
970 struct intel_fbdev *ifbdev;
971 struct intel_framebuffer *fb;
972 int ret;
973
974 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
975 if (ret)
976 return ret;
977
978 ifbdev = dev_priv->fbdev;
979 fb = to_intel_framebuffer(ifbdev->helper.fb);
980
981 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
982 fb->base.width,
983 fb->base.height,
984 fb->base.depth,
985 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +0000986 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +0100987 seq_printf(m, "\n");
988
989 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
990 if (&fb->base == ifbdev->helper.fb)
991 continue;
992
993 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
994 fb->base.width,
995 fb->base.height,
996 fb->base.depth,
997 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +0000998 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +0100999 seq_printf(m, "\n");
1000 }
1001
1002 mutex_unlock(&dev->mode_config.mutex);
1003
1004 return 0;
1005}
1006
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001007static int
1008i915_wedged_open(struct inode *inode,
1009 struct file *filp)
1010{
1011 filp->private_data = inode->i_private;
1012 return 0;
1013}
1014
1015static ssize_t
1016i915_wedged_read(struct file *filp,
1017 char __user *ubuf,
1018 size_t max,
1019 loff_t *ppos)
1020{
1021 struct drm_device *dev = filp->private_data;
1022 drm_i915_private_t *dev_priv = dev->dev_private;
1023 char buf[80];
1024 int len;
1025
1026 len = snprintf(buf, sizeof (buf),
1027 "wedged : %d\n",
1028 atomic_read(&dev_priv->mm.wedged));
1029
Dan Carpenterf4433a82010-09-08 21:44:47 +02001030 if (len > sizeof (buf))
1031 len = sizeof (buf);
1032
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001033 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1034}
1035
1036static ssize_t
1037i915_wedged_write(struct file *filp,
1038 const char __user *ubuf,
1039 size_t cnt,
1040 loff_t *ppos)
1041{
1042 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001043 char buf[20];
1044 int val = 1;
1045
1046 if (cnt > 0) {
1047 if (cnt > sizeof (buf) - 1)
1048 return -EINVAL;
1049
1050 if (copy_from_user(buf, ubuf, cnt))
1051 return -EFAULT;
1052 buf[cnt] = 0;
1053
1054 val = simple_strtoul(buf, NULL, 0);
1055 }
1056
1057 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001058 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001059
1060 return cnt;
1061}
1062
1063static const struct file_operations i915_wedged_fops = {
1064 .owner = THIS_MODULE,
1065 .open = i915_wedged_open,
1066 .read = i915_wedged_read,
1067 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001068 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001069};
1070
1071/* As the drm_debugfs_init() routines are called before dev->dev_private is
1072 * allocated we need to hook into the minor for release. */
1073static int
1074drm_add_fake_info_node(struct drm_minor *minor,
1075 struct dentry *ent,
1076 const void *key)
1077{
1078 struct drm_info_node *node;
1079
1080 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1081 if (node == NULL) {
1082 debugfs_remove(ent);
1083 return -ENOMEM;
1084 }
1085
1086 node->minor = minor;
1087 node->dent = ent;
1088 node->info_ent = (void *) key;
1089 list_add(&node->list, &minor->debugfs_nodes.list);
1090
1091 return 0;
1092}
1093
1094static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1095{
1096 struct drm_device *dev = minor->dev;
1097 struct dentry *ent;
1098
1099 ent = debugfs_create_file("i915_wedged",
1100 S_IRUGO | S_IWUSR,
1101 root, dev,
1102 &i915_wedged_fops);
1103 if (IS_ERR(ent))
1104 return PTR_ERR(ent);
1105
1106 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1107}
Ben Gamari9e3a6d12009-07-01 22:26:53 -04001108
Ben Gamari27c202a2009-07-01 22:26:52 -04001109static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson70d39fe2010-08-25 16:03:34 +01001110 {"i915_capabilities", i915_capabilities, 0, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01001111 {"i915_gem_objects", i915_gem_object_info, 0},
Ben Gamari433e12f2009-02-17 20:08:51 -05001112 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1113 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1114 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Chris Wilsonf13d3f72010-09-20 17:36:15 +01001115 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
Chris Wilsond21d5972010-09-26 11:19:33 +01001116 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01001117 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001118 {"i915_gem_request", i915_gem_request_info, 0},
1119 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00001120 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001121 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilsone5c65262010-11-01 11:35:28 +00001122 {"i915_gem_hws", i915_hws_info, 0, (void *)RING_RENDER},
1123 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)RING_BLT},
1124 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)RING_BSD},
1125 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_RENDER},
1126 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_RENDER},
1127 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BSD},
1128 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BSD},
1129 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BLT},
1130 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BLT},
Ben Gamari6911a9b2009-04-02 11:24:54 -07001131 {"i915_batchbuffers", i915_batchbuffer_info, 0},
Jesse Barnes63eeaf32009-06-18 16:56:52 -07001132 {"i915_error_state", i915_error_state, 0},
Jesse Barnesf97108d2010-01-29 11:27:07 -08001133 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1134 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1135 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1136 {"i915_inttoext_table", i915_inttoext_table, 0},
1137 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07001138 {"i915_emon_status", i915_emon_status, 0},
1139 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001140 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001141 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01001142 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01001143 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001144};
Ben Gamari27c202a2009-07-01 22:26:52 -04001145#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05001146
Ben Gamari27c202a2009-07-01 22:26:52 -04001147int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001148{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001149 int ret;
1150
1151 ret = i915_wedged_create(minor->debugfs_root, minor);
1152 if (ret)
1153 return ret;
1154
Ben Gamari27c202a2009-07-01 22:26:52 -04001155 return drm_debugfs_create_files(i915_debugfs_list,
1156 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05001157 minor->debugfs_root, minor);
1158}
1159
Ben Gamari27c202a2009-07-01 22:26:52 -04001160void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001161{
Ben Gamari27c202a2009-07-01 22:26:52 -04001162 drm_debugfs_remove_files(i915_debugfs_list,
1163 I915_DEBUGFS_ENTRIES, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05001164 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1165 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05001166}
1167
1168#endif /* CONFIG_DEBUG_FS */