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Guenter Roeck3ad50cc2014-10-29 10:44:56 -07001/*
2 * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
3 *
4 * Copyright (c) 2014 Guenter Roeck
5 *
6 * Derived from mv88e6123_61_65.c
7 * Copyright (c) 2008-2009 Marvell Semiconductor
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/jiffies.h>
17#include <linux/list.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/platform_device.h>
21#include <linux/phy.h>
22#include <net/dsa.h>
23#include "mv88e6xxx.h"
24
Vivien Didelotf6271e62016-04-17 13:23:59 -040025static const struct mv88e6xxx_info mv88e6352_table[] = {
26 {
27 .prod_num = PORT_SWITCH_ID_PROD_NUM_6320,
Vivien Didelot22356472016-04-17 13:24:00 -040028 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040029 .name = "Marvell 88E6320",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040030 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040031 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040032 }, {
33 .prod_num = PORT_SWITCH_ID_PROD_NUM_6321,
Vivien Didelot22356472016-04-17 13:24:00 -040034 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040035 .name = "Marvell 88E6321",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040036 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040037 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040038 }, {
39 .prod_num = PORT_SWITCH_ID_PROD_NUM_6172,
Vivien Didelot22356472016-04-17 13:24:00 -040040 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040041 .name = "Marvell 88E6172",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040042 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040043 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040044 }, {
45 .prod_num = PORT_SWITCH_ID_PROD_NUM_6176,
Vivien Didelot22356472016-04-17 13:24:00 -040046 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040047 .name = "Marvell 88E6176",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040048 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040049 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040050 }, {
51 .prod_num = PORT_SWITCH_ID_PROD_NUM_6240,
Vivien Didelot22356472016-04-17 13:24:00 -040052 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040053 .name = "Marvell 88E6240",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040054 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040055 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040056 }, {
57 .prod_num = PORT_SWITCH_ID_PROD_NUM_6352,
Vivien Didelot22356472016-04-17 13:24:00 -040058 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040059 .name = "Marvell 88E6352",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040060 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040061 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040062 }
Vivien Didelotb9b37712015-10-30 19:39:48 -040063};
64
Vivien Didelot0209d142016-04-17 13:23:55 -040065static const char *mv88e6352_drv_probe(struct device *dsa_dev,
66 struct device *host_dev, int sw_addr,
67 void **priv)
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070068{
Andrew Lunna77d43f2016-04-13 02:40:42 +020069 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
70 mv88e6352_table,
71 ARRAY_SIZE(mv88e6352_table));
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070072}
73
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070074static int mv88e6352_setup_global(struct dsa_switch *ds)
75{
Andrew Lunn15966a22015-05-06 01:09:49 +020076 u32 upstream_port = dsa_upstream_port(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070077 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020078 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020079
80 ret = mv88e6xxx_setup_global(ds);
81 if (ret)
82 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070083
84 /* Discard packets with excessive collisions,
85 * mask all interrupt sources, enable PPU (bit 14, undocumented).
86 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020087 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
88 GLOBAL_CONTROL_PPU_ENABLE |
89 GLOBAL_CONTROL_DISCARD_EXCESS);
90 if (ret)
91 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070092
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070093 /* Configure the upstream port, and configure the upstream
94 * port as the port to which ingress and egress monitor frames
95 * are to be sent.
96 */
Andrew Lunn15966a22015-05-06 01:09:49 +020097 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
98 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
99 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
Andrew Lunn48ace4e2016-04-14 23:47:12 +0200100 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
101 if (ret)
102 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700103
104 /* Disable remote management for now, and set the switch's
105 * DSA device number.
106 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +0200107 return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700108}
109
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700110static int mv88e6352_setup(struct dsa_switch *ds)
111{
112 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
113 int ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700114
Guenter Roeckacdaffc2015-03-26 18:36:28 -0700115 ret = mv88e6xxx_setup_common(ds);
116 if (ret < 0)
117 return ret;
118
Guenter Roeck33b43df2014-10-29 10:45:03 -0700119 mutex_init(&ps->eeprom_mutex);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700120
Andrew Lunn143a8302015-04-02 04:06:34 +0200121 ret = mv88e6xxx_switch_reset(ds, true);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700122 if (ret < 0)
123 return ret;
124
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700125 ret = mv88e6352_setup_global(ds);
126 if (ret < 0)
127 return ret;
128
Andrew Lunndbde9e62015-05-06 01:09:48 +0200129 return mv88e6xxx_setup_ports(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700130}
131
Guenter Roeck33b43df2014-10-29 10:45:03 -0700132static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
133{
134 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
135 int ret;
136
137 mutex_lock(&ps->eeprom_mutex);
138
Andrew Lunn966bce32015-08-08 17:04:50 +0200139 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
140 GLOBAL2_EEPROM_OP_READ |
141 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700142 if (ret < 0)
143 goto error;
144
Andrew Lunnf3044682015-02-14 19:17:50 +0100145 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700146 if (ret < 0)
147 goto error;
148
Andrew Lunn966bce32015-08-08 17:04:50 +0200149 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700150error:
151 mutex_unlock(&ps->eeprom_mutex);
152 return ret;
153}
154
155static int mv88e6352_get_eeprom(struct dsa_switch *ds,
156 struct ethtool_eeprom *eeprom, u8 *data)
157{
158 int offset;
159 int len;
160 int ret;
161
162 offset = eeprom->offset;
163 len = eeprom->len;
164 eeprom->len = 0;
165
166 eeprom->magic = 0xc3ec4951;
167
Andrew Lunnf3044682015-02-14 19:17:50 +0100168 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700169 if (ret < 0)
170 return ret;
171
172 if (offset & 1) {
173 int word;
174
175 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
176 if (word < 0)
177 return word;
178
179 *data++ = (word >> 8) & 0xff;
180
181 offset++;
182 len--;
183 eeprom->len++;
184 }
185
186 while (len >= 2) {
187 int word;
188
189 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
190 if (word < 0)
191 return word;
192
193 *data++ = word & 0xff;
194 *data++ = (word >> 8) & 0xff;
195
196 offset += 2;
197 len -= 2;
198 eeprom->len += 2;
199 }
200
201 if (len) {
202 int word;
203
204 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
205 if (word < 0)
206 return word;
207
208 *data++ = word & 0xff;
209
210 offset++;
211 len--;
212 eeprom->len++;
213 }
214
215 return 0;
216}
217
218static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
219{
220 int ret;
221
Andrew Lunn966bce32015-08-08 17:04:50 +0200222 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700223 if (ret < 0)
224 return ret;
225
Andrew Lunn966bce32015-08-08 17:04:50 +0200226 if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN))
Guenter Roeck33b43df2014-10-29 10:45:03 -0700227 return -EROFS;
228
229 return 0;
230}
231
232static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
233 u16 data)
234{
235 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
236 int ret;
237
238 mutex_lock(&ps->eeprom_mutex);
239
Andrew Lunn966bce32015-08-08 17:04:50 +0200240 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700241 if (ret < 0)
242 goto error;
243
Andrew Lunn966bce32015-08-08 17:04:50 +0200244 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
245 GLOBAL2_EEPROM_OP_WRITE |
246 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700247 if (ret < 0)
248 goto error;
249
Andrew Lunnf3044682015-02-14 19:17:50 +0100250 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700251error:
252 mutex_unlock(&ps->eeprom_mutex);
253 return ret;
254}
255
256static int mv88e6352_set_eeprom(struct dsa_switch *ds,
257 struct ethtool_eeprom *eeprom, u8 *data)
258{
259 int offset;
260 int ret;
261 int len;
262
263 if (eeprom->magic != 0xc3ec4951)
264 return -EINVAL;
265
266 ret = mv88e6352_eeprom_is_readonly(ds);
267 if (ret)
268 return ret;
269
270 offset = eeprom->offset;
271 len = eeprom->len;
272 eeprom->len = 0;
273
Andrew Lunnf3044682015-02-14 19:17:50 +0100274 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700275 if (ret < 0)
276 return ret;
277
278 if (offset & 1) {
279 int word;
280
281 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
282 if (word < 0)
283 return word;
284
285 word = (*data++ << 8) | (word & 0xff);
286
287 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
288 if (ret < 0)
289 return ret;
290
291 offset++;
292 len--;
293 eeprom->len++;
294 }
295
296 while (len >= 2) {
297 int word;
298
299 word = *data++;
300 word |= *data++ << 8;
301
302 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
303 if (ret < 0)
304 return ret;
305
306 offset += 2;
307 len -= 2;
308 eeprom->len += 2;
309 }
310
311 if (len) {
312 int word;
313
314 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
315 if (word < 0)
316 return word;
317
318 word = (word & 0xff00) | *data++;
319
320 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
321 if (ret < 0)
322 return ret;
323
324 offset++;
325 len--;
326 eeprom->len++;
327 }
328
329 return 0;
330}
331
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700332struct dsa_switch_driver mv88e6352_switch_driver = {
333 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunne49bad32016-04-13 02:40:43 +0200334 .probe = mv88e6352_drv_probe,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700335 .setup = mv88e6352_setup,
336 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200337 .phy_read = mv88e6xxx_phy_read_indirect,
338 .phy_write = mv88e6xxx_phy_write_indirect,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200339 .get_strings = mv88e6xxx_get_strings,
340 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
341 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200342 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck04b0a802015-03-06 22:23:52 -0800343 .set_eee = mv88e6xxx_set_eee,
344 .get_eee = mv88e6xxx_get_eee,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700345#ifdef CONFIG_NET_DSA_HWMON
Guenter Roeckc22995c2015-07-25 09:42:28 -0700346 .get_temp = mv88e6xxx_get_temp,
347 .get_temp_limit = mv88e6xxx_get_temp_limit,
348 .set_temp_limit = mv88e6xxx_set_temp_limit,
349 .get_temp_alarm = mv88e6xxx_get_temp_alarm,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700350#endif
Guenter Roeck33b43df2014-10-29 10:45:03 -0700351 .get_eeprom = mv88e6352_get_eeprom,
352 .set_eeprom = mv88e6352_set_eeprom,
Guenter Roeck95d08b52014-10-29 10:45:06 -0700353 .get_regs_len = mv88e6xxx_get_regs_len,
354 .get_regs = mv88e6xxx_get_regs,
Vivien Didelot71327a42016-03-13 16:21:32 -0400355 .port_bridge_join = mv88e6xxx_port_bridge_join,
356 .port_bridge_leave = mv88e6xxx_port_bridge_leave,
Vivien Didelot43c44a92016-04-06 11:55:03 -0400357 .port_stp_state_set = mv88e6xxx_port_stp_state_set,
Vivien Didelot214cdb92016-02-26 13:16:08 -0500358 .port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
Vivien Didelot76e398a2015-11-01 12:33:55 -0500359 .port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
Vivien Didelot0d3b33e2015-08-13 12:52:22 -0400360 .port_vlan_add = mv88e6xxx_port_vlan_add,
Vivien Didelot7dad08d2015-08-13 12:52:21 -0400361 .port_vlan_del = mv88e6xxx_port_vlan_del,
Vivien Didelotceff5ef2016-02-23 12:13:55 -0500362 .port_vlan_dump = mv88e6xxx_port_vlan_dump,
Vivien Didelot146a3202015-10-08 11:35:12 -0400363 .port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
Vivien Didelot2a778e12015-08-10 09:09:49 -0400364 .port_fdb_add = mv88e6xxx_port_fdb_add,
365 .port_fdb_del = mv88e6xxx_port_fdb_del,
Vivien Didelotf33475b2015-10-22 09:34:41 -0400366 .port_fdb_dump = mv88e6xxx_port_fdb_dump,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700367};
368
Andrew Lunn1636d882015-05-06 01:09:50 +0200369MODULE_ALIAS("platform:mv88e6172");
Aleksey S. Kazantsev7c3d0d62015-07-07 20:38:15 -0700370MODULE_ALIAS("platform:mv88e6176");
371MODULE_ALIAS("platform:mv88e6320");
372MODULE_ALIAS("platform:mv88e6321");
373MODULE_ALIAS("platform:mv88e6352");