Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007-2008 Nouveau Project |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #ifndef __NOUVEAU_BIOS_H__ |
| 25 | #define __NOUVEAU_BIOS_H__ |
| 26 | |
| 27 | #include "nvreg.h" |
Ben Skeggs | 02a841d | 2012-07-04 23:44:54 +1000 | [diff] [blame] | 28 | #include <subdev/i2c.h> |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 29 | |
| 30 | #define DCB_MAX_NUM_ENTRIES 16 |
| 31 | #define DCB_MAX_NUM_I2C_ENTRIES 16 |
| 32 | #define DCB_MAX_NUM_GPIO_ENTRIES 32 |
| 33 | #define DCB_MAX_NUM_CONNECTOR_ENTRIES 16 |
| 34 | |
| 35 | #define DCB_LOC_ON_CHIP 0 |
| 36 | |
Ben Skeggs | f9f9f53 | 2011-10-12 16:48:48 +1000 | [diff] [blame] | 37 | #define ROM16(x) le16_to_cpu(*(u16 *)&(x)) |
| 38 | #define ROM32(x) le32_to_cpu(*(u32 *)&(x)) |
| 39 | #define ROM48(x) ({ u8 *p = &(x); (u64)ROM16(p[4]) << 32 | ROM32(p[0]); }) |
| 40 | #define ROM64(x) le64_to_cpu(*(u64 *)&(x)) |
| 41 | #define ROMPTR(d,x) ({ \ |
| 42 | struct drm_nouveau_private *dev_priv = (d)->dev_private; \ |
| 43 | ROM16(x) ? &dev_priv->vbios.data[ROM16(x)] : NULL; \ |
| 44 | }) |
Ben Skeggs | 4709bff | 2010-09-13 15:18:40 +1000 | [diff] [blame] | 45 | |
| 46 | struct bit_entry { |
| 47 | uint8_t id; |
| 48 | uint8_t version; |
| 49 | uint16_t length; |
| 50 | uint16_t offset; |
| 51 | uint8_t *data; |
| 52 | }; |
| 53 | |
| 54 | int bit_table(struct drm_device *, u8 id, struct bit_entry *); |
| 55 | |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 56 | enum dcb_connector_type { |
| 57 | DCB_CONNECTOR_VGA = 0x00, |
| 58 | DCB_CONNECTOR_TV_0 = 0x10, |
| 59 | DCB_CONNECTOR_TV_1 = 0x11, |
| 60 | DCB_CONNECTOR_TV_3 = 0x13, |
| 61 | DCB_CONNECTOR_DVI_I = 0x30, |
| 62 | DCB_CONNECTOR_DVI_D = 0x31, |
Ben Skeggs | fa2c113 | 2012-03-22 11:27:15 +1000 | [diff] [blame] | 63 | DCB_CONNECTOR_DMS59_0 = 0x38, |
| 64 | DCB_CONNECTOR_DMS59_1 = 0x39, |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 65 | DCB_CONNECTOR_LVDS = 0x40, |
Ben Skeggs | 8c3f6bb | 2011-04-18 09:57:48 +1000 | [diff] [blame] | 66 | DCB_CONNECTOR_LVDS_SPWG = 0x41, |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 67 | DCB_CONNECTOR_DP = 0x46, |
| 68 | DCB_CONNECTOR_eDP = 0x47, |
| 69 | DCB_CONNECTOR_HDMI_0 = 0x60, |
| 70 | DCB_CONNECTOR_HDMI_1 = 0x61, |
Ben Skeggs | 4abb410 | 2012-01-12 16:17:16 +1000 | [diff] [blame] | 71 | DCB_CONNECTOR_DMS59_DP0 = 0x64, |
| 72 | DCB_CONNECTOR_DMS59_DP1 = 0x65, |
Ben Skeggs | f66fa77 | 2010-02-24 11:09:20 +1000 | [diff] [blame] | 73 | DCB_CONNECTOR_NONE = 0xff |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 74 | }; |
| 75 | |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 76 | enum dcb_type { |
| 77 | OUTPUT_ANALOG = 0, |
| 78 | OUTPUT_TV = 1, |
| 79 | OUTPUT_TMDS = 2, |
| 80 | OUTPUT_LVDS = 3, |
| 81 | OUTPUT_DP = 6, |
Ben Skeggs | 44a1246 | 2010-08-17 14:34:00 +1000 | [diff] [blame] | 82 | OUTPUT_EOL = 14, /* DCB 4.0+, appears to be end-of-list */ |
Ben Skeggs | 6b5a81a | 2011-11-10 15:42:55 +1000 | [diff] [blame] | 83 | OUTPUT_UNUSED = 15, |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 84 | OUTPUT_ANY = -1 |
| 85 | }; |
| 86 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 87 | struct dcb_entry { |
| 88 | int index; /* may not be raw dcb index if merging has happened */ |
Ben Skeggs | e7cc51c | 2010-02-24 10:31:39 +1000 | [diff] [blame] | 89 | enum dcb_type type; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 90 | uint8_t i2c_index; |
| 91 | uint8_t heads; |
| 92 | uint8_t connector; |
| 93 | uint8_t bus; |
| 94 | uint8_t location; |
| 95 | uint8_t or; |
| 96 | bool duallink_possible; |
| 97 | union { |
| 98 | struct sor_conf { |
| 99 | int link; |
| 100 | } sorconf; |
| 101 | struct { |
| 102 | int maxfreq; |
| 103 | } crtconf; |
| 104 | struct { |
| 105 | struct sor_conf sor; |
| 106 | bool use_straps_for_mode; |
Ben Skeggs | a6ed76d | 2010-07-12 15:33:07 +1000 | [diff] [blame] | 107 | bool use_acpi_for_edid; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 108 | bool use_power_scripts; |
| 109 | } lvdsconf; |
| 110 | struct { |
| 111 | bool has_component_output; |
| 112 | } tvconf; |
| 113 | struct { |
| 114 | struct sor_conf sor; |
| 115 | int link_nr; |
| 116 | int link_bw; |
| 117 | } dpconf; |
| 118 | struct { |
| 119 | struct sor_conf sor; |
Francisco Jerez | 4a9f822 | 2010-07-20 16:48:08 +0200 | [diff] [blame] | 120 | int slave_addr; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 121 | } tmdsconf; |
| 122 | }; |
| 123 | bool i2c_upper_default; |
| 124 | }; |
| 125 | |
Ben Skeggs | 7f245b2 | 2010-02-24 09:56:18 +1000 | [diff] [blame] | 126 | struct dcb_table { |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 127 | uint8_t version; |
Ben Skeggs | 7f245b2 | 2010-02-24 09:56:18 +1000 | [diff] [blame] | 128 | int entries; |
| 129 | struct dcb_entry entry[DCB_MAX_NUM_ENTRIES]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 130 | }; |
| 131 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 132 | enum nouveau_or { |
| 133 | OUTPUT_A = (1 << 0), |
| 134 | OUTPUT_B = (1 << 1), |
| 135 | OUTPUT_C = (1 << 2) |
| 136 | }; |
| 137 | |
| 138 | enum LVDS_script { |
| 139 | /* Order *does* matter here */ |
| 140 | LVDS_INIT = 1, |
| 141 | LVDS_RESET, |
| 142 | LVDS_BACKLIGHT_ON, |
| 143 | LVDS_BACKLIGHT_OFF, |
| 144 | LVDS_PANEL_ON, |
| 145 | LVDS_PANEL_OFF |
| 146 | }; |
| 147 | |
Ben Skeggs | 855a95e | 2010-09-16 15:25:25 +1000 | [diff] [blame] | 148 | /* these match types in pll limits table version 0x40, |
| 149 | * nouveau uses them on all chipsets internally where a |
| 150 | * specific pll needs to be referenced, but the exact |
| 151 | * register isn't known. |
| 152 | */ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 153 | enum pll_types { |
Ben Skeggs | 855a95e | 2010-09-16 15:25:25 +1000 | [diff] [blame] | 154 | PLL_CORE = 0x01, |
| 155 | PLL_SHADER = 0x02, |
| 156 | PLL_UNK03 = 0x03, |
| 157 | PLL_MEMORY = 0x04, |
Martin Peres | d4cca9e | 2011-10-06 23:47:58 +0200 | [diff] [blame] | 158 | PLL_VDEC = 0x05, |
Ben Skeggs | 855a95e | 2010-09-16 15:25:25 +1000 | [diff] [blame] | 159 | PLL_UNK40 = 0x40, |
| 160 | PLL_UNK41 = 0x41, |
| 161 | PLL_UNK42 = 0x42, |
| 162 | PLL_VPLL0 = 0x80, |
| 163 | PLL_VPLL1 = 0x81, |
| 164 | PLL_MAX = 0xff |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 165 | }; |
| 166 | |
| 167 | struct pll_lims { |
Ben Skeggs | 855a95e | 2010-09-16 15:25:25 +1000 | [diff] [blame] | 168 | u32 reg; |
| 169 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 170 | struct { |
| 171 | int minfreq; |
| 172 | int maxfreq; |
| 173 | int min_inputfreq; |
| 174 | int max_inputfreq; |
| 175 | |
| 176 | uint8_t min_m; |
| 177 | uint8_t max_m; |
| 178 | uint8_t min_n; |
| 179 | uint8_t max_n; |
| 180 | } vco1, vco2; |
| 181 | |
| 182 | uint8_t max_log2p; |
| 183 | /* |
| 184 | * for most pre nv50 cards setting a log2P of 7 (the common max_log2p |
| 185 | * value) is no different to 6 (at least for vplls) so allowing the MNP |
| 186 | * calc to use 7 causes the generated clock to be out by a factor of 2. |
| 187 | * however, max_log2p cannot be fixed-up during parsing as the |
| 188 | * unmodified max_log2p value is still needed for setting mplls, hence |
| 189 | * an additional max_usable_log2p member |
| 190 | */ |
| 191 | uint8_t max_usable_log2p; |
| 192 | uint8_t log2p_bias; |
| 193 | |
| 194 | uint8_t min_p; |
| 195 | uint8_t max_p; |
| 196 | |
| 197 | int refclk; |
| 198 | }; |
| 199 | |
Ben Skeggs | 04a39c5 | 2010-02-24 10:03:05 +1000 | [diff] [blame] | 200 | struct nvbios { |
| 201 | struct drm_device *dev; |
Ben Skeggs | 4709bff | 2010-09-13 15:18:40 +1000 | [diff] [blame] | 202 | enum { |
| 203 | NVBIOS_BMP, |
| 204 | NVBIOS_BIT |
| 205 | } type; |
| 206 | uint16_t offset; |
Ben Skeggs | 4489b98 | 2012-03-07 13:22:50 +1000 | [diff] [blame] | 207 | uint32_t length; |
| 208 | uint8_t *data; |
Ben Skeggs | 04a39c5 | 2010-02-24 10:03:05 +1000 | [diff] [blame] | 209 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 210 | uint8_t chip_version; |
| 211 | |
| 212 | uint32_t dactestval; |
| 213 | uint32_t tvdactestval; |
| 214 | uint8_t digital_min_front_porch; |
| 215 | bool fp_no_ddc; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 216 | |
Ben Skeggs | c7ca4d1 | 2011-02-03 20:10:49 +1000 | [diff] [blame] | 217 | spinlock_t lock; |
Ben Skeggs | 39c9bfb | 2010-02-09 10:22:29 +1000 | [diff] [blame] | 218 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 219 | bool execute; |
| 220 | |
| 221 | uint8_t major_version; |
| 222 | uint8_t feature_byte; |
| 223 | bool is_mobile; |
| 224 | |
| 225 | uint32_t fmaxvco, fminvco; |
| 226 | |
| 227 | bool old_style_init; |
| 228 | uint16_t init_script_tbls_ptr; |
| 229 | uint16_t extra_init_script_tbl_ptr; |
| 230 | uint16_t macro_index_tbl_ptr; |
| 231 | uint16_t macro_tbl_ptr; |
| 232 | uint16_t condition_tbl_ptr; |
| 233 | uint16_t io_condition_tbl_ptr; |
| 234 | uint16_t io_flag_condition_tbl_ptr; |
| 235 | uint16_t init_function_tbl_ptr; |
| 236 | |
| 237 | uint16_t pll_limit_tbl_ptr; |
| 238 | uint16_t ram_restrict_tbl_ptr; |
Marcin KoĆcielnicki | 3738365 | 2009-12-15 00:37:31 +0000 | [diff] [blame] | 239 | uint8_t ram_restrict_group_count; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 240 | |
| 241 | uint16_t some_script_ptr; /* BIT I + 14 */ |
| 242 | uint16_t init96_tbl_ptr; /* BIT I + 16 */ |
| 243 | |
Ben Skeggs | 7f245b2 | 2010-02-24 09:56:18 +1000 | [diff] [blame] | 244 | struct dcb_table dcb; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 245 | |
| 246 | struct { |
| 247 | int crtchead; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 248 | } state; |
| 249 | |
| 250 | struct { |
| 251 | struct dcb_entry *output; |
Ben Skeggs | 02e4f58 | 2011-07-06 21:21:42 +1000 | [diff] [blame] | 252 | int crtc; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 253 | uint16_t script_table_ptr; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 254 | } display; |
| 255 | |
| 256 | struct { |
| 257 | uint16_t fptablepointer; /* also used by tmds */ |
| 258 | uint16_t fpxlatetableptr; |
| 259 | int xlatwidth; |
| 260 | uint16_t lvdsmanufacturerpointer; |
| 261 | uint16_t fpxlatemanufacturertableptr; |
| 262 | uint16_t mode_ptr; |
| 263 | uint16_t xlated_entry; |
| 264 | bool power_off_for_reset; |
| 265 | bool reset_after_pclk_change; |
| 266 | bool dual_link; |
| 267 | bool link_c_increment; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 268 | bool if_is_24bit; |
| 269 | int duallink_transition_clk; |
| 270 | uint8_t strapless_is_24bit; |
| 271 | uint8_t *edid; |
| 272 | |
| 273 | /* will need resetting after suspend */ |
| 274 | int last_script_invoc; |
| 275 | bool lvds_init_run; |
| 276 | } fp; |
| 277 | |
| 278 | struct { |
| 279 | uint16_t output0_script_ptr; |
| 280 | uint16_t output1_script_ptr; |
| 281 | } tmds; |
| 282 | |
| 283 | struct { |
| 284 | uint16_t mem_init_tbl_ptr; |
| 285 | uint16_t sdr_seq_tbl_ptr; |
| 286 | uint16_t ddr_seq_tbl_ptr; |
| 287 | |
| 288 | struct { |
| 289 | uint8_t crt, tv, panel; |
| 290 | } i2c_indices; |
| 291 | |
| 292 | uint16_t lvds_single_a_script_ptr; |
| 293 | } legacy; |
| 294 | }; |
| 295 | |
Ben Skeggs | e0996ae | 2012-07-10 12:20:17 +1000 | [diff] [blame^] | 296 | void *olddcb_table(struct drm_device *); |
| 297 | void *olddcb_outp(struct drm_device *, u8 idx); |
| 298 | int olddcb_outp_foreach(struct drm_device *, void *data, |
Ben Skeggs | 6b5a81a | 2011-11-10 15:42:55 +1000 | [diff] [blame] | 299 | int (*)(struct drm_device *, void *, int idx, u8 *outp)); |
Ben Skeggs | befb51e | 2011-11-18 10:23:59 +1000 | [diff] [blame] | 300 | u8 *dcb_conntab(struct drm_device *); |
| 301 | u8 *dcb_conn(struct drm_device *, u8 idx); |
Ben Skeggs | 6b5a81a | 2011-11-10 15:42:55 +1000 | [diff] [blame] | 302 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 303 | #endif |