arch/arm64/boot/dts/qcom/msm8953.dtsi

/*
 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "skeleton64.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM 8953";
	compatible = "qcom,msm8953";
	qcom,msm-id = <293 0x0>;
	interrupt-parent = <&intc>;

	chosen {
		bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		other_ext_mem: other_ext_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x85b00000 0x0 0xd00000>;
		};

		modem_mem: modem_region@0 {
			compatible = "removed-dma-pool";
			no-map-fixup;
			reg = <0x0 0x86c00000 0x0 0x6a00000>;
		};

		adsp_fw_mem: adsp_fw_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x8d600000 0x0 0x1100000>;
		};

		wcnss_fw_mem: wcnss_fw_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x8e700000 0x0 0x700000>;
		};

		venus_mem: venus_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
			alignment = <0 0x400000>;
			size = <0 0x0800000>;
		};

		secure_mem: secure_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alignment = <0 0x400000>;
			size = <0 0x09800000>;
		};

		qseecom_mem: qseecom_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alignment = <0 0x400000>;
			size = <0 0x1000000>;
		};

		adsp_mem: adsp_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			size = <0 0x400000>;
		};

		dfps_data_mem: dfps_data_mem@90000000 {
		       reg = <0 0x90000000 0 0x1000>;
		       label = "dfps_data_mem";
		};

		cont_splash_mem: splash_region@0x90001000 {
			reg = <0x0 0x90001000 0x0 0x13ff000>;
			label = "cont_splash_mem";
		};

		gpu_mem: gpu_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
			alignment = <0 0x400000>;
			size = <0 0x800000>;
		};
	};

	aliases {
		/* smdtty devices */
		smd1 = &smdtty_apps_fm;
		smd2 = &smdtty_apps_riva_bt_acl;
		smd3 = &smdtty_apps_riva_bt_cmd;
		smd4 = &smdtty_mbalbridge;
		smd5 = &smdtty_apps_riva_ant_cmd;
		smd6 = &smdtty_apps_riva_ant_data;
		smd7 = &smdtty_data1;
		smd8 = &smdtty_data4;
		smd11 = &smdtty_data11;
		smd21 = &smdtty_data21;
		smd36 = &smdtty_loopback;
		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
		sdhc2 = &sdhc_2; /* SDC2 for SD card */
	};

	soc: soc { };

};

#include "msm8953-pinctrl.dtsi"
#include "msm8953-cpu.dtsi"
#include "msm8953-pm.dtsi"


&soc {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0 0 0 0xffffffff>;
	compatible = "simple-bus";

	apc_apm: apm@b111000 {
		compatible = "qcom,msm8953-apm";
		reg = <0xb111000 0x1000>;
		reg-names = "pm-apcc-glb";
		qcom,apm-post-halt-delay = <0x2>;
		qcom,apm-halt-clk-delay = <0x11>;
		qcom,apm-resume-clk-delay = <0x10>;
		qcom,apm-sel-switch-delay = <0x01>;
	};

	intc: interrupt-controller@b000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0x0b000000 0x1000>,
		      <0x0b002000 0x1000>;
	};

	qcom,msm-gladiator@b1c0000 {
		compatible = "qcom,msm-gladiator";
		reg = <0x0b1c0000 0x4000>;
		reg-names = "gladiator_base";
		interrupts = <0 22 0>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <1 2 0xff08>,
			     <1 3 0xff08>,
			     <1 4 0xff08>,
			     <1 1 0xff08>;
		clock-frequency = <19200000>;
	};

	timer@b120000 {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "arm,armv7-timer-mem";
		reg = <0xb120000 0x1000>;
		clock-frequency = <19200000>;

		frame@b121000 {
			frame-number = <0>;
			interrupts = <0 8 0x4>,
				     <0 7 0x4>;
			reg = <0xb121000 0x1000>,
			      <0xb122000 0x1000>;
		};

		frame@b123000 {
			frame-number = <1>;
			interrupts = <0 9 0x4>;
			reg = <0xb123000 0x1000>;
			status = "disabled";
		};

		frame@b124000 {
			frame-number = <2>;
			interrupts = <0 10 0x4>;
			reg = <0xb124000 0x1000>;
			status = "disabled";
		};

		frame@b125000 {
			frame-number = <3>;
			interrupts = <0 11 0x4>;
			reg = <0xb125000 0x1000>;
			status = "disabled";
		};

		frame@b126000 {
			frame-number = <4>;
			interrupts = <0 12 0x4>;
			reg = <0xb126000 0x1000>;
			status = "disabled";
		};

		frame@b127000 {
			frame-number = <5>;
			interrupts = <0 13 0x4>;
			reg = <0xb127000 0x1000>;
			status = "disabled";
		};

		frame@b128000 {
			frame-number = <6>;
			interrupts = <0 14 0x4>;
			reg = <0xb128000 0x1000>;
			status = "disabled";
		};
	};
	qcom,rmtfs_sharedmem@00000000 {
		compatible = "qcom,sharedmem-uio";
		reg = <0x00000000 0x00180000>;
		reg-names = "rmtfs";
		qcom,client-id = <0x00000001>;
	};

	restart@4ab000 {
		compatible = "qcom,pshold";
		reg = <0x4ab000 0x4>,
			<0x193d100 0x4>;
		reg-names = "pshold-base", "tcsr-boot-misc-detect";
	};

	qcom,mpm2-sleep-counter@4a3000 {
		compatible = "qcom,mpm2-sleep-counter";
		reg = <0x4a3000 0x1000>;
		clock-frequency = <32768>;
	};

	cpu-pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <1 7 0xff00>;
	};

	qcom,sps {
		compatible = "qcom,msm_sps_4k";
		qcom,pipe-attr-ee;
	};

	blsp1_uart0: serial@78af000 {
		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
		reg = <0x78af000 0x200>;
		interrupts = <0 107 0>;
		status = "disabled";
	};

	dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
		#dma-cells = <4>;
		compatible = "qcom,sps-dma";
		reg = <0x7884000 0x1f000>;
		interrupts = <0 238 0>;
		qcom,summing-threshold = <10>;
	};

	dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
		#dma-cells = <4>;
		compatible = "qcom,sps-dma";
		reg = <0x7ac4000 0x1f000>;
		interrupts = <0 239 0>;
		qcom,summing-threshold = <10>;
	};

	slim_msm: slim@c140000{
		cell-index = <1>;
		compatible = "qcom,slim-ngd";
		reg = <0xc140000 0x2c000>,
		      <0xc104000 0x2a000>;
		reg-names = "slimbus_physical", "slimbus_bam_physical";
		interrupts = <0 163 0>, <0 180 0>;
		interrupt-names = "slimbus_irq", "slimbus_bam_irq";
		qcom,apps-ch-pipes = <0x600000>;
		qcom,ea-pc = <0x200>;
		status = "disabled";
	};

	cpubw: qcom,cpubw {
		compatible = "qcom,devbw";
		governor = "cpufreq";
		qcom,src-dst-ports = <1 512>;
		qcom,active-only;
		qcom,bw-tbl =
			<   769 /*  100.8 MHz */ >,
			<  1611 /*  211.2 MHz */ >,     /*Low SVS*/
			<  2124 /*  278.4 MHz */ >,
			<  2929 /*  384   MHz */ >,
			<  3221 /*  422.4 MHz */ >,	/* SVS */
			<  4248 /*  556.8 MHz */ >,
			<  5126 /*  672   MHz */ >,
			<  5859 /*  768   MHz */ >,     /* SVS+  */
			<  6152 /*  806.4 MHz */ >,
			<  6445 /*  844.8 MHz */ >,     /* NOM   */
			<  7104 /*  931.2 MHz */ >;     /* TURBO */
	};

	mincpubw: qcom,mincpubw {
		compatible = "qcom,devbw";
		governor = "cpufreq";
		qcom,src-dst-ports = <1 512>;
		qcom,active-only;
		qcom,bw-tbl =
			<   769 /*  100.8 MHz */ >,
			<  1611 /*  211.2 MHz */ >,     /*Low SVS*/
			<  2124 /*  278.4 MHz */ >,
			<  2929 /*  384   MHz */ >,
			<  3221 /*  422.4 MHz */ >,	/* SVS */
			<  4248 /*  556.8 MHz */ >,
			<  5126 /*  672   MHz */ >,
			<  5859 /*  768   MHz */ >,     /* SVS+  */
			<  6152 /*  806.4 MHz */ >,
			<  6445 /*  844.8 MHz */ >,     /* NOM   */
			<  7104 /*  931.2 MHz */ >;     /* TURBO */
	};

	qcom,cpu-bwmon {
		compatible = "qcom,bimc-bwmon2";
		reg = <0x408000 0x300>, <0x401000 0x200>;
		reg-names = "base", "global_base";
		interrupts = <0 183 4>;
		qcom,mport = <0>;
		qcom,target-dev = <&cpubw>;
	};

	devfreq-cpufreq {
		cpubw-cpufreq {
		target-dev = <&cpubw>;
		cpu-to-dev-map =
			 <  652800  1611>,
			 < 1036800  3221>,
			 < 1401600  5859>,
			 < 1689600  6445>,
			 < 1804800  7104>,
			 < 1958400  7104>,
			 < 2208000  7104>;
		};

		mincpubw-cpufreq {
			target-dev = <&mincpubw>;
			cpu-to-dev-map =
				<  652800 1611 >,
				< 1401600 3221 >,
				< 2208000 5859 >;
		};
	};

	cpubw_compute: qcom,cpubw-compute {
		compatible = "qcom,arm-cpu-mon";
		qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
				&CPU4 &CPU5 &CPU6 &CPU7 >;
		qcom,target-dev = <&cpubw>;
		qcom,core-dev-table =
				 <  652800  1611>,
				 < 1036800  3221>,
				 < 1401600  5859>,
				 < 1689600  6445>,
				 < 1804800  7104>,
				 < 1958400  7104>,
				 < 2208000  7104>;
	};

	mincpubw_compute: qcom,mincpubw-compute {
		compatible = "qcom,arm-cpu-mon";
		qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
				&CPU4 &CPU5 &CPU6 &CPU7 >;
		qcom,target-dev = <&mincpubw>;
		qcom,core-dev-table =
				<  652800 1611 >,
				< 1401600 3221 >,
				< 2208000 5859 >;
	};

	qcom,ipc-spinlock@1905000 {
		compatible = "qcom,ipc-spinlock-sfpb";
		reg = <0x1905000 0x8000>;
		qcom,num-locks = <8>;
	};

	qcom,smem@86300000 {
		compatible = "qcom,smem";
		reg = <0x86300000 0x100000>,
			<0x0b011008 0x4>,
			<0x60000 0x8000>,
			<0x193d000 0x8>;
		reg-names = "smem", "irq-reg-base",
				"aux-mem1", "smem_targ_info_reg";
		qcom,mpu-enabled;

		qcom,smd-modem {
			compatible = "qcom,smd";
			qcom,smd-edge = <0>;
			qcom,smd-irq-offset = <0x0>;
			qcom,smd-irq-bitmask = <0x1000>;
			interrupts = <0 25 1>;
			label = "modem";
			qcom,not-loadable;
		};

		qcom,smsm-modem {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <0>;
			qcom,smsm-irq-offset = <0x0>;
			qcom,smsm-irq-bitmask = <0x2000>;
			interrupts = <0 26 1>;
		};

		qcom,smd-wcnss {
			compatible = "qcom,smd";
			qcom,smd-edge = <6>;
			qcom,smd-irq-offset = <0x0>;
			qcom,smd-irq-bitmask = <0x20000>;
			interrupts = <0 142 1>;
			label = "wcnss";
		};

		qcom,smsm-wcnss {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <6>;
			qcom,smsm-irq-offset = <0x0>;
			qcom,smsm-irq-bitmask = <0x80000>;
			interrupts = <0 144 1>;
		};

		qcom,smd-adsp {
			compatible = "qcom,smd";
			qcom,smd-edge = <1>;
			qcom,smd-irq-offset = <0x0>;
			qcom,smd-irq-bitmask = <0x100>;
			interrupts = <0 289 1>;
			label = "adsp";
		};

		qcom,smsm-adsp {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <1>;
			qcom,smsm-irq-offset = <0x0>;
			qcom,smsm-irq-bitmask = <0x200>;
			interrupts = <0 290 1>;
		};

		qcom,smd-rpm {
			compatible = "qcom,smd";
			qcom,smd-edge = <15>;
			qcom,smd-irq-offset = <0x0>;
			qcom,smd-irq-bitmask = <0x1>;
			interrupts = <0 168 1>;
			label = "rpm";
			qcom,irq-no-suspend;
			qcom,not-loadable;
		};
	};

	qcom,smdtty {
		compatible = "qcom,smdtty";

		smdtty_apps_fm: qcom,smdtty-apps-fm {
			qcom,smdtty-remote = "wcnss";
			qcom,smdtty-port-name = "APPS_FM";
		};

		smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
			qcom,smdtty-remote = "wcnss";
			qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
		};

		smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
			qcom,smdtty-remote = "wcnss";
			qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
		};

		smdtty_mbalbridge: qcom,smdtty-mbalbridge {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "MBALBRIDGE";
		};

		smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
			qcom,smdtty-remote = "wcnss";
			qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
		};

		smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
			qcom,smdtty-remote = "wcnss";
			qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
		};

		smdtty_data1: qcom,smdtty-data1 {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "DATA1";
		};

		smdtty_data4: qcom,smdtty-data4 {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "DATA4";
		};

		smdtty_data11: qcom,smdtty-data11 {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "DATA11";
		};

		smdtty_data21: qcom,smdtty-data21 {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "DATA21";
		};

		smdtty_loopback: smdtty-loopback {
			qcom,smdtty-remote = "modem";
			qcom,smdtty-port-name = "LOOPBACK";
			qcom,smdtty-dev-name = "LOOPBACK_TTY";
		};
	};

	qcom,smdpkt {
		compatible = "qcom,smdpkt";

		qcom,smdpkt-data5-cntl {
			qcom,smdpkt-remote = "modem";
			qcom,smdpkt-port-name = "DATA5_CNTL";
			qcom,smdpkt-dev-name = "smdcntl0";
		};

		qcom,smdpkt-data22 {
			qcom,smdpkt-remote = "modem";
			qcom,smdpkt-port-name = "DATA22";
			qcom,smdpkt-dev-name = "smd22";
		};

		qcom,smdpkt-data40-cntl {
			qcom,smdpkt-remote = "modem";
			qcom,smdpkt-port-name = "DATA40_CNTL";
			qcom,smdpkt-dev-name = "smdcntl8";
		};

		qcom,smdpkt-apr-apps2 {
			qcom,smdpkt-remote = "adsp";
			qcom,smdpkt-port-name = "apr_apps2";
			qcom,smdpkt-dev-name = "apr_apps2";
		};

		qcom,smdpkt-loopback {
			qcom,smdpkt-remote = "modem";
			qcom,smdpkt-port-name = "LOOPBACK";
			qcom,smdpkt-dev-name = "smd_pkt_loopback";
		};
	};

	rpm_bus: qcom,rpm-smd {
		compatible = "qcom,rpm-smd";
		rpm-channel-name = "rpm_requests";
		rpm-channel-type = <15>; /* SMD_APPS_RPM */
		};

	qcom,wdt@b017000 {
		compatible = "qcom,msm-watchdog";
		reg = <0xb017000 0x1000>;
		reg-names = "wdt-base";
		interrupts = <0 3 0>, <0 4 0>;
		qcom,bark-time = <11000>;
		qcom,pet-time = <10000>;
		qcom,ipi-ping;
		qcom,wakeup-enable;
	};

	qcom,chd {
		compatible = "qcom,core-hang-detect";
		qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
			0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
		qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
			0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
	};

	qcom,msm-rtb {
		compatible = "qcom,msm-rtb";
		qcom,rtb-size = <0x100000>;
	};

	qcom,msm-imem@8600000 {
		compatible = "qcom,msm-imem";
		reg = <0x08600000 0x1000>;
		ranges = <0x0 0x08600000 0x1000>;
		#address-cells = <1>;
		#size-cells = <1>;

		mem_dump_table@10 {
			compatible = "qcom,msm-imem-mem_dump_table";
			reg = <0x10 8>;
		};

		restart_reason@65c {
			compatible = "qcom,msm-imem-restart_reason";
			reg = <0x65c 4>;
		};

		boot_stats@6b0 {
			compatible = "qcom,msm-imem-boot_stats";
			reg = <0x6b0 32>;
		};

		 pil@94c {
			compatible = "qcom,msm-imem-pil";
			reg = <0x94c 200>;

		};
	};

	qcom,memshare {
		compatible = "qcom,memshare";

		qcom,client_1 {
			compatible = "qcom,memshare-peripheral";
			qcom,peripheral-size = <0x200000>;
			qcom,client-id = <0>;
			qcom,allocate-boot-time;
			label = "modem";
		};

		qcom,client_2 {
			compatible = "qcom,memshare-peripheral";
			qcom,peripheral-size = <0x300000>;
			qcom,client-id = <2>;
			label = "modem";
		};

		mem_client_3_size: qcom,client_3 {
			compatible = "qcom,memshare-peripheral";
			qcom,peripheral-size = <0x0>;
			qcom,client-id = <1>;
			label = "modem";
		};
	};
		sdcc1_ice: sdcc1ice@7803000 {
		compatible = "qcom,ice";
		reg = <0x7803000 0x8000>;
		interrupt-names = "sdcc_ice_nonsec_level_irq",
				  "sdcc_ice_sec_level_irq";
		interrupts = <0 312 0>, <0 313 0>;
		qcom,enable-ice-clk;
		qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
		qcom,msm-bus,name = "sdcc_ice_noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<78 512 0 0>,    /* No vote */
			<78 512 1000 0>; /* Max. bandwidth */
		qcom,bus-vector-names = "MIN", "MAX";
		qcom,instance-type = "sdcc";
	};

	sdhc_1: sdhci@7824900 {
		compatible = "qcom,sdhci-msm";
		reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
		reg-names = "hc_mem", "core_mem", "cmdq_mem";

		interrupts = <0 123 0>, <0 138 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		sdhc-msm-crypto = <&sdcc1_ice>;
		qcom,bus-width = <8>;

		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,pm-qos-irq-type = "affine_irq";
		qcom,pm-qos-irq-latency = <2 213>;

		qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
		qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;

		qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;

		qcom,msm-bus,name = "sdhc1";
		qcom,msm-bus,num-cases = <9>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
			<78 512 1046 3200>,    /* 400 KB/s*/
			<78 512 52286 160000>, /* 20 MB/s */
			<78 512 65360 200000>, /* 25 MB/s */
			<78 512 130718 400000>, /* 50 MB/s */
			<78 512 130718 400000>, /* 100 MB/s */
			<78 512 261438 800000>, /* 200 MB/s */
			<78 512 261438 800000>, /* 400 MB/s */
			<78 512 1338562 4096000>; /* Max. bandwidth */
		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
			100000000 200000000 400000000 4294967295>;

		qcom,ice-clk-rates = <270000000 160000000>;
		qcom,large-address-bus;

		status = "disabled";
	};

	sdhc_2: sdhci@7864900 {
		compatible = "qcom,sdhci-msm";
		reg = <0x7864900 0x500>, <0x7864000 0x800>;
		reg-names = "hc_mem", "core_mem";

		interrupts = <0 125 0>, <0 221 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <4>;

		qcom,pm-qos-irq-type = "affine_irq";
		qcom,pm-qos-irq-latency = <2 213>;

		qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
		qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;

		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,msm-bus,name = "sdhc2";
		qcom,msm-bus,num-cases = <8>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
			<81 512 1046 3200>,    /* 400 KB/s*/
			<81 512 52286 160000>, /* 20 MB/s */
			<81 512 65360 200000>, /* 25 MB/s */
			<81 512 130718 400000>, /* 50 MB/s */
			<81 512 261438 800000>, /* 100 MB/s */
			<81 512 261438 800000>, /* 200 MB/s */
			<81 512 1338562 4096000>; /* Max. bandwidth */
		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
			100000000 200000000 4294967295>;

		qcom,large-address-bus;
		status = "disabled";
	};

	spmi_bus: qcom,spmi@200f000 {
		compatible = "qcom,spmi-pmic-arb";
		reg = <0x200f000 0x1000>,
			<0x2400000 0x800000>,
			<0x2c00000 0x800000>,
			<0x3800000 0x200000>,
			<0x200a000 0x2100>;
		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
		interrupt-names = "periph_irq";
		interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
		qcom,ee = <0>;
		qcom,channel = <0>;
		#address-cells = <2>;
		#size-cells = <0>;
		interrupt-controller;
		#interrupt-cells = <4>;
		cell-index = <0>;
	};
};