blob: d7b225b31d1c31a2ceb6b5a06a05eafb7f77dad3 [file] [log] [blame]
Rob Clarkc8afe682013-06-26 12:44:06 -04001/*
Dhaval Patel14d46ce2017-01-17 16:28:12 -08002 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Rob Clarkc8afe682013-06-26 12:44:06 -04003 * Copyright (C) 2013 Red Hat
4 * Author: Rob Clark <robdclark@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
Lloyd Atkinsonf76121a2017-01-30 17:30:55 -050018/*
19 * Copyright (c) 2016 Intel Corporation
20 *
21 * Permission to use, copy, modify, distribute, and sell this software and its
22 * documentation for any purpose is hereby granted without fee, provided that
23 * the above copyright notice appear in all copies and that both that copyright
24 * notice and this permission notice appear in supporting documentation, and
25 * that the name of the copyright holders not be used in advertising or
26 * publicity pertaining to distribution of the software without specific,
27 * written prior permission. The copyright holders make no representations
28 * about the suitability of this software for any purpose. It is provided "as
29 * is" without express or implied warranty.
30 *
31 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
32 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
33 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
34 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
35 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
36 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
37 * OF THIS SOFTWARE.
38 */
Rob Clarkc8afe682013-06-26 12:44:06 -040039
Dhaval Patel3949f032016-06-20 16:24:33 -070040#include <linux/of_address.h>
Dhaval Patel5200c602017-01-17 15:53:37 -080041#include <linux/kthread.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040042#include "msm_drv.h"
Rob Clarkedcd60c2016-03-16 12:56:12 -040043#include "msm_debugfs.h"
Rob Clarkfde5de62016-03-15 15:35:08 -040044#include "msm_fence.h"
Rob Clark7198e6b2013-07-19 12:59:32 -040045#include "msm_gpu.h"
Rob Clarkdd2da6e2013-11-30 16:12:10 -050046#include "msm_kms.h"
Alan Kwongbb27c092016-07-20 16:41:25 -040047#include "sde_wb.h"
Rob Clarkc8afe682013-06-26 12:44:06 -040048
Rob Clarka8d854c2016-06-01 14:02:02 -040049/*
50 * MSM driver version:
51 * - 1.0.0 - initial interface
52 * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
Rob Clark7a3bcc02016-09-16 18:37:44 -040053 * - 1.2.0 - adds explicit fence support for submit ioctl
Rob Clarka8d854c2016-06-01 14:02:02 -040054 */
55#define MSM_VERSION_MAJOR 1
Rob Clark7a3bcc02016-09-16 18:37:44 -040056#define MSM_VERSION_MINOR 2
Rob Clarka8d854c2016-06-01 14:02:02 -040057#define MSM_VERSION_PATCHLEVEL 0
58
Lloyd Atkinson5217336c2016-09-15 18:21:18 -040059#define TEARDOWN_DEADLOCK_RETRY_MAX 5
60
Rob Clarkc8afe682013-06-26 12:44:06 -040061static void msm_fb_output_poll_changed(struct drm_device *dev)
62{
63 struct msm_drm_private *priv = dev->dev_private;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -040064
Rob Clarkc8afe682013-06-26 12:44:06 -040065 if (priv->fbdev)
66 drm_fb_helper_hotplug_event(priv->fbdev);
67}
68
Clarence Ipa65cba52017-03-17 15:18:29 -040069int msm_atomic_check(struct drm_device *dev,
70 struct drm_atomic_state *state)
71{
72 if (msm_is_suspend_blocked(dev)) {
73 DRM_DEBUG("rejecting commit during suspend\n");
74 return -EBUSY;
75 }
76 return drm_atomic_helper_check(dev, state);
77}
78
Rob Clarkc8afe682013-06-26 12:44:06 -040079static const struct drm_mode_config_funcs mode_config_funcs = {
80 .fb_create = msm_framebuffer_create,
81 .output_poll_changed = msm_fb_output_poll_changed,
Clarence Ipa65cba52017-03-17 15:18:29 -040082 .atomic_check = msm_atomic_check,
Rob Clarkcf3a7e42014-11-08 13:21:06 -050083 .atomic_commit = msm_atomic_commit,
Rob Clarkc8afe682013-06-26 12:44:06 -040084};
85
Rob Clark871d8122013-11-16 12:56:06 -050086int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
Rob Clarkc8afe682013-06-26 12:44:06 -040087{
88 struct msm_drm_private *priv = dev->dev_private;
Rob Clark871d8122013-11-16 12:56:06 -050089 int idx = priv->num_mmus++;
Rob Clarkc8afe682013-06-26 12:44:06 -040090
Rob Clark871d8122013-11-16 12:56:06 -050091 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
Rob Clarkc8afe682013-06-26 12:44:06 -040092 return -EINVAL;
93
Rob Clark871d8122013-11-16 12:56:06 -050094 priv->mmus[idx] = mmu;
Rob Clarkc8afe682013-06-26 12:44:06 -040095
96 return idx;
97}
98
Lloyd Atkinson1e2497e2016-09-26 17:55:48 -040099void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu)
100{
101 struct msm_drm_private *priv = dev->dev_private;
102 int idx;
103
104 if (priv->num_mmus <= 0) {
105 dev_err(dev->dev, "invalid num mmus %d\n", priv->num_mmus);
106 return;
107 }
108
109 idx = priv->num_mmus - 1;
110
111 /* only support reverse-order deallocation */
112 if (priv->mmus[idx] != mmu) {
113 dev_err(dev->dev, "unexpected mmu at idx %d\n", idx);
114 return;
115 }
116
117 --priv->num_mmus;
118 priv->mmus[idx] = 0;
119}
120
121
Rob Clarkc8afe682013-06-26 12:44:06 -0400122#ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
123static bool reglog = false;
124MODULE_PARM_DESC(reglog, "Enable register read/write logging");
125module_param(reglog, bool, 0600);
126#else
127#define reglog 0
128#endif
129
Archit Tanejaa9ee34b2015-07-13 12:12:07 +0530130#ifdef CONFIG_DRM_FBDEV_EMULATION
Rob Clarke90dfec2015-01-30 17:05:41 -0500131static bool fbdev = true;
132MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
133module_param(fbdev, bool, 0600);
134#endif
135
Rob Clark3a10ba82014-09-08 14:24:57 -0400136static char *vram = "16m";
Rob Clark4313c742016-02-03 14:02:04 -0500137MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
Rob Clark871d8122013-11-16 12:56:06 -0500138module_param(vram, charp, 0);
139
Rob Clark060530f2014-03-03 14:19:12 -0500140/*
141 * Util/helpers:
142 */
143
Rob Clarkc8afe682013-06-26 12:44:06 -0400144void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
145 const char *dbgname)
146{
147 struct resource *res;
148 unsigned long size;
149 void __iomem *ptr;
150
151 if (name)
152 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
153 else
154 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
155
156 if (!res) {
157 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
158 return ERR_PTR(-EINVAL);
159 }
160
161 size = resource_size(res);
162
163 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
164 if (!ptr) {
165 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
166 return ERR_PTR(-ENOMEM);
167 }
168
169 if (reglog)
Thierry Redingfc99f972015-04-09 16:39:51 +0200170 printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
Rob Clarkc8afe682013-06-26 12:44:06 -0400171
172 return ptr;
173}
174
Lloyd Atkinson1a0c9172016-10-04 10:01:24 -0400175void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
176{
177 devm_iounmap(&pdev->dev, addr);
178}
179
Rob Clarkc8afe682013-06-26 12:44:06 -0400180void msm_writel(u32 data, void __iomem *addr)
181{
182 if (reglog)
Thierry Redingfc99f972015-04-09 16:39:51 +0200183 printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
Rob Clarkc8afe682013-06-26 12:44:06 -0400184 writel(data, addr);
185}
186
187u32 msm_readl(const void __iomem *addr)
188{
189 u32 val = readl(addr);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400190
Rob Clarkc8afe682013-06-26 12:44:06 -0400191 if (reglog)
Thierry Redingfc99f972015-04-09 16:39:51 +0200192 printk(KERN_ERR "IO:R %p %08x\n", addr, val);
Rob Clarkc8afe682013-06-26 12:44:06 -0400193 return val;
194}
195
Hai Li78b1d472015-07-27 13:49:45 -0400196struct vblank_event {
197 struct list_head node;
198 int crtc_id;
199 bool enable;
200};
201
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530202static void vblank_ctrl_worker(struct kthread_work *work)
Hai Li78b1d472015-07-27 13:49:45 -0400203{
204 struct msm_vblank_ctrl *vbl_ctrl = container_of(work,
205 struct msm_vblank_ctrl, work);
206 struct msm_drm_private *priv = container_of(vbl_ctrl,
207 struct msm_drm_private, vblank_ctrl);
208 struct msm_kms *kms = priv->kms;
209 struct vblank_event *vbl_ev, *tmp;
210 unsigned long flags;
211
212 spin_lock_irqsave(&vbl_ctrl->lock, flags);
213 list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
214 list_del(&vbl_ev->node);
215 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
216
217 if (vbl_ev->enable)
218 kms->funcs->enable_vblank(kms,
219 priv->crtcs[vbl_ev->crtc_id]);
220 else
221 kms->funcs->disable_vblank(kms,
222 priv->crtcs[vbl_ev->crtc_id]);
223
224 kfree(vbl_ev);
225
226 spin_lock_irqsave(&vbl_ctrl->lock, flags);
227 }
228
229 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
230}
231
232static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
233 int crtc_id, bool enable)
234{
235 struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
236 struct vblank_event *vbl_ev;
237 unsigned long flags;
238
239 vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC);
240 if (!vbl_ev)
241 return -ENOMEM;
242
243 vbl_ev->crtc_id = crtc_id;
244 vbl_ev->enable = enable;
245
246 spin_lock_irqsave(&vbl_ctrl->lock, flags);
247 list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list);
248 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
249
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530250 kthread_queue_work(&priv->disp_thread[crtc_id].worker, &vbl_ctrl->work);
Hai Li78b1d472015-07-27 13:49:45 -0400251
252 return 0;
253}
254
Archit Taneja2b669872016-05-02 11:05:54 +0530255static int msm_drm_uninit(struct device *dev)
Rob Clarkc8afe682013-06-26 12:44:06 -0400256{
Dhaval Patel5200c602017-01-17 15:53:37 -0800257 struct platform_device *pdev = to_platform_device(dev);
258 struct drm_device *ddev = platform_get_drvdata(pdev);
259 struct msm_drm_private *priv = ddev->dev_private;
Rob Clarkc8afe682013-06-26 12:44:06 -0400260 struct msm_kms *kms = priv->kms;
Rob Clark7198e6b2013-07-19 12:59:32 -0400261 struct msm_gpu *gpu = priv->gpu;
Hai Li78b1d472015-07-27 13:49:45 -0400262 struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
263 struct vblank_event *vbl_ev, *tmp;
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530264 int i;
Hai Li78b1d472015-07-27 13:49:45 -0400265
266 /* We must cancel and cleanup any pending vblank enable/disable
267 * work before drm_irq_uninstall() to avoid work re-enabling an
268 * irq after uninstall has disabled it.
269 */
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530270 kthread_flush_work(&vbl_ctrl->work);
Hai Li78b1d472015-07-27 13:49:45 -0400271 list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
272 list_del(&vbl_ev->node);
273 kfree(vbl_ev);
274 }
Rob Clarkc8afe682013-06-26 12:44:06 -0400275
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530276 /* clean up display commit worker threads */
277 for (i = 0; i < priv->num_crtcs; i++) {
278 if (priv->disp_thread[i].thread) {
279 kthread_flush_worker(&priv->disp_thread[i].worker);
280 kthread_stop(priv->disp_thread[i].thread);
281 priv->disp_thread[i].thread = NULL;
282 }
283 }
284
Rob Clark68209392016-05-17 16:19:32 -0400285 msm_gem_shrinker_cleanup(ddev);
286
Archit Taneja2b669872016-05-02 11:05:54 +0530287 drm_kms_helper_poll_fini(ddev);
Archit Taneja1aaa57f2016-02-25 11:19:45 +0530288
Dhaval Patel5200c602017-01-17 15:53:37 -0800289 drm_mode_config_cleanup(ddev);
290 drm_vblank_cleanup(ddev);
291
Lloyd Atkinsonab3dd302017-02-13 10:44:55 -0800292 if (priv->registered) {
293 drm_dev_unregister(ddev);
294 priv->registered = false;
295 }
Archit Taneja8208ed92016-05-02 11:05:53 +0530296
Archit Taneja1aaa57f2016-02-25 11:19:45 +0530297#ifdef CONFIG_DRM_FBDEV_EMULATION
298 if (fbdev && priv->fbdev)
Archit Taneja2b669872016-05-02 11:05:54 +0530299 msm_fbdev_free(ddev);
Archit Taneja1aaa57f2016-02-25 11:19:45 +0530300#endif
Archit Taneja2b669872016-05-02 11:05:54 +0530301 drm_mode_config_cleanup(ddev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400302
Archit Taneja2b669872016-05-02 11:05:54 +0530303 pm_runtime_get_sync(dev);
304 drm_irq_uninstall(ddev);
305 pm_runtime_put_sync(dev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400306
307 flush_workqueue(priv->wq);
308 destroy_workqueue(priv->wq);
309
Archit Taneja16976082016-11-03 17:36:18 +0530310 if (kms && kms->funcs)
Rob Clarkc8afe682013-06-26 12:44:06 -0400311 kms->funcs->destroy(kms);
Rob Clarkc8afe682013-06-26 12:44:06 -0400312
Rob Clark7198e6b2013-07-19 12:59:32 -0400313 if (gpu) {
Archit Taneja2b669872016-05-02 11:05:54 +0530314 mutex_lock(&ddev->struct_mutex);
Rob Clark7198e6b2013-07-19 12:59:32 -0400315 gpu->funcs->pm_suspend(gpu);
Archit Taneja2b669872016-05-02 11:05:54 +0530316 mutex_unlock(&ddev->struct_mutex);
Rob Clark774449e2015-05-15 09:19:36 -0400317 gpu->funcs->destroy(gpu);
Rob Clark7198e6b2013-07-19 12:59:32 -0400318 }
Rob Clarkc8afe682013-06-26 12:44:06 -0400319
Rob Clark871d8122013-11-16 12:56:06 -0500320 if (priv->vram.paddr) {
Krzysztof Kozlowski00085f12016-08-03 13:46:00 -0700321 unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400322
Rob Clark871d8122013-11-16 12:56:06 -0500323 drm_mm_takedown(&priv->vram.mm);
Archit Taneja2b669872016-05-02 11:05:54 +0530324 dma_free_attrs(dev, priv->vram.size, NULL,
Krzysztof Kozlowski00085f12016-08-03 13:46:00 -0700325 priv->vram.paddr, attrs);
Rob Clark871d8122013-11-16 12:56:06 -0500326 }
327
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400328 sde_dbg_destroy();
Dhaval Patel6c666622017-03-21 23:02:59 -0700329 debugfs_remove_recursive(priv->debug_root);
Lloyd Atkinson5d40d312016-09-06 08:34:13 -0400330
Dhaval Patel5200c602017-01-17 15:53:37 -0800331 component_unbind_all(dev, ddev);
Dhaval Patel5398f602017-03-25 18:25:18 -0700332 sde_power_client_destroy(&priv->phandle, priv->pclient);
Dhaval Patel5200c602017-01-17 15:53:37 -0800333 sde_power_resource_deinit(pdev, &priv->phandle);
Rob Clark060530f2014-03-03 14:19:12 -0500334
Archit Taneja0a6030d2016-05-08 21:36:28 +0530335 msm_mdss_destroy(ddev);
336
Archit Taneja2b669872016-05-02 11:05:54 +0530337 ddev->dev_private = NULL;
Rob Clarkc8afe682013-06-26 12:44:06 -0400338 kfree(priv);
339
Dhaval Patel5200c602017-01-17 15:53:37 -0800340 drm_dev_unref(ddev);
341
Rob Clarkc8afe682013-06-26 12:44:06 -0400342 return 0;
343}
344
Dhaval Patel5200c602017-01-17 15:53:37 -0800345#define KMS_MDP4 4
346#define KMS_MDP5 5
347#define KMS_SDE 3
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700348
Rob Clark06c0dd92013-11-30 17:51:47 -0500349static int get_mdp_ver(struct platform_device *pdev)
350{
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700351#ifdef CONFIG_OF
352 static const struct of_device_id match_types[] = { {
353 .compatible = "qcom,mdss_mdp",
354 .data = (void *)KMS_MDP5,
355 },
356 {
357 .compatible = "qcom,sde-kms",
358 .data = (void *)KMS_SDE,
359 /* end node */
360 } };
Rob Clark06c0dd92013-11-30 17:51:47 -0500361 struct device *dev = &pdev->dev;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700362 const struct of_device_id *match;
Archit Tanejae9fbdaf2015-11-18 12:15:14 +0530363
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700364 match = of_match_node(match_types, dev->of_node);
365 if (match)
366 return (int)(unsigned long)match->data;
367#endif
368 return KMS_MDP4;
Rob Clark06c0dd92013-11-30 17:51:47 -0500369}
370
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500371static int msm_init_vram(struct drm_device *dev)
Rob Clarkc8afe682013-06-26 12:44:06 -0400372{
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500373 struct msm_drm_private *priv = dev->dev_private;
Archit Tanejae9fbdaf2015-11-18 12:15:14 +0530374 struct device_node *node;
Rob Clark072f1f92015-03-03 15:04:25 -0500375 unsigned long size = 0;
376 int ret = 0;
377
Rob Clark072f1f92015-03-03 15:04:25 -0500378 /* In the device-tree world, we could have a 'memory-region'
379 * phandle, which gives us a link to our "vram". Allocating
380 * is all nicely abstracted behind the dma api, but we need
381 * to know the entire size to allocate it all in one go. There
382 * are two cases:
383 * 1) device with no IOMMU, in which case we need exclusive
384 * access to a VRAM carveout big enough for all gpu
385 * buffers
386 * 2) device with IOMMU, but where the bootloader puts up
387 * a splash screen. In this case, the VRAM carveout
388 * need only be large enough for fbdev fb. But we need
389 * exclusive access to the buffer to avoid the kernel
390 * using those pages for other purposes (which appears
391 * as corruption on screen before we have a chance to
392 * load and do initial modeset)
393 */
Rob Clark072f1f92015-03-03 15:04:25 -0500394
395 node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
396 if (node) {
397 struct resource r;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400398
Rob Clark072f1f92015-03-03 15:04:25 -0500399 ret = of_address_to_resource(node, 0, &r);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400400
Peter Chen2ca41c172016-07-04 16:49:50 +0800401 of_node_put(node);
Rob Clark072f1f92015-03-03 15:04:25 -0500402 if (ret)
403 return ret;
404 size = r.end - r.start;
Thierry Redingfc99f972015-04-09 16:39:51 +0200405 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
Rob Clarkc8afe682013-06-26 12:44:06 -0400406
Archit Tanejae9fbdaf2015-11-18 12:15:14 +0530407 /* if we have no IOMMU, then we need to use carveout allocator.
408 * Grab the entire CMA chunk carved out in early startup in
409 * mach-msm:
410 */
411 } else if (!iommu_present(&platform_bus_type)) {
Rob Clark072f1f92015-03-03 15:04:25 -0500412 DRM_INFO("using %s VRAM carveout\n", vram);
413 size = memparse(vram, NULL);
414 }
415
416 if (size) {
Krzysztof Kozlowski00085f12016-08-03 13:46:00 -0700417 unsigned long attrs = 0;
Rob Clark871d8122013-11-16 12:56:06 -0500418 void *p;
419
Rob Clark871d8122013-11-16 12:56:06 -0500420 priv->vram.size = size;
421
422 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
423
Krzysztof Kozlowski00085f12016-08-03 13:46:00 -0700424 attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
425 attrs |= DMA_ATTR_WRITE_COMBINE;
Rob Clark871d8122013-11-16 12:56:06 -0500426
427 /* note that for no-kernel-mapping, the vaddr returned
428 * is bogus, but non-null if allocation succeeded:
429 */
430 p = dma_alloc_attrs(dev->dev, size,
Krzysztof Kozlowski00085f12016-08-03 13:46:00 -0700431 &priv->vram.paddr, GFP_KERNEL, attrs);
Rob Clark871d8122013-11-16 12:56:06 -0500432 if (!p) {
433 dev_err(dev->dev, "failed to allocate VRAM\n");
434 priv->vram.paddr = 0;
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500435 return -ENOMEM;
Rob Clark871d8122013-11-16 12:56:06 -0500436 }
437
438 dev_info(dev->dev, "VRAM: %08x->%08x\n",
439 (uint32_t)priv->vram.paddr,
440 (uint32_t)(priv->vram.paddr + size));
441 }
442
Rob Clark072f1f92015-03-03 15:04:25 -0500443 return ret;
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500444}
445
Dhaval Patel3949f032016-06-20 16:24:33 -0700446#ifdef CONFIG_OF
447static int msm_component_bind_all(struct device *dev,
448 struct drm_device *drm_dev)
449{
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400450 int ret;
451
452 ret = component_bind_all(dev, drm_dev);
453 if (ret)
454 DRM_ERROR("component_bind_all failed: %d\n", ret);
455
456 return ret;
Dhaval Patel3949f032016-06-20 16:24:33 -0700457}
458#else
459static int msm_component_bind_all(struct device *dev,
460 struct drm_device *drm_dev)
461{
462 return 0;
463}
464#endif
465
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400466static int msm_power_enable_wrapper(void *handle, void *client, bool enable)
467{
468 return sde_power_resource_enable(handle, client, enable);
469}
470
Archit Taneja2b669872016-05-02 11:05:54 +0530471static int msm_drm_init(struct device *dev, struct drm_driver *drv)
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500472{
Archit Taneja2b669872016-05-02 11:05:54 +0530473 struct platform_device *pdev = to_platform_device(dev);
474 struct drm_device *ddev;
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500475 struct msm_drm_private *priv;
476 struct msm_kms *kms;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400477 struct sde_dbg_power_ctrl dbg_power_ctrl = { 0 };
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530478 int ret, i;
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500479
Dhaval Patel5200c602017-01-17 15:53:37 -0800480 ddev = drm_dev_alloc(drv, dev);
481 if (!ddev) {
482 dev_err(dev, "failed to allocate drm_device\n");
483 return -ENOMEM;
484 }
485
486 drm_mode_config_init(ddev);
487 platform_set_drvdata(pdev, ddev);
488 ddev->platformdev = pdev;
489
Archit Taneja2b669872016-05-02 11:05:54 +0530490 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
491 if (!priv) {
Dhaval Patel5200c602017-01-17 15:53:37 -0800492 ret = -ENOMEM;
493 goto priv_alloc_fail;
Archit Taneja2b669872016-05-02 11:05:54 +0530494 }
495
496 ddev->dev_private = priv;
Rob Clark68209392016-05-17 16:19:32 -0400497 priv->dev = ddev;
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500498
Dhaval Patel5200c602017-01-17 15:53:37 -0800499 ret = msm_mdss_init(ddev);
500 if (ret)
501 goto mdss_init_fail;
502
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400503 priv->wq = alloc_ordered_workqueue("msm_drm", 0);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400504 init_waitqueue_head(&priv->pending_crtcs_event);
505
506 INIT_LIST_HEAD(&priv->client_event_list);
507 INIT_LIST_HEAD(&priv->inactive_list);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400508 INIT_LIST_HEAD(&priv->vblank_ctrl.event_list);
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530509 kthread_init_work(&priv->vblank_ctrl.work, vblank_ctrl_worker);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400510 spin_lock_init(&priv->vblank_ctrl.lock);
511
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400512 ret = sde_power_resource_init(pdev, &priv->phandle);
513 if (ret) {
514 pr_err("sde power resource init failed\n");
Dhaval Patel5398f602017-03-25 18:25:18 -0700515 goto power_init_fail;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400516 }
Rob Clark5bf9c0b2015-03-03 15:04:24 -0500517
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400518 priv->pclient = sde_power_client_create(&priv->phandle, "sde");
519 if (IS_ERR_OR_NULL(priv->pclient)) {
520 pr_err("sde power client create failed\n");
521 ret = -EINVAL;
Dhaval Patel5398f602017-03-25 18:25:18 -0700522 goto power_client_fail;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400523 }
Rob Clark060530f2014-03-03 14:19:12 -0500524
525 /* Bind all our sub-components: */
Dhaval Patel5200c602017-01-17 15:53:37 -0800526 ret = msm_component_bind_all(dev, ddev);
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400527 if (ret)
Dhaval Patel5398f602017-03-25 18:25:18 -0700528 goto bind_fail;
Rob Clark060530f2014-03-03 14:19:12 -0500529
Archit Taneja2b669872016-05-02 11:05:54 +0530530 ret = msm_init_vram(ddev);
Rob Clark13f15562015-05-07 15:20:13 -0400531 if (ret)
532 goto fail;
533
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400534 dbg_power_ctrl.handle = &priv->phandle;
535 dbg_power_ctrl.client = priv->pclient;
536 dbg_power_ctrl.enable_fn = msm_power_enable_wrapper;
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700537 ret = sde_dbg_init(&pdev->dev, &dbg_power_ctrl);
Lloyd Atkinson5d40d312016-09-06 08:34:13 -0400538 if (ret) {
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400539 dev_err(dev, "failed to init sde dbg: %d\n", ret);
Lloyd Atkinson5d40d312016-09-06 08:34:13 -0400540 goto fail;
541 }
Rob Clark68209392016-05-17 16:19:32 -0400542
Rob Clark06c0dd92013-11-30 17:51:47 -0500543 switch (get_mdp_ver(pdev)) {
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700544 case KMS_MDP4:
Dhaval Patel5200c602017-01-17 15:53:37 -0800545 kms = mdp4_kms_init(ddev);
Rob Clark06c0dd92013-11-30 17:51:47 -0500546 break;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700547 case KMS_MDP5:
Dhaval Patel5200c602017-01-17 15:53:37 -0800548 kms = mdp5_kms_init(ddev);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700549 break;
550 case KMS_SDE:
Dhaval Patel5200c602017-01-17 15:53:37 -0800551 kms = sde_kms_init(ddev);
Rob Clark06c0dd92013-11-30 17:51:47 -0500552 break;
553 default:
554 kms = ERR_PTR(-ENODEV);
555 break;
556 }
557
Rob Clarkc8afe682013-06-26 12:44:06 -0400558 if (IS_ERR(kms)) {
559 /*
560 * NOTE: once we have GPU support, having no kms should not
561 * be considered fatal.. ideally we would still support gpu
562 * and (for example) use dmabuf/prime to share buffers with
563 * imx drm driver on iMX5
564 */
Lloyd Atkinson1e2497e2016-09-26 17:55:48 -0400565 priv->kms = NULL;
Dhaval Patel5200c602017-01-17 15:53:37 -0800566 dev_err(dev, "failed to load kms\n");
Thomas Meyere4826a92013-09-16 23:19:54 +0200567 ret = PTR_ERR(kms);
Rob Clarkc8afe682013-06-26 12:44:06 -0400568 goto fail;
569 }
Dhaval Patel5200c602017-01-17 15:53:37 -0800570 priv->kms = kms;
571 pm_runtime_enable(dev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400572
Alan Kwong29946282017-02-01 21:55:56 -0800573 if (kms) {
574 ret = kms->funcs->hw_init(kms);
575 if (ret) {
576 dev_err(dev, "kms hw init failed: %d\n", ret);
577 goto fail;
578 }
579 }
580 ddev->mode_config.funcs = &mode_config_funcs;
581
Sandeep Pandaf48c46a2016-10-24 09:48:50 +0530582 for (i = 0; i < priv->num_crtcs; i++) {
583 priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
584 kthread_init_worker(&priv->disp_thread[i].worker);
585 priv->disp_thread[i].dev = ddev;
586 priv->disp_thread[i].thread =
587 kthread_run(kthread_worker_fn,
588 &priv->disp_thread[i].worker,
589 "crtc_commit:%d",
590 priv->disp_thread[i].crtc_id);
591
592 if (IS_ERR(priv->disp_thread[i].thread)) {
593 dev_err(dev, "failed to create kthread\n");
594 priv->disp_thread[i].thread = NULL;
595 /* clean up previously created threads if any */
596 for (i -= 1; i >= 0; i--) {
597 kthread_stop(priv->disp_thread[i].thread);
598 priv->disp_thread[i].thread = NULL;
599 }
600 goto fail;
601 }
602 }
603
Archit Taneja2b669872016-05-02 11:05:54 +0530604 ret = drm_vblank_init(ddev, priv->num_crtcs);
Rob Clarkc8afe682013-06-26 12:44:06 -0400605 if (ret < 0) {
Archit Taneja2b669872016-05-02 11:05:54 +0530606 dev_err(dev, "failed to initialize vblank\n");
Rob Clarkc8afe682013-06-26 12:44:06 -0400607 goto fail;
608 }
609
Archit Tanejaa2b3a552016-05-18 15:06:03 +0530610 if (kms) {
611 pm_runtime_get_sync(dev);
Dhaval Patel5200c602017-01-17 15:53:37 -0800612 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
Archit Tanejaa2b3a552016-05-18 15:06:03 +0530613 pm_runtime_put_sync(dev);
614 if (ret < 0) {
615 dev_err(dev, "failed to install IRQ handler\n");
616 goto fail;
617 }
Rob Clarkc8afe682013-06-26 12:44:06 -0400618 }
619
Lloyd Atkinsonab3dd302017-02-13 10:44:55 -0800620 ret = drm_dev_register(ddev, 0);
621 if (ret)
622 goto fail;
623 priv->registered = true;
Rob Clarka7d3c952014-05-30 14:47:38 -0400624
Archit Taneja2b669872016-05-02 11:05:54 +0530625 drm_mode_config_reset(ddev);
626
627#ifdef CONFIG_DRM_FBDEV_EMULATION
628 if (fbdev)
629 priv->fbdev = msm_fbdev_init(ddev);
630#endif
631
632 ret = msm_debugfs_late_init(ddev);
633 if (ret)
634 goto fail;
635
Dhaval Patel6c666622017-03-21 23:02:59 -0700636 priv->debug_root = debugfs_create_dir("debug",
637 ddev->primary->debugfs_root);
638 if (IS_ERR_OR_NULL(priv->debug_root)) {
639 pr_err("debugfs_root create_dir fail, error %ld\n",
640 PTR_ERR(priv->debug_root));
641 priv->debug_root = NULL;
642 goto fail;
643 }
644
645 ret = sde_dbg_debugfs_register(priv->debug_root);
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700646 if (ret) {
647 dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret);
648 goto fail;
649 }
650
Alan Kwong5a3ac752016-10-16 01:02:35 -0400651 /* perform subdriver post initialization */
652 if (kms && kms->funcs && kms->funcs->postinit) {
653 ret = kms->funcs->postinit(kms);
654 if (ret) {
Dhaval Patel5200c602017-01-17 15:53:37 -0800655 pr_err("kms post init failed: %d\n", ret);
Alan Kwong5a3ac752016-10-16 01:02:35 -0400656 goto fail;
657 }
658 }
659
Dhaval Patel5200c602017-01-17 15:53:37 -0800660 drm_kms_helper_poll_init(ddev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400661
662 return 0;
663
664fail:
Archit Taneja2b669872016-05-02 11:05:54 +0530665 msm_drm_uninit(dev);
Rob Clarkc8afe682013-06-26 12:44:06 -0400666 return ret;
Dhaval Patel5398f602017-03-25 18:25:18 -0700667bind_fail:
668 sde_power_client_destroy(&priv->phandle, priv->pclient);
669power_client_fail:
670 sde_power_resource_deinit(pdev, &priv->phandle);
671power_init_fail:
672 msm_mdss_destroy(ddev);
Dhaval Patel5200c602017-01-17 15:53:37 -0800673mdss_init_fail:
674 kfree(priv);
675priv_alloc_fail:
676 drm_dev_unref(ddev);
677 return ret;
Rob Clarkc8afe682013-06-26 12:44:06 -0400678}
679
Archit Taneja2b669872016-05-02 11:05:54 +0530680/*
681 * DRM operations:
682 */
683
Stephane Viau32f13f62015-04-29 15:57:29 -0400684#ifdef CONFIG_QCOM_KGSL
685static void load_gpu(struct drm_device *dev)
686{
687}
688#else
Rob Clark7198e6b2013-07-19 12:59:32 -0400689static void load_gpu(struct drm_device *dev)
690{
Rob Clarka1ad3522014-07-11 11:59:22 -0400691 static DEFINE_MUTEX(init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400692 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400693
Rob Clarka1ad3522014-07-11 11:59:22 -0400694 mutex_lock(&init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400695
Rob Clarke2550b72014-09-05 13:30:27 -0400696 if (!priv->gpu)
697 priv->gpu = adreno_load_gpu(dev);
Rob Clarka1ad3522014-07-11 11:59:22 -0400698
Rob Clarka1ad3522014-07-11 11:59:22 -0400699 mutex_unlock(&init_lock);
Rob Clark7198e6b2013-07-19 12:59:32 -0400700}
Stephane Viau32f13f62015-04-29 15:57:29 -0400701#endif
Rob Clark7198e6b2013-07-19 12:59:32 -0400702
703static int msm_open(struct drm_device *dev, struct drm_file *file)
704{
705 struct msm_file_private *ctx;
706
707 /* For now, load gpu on open.. to avoid the requirement of having
708 * firmware in the initrd.
709 */
710 load_gpu(dev);
711
712 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
713 if (!ctx)
714 return -ENOMEM;
715
716 file->driver_priv = ctx;
717
Clarence Ip0e19a5d2016-08-10 16:36:50 -0400718 if (dev && dev->dev_private) {
719 struct msm_drm_private *priv = dev->dev_private;
720 struct msm_kms *kms;
721
722 kms = priv->kms;
723 if (kms && kms->funcs && kms->funcs->postopen)
724 kms->funcs->postopen(kms, file);
725 }
Rob Clark7198e6b2013-07-19 12:59:32 -0400726 return 0;
727}
728
Rob Clarkc8afe682013-06-26 12:44:06 -0400729static void msm_preclose(struct drm_device *dev, struct drm_file *file)
730{
731 struct msm_drm_private *priv = dev->dev_private;
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400732 struct msm_kms *kms = priv->kms;
733
734 if (kms && kms->funcs && kms->funcs->preclose)
735 kms->funcs->preclose(kms, file);
736}
737
738static void msm_postclose(struct drm_device *dev, struct drm_file *file)
739{
740 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -0400741 struct msm_file_private *ctx = file->driver_priv;
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400742 struct msm_kms *kms = priv->kms;
743
744 if (kms && kms->funcs && kms->funcs->postclose)
745 kms->funcs->postclose(kms, file);
Rob Clark7198e6b2013-07-19 12:59:32 -0400746
Rob Clark7198e6b2013-07-19 12:59:32 -0400747 mutex_lock(&dev->struct_mutex);
748 if (ctx == priv->lastctx)
749 priv->lastctx = NULL;
750 mutex_unlock(&dev->struct_mutex);
751
752 kfree(ctx);
Rob Clarkc8afe682013-06-26 12:44:06 -0400753}
754
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400755static int msm_disable_all_modes_commit(
756 struct drm_device *dev,
757 struct drm_atomic_state *state)
758{
759 struct drm_plane *plane;
760 struct drm_crtc *crtc;
761 unsigned int plane_mask;
762 int ret;
763
764 plane_mask = 0;
765 drm_for_each_plane(plane, dev) {
766 struct drm_plane_state *plane_state;
767
768 plane_state = drm_atomic_get_plane_state(state, plane);
769 if (IS_ERR(plane_state)) {
770 ret = PTR_ERR(plane_state);
771 goto fail;
772 }
773
Alan Kwong76c9d182016-12-14 14:39:17 -0800774 plane_state->rotation = 0;
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400775
776 plane->old_fb = plane->fb;
777 plane_mask |= 1 << drm_plane_index(plane);
778
779 /* disable non-primary: */
780 if (plane->type == DRM_PLANE_TYPE_PRIMARY)
781 continue;
782
783 DRM_DEBUG("disabling plane %d\n", plane->base.id);
784
785 ret = __drm_atomic_helper_disable_plane(plane, plane_state);
786 if (ret != 0)
787 DRM_ERROR("error %d disabling plane %d\n", ret,
788 plane->base.id);
789 }
790
791 drm_for_each_crtc(crtc, dev) {
792 struct drm_mode_set mode_set;
793
794 memset(&mode_set, 0, sizeof(struct drm_mode_set));
795 mode_set.crtc = crtc;
796
797 DRM_DEBUG("disabling crtc %d\n", crtc->base.id);
798
799 ret = __drm_atomic_helper_set_config(&mode_set, state);
800 if (ret != 0)
801 DRM_ERROR("error %d disabling crtc %d\n", ret,
802 crtc->base.id);
803 }
804
805 DRM_DEBUG("committing disables\n");
806 ret = drm_atomic_commit(state);
807
808fail:
809 drm_atomic_clean_old_fb(dev, plane_mask, ret);
810 DRM_DEBUG("disables result %d\n", ret);
811 return ret;
812}
813
814/**
815 * msm_clear_all_modes - disables all planes and crtcs via an atomic commit
816 * based on restore_fbdev_mode_atomic in drm_fb_helper.c
817 * @dev: device pointer
818 * @Return: 0 on success, otherwise -error
819 */
820static int msm_disable_all_modes(struct drm_device *dev)
821{
822 struct drm_atomic_state *state;
823 int ret, i;
824
825 state = drm_atomic_state_alloc(dev);
826 if (!state)
827 return -ENOMEM;
828
829 state->acquire_ctx = dev->mode_config.acquire_ctx;
830
831 for (i = 0; i < TEARDOWN_DEADLOCK_RETRY_MAX; i++) {
832 ret = msm_disable_all_modes_commit(dev, state);
833 if (ret != -EDEADLK)
834 break;
835 drm_atomic_state_clear(state);
836 drm_atomic_legacy_backoff(state);
837 }
838
839 /* on successful atomic commit state ownership transfers to framework */
840 if (ret != 0)
841 drm_atomic_state_free(state);
842
843 return ret;
844}
845
Rob Clarkc8afe682013-06-26 12:44:06 -0400846static void msm_lastclose(struct drm_device *dev)
847{
848 struct msm_drm_private *priv = dev->dev_private;
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400849 struct msm_kms *kms = priv->kms;
Alan Kwong5a3ac752016-10-16 01:02:35 -0400850 int i;
851
852 /*
853 * clean up vblank disable immediately as this is the last close.
854 */
855 for (i = 0; i < dev->num_crtcs; i++) {
856 struct drm_vblank_crtc *vblank = &dev->vblank[i];
857 struct timer_list *disable_timer = &vblank->disable_timer;
858
859 if (del_timer_sync(disable_timer))
860 disable_timer->function(disable_timer->data);
861 }
862
863 /* wait for pending vblank requests to be executed by worker thread */
864 flush_workqueue(priv->wq);
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400865
866 if (priv->fbdev) {
Rob Clark5ea1f752014-05-30 12:29:48 -0400867 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
Lloyd Atkinson5217336c2016-09-15 18:21:18 -0400868 } else {
869 drm_modeset_lock_all(dev);
870 msm_disable_all_modes(dev);
871 drm_modeset_unlock_all(dev);
872 if (kms && kms->funcs && kms->funcs->lastclose)
873 kms->funcs->lastclose(kms);
874 }
Rob Clarkc8afe682013-06-26 12:44:06 -0400875}
876
Daniel Vettere9f0d762013-12-11 11:34:42 +0100877static irqreturn_t msm_irq(int irq, void *arg)
Rob Clarkc8afe682013-06-26 12:44:06 -0400878{
879 struct drm_device *dev = arg;
880 struct msm_drm_private *priv = dev->dev_private;
881 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400882
Rob Clarkc8afe682013-06-26 12:44:06 -0400883 BUG_ON(!kms);
884 return kms->funcs->irq(kms);
885}
886
887static void msm_irq_preinstall(struct drm_device *dev)
888{
889 struct msm_drm_private *priv = dev->dev_private;
890 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400891
Rob Clarkc8afe682013-06-26 12:44:06 -0400892 BUG_ON(!kms);
893 kms->funcs->irq_preinstall(kms);
894}
895
896static int msm_irq_postinstall(struct drm_device *dev)
897{
898 struct msm_drm_private *priv = dev->dev_private;
899 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400900
Rob Clarkc8afe682013-06-26 12:44:06 -0400901 BUG_ON(!kms);
902 return kms->funcs->irq_postinstall(kms);
903}
904
905static void msm_irq_uninstall(struct drm_device *dev)
906{
907 struct msm_drm_private *priv = dev->dev_private;
908 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400909
Rob Clarkc8afe682013-06-26 12:44:06 -0400910 BUG_ON(!kms);
911 kms->funcs->irq_uninstall(kms);
912}
913
Thierry Reding88e72712015-09-24 18:35:31 +0200914static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clarkc8afe682013-06-26 12:44:06 -0400915{
916 struct msm_drm_private *priv = dev->dev_private;
917 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400918
Rob Clarkc8afe682013-06-26 12:44:06 -0400919 if (!kms)
920 return -ENXIO;
Thierry Reding88e72712015-09-24 18:35:31 +0200921 DBG("dev=%p, crtc=%u", dev, pipe);
922 return vblank_ctrl_queue_work(priv, pipe, true);
Rob Clarkc8afe682013-06-26 12:44:06 -0400923}
924
Thierry Reding88e72712015-09-24 18:35:31 +0200925static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clarkc8afe682013-06-26 12:44:06 -0400926{
927 struct msm_drm_private *priv = dev->dev_private;
928 struct msm_kms *kms = priv->kms;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -0400929
Rob Clarkc8afe682013-06-26 12:44:06 -0400930 if (!kms)
931 return;
Thierry Reding88e72712015-09-24 18:35:31 +0200932 DBG("dev=%p, crtc=%u", dev, pipe);
933 vblank_ctrl_queue_work(priv, pipe, false);
Rob Clarkc8afe682013-06-26 12:44:06 -0400934}
935
936/*
Rob Clark7198e6b2013-07-19 12:59:32 -0400937 * DRM ioctls:
938 */
939
940static int msm_ioctl_get_param(struct drm_device *dev, void *data,
941 struct drm_file *file)
942{
943 struct msm_drm_private *priv = dev->dev_private;
944 struct drm_msm_param *args = data;
945 struct msm_gpu *gpu;
946
947 /* for now, we just have 3d pipe.. eventually this would need to
948 * be more clever to dispatch to appropriate gpu module:
949 */
950 if (args->pipe != MSM_PIPE_3D0)
951 return -EINVAL;
952
953 gpu = priv->gpu;
954
955 if (!gpu)
956 return -ENXIO;
957
958 return gpu->funcs->get_param(gpu, args->param, &args->value);
959}
960
961static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
962 struct drm_file *file)
963{
964 struct drm_msm_gem_new *args = data;
Rob Clark93ddb0d2014-03-03 09:42:33 -0500965
966 if (args->flags & ~MSM_BO_FLAGS) {
967 DRM_ERROR("invalid flags: %08x\n", args->flags);
968 return -EINVAL;
969 }
970
Rob Clark7198e6b2013-07-19 12:59:32 -0400971 return msm_gem_new_handle(dev, file, args->size,
972 args->flags, &args->handle);
973}
974
Rob Clark56c2da82015-05-11 11:50:03 -0400975static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
976{
977 return ktime_set(timeout.tv_sec, timeout.tv_nsec);
978}
Rob Clark7198e6b2013-07-19 12:59:32 -0400979
980static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
981 struct drm_file *file)
982{
983 struct drm_msm_gem_cpu_prep *args = data;
984 struct drm_gem_object *obj;
Rob Clark56c2da82015-05-11 11:50:03 -0400985 ktime_t timeout = to_ktime(args->timeout);
Rob Clark7198e6b2013-07-19 12:59:32 -0400986 int ret;
987
Rob Clark93ddb0d2014-03-03 09:42:33 -0500988 if (args->op & ~MSM_PREP_FLAGS) {
989 DRM_ERROR("invalid op: %08x\n", args->op);
990 return -EINVAL;
991 }
992
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100993 obj = drm_gem_object_lookup(file, args->handle);
Rob Clark7198e6b2013-07-19 12:59:32 -0400994 if (!obj)
995 return -ENOENT;
996
Rob Clark56c2da82015-05-11 11:50:03 -0400997 ret = msm_gem_cpu_prep(obj, args->op, &timeout);
Rob Clark7198e6b2013-07-19 12:59:32 -0400998
999 drm_gem_object_unreference_unlocked(obj);
1000
1001 return ret;
1002}
1003
1004static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
1005 struct drm_file *file)
1006{
1007 struct drm_msm_gem_cpu_fini *args = data;
1008 struct drm_gem_object *obj;
1009 int ret;
1010
Chris Wilsona8ad0bd2016-05-09 11:04:54 +01001011 obj = drm_gem_object_lookup(file, args->handle);
Rob Clark7198e6b2013-07-19 12:59:32 -04001012 if (!obj)
1013 return -ENOENT;
1014
1015 ret = msm_gem_cpu_fini(obj);
1016
1017 drm_gem_object_unreference_unlocked(obj);
1018
1019 return ret;
1020}
1021
1022static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
1023 struct drm_file *file)
1024{
1025 struct drm_msm_gem_info *args = data;
1026 struct drm_gem_object *obj;
1027 int ret = 0;
1028
1029 if (args->pad)
1030 return -EINVAL;
1031
Chris Wilsona8ad0bd2016-05-09 11:04:54 +01001032 obj = drm_gem_object_lookup(file, args->handle);
Rob Clark7198e6b2013-07-19 12:59:32 -04001033 if (!obj)
1034 return -ENOENT;
1035
1036 args->offset = msm_gem_mmap_offset(obj);
1037
1038 drm_gem_object_unreference_unlocked(obj);
1039
1040 return ret;
1041}
1042
1043static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
1044 struct drm_file *file)
1045{
Rob Clarkca762a82016-03-15 17:22:13 -04001046 struct msm_drm_private *priv = dev->dev_private;
Rob Clark7198e6b2013-07-19 12:59:32 -04001047 struct drm_msm_wait_fence *args = data;
Rob Clark56c2da82015-05-11 11:50:03 -04001048 ktime_t timeout = to_ktime(args->timeout);
Rob Clark93ddb0d2014-03-03 09:42:33 -05001049
1050 if (args->pad) {
1051 DRM_ERROR("invalid pad: %08x\n", args->pad);
1052 return -EINVAL;
1053 }
1054
Rob Clarkca762a82016-03-15 17:22:13 -04001055 if (!priv->gpu)
1056 return 0;
1057
1058 return msm_wait_fence(priv->gpu->fctx, args->fence, &timeout, true);
Rob Clark7198e6b2013-07-19 12:59:32 -04001059}
1060
Rob Clark4cd33c42016-05-17 15:44:49 -04001061static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
1062 struct drm_file *file)
1063{
1064 struct drm_msm_gem_madvise *args = data;
1065 struct drm_gem_object *obj;
1066 int ret;
1067
1068 switch (args->madv) {
1069 case MSM_MADV_DONTNEED:
1070 case MSM_MADV_WILLNEED:
1071 break;
1072 default:
1073 return -EINVAL;
1074 }
1075
1076 ret = mutex_lock_interruptible(&dev->struct_mutex);
1077 if (ret)
1078 return ret;
1079
1080 obj = drm_gem_object_lookup(file, args->handle);
1081 if (!obj) {
1082 ret = -ENOENT;
1083 goto unlock;
1084 }
1085
1086 ret = msm_gem_madvise(obj, args->madv);
1087 if (ret >= 0) {
1088 args->retained = ret;
1089 ret = 0;
1090 }
1091
1092 drm_gem_object_unreference(obj);
1093
1094unlock:
1095 mutex_unlock(&dev->struct_mutex);
1096 return ret;
1097}
1098
Gopikrishnaiah Anandande2c81b2017-03-15 12:41:29 -07001099static int msm_drm_object_supports_event(struct drm_device *dev,
1100 struct drm_msm_event_req *req)
1101{
1102 int ret = -EINVAL;
1103 struct drm_mode_object *arg_obj;
1104
1105 arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type);
1106 if (!arg_obj)
1107 return -ENOENT;
1108
1109 switch (arg_obj->type) {
1110 case DRM_MODE_OBJECT_CRTC:
1111 case DRM_MODE_OBJECT_CONNECTOR:
1112 ret = 0;
1113 break;
1114 default:
1115 ret = -EOPNOTSUPP;
1116 break;
1117 }
1118
1119 return ret;
1120}
1121
1122static int msm_register_event(struct drm_device *dev,
1123 struct drm_msm_event_req *req, struct drm_file *file, bool en)
1124{
1125 int ret = -EINVAL;
1126 struct msm_drm_private *priv = dev->dev_private;
1127 struct msm_kms *kms = priv->kms;
1128 struct drm_mode_object *arg_obj;
1129
1130 arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type);
1131 if (!arg_obj)
1132 return -ENOENT;
1133
1134 ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
1135 return ret;
1136}
1137
1138static int msm_event_client_count(struct drm_device *dev,
1139 struct drm_msm_event_req *req_event, bool locked)
1140{
1141 struct msm_drm_private *priv = dev->dev_private;
1142 unsigned long flag = 0;
1143 struct msm_drm_event *node;
1144 int count = 0;
1145
1146 if (!locked)
1147 spin_lock_irqsave(&dev->event_lock, flag);
1148 list_for_each_entry(node, &priv->client_event_list, base.link) {
1149 if (node->event.type == req_event->event &&
1150 node->info.object_id == req_event->object_id)
1151 count++;
1152 }
1153 if (!locked)
1154 spin_unlock_irqrestore(&dev->event_lock, flag);
1155
1156 return count;
1157}
1158
1159static int msm_ioctl_register_event(struct drm_device *dev, void *data,
1160 struct drm_file *file)
1161{
1162 struct msm_drm_private *priv = dev->dev_private;
1163 struct drm_msm_event_req *req_event = data;
1164 struct msm_drm_event *client, *node;
1165 unsigned long flag = 0;
1166 bool dup_request = false;
1167 int ret = 0, count = 0;
1168
1169 ret = msm_drm_object_supports_event(dev, req_event);
1170 if (ret) {
1171 DRM_ERROR("unsupported event %x object %x object id %d\n",
1172 req_event->event, req_event->object_type,
1173 req_event->object_id);
1174 return ret;
1175 }
1176
1177 spin_lock_irqsave(&dev->event_lock, flag);
1178 list_for_each_entry(node, &priv->client_event_list, base.link) {
1179 if (node->base.file_priv != file)
1180 continue;
1181 if (node->event.type == req_event->event &&
1182 node->info.object_id == req_event->object_id) {
1183 DRM_DEBUG("duplicate request for event %x obj id %d\n",
1184 node->event.type, node->info.object_id);
1185 dup_request = true;
1186 break;
1187 }
1188 }
1189 spin_unlock_irqrestore(&dev->event_lock, flag);
1190
1191 if (dup_request)
1192 return -EALREADY;
1193
1194 client = kzalloc(sizeof(*client), GFP_KERNEL);
1195 if (!client)
1196 return -ENOMEM;
1197
1198 client->base.file_priv = file;
1199 client->base.pid = current->pid;
1200 client->base.event = &client->event;
1201 client->event.type = req_event->event;
1202 memcpy(&client->info, req_event, sizeof(client->info));
1203
1204 /* Get the count of clients that have registered for event.
1205 * Event should be enabled for first client, for subsequent enable
1206 * calls add to client list and return.
1207 */
1208 count = msm_event_client_count(dev, req_event, false);
1209 /* Add current client to list */
1210 spin_lock_irqsave(&dev->event_lock, flag);
1211 list_add_tail(&client->base.link, &priv->client_event_list);
1212 spin_unlock_irqrestore(&dev->event_lock, flag);
1213
1214 if (count)
1215 return 0;
1216
1217 ret = msm_register_event(dev, req_event, file, true);
1218 if (ret) {
1219 DRM_ERROR("failed to enable event %x object %x object id %d\n",
1220 req_event->event, req_event->object_type,
1221 req_event->object_id);
1222 spin_lock_irqsave(&dev->event_lock, flag);
1223 list_del(&client->base.link);
1224 spin_unlock_irqrestore(&dev->event_lock, flag);
1225 kfree(client);
1226 }
1227 return ret;
1228}
1229
1230static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
1231 struct drm_file *file)
1232{
1233 struct msm_drm_private *priv = dev->dev_private;
1234 struct drm_msm_event_req *req_event = data;
1235 struct msm_drm_event *client = NULL, *node, *temp;
1236 unsigned long flag = 0;
1237 int count = 0;
1238 bool found = false;
1239 int ret = 0;
1240
1241 ret = msm_drm_object_supports_event(dev, req_event);
1242 if (ret) {
1243 DRM_ERROR("unsupported event %x object %x object id %d\n",
1244 req_event->event, req_event->object_type,
1245 req_event->object_id);
1246 return ret;
1247 }
1248
1249 spin_lock_irqsave(&dev->event_lock, flag);
1250 list_for_each_entry_safe(node, temp, &priv->client_event_list,
1251 base.link) {
1252 if (node->event.type == req_event->event &&
1253 node->info.object_id == req_event->object_id &&
1254 node->base.file_priv == file) {
1255 client = node;
1256 list_del(&client->base.link);
1257 found = true;
1258 kfree(client);
1259 break;
1260 }
1261 }
1262 spin_unlock_irqrestore(&dev->event_lock, flag);
1263
1264 if (!found)
1265 return -ENOENT;
1266
1267 count = msm_event_client_count(dev, req_event, false);
1268 if (!count)
1269 ret = msm_register_event(dev, req_event, file, false);
1270
1271 return ret;
1272}
1273
1274void msm_send_crtc_notification(struct drm_crtc *crtc,
1275 struct drm_event *event, u8 *payload)
1276{
1277 struct drm_device *dev = NULL;
1278 struct msm_drm_private *priv = NULL;
1279 unsigned long flags;
1280 struct msm_drm_event *notify, *node;
1281 int len = 0, ret;
1282
1283 if (!crtc || !event || !event->length || !payload) {
1284 DRM_ERROR("err param crtc %pK event %pK len %d payload %pK\n",
1285 crtc, event, ((event) ? (event->length) : -1),
1286 payload);
1287 return;
1288 }
1289 dev = crtc->dev;
1290 priv = (dev) ? dev->dev_private : NULL;
1291 if (!dev || !priv) {
1292 DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
1293 return;
1294 }
1295
1296 spin_lock_irqsave(&dev->event_lock, flags);
1297 list_for_each_entry(node, &priv->client_event_list, base.link) {
1298 if (node->event.type != event->type ||
1299 crtc->base.id != node->info.object_id)
1300 continue;
1301 len = event->length + sizeof(struct drm_msm_event_resp);
1302 if (node->base.file_priv->event_space < len) {
1303 DRM_ERROR("Insufficient space to notify\n");
1304 continue;
1305 }
1306 notify = kzalloc(len, GFP_ATOMIC);
1307 if (!notify)
1308 continue;
1309 notify->base.file_priv = node->base.file_priv;
1310 notify->base.event = &notify->event;
1311 notify->base.pid = node->base.pid;
1312 notify->event.type = node->event.type;
1313 notify->event.length = len;
1314 memcpy(&notify->info, &node->info, sizeof(notify->info));
1315 memcpy(notify->data, payload, event->length);
1316 ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
1317 &notify->base, &notify->event);
1318 if (ret) {
1319 kfree(notify);
1320 continue;
1321 }
1322 drm_send_event_locked(dev, &notify->base);
1323 }
1324 spin_unlock_irqrestore(&dev->event_lock, flags);
1325}
1326
1327static int msm_release(struct inode *inode, struct file *filp)
1328{
1329 struct drm_file *file_priv = filp->private_data;
1330 struct drm_minor *minor = file_priv->minor;
1331 struct drm_device *dev = minor->dev;
1332 struct msm_drm_private *priv = dev->dev_private;
1333 struct msm_drm_event *node, *temp;
1334 u32 count;
1335 unsigned long flags;
1336
1337 spin_lock_irqsave(&dev->event_lock, flags);
1338 list_for_each_entry_safe(node, temp, &priv->client_event_list,
1339 base.link) {
1340 if (node->base.file_priv != file_priv)
1341 continue;
1342 list_del(&node->base.link);
1343 spin_unlock_irqrestore(&dev->event_lock, flags);
1344 count = msm_event_client_count(dev, &node->info, true);
1345 if (!count)
1346 msm_register_event(dev, &node->info, file_priv, false);
1347 kfree(node);
1348 spin_lock_irqsave(&dev->event_lock, flags);
1349 }
1350 spin_unlock_irqrestore(&dev->event_lock, flags);
1351
1352 return drm_release(inode, filp);
1353}
1354
Lloyd Atkinsonf76121a2017-01-30 17:30:55 -05001355/**
1356 * msm_drv_framebuffer_remove - remove and unreference a framebuffer object
1357 * @fb: framebuffer to remove
1358 */
1359void msm_drv_framebuffer_remove(struct drm_framebuffer *fb)
1360{
1361 struct drm_device *dev;
1362
1363 if (!fb)
1364 return;
1365
1366 dev = fb->dev;
1367
1368 WARN_ON(!list_empty(&fb->filp_head));
1369
1370 drm_framebuffer_unreference(fb);
1371}
1372
1373struct msm_drv_rmfb2_work {
1374 struct work_struct work;
1375 struct list_head fbs;
1376};
1377
1378static void msm_drv_rmfb2_work_fn(struct work_struct *w)
1379{
1380 struct msm_drv_rmfb2_work *arg = container_of(w, typeof(*arg), work);
1381
1382 while (!list_empty(&arg->fbs)) {
1383 struct drm_framebuffer *fb =
1384 list_first_entry(&arg->fbs, typeof(*fb), filp_head);
1385
1386 list_del_init(&fb->filp_head);
1387 msm_drv_framebuffer_remove(fb);
1388 }
1389}
1390
1391/**
1392 * msm_ioctl_rmfb2 - remove an FB from the configuration
1393 * @dev: drm device for the ioctl
1394 * @data: data pointer for the ioctl
1395 * @file_priv: drm file for the ioctl call
1396 *
1397 * Remove the FB specified by the user.
1398 *
1399 * Called by the user via ioctl.
1400 *
1401 * Returns:
1402 * Zero on success, negative errno on failure.
1403 */
1404int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
1405 struct drm_file *file_priv)
1406{
1407 struct drm_framebuffer *fb = NULL;
1408 struct drm_framebuffer *fbl = NULL;
1409 uint32_t *id = data;
1410 int found = 0;
1411
1412 if (!drm_core_check_feature(dev, DRIVER_MODESET))
1413 return -EINVAL;
1414
1415 fb = drm_framebuffer_lookup(dev, *id);
1416 if (!fb)
1417 return -ENOENT;
1418
1419 /* drop extra ref from traversing drm_framebuffer_lookup */
1420 drm_framebuffer_unreference(fb);
1421
1422 mutex_lock(&file_priv->fbs_lock);
1423 list_for_each_entry(fbl, &file_priv->fbs, filp_head)
1424 if (fb == fbl)
1425 found = 1;
1426 if (!found) {
1427 mutex_unlock(&file_priv->fbs_lock);
1428 return -ENOENT;
1429 }
1430
1431 list_del_init(&fb->filp_head);
1432 mutex_unlock(&file_priv->fbs_lock);
1433
1434 /*
1435 * we now own the reference that was stored in the fbs list
1436 *
1437 * drm_framebuffer_remove may fail with -EINTR on pending signals,
1438 * so run this in a separate stack as there's no way to correctly
1439 * handle this after the fb is already removed from the lookup table.
1440 */
1441 if (drm_framebuffer_read_refcount(fb) > 1) {
1442 struct msm_drv_rmfb2_work arg;
1443
1444 INIT_WORK_ONSTACK(&arg.work, msm_drv_rmfb2_work_fn);
1445 INIT_LIST_HEAD(&arg.fbs);
1446 list_add_tail(&fb->filp_head, &arg.fbs);
1447
1448 schedule_work(&arg.work);
1449 flush_work(&arg.work);
1450 destroy_work_on_stack(&arg.work);
1451 } else
1452 drm_framebuffer_unreference(fb);
1453
1454 return 0;
1455}
1456EXPORT_SYMBOL(msm_ioctl_rmfb2);
1457
Rob Clark7198e6b2013-07-19 12:59:32 -04001458static const struct drm_ioctl_desc msm_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +02001459 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_AUTH|DRM_RENDER_ALLOW),
1460 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
1461 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_AUTH|DRM_RENDER_ALLOW),
1462 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
1463 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
1464 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_AUTH|DRM_RENDER_ALLOW),
1465 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_AUTH|DRM_RENDER_ALLOW),
Rob Clark4cd33c42016-05-17 15:44:49 -04001466 DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
Alan Kwongbb27c092016-07-20 16:41:25 -04001467 DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
Gopikrishnaiah Anandande2c81b2017-03-15 12:41:29 -07001468 DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
1469 DRM_UNLOCKED|DRM_CONTROL_ALLOW),
1470 DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
1471 DRM_UNLOCKED|DRM_CONTROL_ALLOW),
Lloyd Atkinsonf76121a2017-01-30 17:30:55 -05001472 DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2,
1473 DRM_CONTROL_ALLOW|DRM_UNLOCKED),
Rob Clark7198e6b2013-07-19 12:59:32 -04001474};
1475
Rob Clarkc8afe682013-06-26 12:44:06 -04001476static const struct vm_operations_struct vm_ops = {
1477 .fault = msm_gem_fault,
1478 .open = drm_gem_vm_open,
1479 .close = drm_gem_vm_close,
1480};
1481
1482static const struct file_operations fops = {
1483 .owner = THIS_MODULE,
1484 .open = drm_open,
Gopikrishnaiah Anandande2c81b2017-03-15 12:41:29 -07001485 .release = msm_release,
Rob Clarkc8afe682013-06-26 12:44:06 -04001486 .unlocked_ioctl = drm_ioctl,
1487#ifdef CONFIG_COMPAT
1488 .compat_ioctl = drm_compat_ioctl,
1489#endif
1490 .poll = drm_poll,
1491 .read = drm_read,
1492 .llseek = no_llseek,
1493 .mmap = msm_gem_mmap,
1494};
1495
1496static struct drm_driver msm_driver = {
Rob Clark05b84912013-09-28 11:28:35 -04001497 .driver_features = DRIVER_HAVE_IRQ |
1498 DRIVER_GEM |
1499 DRIVER_PRIME |
Rob Clarkb4b15c82013-09-28 12:01:25 -04001500 DRIVER_RENDER |
Rob Clarka5436e12015-06-04 10:12:22 -04001501 DRIVER_ATOMIC |
Rob Clark05b84912013-09-28 11:28:35 -04001502 DRIVER_MODESET,
Rob Clark7198e6b2013-07-19 12:59:32 -04001503 .open = msm_open,
Rob Clarkc8afe682013-06-26 12:44:06 -04001504 .preclose = msm_preclose,
Lloyd Atkinson5217336c2016-09-15 18:21:18 -04001505 .postclose = msm_postclose,
Rob Clarkc8afe682013-06-26 12:44:06 -04001506 .lastclose = msm_lastclose,
1507 .irq_handler = msm_irq,
1508 .irq_preinstall = msm_irq_preinstall,
1509 .irq_postinstall = msm_irq_postinstall,
1510 .irq_uninstall = msm_irq_uninstall,
Ville Syrjäläb44f8402015-09-30 16:46:48 +03001511 .get_vblank_counter = drm_vblank_no_hw_counter,
Rob Clarkc8afe682013-06-26 12:44:06 -04001512 .enable_vblank = msm_enable_vblank,
1513 .disable_vblank = msm_disable_vblank,
1514 .gem_free_object = msm_gem_free_object,
1515 .gem_vm_ops = &vm_ops,
1516 .dumb_create = msm_gem_dumb_create,
1517 .dumb_map_offset = msm_gem_dumb_map_offset,
Rob Clark30600a9092013-09-28 10:13:04 -04001518 .dumb_destroy = drm_gem_dumb_destroy,
Rob Clark05b84912013-09-28 11:28:35 -04001519 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1520 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1521 .gem_prime_export = drm_gem_prime_export,
1522 .gem_prime_import = drm_gem_prime_import,
1523 .gem_prime_pin = msm_gem_prime_pin,
1524 .gem_prime_unpin = msm_gem_prime_unpin,
1525 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
1526 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
1527 .gem_prime_vmap = msm_gem_prime_vmap,
1528 .gem_prime_vunmap = msm_gem_prime_vunmap,
Daniel Thompson77a147e2014-11-12 11:38:14 +00001529 .gem_prime_mmap = msm_gem_prime_mmap,
Rob Clarkc8afe682013-06-26 12:44:06 -04001530#ifdef CONFIG_DEBUG_FS
1531 .debugfs_init = msm_debugfs_init,
1532 .debugfs_cleanup = msm_debugfs_cleanup,
1533#endif
Rob Clark7198e6b2013-07-19 12:59:32 -04001534 .ioctls = msm_ioctls,
Jordan Crouse1023e9b2017-03-07 11:14:04 -07001535 .num_ioctls = ARRAY_SIZE(msm_ioctls),
Rob Clarkc8afe682013-06-26 12:44:06 -04001536 .fops = &fops,
Stephane Viauaa6ed8b2016-07-19 12:59:42 -04001537 .name = "msm_drm",
Rob Clarkc8afe682013-06-26 12:44:06 -04001538 .desc = "MSM Snapdragon DRM",
1539 .date = "20130625",
Rob Clarka8d854c2016-06-01 14:02:02 -04001540 .major = MSM_VERSION_MAJOR,
1541 .minor = MSM_VERSION_MINOR,
1542 .patchlevel = MSM_VERSION_PATCHLEVEL,
Rob Clarkc8afe682013-06-26 12:44:06 -04001543};
1544
1545#ifdef CONFIG_PM_SLEEP
1546static int msm_pm_suspend(struct device *dev)
1547{
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001548 struct drm_device *ddev;
1549 struct drm_modeset_acquire_ctx ctx;
1550 struct drm_connector *conn;
1551 struct drm_atomic_state *state;
1552 struct drm_crtc_state *crtc_state;
1553 struct msm_drm_private *priv;
1554 int ret = 0;
Rob Clarkc8afe682013-06-26 12:44:06 -04001555
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001556 if (!dev)
1557 return -EINVAL;
1558
1559 ddev = dev_get_drvdata(dev);
1560 if (!ddev || !ddev->dev_private)
1561 return -EINVAL;
1562
1563 priv = ddev->dev_private;
1564 SDE_EVT32(0);
1565
1566 /* acquire modeset lock(s) */
1567 drm_modeset_acquire_init(&ctx, 0);
1568
1569retry:
1570 ret = drm_modeset_lock_all_ctx(ddev, &ctx);
1571 if (ret)
1572 goto unlock;
1573
1574 /* save current state for resume */
1575 if (priv->suspend_state)
1576 drm_atomic_state_free(priv->suspend_state);
1577 priv->suspend_state = drm_atomic_helper_duplicate_state(ddev, &ctx);
1578 if (IS_ERR_OR_NULL(priv->suspend_state)) {
1579 DRM_ERROR("failed to back up suspend state\n");
1580 priv->suspend_state = NULL;
1581 goto unlock;
1582 }
1583
1584 /* create atomic state to disable all CRTCs */
1585 state = drm_atomic_state_alloc(ddev);
1586 if (IS_ERR_OR_NULL(state)) {
1587 DRM_ERROR("failed to allocate crtc disable state\n");
1588 goto unlock;
1589 }
1590
1591 state->acquire_ctx = &ctx;
1592 drm_for_each_connector(conn, ddev) {
1593
1594 if (!conn->state || !conn->state->crtc ||
1595 conn->dpms != DRM_MODE_DPMS_ON)
1596 continue;
1597
1598 /* force CRTC to be inactive */
1599 crtc_state = drm_atomic_get_crtc_state(state,
1600 conn->state->crtc);
1601 if (IS_ERR_OR_NULL(crtc_state)) {
1602 DRM_ERROR("failed to get crtc %d state\n",
1603 conn->state->crtc->base.id);
1604 drm_atomic_state_free(state);
1605 goto unlock;
1606 }
1607 crtc_state->active = false;
1608 }
1609
1610 /* commit the "disable all" state */
1611 ret = drm_atomic_commit(state);
1612 if (ret < 0) {
1613 DRM_ERROR("failed to disable crtcs, %d\n", ret);
1614 drm_atomic_state_free(state);
Clarence Ipa65cba52017-03-17 15:18:29 -04001615 } else {
1616 priv->suspend_block = true;
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001617 }
1618
1619unlock:
1620 if (ret == -EDEADLK) {
1621 drm_modeset_backoff(&ctx);
1622 goto retry;
1623 }
1624 drm_modeset_drop_locks(&ctx);
1625 drm_modeset_acquire_fini(&ctx);
1626
1627 /* disable hot-plug polling */
Rob Clarkc8afe682013-06-26 12:44:06 -04001628 drm_kms_helper_poll_disable(ddev);
1629
1630 return 0;
1631}
1632
1633static int msm_pm_resume(struct device *dev)
1634{
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001635 struct drm_device *ddev;
1636 struct msm_drm_private *priv;
1637 int ret;
Rob Clarkc8afe682013-06-26 12:44:06 -04001638
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001639 if (!dev)
1640 return -EINVAL;
1641
1642 ddev = dev_get_drvdata(dev);
1643 if (!ddev || !ddev->dev_private)
1644 return -EINVAL;
1645
1646 priv = ddev->dev_private;
1647
1648 SDE_EVT32(priv->suspend_state != NULL);
1649
1650 drm_mode_config_reset(ddev);
1651
1652 drm_modeset_lock_all(ddev);
1653
Clarence Ipa65cba52017-03-17 15:18:29 -04001654 priv->suspend_block = false;
1655
Clarence Ipe5f1f4c2016-11-19 18:02:23 -05001656 if (priv->suspend_state) {
1657 priv->suspend_state->acquire_ctx =
1658 ddev->mode_config.acquire_ctx;
1659 ret = drm_atomic_commit(priv->suspend_state);
1660 if (ret < 0) {
1661 DRM_ERROR("failed to restore state, %d\n", ret);
1662 drm_atomic_state_free(priv->suspend_state);
1663 }
1664 priv->suspend_state = NULL;
1665 }
1666 drm_modeset_unlock_all(ddev);
1667
1668 /* enable hot-plug polling */
Rob Clarkc8afe682013-06-26 12:44:06 -04001669 drm_kms_helper_poll_enable(ddev);
1670
1671 return 0;
1672}
1673#endif
1674
1675static const struct dev_pm_ops msm_pm_ops = {
1676 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
1677};
1678
1679/*
Rob Clark060530f2014-03-03 14:19:12 -05001680 * Componentized driver support:
1681 */
1682
Archit Tanejae9fbdaf2015-11-18 12:15:14 +05301683/*
1684 * NOTE: duplication of the same code as exynos or imx (or probably any other).
1685 * so probably some room for some helpers
Rob Clark060530f2014-03-03 14:19:12 -05001686 */
1687static int compare_of(struct device *dev, void *data)
1688{
1689 return dev->of_node == data;
1690}
Rob Clark41e69772013-12-15 16:23:05 -05001691
Archit Taneja812070e2016-05-19 10:38:39 +05301692/*
1693 * Identify what components need to be added by parsing what remote-endpoints
1694 * our MDP output ports are connected to. In the case of LVDS on MDP4, there
1695 * is no external component that we need to add since LVDS is within MDP4
1696 * itself.
1697 */
1698static int add_components_mdp(struct device *mdp_dev,
1699 struct component_match **matchptr)
1700{
1701 struct device_node *np = mdp_dev->of_node;
1702 struct device_node *ep_node;
Archit Taneja54011e22016-06-06 13:45:34 +05301703 struct device *master_dev;
1704
1705 /*
1706 * on MDP4 based platforms, the MDP platform device is the component
1707 * master that adds other display interface components to itself.
1708 *
1709 * on MDP5 based platforms, the MDSS platform device is the component
1710 * master that adds MDP5 and other display interface components to
1711 * itself.
1712 */
1713 if (of_device_is_compatible(np, "qcom,mdp4"))
1714 master_dev = mdp_dev;
1715 else
1716 master_dev = mdp_dev->parent;
Archit Taneja812070e2016-05-19 10:38:39 +05301717
1718 for_each_endpoint_of_node(np, ep_node) {
1719 struct device_node *intf;
1720 struct of_endpoint ep;
1721 int ret;
1722
1723 ret = of_graph_parse_endpoint(ep_node, &ep);
1724 if (ret) {
1725 dev_err(mdp_dev, "unable to parse port endpoint\n");
1726 of_node_put(ep_node);
1727 return ret;
1728 }
1729
1730 /*
1731 * The LCDC/LVDS port on MDP4 is a speacial case where the
1732 * remote-endpoint isn't a component that we need to add
1733 */
1734 if (of_device_is_compatible(np, "qcom,mdp4") &&
1735 ep.port == 0) {
1736 of_node_put(ep_node);
1737 continue;
1738 }
1739
1740 /*
1741 * It's okay if some of the ports don't have a remote endpoint
1742 * specified. It just means that the port isn't connected to
1743 * any external interface.
1744 */
1745 intf = of_graph_get_remote_port_parent(ep_node);
1746 if (!intf) {
1747 of_node_put(ep_node);
1748 continue;
1749 }
1750
Archit Taneja54011e22016-06-06 13:45:34 +05301751 component_match_add(master_dev, matchptr, compare_of, intf);
Archit Taneja812070e2016-05-19 10:38:39 +05301752
1753 of_node_put(intf);
1754 of_node_put(ep_node);
1755 }
1756
1757 return 0;
1758}
1759
Archit Taneja54011e22016-06-06 13:45:34 +05301760static int compare_name_mdp(struct device *dev, void *data)
1761{
Dhaval Patel5200c602017-01-17 15:53:37 -08001762 return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
1763}
1764
1765static int add_display_components(struct device *dev,
1766 struct component_match **matchptr)
1767{
1768 struct device *mdp_dev = NULL;
Archit Taneja54011e22016-06-06 13:45:34 +05301769 int ret;
1770
Dhaval Patel5200c602017-01-17 15:53:37 -08001771 if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
1772 struct device_node *np = dev->of_node;
1773 unsigned int i;
1774
1775 for (i = 0; ; i++) {
1776 struct device_node *node;
1777
1778 node = of_parse_phandle(np, "connectors", i);
1779 if (!node)
1780 break;
1781
1782 component_match_add(dev, matchptr, compare_of, node);
1783 }
1784 return 0;
1785 }
1786
1787 /*
1788 * MDP5 based devices don't have a flat hierarchy. There is a top level
1789 * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
1790 * children devices, find the MDP5 node, and then add the interfaces
1791 * to our components list.
1792 */
1793 if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
1794 ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
1795 if (ret) {
1796 dev_err(dev, "failed to populate children devices\n");
1797 return ret;
1798 }
1799
1800 mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
1801 if (!mdp_dev) {
1802 dev_err(dev, "failed to find MDSS MDP node\n");
1803 of_platform_depopulate(dev);
1804 return -ENODEV;
1805 }
1806
1807 put_device(mdp_dev);
1808
1809 /* add the MDP component itself */
1810 component_match_add(dev, matchptr, compare_of,
1811 mdp_dev->of_node);
1812 } else {
1813 /* MDP4 */
1814 mdp_dev = dev;
1815 }
1816
1817 ret = add_components_mdp(mdp_dev, matchptr);
Archit Taneja54011e22016-06-06 13:45:34 +05301818 if (ret)
Dhaval Patel5200c602017-01-17 15:53:37 -08001819 of_platform_depopulate(dev);
Archit Taneja54011e22016-06-06 13:45:34 +05301820
1821 return ret;
Archit Taneja7d526fc2016-05-19 10:33:57 +05301822}
1823
Archit Tanejadc3ea262016-05-19 13:33:52 +05301824/*
1825 * We don't know what's the best binding to link the gpu with the drm device.
1826 * Fow now, we just hunt for all the possible gpus that we support, and add them
1827 * as components.
1828 */
1829static const struct of_device_id msm_gpu_match[] = {
1830 { .compatible = "qcom,adreno-3xx" },
1831 { .compatible = "qcom,kgsl-3d0" },
1832 { },
1833};
1834
Dhaval Patel169bf3a2017-04-11 11:00:57 -07001835#ifdef CONFIG_QCOM_KGSL
1836static int add_gpu_components(struct device *dev,
1837 struct component_match **matchptr)
1838{
1839 return 0;
1840}
1841#else
Archit Taneja7d526fc2016-05-19 10:33:57 +05301842static int add_gpu_components(struct device *dev,
1843 struct component_match **matchptr)
1844{
Archit Tanejadc3ea262016-05-19 13:33:52 +05301845 struct device_node *np;
1846
1847 np = of_find_matching_node(NULL, msm_gpu_match);
1848 if (!np)
1849 return 0;
1850
1851 component_match_add(dev, matchptr, compare_of, np);
1852
1853 of_node_put(np);
1854
1855 return 0;
Archit Taneja7d526fc2016-05-19 10:33:57 +05301856}
Dhaval Patel169bf3a2017-04-11 11:00:57 -07001857#endif
Archit Taneja7d526fc2016-05-19 10:33:57 +05301858
Dhaval Patel5200c602017-01-17 15:53:37 -08001859static int msm_drm_bind(struct device *dev)
Russell King84448282014-04-19 11:20:42 +01001860{
Archit Taneja2b669872016-05-02 11:05:54 +05301861 return msm_drm_init(dev, &msm_driver);
Russell King84448282014-04-19 11:20:42 +01001862}
1863
Dhaval Patel5200c602017-01-17 15:53:37 -08001864static void msm_drm_unbind(struct device *dev)
Russell King84448282014-04-19 11:20:42 +01001865{
Archit Taneja2b669872016-05-02 11:05:54 +05301866 msm_drm_uninit(dev);
Russell King84448282014-04-19 11:20:42 +01001867}
Dhaval Patel5200c602017-01-17 15:53:37 -08001868
1869static const struct component_master_ops msm_drm_ops = {
1870 .bind = msm_drm_bind,
1871 .unbind = msm_drm_unbind,
1872};
Russell King84448282014-04-19 11:20:42 +01001873
1874/*
1875 * Platform driver:
1876 */
1877
1878static int msm_pdev_probe(struct platform_device *pdev)
1879{
Dhaval Patel3949f032016-06-20 16:24:33 -07001880 int ret;
Russell King84448282014-04-19 11:20:42 +01001881 struct component_match *match = NULL;
Lloyd Atkinson6f74f402016-10-04 10:07:36 -04001882
Archit Taneja7d526fc2016-05-19 10:33:57 +05301883 ret = add_display_components(&pdev->dev, &match);
1884 if (ret)
1885 return ret;
1886
Dhaval Patel5200c602017-01-17 15:53:37 -08001887 ret = add_gpu_components(&pdev->dev, &match);
1888 if (ret)
1889 return ret;
Dhaval Patel3949f032016-06-20 16:24:33 -07001890
Dhaval Patel5200c602017-01-17 15:53:37 -08001891 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
1892 return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
Rob Clarkc8afe682013-06-26 12:44:06 -04001893}
1894
1895static int msm_pdev_remove(struct platform_device *pdev)
1896{
Lloyd Atkinson6f74f402016-10-04 10:07:36 -04001897 component_master_del(&pdev->dev, &msm_drm_ops);
Dhaval Patel5200c602017-01-17 15:53:37 -08001898 of_platform_depopulate(&pdev->dev);
1899
1900 msm_drm_unbind(&pdev->dev);
Rob Clarkc8afe682013-06-26 12:44:06 -04001901 return 0;
1902}
1903
Rob Clark06c0dd92013-11-30 17:51:47 -05001904static const struct of_device_id dt_match[] = {
Dhaval Patel5200c602017-01-17 15:53:37 -08001905 { .compatible = "qcom,mdp4", .data = (void *)4 }, /* MDP4 */
1906 { .compatible = "qcom,mdss", .data = (void *)5 }, /* MDP5 MDSS */
1907 { .compatible = "qcom,sde-kms", .data = (void *)3 }, /* sde */
Rob Clark06c0dd92013-11-30 17:51:47 -05001908 {}
1909};
1910MODULE_DEVICE_TABLE(of, dt_match);
1911
Rob Clarkc8afe682013-06-26 12:44:06 -04001912static struct platform_driver msm_platform_driver = {
1913 .probe = msm_pdev_probe,
1914 .remove = msm_pdev_remove,
1915 .driver = {
Stephane Viauaa6ed8b2016-07-19 12:59:42 -04001916 .name = "msm_drm",
Rob Clark06c0dd92013-11-30 17:51:47 -05001917 .of_match_table = dt_match,
Rob Clarkc8afe682013-06-26 12:44:06 -04001918 .pm = &msm_pm_ops,
1919 },
Rob Clarkc8afe682013-06-26 12:44:06 -04001920};
1921
Stephane Viau32f13f62015-04-29 15:57:29 -04001922#ifdef CONFIG_QCOM_KGSL
1923void __init adreno_register(void)
1924{
1925}
1926
1927void __exit adreno_unregister(void)
1928{
1929}
1930#endif
1931
Rob Clarkc8afe682013-06-26 12:44:06 -04001932static int __init msm_drm_register(void)
1933{
1934 DBG("init");
Hai Lid5af49c2015-03-26 19:25:17 -04001935 msm_dsi_register();
Hai Li00453982014-12-12 14:41:17 -05001936 msm_edp_register();
Arnd Bergmannfcda50c2016-02-22 22:08:35 +01001937 msm_hdmi_register();
Rob Clarkbfd28b12014-09-05 13:06:37 -04001938 adreno_register();
Rob Clarkc8afe682013-06-26 12:44:06 -04001939 return platform_driver_register(&msm_platform_driver);
1940}
1941
1942static void __exit msm_drm_unregister(void)
1943{
1944 DBG("fini");
1945 platform_driver_unregister(&msm_platform_driver);
Arnd Bergmannfcda50c2016-02-22 22:08:35 +01001946 msm_hdmi_unregister();
Rob Clarkbfd28b12014-09-05 13:06:37 -04001947 adreno_unregister();
Hai Li00453982014-12-12 14:41:17 -05001948 msm_edp_unregister();
Hai Lid5af49c2015-03-26 19:25:17 -04001949 msm_dsi_unregister();
Rob Clarkc8afe682013-06-26 12:44:06 -04001950}
1951
1952module_init(msm_drm_register);
1953module_exit(msm_drm_unregister);
1954
1955MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1956MODULE_DESCRIPTION("MSM DRM Driver");
1957MODULE_LICENSE("GPL");