Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 1 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 2 | |
Suresh Siddha | 61c4628 | 2008-03-10 15:28:04 -0700 | [diff] [blame] | 3 | #include <linux/errno.h> |
| 4 | #include <linux/kernel.h> |
| 5 | #include <linux/mm.h> |
| 6 | #include <linux/smp.h> |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 7 | #include <linux/prctl.h> |
Suresh Siddha | 61c4628 | 2008-03-10 15:28:04 -0700 | [diff] [blame] | 8 | #include <linux/slab.h> |
| 9 | #include <linux/sched.h> |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 10 | #include <linux/module.h> |
| 11 | #include <linux/pm.h> |
Thomas Gleixner | 162a688 | 2015-04-03 02:01:28 +0200 | [diff] [blame] | 12 | #include <linux/tick.h> |
Amerigo Wang | 9d62dcd | 2009-05-11 22:05:28 -0400 | [diff] [blame] | 13 | #include <linux/random.h> |
Avi Kivity | 7c68af6 | 2009-09-19 09:40:22 +0300 | [diff] [blame] | 14 | #include <linux/user-return-notifier.h> |
Andy Isaacson | 814e2c8 | 2009-12-08 00:29:42 -0800 | [diff] [blame] | 15 | #include <linux/dmi.h> |
| 16 | #include <linux/utsname.h> |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 17 | #include <linux/stackprotector.h> |
| 18 | #include <linux/tick.h> |
| 19 | #include <linux/cpuidle.h> |
Arjan van de Ven | 6161352 | 2009-09-17 16:11:28 +0200 | [diff] [blame] | 20 | #include <trace/events/power.h> |
Frederic Weisbecker | 24f1e32c | 2009-09-09 19:22:48 +0200 | [diff] [blame] | 21 | #include <linux/hw_breakpoint.h> |
Borislav Petkov | 93789b3 | 2011-01-20 15:42:52 +0100 | [diff] [blame] | 22 | #include <asm/cpu.h> |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 23 | #include <asm/apic.h> |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame] | 24 | #include <asm/syscalls.h> |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 25 | #include <asm/idle.h> |
| 26 | #include <asm/uaccess.h> |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 27 | #include <asm/mwait.h> |
Ingo Molnar | 78f7f1e | 2015-04-24 02:54:44 +0200 | [diff] [blame] | 28 | #include <asm/fpu/internal.h> |
K.Prasad | 66cb591 | 2009-06-01 23:44:55 +0530 | [diff] [blame] | 29 | #include <asm/debugreg.h> |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 30 | #include <asm/nmi.h> |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 31 | #include <asm/tlbflush.h> |
Ashok Raj | 8838eb6 | 2015-08-12 18:29:40 +0200 | [diff] [blame] | 32 | #include <asm/mce.h> |
Brian Gerst | 9fda6a0 | 2015-07-29 01:41:16 -0400 | [diff] [blame] | 33 | #include <asm/vm86.h> |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 34 | |
Thomas Gleixner | 4504689 | 2012-05-03 09:03:01 +0000 | [diff] [blame] | 35 | /* |
| 36 | * per-CPU TSS segments. Threads are completely 'soft' on Linux, |
| 37 | * no more per-task TSS's. The TSS size is kept cacheline-aligned |
| 38 | * so they are allowed to end up in the .data..cacheline_aligned |
| 39 | * section. Since TSS's are completely CPU-local, we want them |
| 40 | * on exact cacheline boundaries, to eliminate cacheline ping-pong. |
| 41 | */ |
Andy Lutomirski | d0a0de2 | 2015-03-05 19:19:06 -0800 | [diff] [blame] | 42 | __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss) = { |
| 43 | .x86_tss = { |
Andy Lutomirski | d9e05cc | 2015-03-10 11:05:59 -0700 | [diff] [blame] | 44 | .sp0 = TOP_OF_INIT_STACK, |
Andy Lutomirski | d0a0de2 | 2015-03-05 19:19:06 -0800 | [diff] [blame] | 45 | #ifdef CONFIG_X86_32 |
| 46 | .ss0 = __KERNEL_DS, |
| 47 | .ss1 = __KERNEL_CS, |
| 48 | .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, |
| 49 | #endif |
| 50 | }, |
| 51 | #ifdef CONFIG_X86_32 |
| 52 | /* |
| 53 | * Note that the .io_bitmap member must be extra-big. This is because |
| 54 | * the CPU will access an additional byte beyond the end of the IO |
| 55 | * permission bitmap. The extra byte must be all 1 bits, and must |
| 56 | * be within the limit. |
| 57 | */ |
| 58 | .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 }, |
| 59 | #endif |
| 60 | }; |
Marc Dionne | de71ad2 | 2015-05-04 15:16:44 -0300 | [diff] [blame] | 61 | EXPORT_PER_CPU_SYMBOL(cpu_tss); |
Thomas Gleixner | 4504689 | 2012-05-03 09:03:01 +0000 | [diff] [blame] | 62 | |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 63 | #ifdef CONFIG_X86_64 |
| 64 | static DEFINE_PER_CPU(unsigned char, is_idle); |
| 65 | static ATOMIC_NOTIFIER_HEAD(idle_notifier); |
| 66 | |
| 67 | void idle_notifier_register(struct notifier_block *n) |
| 68 | { |
| 69 | atomic_notifier_chain_register(&idle_notifier, n); |
| 70 | } |
| 71 | EXPORT_SYMBOL_GPL(idle_notifier_register); |
| 72 | |
| 73 | void idle_notifier_unregister(struct notifier_block *n) |
| 74 | { |
| 75 | atomic_notifier_chain_unregister(&idle_notifier, n); |
| 76 | } |
| 77 | EXPORT_SYMBOL_GPL(idle_notifier_unregister); |
| 78 | #endif |
Zhao Yakui | c1e3b37 | 2008-06-24 17:58:53 +0800 | [diff] [blame] | 79 | |
Suresh Siddha | 55ccf3f | 2012-05-16 15:03:51 -0700 | [diff] [blame] | 80 | /* |
| 81 | * this gets called so that we can store lazy state into memory and copy the |
| 82 | * current task into the new thread. |
| 83 | */ |
Suresh Siddha | 61c4628 | 2008-03-10 15:28:04 -0700 | [diff] [blame] | 84 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) |
| 85 | { |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 86 | memcpy(dst, src, arch_task_struct_size); |
Oleg Nesterov | f185350 | 2014-09-02 19:57:23 +0200 | [diff] [blame] | 87 | |
Ingo Molnar | c69e098 | 2015-04-24 02:07:15 +0200 | [diff] [blame] | 88 | return fpu__copy(&dst->thread.fpu, &src->thread.fpu); |
Suresh Siddha | 61c4628 | 2008-03-10 15:28:04 -0700 | [diff] [blame] | 89 | } |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 90 | |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 91 | /* |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 92 | * Free current thread data structures etc.. |
| 93 | */ |
| 94 | void exit_thread(void) |
| 95 | { |
| 96 | struct task_struct *me = current; |
| 97 | struct thread_struct *t = &me->thread; |
Thomas Gleixner | 250981e | 2009-03-16 13:07:21 +0100 | [diff] [blame] | 98 | unsigned long *bp = t->io_bitmap_ptr; |
Ingo Molnar | ca6787b | 2015-04-23 12:33:50 +0200 | [diff] [blame] | 99 | struct fpu *fpu = &t->fpu; |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 100 | |
Thomas Gleixner | 250981e | 2009-03-16 13:07:21 +0100 | [diff] [blame] | 101 | if (bp) { |
Andy Lutomirski | 24933b8 | 2015-03-05 19:19:05 -0800 | [diff] [blame] | 102 | struct tss_struct *tss = &per_cpu(cpu_tss, get_cpu()); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 103 | |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 104 | t->io_bitmap_ptr = NULL; |
| 105 | clear_thread_flag(TIF_IO_BITMAP); |
| 106 | /* |
| 107 | * Careful, clear this in the TSS too: |
| 108 | */ |
| 109 | memset(tss->io_bitmap, 0xff, t->io_bitmap_max); |
| 110 | t->io_bitmap_max = 0; |
| 111 | put_cpu(); |
Thomas Gleixner | 250981e | 2009-03-16 13:07:21 +0100 | [diff] [blame] | 112 | kfree(bp); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 113 | } |
Suresh Siddha | 1dcc8d7 | 2012-05-16 15:03:54 -0700 | [diff] [blame] | 114 | |
Brian Gerst | 9fda6a0 | 2015-07-29 01:41:16 -0400 | [diff] [blame] | 115 | free_vm86(t); |
| 116 | |
Ingo Molnar | 5033861 | 2015-04-29 19:04:31 +0200 | [diff] [blame] | 117 | fpu__drop(fpu); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 118 | } |
| 119 | |
| 120 | void flush_thread(void) |
| 121 | { |
| 122 | struct task_struct *tsk = current; |
| 123 | |
Frederic Weisbecker | 24f1e32c | 2009-09-09 19:22:48 +0200 | [diff] [blame] | 124 | flush_ptrace_hw_breakpoint(tsk); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 125 | memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array)); |
Oleg Nesterov | 110d7f7 | 2015-01-19 19:52:12 +0100 | [diff] [blame] | 126 | |
Ingo Molnar | 04c8e01 | 2015-04-29 20:35:33 +0200 | [diff] [blame] | 127 | fpu__clear(&tsk->thread.fpu); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | static void hard_disable_TSC(void) |
| 131 | { |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 132 | cr4_set_bits(X86_CR4_TSD); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | void disable_TSC(void) |
| 136 | { |
| 137 | preempt_disable(); |
| 138 | if (!test_and_set_thread_flag(TIF_NOTSC)) |
| 139 | /* |
| 140 | * Must flip the CPU state synchronously with |
| 141 | * TIF_NOTSC in the current running context. |
| 142 | */ |
| 143 | hard_disable_TSC(); |
| 144 | preempt_enable(); |
| 145 | } |
| 146 | |
| 147 | static void hard_enable_TSC(void) |
| 148 | { |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 149 | cr4_clear_bits(X86_CR4_TSD); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | static void enable_TSC(void) |
| 153 | { |
| 154 | preempt_disable(); |
| 155 | if (test_and_clear_thread_flag(TIF_NOTSC)) |
| 156 | /* |
| 157 | * Must flip the CPU state synchronously with |
| 158 | * TIF_NOTSC in the current running context. |
| 159 | */ |
| 160 | hard_enable_TSC(); |
| 161 | preempt_enable(); |
| 162 | } |
| 163 | |
| 164 | int get_tsc_mode(unsigned long adr) |
| 165 | { |
| 166 | unsigned int val; |
| 167 | |
| 168 | if (test_thread_flag(TIF_NOTSC)) |
| 169 | val = PR_TSC_SIGSEGV; |
| 170 | else |
| 171 | val = PR_TSC_ENABLE; |
| 172 | |
| 173 | return put_user(val, (unsigned int __user *)adr); |
| 174 | } |
| 175 | |
| 176 | int set_tsc_mode(unsigned int val) |
| 177 | { |
| 178 | if (val == PR_TSC_SIGSEGV) |
| 179 | disable_TSC(); |
| 180 | else if (val == PR_TSC_ENABLE) |
| 181 | enable_TSC(); |
| 182 | else |
| 183 | return -EINVAL; |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, |
| 189 | struct tss_struct *tss) |
| 190 | { |
| 191 | struct thread_struct *prev, *next; |
| 192 | |
| 193 | prev = &prev_p->thread; |
| 194 | next = &next_p->thread; |
| 195 | |
Peter Zijlstra | ea8e61b | 2010-03-25 14:51:51 +0100 | [diff] [blame] | 196 | if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^ |
| 197 | test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) { |
| 198 | unsigned long debugctl = get_debugctlmsr(); |
| 199 | |
| 200 | debugctl &= ~DEBUGCTLMSR_BTF; |
| 201 | if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) |
| 202 | debugctl |= DEBUGCTLMSR_BTF; |
| 203 | |
| 204 | update_debugctlmsr(debugctl); |
| 205 | } |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 206 | |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 207 | if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^ |
| 208 | test_tsk_thread_flag(next_p, TIF_NOTSC)) { |
| 209 | /* prev and next are different */ |
| 210 | if (test_tsk_thread_flag(next_p, TIF_NOTSC)) |
| 211 | hard_disable_TSC(); |
| 212 | else |
| 213 | hard_enable_TSC(); |
| 214 | } |
| 215 | |
| 216 | if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) { |
| 217 | /* |
| 218 | * Copy the relevant range of the IO bitmap. |
| 219 | * Normally this is 128 bytes or less: |
| 220 | */ |
| 221 | memcpy(tss->io_bitmap, next->io_bitmap_ptr, |
| 222 | max(prev->io_bitmap_max, next->io_bitmap_max)); |
| 223 | } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) { |
| 224 | /* |
| 225 | * Clear any possible leftover bits: |
| 226 | */ |
| 227 | memset(tss->io_bitmap, 0xff, prev->io_bitmap_max); |
| 228 | } |
Avi Kivity | 7c68af6 | 2009-09-19 09:40:22 +0300 | [diff] [blame] | 229 | propagate_user_return_notify(prev_p, next_p); |
Jeremy Fitzhardinge | 389d1fb | 2009-02-27 13:25:28 -0800 | [diff] [blame] | 230 | } |
| 231 | |
Brian Gerst | df59e7b | 2009-12-09 12:34:44 -0500 | [diff] [blame] | 232 | /* |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 233 | * Idle related variables and functions |
| 234 | */ |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 235 | unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE; |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 236 | EXPORT_SYMBOL(boot_option_idle_override); |
| 237 | |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 238 | static void (*x86_idle)(void); |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 239 | |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 240 | #ifndef CONFIG_SMP |
| 241 | static inline void play_dead(void) |
| 242 | { |
| 243 | BUG(); |
| 244 | } |
| 245 | #endif |
| 246 | |
| 247 | #ifdef CONFIG_X86_64 |
| 248 | void enter_idle(void) |
| 249 | { |
Alex Shi | c6ae41e | 2012-05-11 15:35:27 +0800 | [diff] [blame] | 250 | this_cpu_write(is_idle, 1); |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 251 | atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL); |
| 252 | } |
| 253 | |
| 254 | static void __exit_idle(void) |
| 255 | { |
| 256 | if (x86_test_and_clear_bit_percpu(0, is_idle) == 0) |
| 257 | return; |
| 258 | atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL); |
| 259 | } |
| 260 | |
| 261 | /* Called from interrupts to signify idle end */ |
| 262 | void exit_idle(void) |
| 263 | { |
| 264 | /* idle loop has pid 0 */ |
| 265 | if (current->pid) |
| 266 | return; |
| 267 | __exit_idle(); |
| 268 | } |
| 269 | #endif |
| 270 | |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 271 | void arch_cpu_idle_enter(void) |
| 272 | { |
| 273 | local_touch_nmi(); |
| 274 | enter_idle(); |
| 275 | } |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 276 | |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 277 | void arch_cpu_idle_exit(void) |
| 278 | { |
| 279 | __exit_idle(); |
| 280 | } |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 281 | |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 282 | void arch_cpu_idle_dead(void) |
| 283 | { |
| 284 | play_dead(); |
Richard Weinberger | 90e2401 | 2012-03-25 23:00:04 +0200 | [diff] [blame] | 285 | } |
| 286 | |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 287 | /* |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 288 | * Called from the generic idle code. |
| 289 | */ |
| 290 | void arch_cpu_idle(void) |
| 291 | { |
Nicolas Pitre | 16f8b05 | 2014-01-29 12:45:12 -0500 | [diff] [blame] | 292 | x86_idle(); |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | /* |
| 296 | * We use this if we don't have any better idle routine.. |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 297 | */ |
| 298 | void default_idle(void) |
| 299 | { |
Daniel Lezcano | 4d0e42c | 2012-10-25 18:13:11 +0200 | [diff] [blame] | 300 | trace_cpu_idle_rcuidle(1, smp_processor_id()); |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 301 | safe_halt(); |
Daniel Lezcano | 4d0e42c | 2012-10-25 18:13:11 +0200 | [diff] [blame] | 302 | trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 303 | } |
Andy Whitcroft | 60b8b1d | 2011-06-14 12:45:10 -0700 | [diff] [blame] | 304 | #ifdef CONFIG_APM_MODULE |
Thomas Gleixner | 00dba56 | 2008-06-09 18:35:28 +0200 | [diff] [blame] | 305 | EXPORT_SYMBOL(default_idle); |
| 306 | #endif |
| 307 | |
Len Brown | 6a377dd | 2013-02-09 23:08:07 -0500 | [diff] [blame] | 308 | #ifdef CONFIG_XEN |
| 309 | bool xen_set_default_idle(void) |
Konrad Rzeszutek Wilk | e5fd47b | 2011-11-21 18:02:02 -0500 | [diff] [blame] | 310 | { |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 311 | bool ret = !!x86_idle; |
Konrad Rzeszutek Wilk | e5fd47b | 2011-11-21 18:02:02 -0500 | [diff] [blame] | 312 | |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 313 | x86_idle = default_idle; |
Konrad Rzeszutek Wilk | e5fd47b | 2011-11-21 18:02:02 -0500 | [diff] [blame] | 314 | |
| 315 | return ret; |
| 316 | } |
Len Brown | 6a377dd | 2013-02-09 23:08:07 -0500 | [diff] [blame] | 317 | #endif |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 318 | void stop_this_cpu(void *dummy) |
| 319 | { |
| 320 | local_irq_disable(); |
| 321 | /* |
| 322 | * Remove this CPU: |
| 323 | */ |
Rusty Russell | 4f06289 | 2009-03-13 14:49:54 +1030 | [diff] [blame] | 324 | set_cpu_online(smp_processor_id(), false); |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 325 | disable_local_APIC(); |
Ashok Raj | 8838eb6 | 2015-08-12 18:29:40 +0200 | [diff] [blame] | 326 | mcheck_cpu_clear(this_cpu_ptr(&cpu_info)); |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 327 | |
Len Brown | 27be457 | 2013-02-10 02:28:46 -0500 | [diff] [blame] | 328 | for (;;) |
| 329 | halt(); |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 330 | } |
| 331 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 332 | bool amd_e400_c1e_detected; |
| 333 | EXPORT_SYMBOL(amd_e400_c1e_detected); |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 334 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 335 | static cpumask_var_t amd_e400_c1e_mask; |
Thomas Gleixner | 4faac97 | 2008-09-22 18:54:29 +0200 | [diff] [blame] | 336 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 337 | void amd_e400_remove_cpu(int cpu) |
Thomas Gleixner | 4faac97 | 2008-09-22 18:54:29 +0200 | [diff] [blame] | 338 | { |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 339 | if (amd_e400_c1e_mask != NULL) |
| 340 | cpumask_clear_cpu(cpu, amd_e400_c1e_mask); |
Thomas Gleixner | 4faac97 | 2008-09-22 18:54:29 +0200 | [diff] [blame] | 341 | } |
| 342 | |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 343 | /* |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 344 | * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 345 | * pending message MSR. If we detect C1E, then we handle it the same |
| 346 | * way as C3 power states (local apic timer and TSC stop) |
| 347 | */ |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 348 | static void amd_e400_idle(void) |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 349 | { |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 350 | if (!amd_e400_c1e_detected) { |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 351 | u32 lo, hi; |
| 352 | |
| 353 | rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); |
Michal Schmidt | e8c534e | 2010-07-27 18:53:35 +0200 | [diff] [blame] | 354 | |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 355 | if (lo & K8_INTP_C1E_ACTIVE_MASK) { |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 356 | amd_e400_c1e_detected = true; |
Venki Pallipadi | 40fb171 | 2008-11-17 16:11:37 -0800 | [diff] [blame] | 357 | if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
Andreas Herrmann | 09bfeea | 2008-09-18 21:12:10 +0200 | [diff] [blame] | 358 | mark_tsc_unstable("TSC halt in AMD C1E"); |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 359 | pr_info("System has AMD C1E enabled\n"); |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 360 | } |
| 361 | } |
| 362 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 363 | if (amd_e400_c1e_detected) { |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 364 | int cpu = smp_processor_id(); |
| 365 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 366 | if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) { |
| 367 | cpumask_set_cpu(cpu, amd_e400_c1e_mask); |
Thomas Gleixner | 162a688 | 2015-04-03 02:01:28 +0200 | [diff] [blame] | 368 | /* Force broadcast so ACPI can not interfere. */ |
| 369 | tick_broadcast_force(); |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 370 | pr_info("Switch to broadcast mode on CPU%d\n", cpu); |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 371 | } |
Thomas Gleixner | 435c350 | 2015-04-03 02:05:53 +0200 | [diff] [blame] | 372 | tick_broadcast_enter(); |
Thomas Gleixner | 0beefa2 | 2008-06-17 09:12:03 +0200 | [diff] [blame] | 373 | |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 374 | default_idle(); |
Thomas Gleixner | 0beefa2 | 2008-06-17 09:12:03 +0200 | [diff] [blame] | 375 | |
| 376 | /* |
| 377 | * The switch back from broadcast mode needs to be |
| 378 | * called with interrupts disabled. |
| 379 | */ |
Peter Zijlstra | ea81174 | 2013-09-11 12:43:13 +0200 | [diff] [blame] | 380 | local_irq_disable(); |
Thomas Gleixner | 435c350 | 2015-04-03 02:05:53 +0200 | [diff] [blame] | 381 | tick_broadcast_exit(); |
Peter Zijlstra | ea81174 | 2013-09-11 12:43:13 +0200 | [diff] [blame] | 382 | local_irq_enable(); |
Thomas Gleixner | aa276e1 | 2008-06-09 19:15:00 +0200 | [diff] [blame] | 383 | } else |
| 384 | default_idle(); |
| 385 | } |
| 386 | |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 387 | /* |
| 388 | * Intel Core2 and older machines prefer MWAIT over HALT for C1. |
| 389 | * We can't rely on cpuidle installing MWAIT, because it will not load |
| 390 | * on systems that support only C1 -- so the boot default must be MWAIT. |
| 391 | * |
| 392 | * Some AMD machines are the opposite, they depend on using HALT. |
| 393 | * |
| 394 | * So for default C1, which is used during boot until cpuidle loads, |
| 395 | * use MWAIT-C1 on Intel HW that has it, else use HALT. |
| 396 | */ |
| 397 | static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c) |
| 398 | { |
| 399 | if (c->x86_vendor != X86_VENDOR_INTEL) |
| 400 | return 0; |
| 401 | |
| 402 | if (!cpu_has(c, X86_FEATURE_MWAIT)) |
| 403 | return 0; |
| 404 | |
| 405 | return 1; |
| 406 | } |
| 407 | |
| 408 | /* |
Huang Rui | 0fb0328 | 2015-05-26 10:28:09 +0200 | [diff] [blame] | 409 | * MONITOR/MWAIT with no hints, used for default C1 state. This invokes MWAIT |
| 410 | * with interrupts enabled and no flags, which is backwards compatible with the |
| 411 | * original MWAIT implementation. |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 412 | */ |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 413 | static void mwait_idle(void) |
| 414 | { |
Mike Galbraith | f8e617f | 2014-01-18 17:14:44 +0100 | [diff] [blame] | 415 | if (!current_set_polling_and_test()) { |
Jisheng Zhang | e43d018 | 2015-08-20 12:54:39 +0800 | [diff] [blame] | 416 | trace_cpu_idle_rcuidle(1, smp_processor_id()); |
Mike Galbraith | f8e617f | 2014-01-18 17:14:44 +0100 | [diff] [blame] | 417 | if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) { |
| 418 | smp_mb(); /* quirk */ |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 419 | clflush((void *)¤t_thread_info()->flags); |
Mike Galbraith | f8e617f | 2014-01-18 17:14:44 +0100 | [diff] [blame] | 420 | smp_mb(); /* quirk */ |
| 421 | } |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 422 | |
| 423 | __monitor((void *)¤t_thread_info()->flags, 0, 0); |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 424 | if (!need_resched()) |
| 425 | __sti_mwait(0, 0); |
| 426 | else |
| 427 | local_irq_enable(); |
Jisheng Zhang | e43d018 | 2015-08-20 12:54:39 +0800 | [diff] [blame] | 428 | trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); |
Mike Galbraith | f8e617f | 2014-01-18 17:14:44 +0100 | [diff] [blame] | 429 | } else { |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 430 | local_irq_enable(); |
Mike Galbraith | f8e617f | 2014-01-18 17:14:44 +0100 | [diff] [blame] | 431 | } |
| 432 | __current_clr_polling(); |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 433 | } |
| 434 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 435 | void select_idle_routine(const struct cpuinfo_x86 *c) |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 436 | { |
Ingo Molnar | 3e5095d | 2009-01-27 17:07:08 +0100 | [diff] [blame] | 437 | #ifdef CONFIG_SMP |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 438 | if (boot_option_idle_override == IDLE_POLL && smp_num_siblings > 1) |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 439 | pr_warn_once("WARNING: polling idle and HT enabled, performance may degrade\n"); |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 440 | #endif |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 441 | if (x86_idle || boot_option_idle_override == IDLE_POLL) |
Thomas Gleixner | 6ddd2a2 | 2008-06-09 16:59:53 +0200 | [diff] [blame] | 442 | return; |
| 443 | |
Borislav Petkov | 7d7dc11 | 2013-03-20 15:07:28 +0100 | [diff] [blame] | 444 | if (cpu_has_bug(c, X86_BUG_AMD_APIC_C1E)) { |
Hans Rosenfeld | 9d8888c | 2010-07-28 19:09:31 +0200 | [diff] [blame] | 445 | /* E400: APIC timer interrupt does not wake up CPU from C1e */ |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 446 | pr_info("using AMD E400 aware idle routine\n"); |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 447 | x86_idle = amd_e400_idle; |
Len Brown | b253149 | 2014-01-15 00:37:34 -0500 | [diff] [blame] | 448 | } else if (prefer_mwait_c1_over_halt(c)) { |
| 449 | pr_info("using mwait in idle threads\n"); |
| 450 | x86_idle = mwait_idle; |
Thomas Gleixner | 6ddd2a2 | 2008-06-09 16:59:53 +0200 | [diff] [blame] | 451 | } else |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 452 | x86_idle = default_idle; |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 453 | } |
| 454 | |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 455 | void __init init_amd_e400_c1e_mask(void) |
Rusty Russell | 30e1e6d | 2009-03-17 14:50:34 +1030 | [diff] [blame] | 456 | { |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 457 | /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */ |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 458 | if (x86_idle == amd_e400_idle) |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 459 | zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL); |
Rusty Russell | 30e1e6d | 2009-03-17 14:50:34 +1030 | [diff] [blame] | 460 | } |
| 461 | |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 462 | static int __init idle_setup(char *str) |
| 463 | { |
Cyrill Gorcunov | ab6bc3e | 2008-07-05 15:53:36 +0400 | [diff] [blame] | 464 | if (!str) |
| 465 | return -EINVAL; |
| 466 | |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 467 | if (!strcmp(str, "poll")) { |
Joe Perches | c767a54 | 2012-05-21 19:50:07 -0700 | [diff] [blame] | 468 | pr_info("using polling idle threads\n"); |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 469 | boot_option_idle_override = IDLE_POLL; |
Thomas Gleixner | 7d1a941 | 2013-03-21 22:50:03 +0100 | [diff] [blame] | 470 | cpu_idle_poll_ctrl(true); |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 471 | } else if (!strcmp(str, "halt")) { |
Zhao Yakui | c1e3b37 | 2008-06-24 17:58:53 +0800 | [diff] [blame] | 472 | /* |
| 473 | * When the boot option of idle=halt is added, halt is |
| 474 | * forced to be used for CPU idle. In such case CPU C2/C3 |
| 475 | * won't be used again. |
| 476 | * To continue to load the CPU idle driver, don't touch |
| 477 | * the boot_option_idle_override. |
| 478 | */ |
Len Brown | a476bda | 2013-02-09 21:45:03 -0500 | [diff] [blame] | 479 | x86_idle = default_idle; |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 480 | boot_option_idle_override = IDLE_HALT; |
Zhao Yakui | da5e09a | 2008-06-24 18:01:09 +0800 | [diff] [blame] | 481 | } else if (!strcmp(str, "nomwait")) { |
| 482 | /* |
| 483 | * If the boot option of "idle=nomwait" is added, |
| 484 | * it means that mwait will be disabled for CPU C2/C3 |
| 485 | * states. In such case it won't touch the variable |
| 486 | * of boot_option_idle_override. |
| 487 | */ |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 488 | boot_option_idle_override = IDLE_NOMWAIT; |
Zhao Yakui | c1e3b37 | 2008-06-24 17:58:53 +0800 | [diff] [blame] | 489 | } else |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 490 | return -1; |
| 491 | |
Peter Zijlstra | 7f424a8 | 2008-04-25 17:39:01 +0200 | [diff] [blame] | 492 | return 0; |
| 493 | } |
| 494 | early_param("idle", idle_setup); |
| 495 | |
Amerigo Wang | 9d62dcd | 2009-05-11 22:05:28 -0400 | [diff] [blame] | 496 | unsigned long arch_align_stack(unsigned long sp) |
| 497 | { |
| 498 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) |
| 499 | sp -= get_random_int() % 8192; |
| 500 | return sp & ~0xf; |
| 501 | } |
| 502 | |
| 503 | unsigned long arch_randomize_brk(struct mm_struct *mm) |
| 504 | { |
| 505 | unsigned long range_end = mm->brk + 0x02000000; |
| 506 | return randomize_range(mm->brk, range_end, 0) ? : mm->brk; |
| 507 | } |
| 508 | |
Thomas Gleixner | 7ba7805 | 2015-09-30 08:38:23 +0000 | [diff] [blame] | 509 | /* |
| 510 | * Called from fs/proc with a reference on @p to find the function |
| 511 | * which called into schedule(). This needs to be done carefully |
| 512 | * because the task might wake up and we might look at a stack |
| 513 | * changing under us. |
| 514 | */ |
| 515 | unsigned long get_wchan(struct task_struct *p) |
| 516 | { |
| 517 | unsigned long start, bottom, top, sp, fp, ip; |
| 518 | int count = 0; |
| 519 | |
| 520 | if (!p || p == current || p->state == TASK_RUNNING) |
| 521 | return 0; |
| 522 | |
| 523 | start = (unsigned long)task_stack_page(p); |
| 524 | if (!start) |
| 525 | return 0; |
| 526 | |
| 527 | /* |
| 528 | * Layout of the stack page: |
| 529 | * |
| 530 | * ----------- topmax = start + THREAD_SIZE - sizeof(unsigned long) |
| 531 | * PADDING |
| 532 | * ----------- top = topmax - TOP_OF_KERNEL_STACK_PADDING |
| 533 | * stack |
| 534 | * ----------- bottom = start + sizeof(thread_info) |
| 535 | * thread_info |
| 536 | * ----------- start |
| 537 | * |
| 538 | * The tasks stack pointer points at the location where the |
| 539 | * framepointer is stored. The data on the stack is: |
| 540 | * ... IP FP ... IP FP |
| 541 | * |
| 542 | * We need to read FP and IP, so we need to adjust the upper |
| 543 | * bound by another unsigned long. |
| 544 | */ |
| 545 | top = start + THREAD_SIZE - TOP_OF_KERNEL_STACK_PADDING; |
| 546 | top -= 2 * sizeof(unsigned long); |
| 547 | bottom = start + sizeof(struct thread_info); |
| 548 | |
| 549 | sp = READ_ONCE(p->thread.sp); |
| 550 | if (sp < bottom || sp > top) |
| 551 | return 0; |
| 552 | |
Andrey Ryabinin | f7d27c3 | 2015-10-19 11:37:18 +0300 | [diff] [blame^] | 553 | fp = READ_ONCE_NOCHECK(*(unsigned long *)sp); |
Thomas Gleixner | 7ba7805 | 2015-09-30 08:38:23 +0000 | [diff] [blame] | 554 | do { |
| 555 | if (fp < bottom || fp > top) |
| 556 | return 0; |
Andrey Ryabinin | f7d27c3 | 2015-10-19 11:37:18 +0300 | [diff] [blame^] | 557 | ip = READ_ONCE_NOCHECK(*(unsigned long *)(fp + sizeof(unsigned long))); |
Thomas Gleixner | 7ba7805 | 2015-09-30 08:38:23 +0000 | [diff] [blame] | 558 | if (!in_sched_functions(ip)) |
| 559 | return ip; |
Andrey Ryabinin | f7d27c3 | 2015-10-19 11:37:18 +0300 | [diff] [blame^] | 560 | fp = READ_ONCE_NOCHECK(*(unsigned long *)fp); |
Thomas Gleixner | 7ba7805 | 2015-09-30 08:38:23 +0000 | [diff] [blame] | 561 | } while (count++ < 16 && p->state != TASK_RUNNING); |
| 562 | return 0; |
| 563 | } |