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Ralf Baechledbee90b2006-02-02 14:31:16 +00001#include <asm/asm-offsets.h>
David Daney7b1c0d22012-07-19 09:11:14 +02002#include <asm/thread_info.h>
David Daney485172b2012-08-14 11:08:01 -07003
Ralf Baechlebef9ae32012-12-28 15:15:25 +01004#define PAGE_SIZE _PAGE_SIZE
5
David Daney485172b2012-08-14 11:08:01 -07006/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <asm-generic/vmlinux.lds.h>
13
Ralf Baechle41c594a2006-04-05 09:45:45 +010014#undef mips
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
Ralf Baechle603bb992007-10-14 22:49:01 +010018PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
David Daney3bfb7222015-10-30 00:54:48 +020020#ifndef CONFIG_CAVIUM_OCTEON_SOC
Ralf Baechle603bb992007-10-14 22:49:01 +010021 note PT_NOTE FLAGS(4); /* R__ */
David Daney3bfb7222015-10-30 00:54:48 +020022#endif /* CAVIUM_OCTEON_SOC */
Ralf Baechle603bb992007-10-14 22:49:01 +010023}
Sam Ravnborg51b563f2009-09-20 12:28:22 +020024
Manuel Laussd71789b2009-09-24 21:44:24 +020025#ifdef CONFIG_32BIT
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
Ralf Baechle70342282013-01-22 12:59:30 +010027 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020028 #else
Ralf Baechle70342282013-01-22 12:59:30 +010029 jiffies = jiffies_64 + 4;
Manuel Laussd71789b2009-09-24 21:44:24 +020030 #endif
31#else
Ralf Baechle70342282013-01-22 12:59:30 +010032 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020033#endif
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020038 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020041 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020044 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
47 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020049 /* . = 0xa800000000300000; */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020050 . = 0xffffffff80300000;
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#endif
Sam Ravnborg51b563f2009-09-20 12:28:22 +020052 . = VMLINUX_LOAD_ADDRESS;
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020053 /* read-only */
54 _text = .; /* Text and read-only data */
55 .text : {
56 TEXT_TEXT
57 SCHED_TEXT
Chris Metcalf6727ad92016-10-07 17:02:55 -070058 CPUIDLE_TEXT
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020059 LOCK_TEXT
Ralf Baechlef70fd1b2007-10-14 22:50:05 +010060 KPROBES_TEXT
Wu Zhangjin8f99a162009-11-20 20:34:33 +080061 IRQENTRY_TEXT
Alexander Potapenkobe7635e2016-03-25 14:22:05 -070062 SOFTIRQENTRY_TEXT
Atsushi Nemoto6b3766a2008-08-05 23:45:14 +090063 *(.text.*)
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020064 *(.fixup)
65 *(.gnu.warning)
Ralf Baechle603bb992007-10-14 22:49:01 +010066 } :text = 0
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020067 _etext = .; /* End of text section */
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040069 EXCEPTION_TABLE(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020071 /* Exception table for data bus errors */
72 __dbe_table : {
73 __start___dbe_table = .;
74 *(__dbe_table)
75 __stop___dbe_table = .;
76 }
Ralf Baechle603bb992007-10-14 22:49:01 +010077
David Daney3bfb7222015-10-30 00:54:48 +020078#ifdef CONFIG_CAVIUM_OCTEON_SOC
79#define NOTES_HEADER
80#else /* CONFIG_CAVIUM_OCTEON_SOC */
81#define NOTES_HEADER :note
82#endif /* CONFIG_CAVIUM_OCTEON_SOC */
83 NOTES :text NOTES_HEADER
Ralf Baechle603bb992007-10-14 22:49:01 +010084 .dummy : { *(.dummy) } :text
85
Steven Rostedta2d063a2011-05-19 21:34:58 -040086 _sdata = .; /* Start of data section */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020087 RODATA
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020089 /* writeable */
90 .data : { /* Data */
Franck Bui-Huu16be2432007-10-18 23:12:32 +020091 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
David Daney7b1c0d22012-07-19 09:11:14 +020093 INIT_TASK_DATA(THREAD_SIZE)
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040094 NOSAVE_DATA
95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Catalin Marinasf8bec752011-03-29 11:40:06 +010096 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Franck Bui-Huu16be2432007-10-18 23:12:32 +020097 DATA_DATA
98 CONSTRUCTORS
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020099 }
100 _gp = . + 0x8000;
101 .lit8 : {
102 *(.lit8)
103 }
104 .lit4 : {
105 *(.lit4)
106 }
107 /* We want the small data sections together, so single-instruction offsets
108 can access them all, and initialized data all before uninitialized, so
109 we can shorten the on-disk segment size. */
110 .sdata : {
111 *(.sdata)
112 }
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200113 _edata = .; /* End of data section */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200115 /* will be freed after init */
Nelson Elhagea0b54e22009-07-31 16:58:18 -0400116 . = ALIGN(PAGE_SIZE); /* Init code and data */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200117 __init_begin = .;
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400118 INIT_TEXT_SECTION(PAGE_SIZE)
119 INIT_DATA_SECTION(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120
Gabor Juhos487d70d2010-11-23 16:06:25 +0100121 . = ALIGN(4);
122 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
123 __mips_machines_start = .;
124 *(.mips.machines.init)
125 __mips_machines_end = .;
126 }
127
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200128 /* .exit.text is discarded at runtime, not link time, to deal with
129 * references from .rodata
130 */
131 .exit.text : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100132 EXIT_TEXT
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200133 }
134 .exit.data : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100135 EXIT_DATA
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200136 }
Jonas Gorski1da8f172015-04-12 12:24:58 +0200137#ifdef CONFIG_SMP
Tejun Heo0415b00d12011-03-24 18:50:09 +0100138 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Jonas Gorski1da8f172015-04-12 12:24:58 +0200139#endif
Matt Redfearn069fd762016-03-31 10:05:34 +0100140
Yasha Cherikovskyc7ac3342019-03-08 14:58:51 +0200141#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
142 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
143 *(.appended_dtb)
144 KEEP(*(.appended_dtb))
145 }
146#endif
147
Matt Redfearn069fd762016-03-31 10:05:34 +0100148#ifdef CONFIG_RELOCATABLE
149 . = ALIGN(4);
150
151 .data.reloc : {
152 _relocation_start = .;
153 /*
154 * Space for relocation table
155 * This needs to be filled so that the
156 * relocs tool can overwrite the content.
157 * An invalid value is left at the start of the
158 * section to abort relocation if the table
159 * has not been filled in.
160 */
161 LONG(0xFFFFFFFF);
162 FILL(0);
163 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
164 _relocation_end = .;
165 }
166#endif
167
Jonas Gorski1da8f172015-04-12 12:24:58 +0200168#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
169 __appended_dtb = .;
170 /* leave space for appended DTB */
171 . += 0x100000;
172#endif
David Daney485172b2012-08-14 11:08:01 -0700173 /*
174 * Align to 64K in attempt to eliminate holes before the
175 * .bss..swapper_pg_dir section at the start of .bss. This
176 * also satisfies PAGE_SIZE alignment as the largest page size
177 * allowed is 64K.
178 */
179 . = ALIGN(0x10000);
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200180 __init_end = .;
181 /* freed after init ends here */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
David Daney485172b2012-08-14 11:08:01 -0700183 /*
184 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
Ralf Baechle70342282013-01-22 12:59:30 +0100185 * gets that alignment. .sbss should be empty, so there will be
David Daney485172b2012-08-14 11:08:01 -0700186 * no holes after __init_end. */
Paul Burton84eaa742016-11-07 11:52:19 +0000187 BSS_SECTION(0, 0x10000, 8)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200189 _end = . ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200191 /* These mark the ABI of the kernel for debuggers. */
192 .mdebug.abi32 : {
193 KEEP(*(.mdebug.abi32))
194 }
195 .mdebug.abi64 : {
196 KEEP(*(.mdebug.abi64))
197 }
Daniel Jacobowitz6c769882007-08-03 11:43:01 -0400198
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200199 /* This is the MIPS specific mdebug section. */
200 .mdebug : {
201 *(.mdebug)
202 }
Atsushi Nemoto78665aa2006-05-11 00:41:26 +0900203
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200204 STABS_DEBUG
205 DWARF_DEBUG
Atsushi Nemoto04b6b3b2006-05-10 15:36:04 +0900206
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200207 /* These must appear regardless of . */
208 .gptab.sdata : {
209 *(.gptab.data)
210 *(.gptab.sdata)
211 }
212 .gptab.sbss : {
213 *(.gptab.bss)
214 *(.gptab.sbss)
215 }
Tejun Heo023bf6f2009-07-09 11:27:40 +0900216
217 /* Sections to be discarded */
218 DISCARDS
219 /DISCARD/ : {
220 /* ABI crap starts here */
Aaro Koskinen61379872015-10-30 00:54:47 +0200221 *(.MIPS.abiflags)
Tejun Heo023bf6f2009-07-09 11:27:40 +0900222 *(.MIPS.options)
223 *(.options)
224 *(.pdr)
225 *(.reginfo)
David Daneyb8199542013-08-08 11:40:49 -0700226 *(.eh_frame)
Tejun Heo023bf6f2009-07-09 11:27:40 +0900227 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228}