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Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchart748471a52015-03-05 23:42:39 +020020#include <linux/wait.h>
21
22#include <drm/drm_atomic.h>
Laurent Pinchartcef77d42015-03-05 21:50:00 +020023#include <drm/drm_atomic_helper.h>
Laurent Pinchart2d278f52015-03-05 21:31:37 +020024#include <drm/drm_crtc_helper.h>
25#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060026
Andy Gross5c137792012-03-05 10:48:39 -060027#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020028#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060029
30#define DRIVER_NAME MODULE_NAME
31#define DRIVER_DESC "OMAP DRM"
32#define DRIVER_DATE "20110917"
33#define DRIVER_MAJOR 1
34#define DRIVER_MINOR 0
35#define DRIVER_PATCHLEVEL 0
36
Rob Clarkcd5351f2011-11-12 12:09:40 -060037static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
38
39MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
40module_param(num_crtc, int, 0600);
41
42/*
43 * mode config funcs
44 */
45
46/* Notes about mapping DSS and DRM entities:
47 * CRTC: overlay
48 * encoder: manager.. with some extension to allow one primary CRTC
49 * and zero or more video CRTC's to be mapped to one encoder?
50 * connector: dssdev.. manager can be attached/detached from different
51 * devices
52 */
53
54static void omap_fb_output_poll_changed(struct drm_device *dev)
55{
56 struct omap_drm_private *priv = dev->dev_private;
57 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090058 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060059 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060060}
61
Laurent Pinchart748471a52015-03-05 23:42:39 +020062struct omap_atomic_state_commit {
63 struct work_struct work;
64 struct drm_device *dev;
65 struct drm_atomic_state *state;
66 u32 crtcs;
67};
68
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030069static void omap_atomic_wait_for_completion(struct drm_device *dev,
70 struct drm_atomic_state *old_state)
71{
72 struct drm_crtc_state *old_crtc_state;
73 struct drm_crtc *crtc;
74 unsigned int i;
75 int ret;
76
77 for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
78 if (!crtc->state->enable)
79 continue;
80
81 ret = omap_crtc_wait_pending(crtc);
82
83 if (!ret)
84 dev_warn(dev->dev,
85 "atomic complete timeout (pipe %u)!\n", i);
86 }
87}
88
Laurent Pinchart748471a52015-03-05 23:42:39 +020089static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
90{
91 struct drm_device *dev = commit->dev;
92 struct omap_drm_private *priv = dev->dev_private;
93 struct drm_atomic_state *old_state = commit->state;
94
95 /* Apply the atomic update. */
Laurent Pinchart69fb7c82015-05-28 02:09:56 +030096 dispc_runtime_get();
97
Laurent Pinchart748471a52015-03-05 23:42:39 +020098 drm_atomic_helper_commit_modeset_disables(dev, old_state);
Laurent Pinchartdadf4652016-06-06 04:25:04 +030099 drm_atomic_helper_commit_planes(dev, old_state,
100 DRM_PLANE_COMMIT_ACTIVE_ONLY);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200101 drm_atomic_helper_commit_modeset_enables(dev, old_state);
102
Tomi Valkeinen5f741b32015-05-29 16:01:18 +0300103 omap_atomic_wait_for_completion(dev, old_state);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200104
105 drm_atomic_helper_cleanup_planes(dev, old_state);
106
Laurent Pinchart69fb7c82015-05-28 02:09:56 +0300107 dispc_runtime_put();
108
Chris Wilson08536952016-10-14 13:18:18 +0100109 drm_atomic_state_put(old_state);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200110
111 /* Complete the commit, wake up any waiter. */
112 spin_lock(&priv->commit.lock);
113 priv->commit.pending &= ~commit->crtcs;
114 spin_unlock(&priv->commit.lock);
115
116 wake_up_all(&priv->commit.wait);
117
118 kfree(commit);
119}
120
121static void omap_atomic_work(struct work_struct *work)
122{
123 struct omap_atomic_state_commit *commit =
124 container_of(work, struct omap_atomic_state_commit, work);
125
126 omap_atomic_complete(commit);
127}
128
129static bool omap_atomic_is_pending(struct omap_drm_private *priv,
130 struct omap_atomic_state_commit *commit)
131{
132 bool pending;
133
134 spin_lock(&priv->commit.lock);
135 pending = priv->commit.pending & commit->crtcs;
136 spin_unlock(&priv->commit.lock);
137
138 return pending;
139}
140
141static int omap_atomic_commit(struct drm_device *dev,
Maarten Lankhorst6fc17fb2016-04-26 16:11:39 +0200142 struct drm_atomic_state *state, bool nonblock)
Laurent Pinchart748471a52015-03-05 23:42:39 +0200143{
144 struct omap_drm_private *priv = dev->dev_private;
145 struct omap_atomic_state_commit *commit;
Daniel Vetter82072572016-06-02 00:06:29 +0200146 struct drm_crtc *crtc;
147 struct drm_crtc_state *crtc_state;
148 int i, ret;
Laurent Pinchart748471a52015-03-05 23:42:39 +0200149
150 ret = drm_atomic_helper_prepare_planes(dev, state);
151 if (ret)
152 return ret;
153
154 /* Allocate the commit object. */
155 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
156 if (commit == NULL) {
157 ret = -ENOMEM;
158 goto error;
159 }
160
161 INIT_WORK(&commit->work, omap_atomic_work);
162 commit->dev = dev;
163 commit->state = state;
164
165 /* Wait until all affected CRTCs have completed previous commits and
166 * mark them as pending.
167 */
Daniel Vetter82072572016-06-02 00:06:29 +0200168 for_each_crtc_in_state(state, crtc, crtc_state, i)
169 commit->crtcs |= drm_crtc_mask(crtc);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200170
171 wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
172
173 spin_lock(&priv->commit.lock);
174 priv->commit.pending |= commit->crtcs;
175 spin_unlock(&priv->commit.lock);
176
177 /* Swap the state, this is the point of no return. */
Daniel Vetter5e84c262016-06-10 00:06:32 +0200178 drm_atomic_helper_swap_state(state, true);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200179
Chris Wilson08536952016-10-14 13:18:18 +0100180 drm_atomic_state_get(state);
Maarten Lankhorst6fc17fb2016-04-26 16:11:39 +0200181 if (nonblock)
Laurent Pinchart748471a52015-03-05 23:42:39 +0200182 schedule_work(&commit->work);
183 else
184 omap_atomic_complete(commit);
185
186 return 0;
187
188error:
189 drm_atomic_helper_cleanup_planes(dev, state);
190 return ret;
191}
192
Laurent Pincharte6ecefa2012-05-17 13:27:23 +0200193static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600194 .fb_create = omap_framebuffer_create,
195 .output_poll_changed = omap_fb_output_poll_changed,
Laurent Pinchartcef77d42015-03-05 21:50:00 +0200196 .atomic_check = drm_atomic_helper_check,
Laurent Pinchart748471a52015-03-05 23:42:39 +0200197 .atomic_commit = omap_atomic_commit,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600198};
199
200static int get_connector_type(struct omap_dss_device *dssdev)
201{
202 switch (dssdev->type) {
203 case OMAP_DISPLAY_TYPE_HDMI:
204 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +0300205 case OMAP_DISPLAY_TYPE_DVI:
206 return DRM_MODE_CONNECTOR_DVID;
Sebastian Reichel4a64b902016-03-08 17:39:36 +0100207 case OMAP_DISPLAY_TYPE_DSI:
208 return DRM_MODE_CONNECTOR_DSI;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600209 default:
210 return DRM_MODE_CONNECTOR_Unknown;
211 }
212}
213
Archit Taneja0d8f3712013-03-26 19:15:19 +0530214static bool channel_used(struct drm_device *dev, enum omap_channel channel)
215{
216 struct omap_drm_private *priv = dev->dev_private;
217 int i;
218
219 for (i = 0; i < priv->num_crtcs; i++) {
220 struct drm_crtc *crtc = priv->crtcs[i];
221
222 if (omap_crtc_channel(crtc) == channel)
223 return true;
224 }
225
226 return false;
227}
Archit Tanejacc823bd2014-01-02 14:49:52 +0530228static void omap_disconnect_dssdevs(void)
229{
230 struct omap_dss_device *dssdev = NULL;
231
232 for_each_dss_dev(dssdev)
233 dssdev->driver->disconnect(dssdev);
234}
Archit Taneja0d8f3712013-03-26 19:15:19 +0530235
Archit Taneja3a01ab22014-01-02 14:49:51 +0530236static int omap_connect_dssdevs(void)
237{
238 int r;
239 struct omap_dss_device *dssdev = NULL;
240 bool no_displays = true;
241
242 for_each_dss_dev(dssdev) {
243 r = dssdev->driver->connect(dssdev);
244 if (r == -EPROBE_DEFER) {
245 omap_dss_put_device(dssdev);
246 goto cleanup;
247 } else if (r) {
248 dev_warn(dssdev->dev, "could not connect display: %s\n",
249 dssdev->name);
250 } else {
251 no_displays = false;
252 }
253 }
254
255 if (no_displays)
256 return -EPROBE_DEFER;
257
258 return 0;
259
260cleanup:
261 /*
262 * if we are deferring probe, we disconnect the devices we previously
263 * connected
264 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530265 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530266
267 return r;
268}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600269
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200270static int omap_modeset_create_crtc(struct drm_device *dev, int id,
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200271 enum omap_channel channel,
272 u32 possible_crtcs)
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200273{
274 struct omap_drm_private *priv = dev->dev_private;
275 struct drm_plane *plane;
276 struct drm_crtc *crtc;
277
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200278 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY,
279 possible_crtcs);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200280 if (IS_ERR(plane))
281 return PTR_ERR(plane);
282
283 crtc = omap_crtc_init(dev, plane, channel, id);
284
285 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
286 priv->crtcs[id] = crtc;
287 priv->num_crtcs++;
288
289 priv->planes[id] = plane;
290 priv->num_planes++;
291
292 return 0;
293}
294
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200295static int omap_modeset_init_properties(struct drm_device *dev)
296{
297 struct omap_drm_private *priv = dev->dev_private;
298
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200299 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
300 if (!priv->zorder_prop)
301 return -ENOMEM;
302
303 return 0;
304}
305
Rob Clarkcd5351f2011-11-12 12:09:40 -0600306static int omap_modeset_init(struct drm_device *dev)
307{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600308 struct omap_drm_private *priv = dev->dev_private;
309 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600310 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530311 int num_mgrs = dss_feat_get_num_mgrs();
312 int num_crtcs;
313 int i, id = 0;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200314 int ret;
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200315 u32 possible_crtcs;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300316
Rob Clarkcd5351f2011-11-12 12:09:40 -0600317 drm_mode_config_init(dev);
318
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200319 ret = omap_modeset_init_properties(dev);
320 if (ret < 0)
321 return ret;
322
Rob Clarkf5f94542012-12-04 13:59:12 -0600323 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530324 * We usually don't want to create a CRTC for each manager, at least
325 * not until we have a way to expose private planes to userspace.
326 * Otherwise there would not be enough video pipes left for drm planes.
327 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600328 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530329 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200330 possible_crtcs = (1 << num_crtcs) - 1;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600331
Archit Taneja0d8f3712013-03-26 19:15:19 +0530332 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600333
Rob Clarkf5f94542012-12-04 13:59:12 -0600334 for_each_dss_dev(dssdev) {
335 struct drm_connector *connector;
336 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530337 enum omap_channel channel;
Tomi Valkeinen179df152015-10-21 16:17:23 +0300338 struct omap_dss_device *out;
Rob Clarkf5f94542012-12-04 13:59:12 -0600339
Archit Taneja3a01ab22014-01-02 14:49:51 +0530340 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530341 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300342
Rob Clarkf5f94542012-12-04 13:59:12 -0600343 encoder = omap_encoder_init(dev, dssdev);
344
345 if (!encoder) {
346 dev_err(dev->dev, "could not create encoder: %s\n",
347 dssdev->name);
348 return -ENOMEM;
349 }
350
351 connector = omap_connector_init(dev,
352 get_connector_type(dssdev), dssdev, encoder);
353
354 if (!connector) {
355 dev_err(dev->dev, "could not create connector: %s\n",
356 dssdev->name);
357 return -ENOMEM;
358 }
359
360 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
361 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
362
363 priv->encoders[priv->num_encoders++] = encoder;
364 priv->connectors[priv->num_connectors++] = connector;
365
366 drm_mode_connector_attach_encoder(connector, encoder);
367
Archit Taneja0d8f3712013-03-26 19:15:19 +0530368 /*
369 * if we have reached the limit of the crtcs we are allowed to
370 * create, let's not try to look for a crtc for this
371 * panel/encoder and onwards, we will, of course, populate the
372 * the possible_crtcs field for all the encoders with the final
373 * set of crtcs we create
374 */
375 if (id == num_crtcs)
376 continue;
377
378 /*
379 * get the recommended DISPC channel for this encoder. For now,
380 * we only try to get create a crtc out of the recommended, the
381 * other possible channels to which the encoder can connect are
382 * not considered.
383 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530384
Tomi Valkeinen179df152015-10-21 16:17:23 +0300385 out = omapdss_find_output_from_display(dssdev);
386 channel = out->dispc_channel;
387 omap_dss_put_device(out);
388
Archit Taneja0d8f3712013-03-26 19:15:19 +0530389 /*
390 * if this channel hasn't already been taken by a previously
391 * allocated crtc, we create a new crtc for it
392 */
393 if (!channel_used(dev, channel)) {
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200394 ret = omap_modeset_create_crtc(dev, id, channel,
395 possible_crtcs);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200396 if (ret < 0) {
397 dev_err(dev->dev,
398 "could not create CRTC (channel %u)\n",
399 channel);
400 return ret;
401 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530402
403 id++;
404 }
405 }
406
407 /*
408 * we have allocated crtcs according to the need of the panels/encoders,
409 * adding more crtcs here if needed
410 */
411 for (; id < num_crtcs; id++) {
412
413 /* find a free manager for this crtc */
414 for (i = 0; i < num_mgrs; i++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200415 if (!channel_used(dev, i))
Archit Taneja0d8f3712013-03-26 19:15:19 +0530416 break;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530417 }
418
419 if (i == num_mgrs) {
420 /* this shouldn't really happen */
421 dev_err(dev->dev, "no managers left for crtc\n");
422 return -ENOMEM;
423 }
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200424
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200425 ret = omap_modeset_create_crtc(dev, id, i,
426 possible_crtcs);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200427 if (ret < 0) {
428 dev_err(dev->dev,
429 "could not create CRTC (channel %u)\n", i);
430 return ret;
431 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530432 }
433
434 /*
435 * Create normal planes for the remaining overlays:
436 */
437 for (; id < num_ovls; id++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200438 struct drm_plane *plane;
439
Tomi Valkeinene43f2c32016-12-02 16:07:11 +0200440 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY,
441 possible_crtcs);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200442 if (IS_ERR(plane))
443 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530444
445 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
446 priv->planes[priv->num_planes++] = plane;
447 }
448
449 for (i = 0; i < priv->num_encoders; i++) {
450 struct drm_encoder *encoder = priv->encoders[i];
451 struct omap_dss_device *dssdev =
452 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300453 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300454
455 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530456
Rob Clarkf5f94542012-12-04 13:59:12 -0600457 /* figure out which crtc's we can connect the encoder to: */
458 encoder->possible_crtcs = 0;
459 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530460 struct drm_crtc *crtc = priv->crtcs[id];
461 enum omap_channel crtc_channel;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530462
463 crtc_channel = omap_crtc_channel(crtc);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530464
Tomi Valkeinen17337292014-09-03 19:25:49 +0000465 if (output->dispc_channel == crtc_channel) {
Rob Clarkf5f94542012-12-04 13:59:12 -0600466 encoder->possible_crtcs |= (1 << id);
Tomi Valkeinen17337292014-09-03 19:25:49 +0000467 break;
468 }
Rob Clarkf5f94542012-12-04 13:59:12 -0600469 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300470
471 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600472 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600473
Archit Taneja0d8f3712013-03-26 19:15:19 +0530474 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
475 priv->num_planes, priv->num_crtcs, priv->num_encoders,
476 priv->num_connectors);
477
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600478 dev->mode_config.min_width = 32;
479 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600480
481 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
482 * to fill in these limits properly on different OMAP generations..
483 */
484 dev->mode_config.max_width = 2048;
485 dev->mode_config.max_height = 2048;
486
487 dev->mode_config.funcs = &omap_mode_config_funcs;
488
Laurent Pinchart69a12262015-03-05 21:38:16 +0200489 drm_mode_config_reset(dev);
490
Laurent Pinchart728ae8d2015-05-28 00:21:29 +0300491 omap_drm_irq_install(dev);
492
Rob Clarkcd5351f2011-11-12 12:09:40 -0600493 return 0;
494}
495
Rob Clarkcd5351f2011-11-12 12:09:40 -0600496/*
497 * drm ioctl funcs
498 */
499
500
501static int ioctl_get_param(struct drm_device *dev, void *data,
502 struct drm_file *file_priv)
503{
Rob Clark5e3b0872012-10-29 09:31:12 +0100504 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600505 struct drm_omap_param *args = data;
506
507 DBG("%p: param=%llu", dev, args->param);
508
509 switch (args->param) {
510 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100511 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600512 break;
513 default:
514 DBG("unknown parameter %lld", args->param);
515 return -EINVAL;
516 }
517
518 return 0;
519}
520
521static int ioctl_set_param(struct drm_device *dev, void *data,
522 struct drm_file *file_priv)
523{
524 struct drm_omap_param *args = data;
525
526 switch (args->param) {
527 default:
528 DBG("unknown parameter %lld", args->param);
529 return -EINVAL;
530 }
531
532 return 0;
533}
534
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200535#define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
536
Rob Clarkcd5351f2011-11-12 12:09:40 -0600537static int ioctl_gem_new(struct drm_device *dev, void *data,
538 struct drm_file *file_priv)
539{
540 struct drm_omap_gem_new *args = data;
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200541 u32 flags = args->flags & OMAP_BO_USER_MASK;
542
Rob Clarkf5f94542012-12-04 13:59:12 -0600543 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200544 args->size.bytes, flags);
545
546 return omap_gem_new_handle(dev, file_priv, args->size, flags,
547 &args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600548}
549
550static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
551 struct drm_file *file_priv)
552{
553 struct drm_omap_gem_cpu_prep *args = data;
554 struct drm_gem_object *obj;
555 int ret;
556
557 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
558
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100559 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900560 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600561 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600562
563 ret = omap_gem_op_sync(obj, args->op);
564
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900565 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600566 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600567
568 drm_gem_object_unreference_unlocked(obj);
569
570 return ret;
571}
572
573static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
574 struct drm_file *file_priv)
575{
576 struct drm_omap_gem_cpu_fini *args = data;
577 struct drm_gem_object *obj;
578 int ret;
579
580 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
581
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100582 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900583 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600584 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600585
586 /* XXX flushy, flushy */
587 ret = 0;
588
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900589 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600590 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600591
592 drm_gem_object_unreference_unlocked(obj);
593
594 return ret;
595}
596
597static int ioctl_gem_info(struct drm_device *dev, void *data,
598 struct drm_file *file_priv)
599{
600 struct drm_omap_gem_info *args = data;
601 struct drm_gem_object *obj;
602 int ret = 0;
603
Rob Clarkf5f94542012-12-04 13:59:12 -0600604 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600605
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100606 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900607 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600608 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600609
Rob Clarkf7f9f452011-12-05 19:19:22 -0600610 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600611 args->offset = omap_gem_mmap_offset(obj);
612
613 drm_gem_object_unreference_unlocked(obj);
614
615 return ret;
616}
617
Rob Clarkbaa70942013-08-02 13:27:49 -0400618static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +0200619 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
620 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
621 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
622 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
623 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
624 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
Rob Clarkcd5351f2011-11-12 12:09:40 -0600625};
626
627/*
628 * drm driver funcs
629 */
630
Rob Clarkcd5351f2011-11-12 12:09:40 -0600631static int dev_open(struct drm_device *dev, struct drm_file *file)
632{
633 file->driver_priv = NULL;
634
635 DBG("open: dev=%p, file=%p", dev, file);
636
637 return 0;
638}
639
Rob Clarkcd5351f2011-11-12 12:09:40 -0600640/**
641 * lastclose - clean up after all DRM clients have exited
642 * @dev: DRM device
643 *
644 * Take care of cleaning up after all DRM clients have exited. In the
645 * mode setting case, we want to restore the kernel's initial mode (just
646 * in case the last client left us in a bad state).
647 */
648static void dev_lastclose(struct drm_device *dev)
649{
Rob Clark3c810c62012-08-15 15:18:01 -0500650 int i;
651
Lukas Wunnerf15a66e2015-09-05 11:22:39 +0200652 /* we don't support vga_switcheroo.. so just make sure the fbdev
Rob Clarkcd5351f2011-11-12 12:09:40 -0600653 * mode is active
654 */
655 struct omap_drm_private *priv = dev->dev_private;
656 int ret;
657
658 DBG("lastclose: dev=%p", dev);
659
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300660 /* need to restore default rotation state.. not sure
661 * if there is a cleaner way to restore properties to
662 * default state? Maybe a flag that properties should
663 * automatically be restored to default state on
664 * lastclose?
665 */
666 for (i = 0; i < priv->num_crtcs; i++) {
667 struct drm_crtc *crtc = priv->crtcs[i];
Rob Clark3c810c62012-08-15 15:18:01 -0500668
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300669 if (!crtc->primary->rotation_property)
670 continue;
671
672 drm_object_property_set_value(&crtc->base,
673 crtc->primary->rotation_property,
674 DRM_ROTATE_0);
675 }
676
677 for (i = 0; i < priv->num_planes; i++) {
678 struct drm_plane *plane = priv->planes[i];
679
680 if (!plane->rotation_property)
681 continue;
682
683 drm_object_property_set_value(&plane->base,
684 plane->rotation_property,
685 DRM_ROTATE_0);
Rob Clark3c810c62012-08-15 15:18:01 -0500686 }
687
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000688 if (priv->fbdev) {
689 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
690 if (ret)
691 DBG("failed to restore crtc mode");
692 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600693}
694
Laurent Pinchart78b68552012-05-17 13:27:22 +0200695static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600696 .fault = omap_gem_fault,
697 .open = drm_gem_vm_open,
698 .close = drm_gem_vm_close,
699};
700
Rob Clarkff4f3872012-01-16 12:51:14 -0600701static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200702 .owner = THIS_MODULE,
703 .open = drm_open,
704 .unlocked_ioctl = drm_ioctl,
705 .release = drm_release,
706 .mmap = omap_gem_mmap,
707 .poll = drm_poll,
708 .read = drm_read,
709 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600710};
711
Rob Clarkcd5351f2011-11-12 12:09:40 -0600712static struct drm_driver omap_drm_driver = {
Tomi Valkeinen728fea72015-10-02 11:10:41 +0300713 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
714 DRIVER_ATOMIC,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200715 .open = dev_open,
716 .lastclose = dev_lastclose,
Ville Syrjäläb44f8402015-09-30 16:46:48 +0300717 .get_vblank_counter = drm_vblank_no_hw_counter,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200718 .enable_vblank = omap_irq_enable_vblank,
719 .disable_vblank = omap_irq_disable_vblank,
Andy Gross6169a1482011-12-15 21:05:17 -0600720#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200721 .debugfs_init = omap_debugfs_init,
Andy Gross6169a1482011-12-15 21:05:17 -0600722#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200723 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
724 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
725 .gem_prime_export = omap_gem_prime_export,
726 .gem_prime_import = omap_gem_prime_import,
727 .gem_free_object = omap_gem_free_object,
728 .gem_vm_ops = &omap_gem_vm_ops,
729 .dumb_create = omap_gem_dumb_create,
730 .dumb_map_offset = omap_gem_dumb_map_offset,
731 .dumb_destroy = drm_gem_dumb_destroy,
732 .ioctls = ioctls,
733 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
734 .fops = &omapdriver_fops,
735 .name = DRIVER_NAME,
736 .desc = DRIVER_DESC,
737 .date = DRIVER_DATE,
738 .major = DRIVER_MAJOR,
739 .minor = DRIVER_MINOR,
740 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600741};
742
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200743static int pdev_probe(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600744{
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200745 struct omap_drm_platform_data *pdata = pdev->dev.platform_data;
746 struct omap_drm_private *priv;
747 struct drm_device *ddev;
748 unsigned int i;
749 int ret;
750
751 DBG("%s", pdev->name);
Archit Taneja3a01ab22014-01-02 14:49:51 +0530752
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300753 if (omapdss_is_initialized() == false)
754 return -EPROBE_DEFER;
755
Archit Taneja3a01ab22014-01-02 14:49:51 +0530756 omap_crtc_pre_init();
757
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200758 ret = omap_connect_dssdevs();
759 if (ret)
760 goto err_crtc_uninit;
761
762 /* Allocate and initialize the driver private structure. */
763 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
764 if (!priv) {
765 ret = -ENOMEM;
766 goto err_disconnect_dssdevs;
Archit Taneja3a01ab22014-01-02 14:49:51 +0530767 }
768
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200769 priv->omaprev = pdata->omaprev;
770 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
771
772 init_waitqueue_head(&priv->commit.wait);
773 spin_lock_init(&priv->commit.lock);
774 spin_lock_init(&priv->list_lock);
775 INIT_LIST_HEAD(&priv->obj_list);
776
777 /* Allocate and initialize the DRM device. */
778 ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
779 if (IS_ERR(ddev)) {
780 ret = PTR_ERR(ddev);
781 goto err_free_priv;
782 }
783
784 ddev->dev_private = priv;
785 platform_set_drvdata(pdev, ddev);
786
787 omap_gem_init(ddev);
788
789 ret = omap_modeset_init(ddev);
790 if (ret) {
791 dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
792 goto err_free_drm_dev;
793 }
794
795 /* Initialize vblank handling, start with all CRTCs disabled. */
796 ret = drm_vblank_init(ddev, priv->num_crtcs);
797 if (ret) {
798 dev_err(&pdev->dev, "could not init vblank\n");
799 goto err_cleanup_modeset;
800 }
801
802 for (i = 0; i < priv->num_crtcs; i++)
803 drm_crtc_vblank_off(priv->crtcs[i]);
804
805 priv->fbdev = omap_fbdev_init(ddev);
806
807 drm_kms_helper_poll_init(ddev);
808
809 /*
810 * Register the DRM device with the core and the connectors with
811 * sysfs.
812 */
813 ret = drm_dev_register(ddev, 0);
814 if (ret)
815 goto err_cleanup_helpers;
816
817 return 0;
818
819err_cleanup_helpers:
820 drm_kms_helper_poll_fini(ddev);
821 if (priv->fbdev)
822 omap_fbdev_free(ddev);
823err_cleanup_modeset:
824 drm_mode_config_cleanup(ddev);
825 omap_drm_irq_uninstall(ddev);
826err_free_drm_dev:
827 omap_gem_deinit(ddev);
828 drm_dev_unref(ddev);
829err_free_priv:
830 destroy_workqueue(priv->wq);
831 kfree(priv);
832err_disconnect_dssdevs:
833 omap_disconnect_dssdevs();
834err_crtc_uninit:
835 omap_crtc_pre_uninit();
836 return ret;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600837}
838
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200839static int pdev_remove(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600840{
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200841 struct drm_device *ddev = platform_get_drvdata(pdev);
842 struct omap_drm_private *priv = ddev->dev_private;
843
Rob Clarkcd5351f2011-11-12 12:09:40 -0600844 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600845
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200846 drm_dev_unregister(ddev);
847
848 drm_kms_helper_poll_fini(ddev);
849
850 if (priv->fbdev)
851 omap_fbdev_free(ddev);
852
853 drm_mode_config_cleanup(ddev);
854
855 omap_drm_irq_uninstall(ddev);
856 omap_gem_deinit(ddev);
857
858 drm_dev_unref(ddev);
859
860 destroy_workqueue(priv->wq);
861 kfree(priv);
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300862
Archit Tanejacc823bd2014-01-02 14:49:52 +0530863 omap_disconnect_dssdevs();
864 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100865
Rob Clarkcd5351f2011-11-12 12:09:40 -0600866 return 0;
867}
868
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200869#ifdef CONFIG_PM_SLEEP
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300870static int omap_drm_suspend_all_displays(void)
871{
872 struct omap_dss_device *dssdev = NULL;
873
874 for_each_dss_dev(dssdev) {
875 if (!dssdev->driver)
876 continue;
877
878 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
879 dssdev->driver->disable(dssdev);
880 dssdev->activate_after_resume = true;
881 } else {
882 dssdev->activate_after_resume = false;
883 }
884 }
885
886 return 0;
887}
888
889static int omap_drm_resume_all_displays(void)
890{
891 struct omap_dss_device *dssdev = NULL;
892
893 for_each_dss_dev(dssdev) {
894 if (!dssdev->driver)
895 continue;
896
897 if (dssdev->activate_after_resume) {
898 dssdev->driver->enable(dssdev);
899 dssdev->activate_after_resume = false;
900 }
901 }
902
903 return 0;
904}
905
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200906static int omap_drm_suspend(struct device *dev)
907{
908 struct drm_device *drm_dev = dev_get_drvdata(dev);
909
910 drm_kms_helper_poll_disable(drm_dev);
911
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300912 drm_modeset_lock_all(drm_dev);
913 omap_drm_suspend_all_displays();
914 drm_modeset_unlock_all(drm_dev);
915
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200916 return 0;
917}
918
919static int omap_drm_resume(struct device *dev)
920{
921 struct drm_device *drm_dev = dev_get_drvdata(dev);
922
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300923 drm_modeset_lock_all(drm_dev);
924 omap_drm_resume_all_displays();
925 drm_modeset_unlock_all(drm_dev);
926
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200927 drm_kms_helper_poll_enable(drm_dev);
928
929 return omap_gem_resume(dev);
930}
Andy Grosse78edba2012-12-19 14:53:37 -0600931#endif
932
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200933static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
934
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300935static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200936 .driver = {
937 .name = DRIVER_NAME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200938 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200939 },
940 .probe = pdev_probe,
941 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600942};
943
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100944static struct platform_driver * const drivers[] = {
945 &omap_dmm_driver,
946 &pdev,
947};
948
Rob Clarkcd5351f2011-11-12 12:09:40 -0600949static int __init omap_drm_init(void)
950{
951 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300952
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100953 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600954}
955
956static void __exit omap_drm_fini(void)
957{
958 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300959
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100960 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600961}
962
963/* need late_initcall() so we load after dss_driver's are loaded */
964late_initcall(omap_drm_init);
965module_exit(omap_drm_fini);
966
967MODULE_AUTHOR("Rob Clark <rob@ti.com>");
968MODULE_DESCRIPTION("OMAP DRM Display Driver");
969MODULE_ALIAS("platform:" DRIVER_NAME);
970MODULE_LICENSE("GPL v2");