blob: 1b1b279c304aa5e3794c8e13f8ac2fec4b3b2e37 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000017#include <linux/dma-mapping.h>
Sujith394cf0a2009-02-09 13:26:54 +053018#include "ath9k.h"
Luis R. Rodriguezb622a722010-04-15 17:39:28 -040019#include "ar9003_mac.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070020
Felix Fietkaub5c804752010-04-15 17:38:48 -040021#define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
22
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -070023static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24 int mindelta, int main_rssi_avg,
25 int alt_rssi_avg, int pkt_count)
26{
27 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
30}
31
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053032static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33 int curr_main_set, int curr_alt_set,
34 int alt_rssi_avg, int main_rssi_avg)
35{
36 bool result = false;
37 switch (div_group) {
38 case 0:
39 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
40 result = true;
41 break;
42 case 1:
Gabor Juhos66ce2352011-06-21 11:23:43 +020043 case 2:
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053044 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
50 (alt_rssi_avg >= 4))
51 result = true;
52 else
53 result = false;
54 break;
55 }
56
57 return result;
58}
59
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -070060static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
61{
62 return sc->ps_enabled &&
63 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
64}
65
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066/*
67 * Setup and link descriptors.
68 *
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070073 */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070074static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
75{
Sujithcbe61d82009-02-09 13:27:12 +053076 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080077 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070078 struct ath_desc *ds;
79 struct sk_buff *skb;
80
81 ATH_RXBUF_RESET(bf);
82
83 ds = bf->bf_desc;
Sujithbe0418a2008-11-18 09:05:55 +053084 ds->ds_link = 0; /* link to null */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070085 ds->ds_data = bf->bf_buf_addr;
86
Sujithbe0418a2008-11-18 09:05:55 +053087 /* virtual addr of the beginning of the buffer. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070088 skb = bf->bf_mpdu;
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -070089 BUG_ON(skb == NULL);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070090 ds->ds_vdata = skb->data;
91
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080092 /*
93 * setup rx descriptors. The rx_bufsize here tells the hardware
Luis R. Rodriguezb4b6cda2008-11-20 17:15:13 -080094 * how much data it can DMA to us and that we are prepared
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080095 * to process
96 */
Sujithb77f4832008-12-07 21:44:03 +053097 ath9k_hw_setuprxdesc(ah, ds,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080098 common->rx_bufsize,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070099 0);
100
Sujithb77f4832008-12-07 21:44:03 +0530101 if (sc->rx.rxlink == NULL)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700102 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103 else
Sujithb77f4832008-12-07 21:44:03 +0530104 *sc->rx.rxlink = bf->bf_daddr;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700105
Sujithb77f4832008-12-07 21:44:03 +0530106 sc->rx.rxlink = &ds->ds_link;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700107}
108
Sujithff37e332008-11-24 12:07:55 +0530109static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
110{
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc->sc_ah, antenna);
Sujithb77f4832008-12-07 21:44:03 +0530113 sc->rx.defant = antenna;
114 sc->rx.rxotherant = 0;
Sujithff37e332008-11-24 12:07:55 +0530115}
116
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700117static void ath_opmode_init(struct ath_softc *sc)
118{
Sujithcbe61d82009-02-09 13:27:12 +0530119 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700120 struct ath_common *common = ath9k_hw_common(ah);
121
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700122 u32 rfilt, mfilt[2];
123
124 /* configure rx filter */
125 rfilt = ath_calcrxfilter(sc);
126 ath9k_hw_setrxfilter(ah, rfilt);
127
128 /* configure bssid mask */
Felix Fietkau364734f2010-09-14 20:22:44 +0200129 ath_hw_setbssidmask(common);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700130
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah);
133
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700134 /* calculate and install multicast filter */
135 mfilt[0] = mfilt[1] = ~0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700136 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700137}
138
Felix Fietkaub5c804752010-04-15 17:38:48 -0400139static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140 enum ath9k_rx_qtype qtype)
141{
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_rx_edma *rx_edma;
144 struct sk_buff *skb;
145 struct ath_buf *bf;
146
147 rx_edma = &sc->rx.rx_edma[qtype];
148 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
149 return false;
150
151 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152 list_del_init(&bf->list);
153
154 skb = bf->bf_mpdu;
155
156 ATH_RXBUF_RESET(bf);
157 memset(skb->data, 0, ah->caps.rx_status_len);
158 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159 ah->caps.rx_status_len, DMA_TO_DEVICE);
160
161 SKB_CB_ATHBUF(skb) = bf;
162 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163 skb_queue_tail(&rx_edma->rx_fifo, skb);
164
165 return true;
166}
167
168static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169 enum ath9k_rx_qtype qtype, int size)
170{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400171 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Mohammed Shafi Shajakhan6a01f0c2012-02-28 20:54:44 +0530172 struct ath_buf *bf, *tbf;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400173
Felix Fietkaub5c804752010-04-15 17:38:48 -0400174 if (list_empty(&sc->rx.rxbuf)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800175 ath_dbg(common, QUEUE, "No free rx buf available\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400176 return;
177 }
178
Mohammed Shafi Shajakhan6a01f0c2012-02-28 20:54:44 +0530179 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list)
Felix Fietkaub5c804752010-04-15 17:38:48 -0400180 if (!ath_rx_edma_buf_link(sc, qtype))
181 break;
182
Felix Fietkaub5c804752010-04-15 17:38:48 -0400183}
184
185static void ath_rx_remove_buffer(struct ath_softc *sc,
186 enum ath9k_rx_qtype qtype)
187{
188 struct ath_buf *bf;
189 struct ath_rx_edma *rx_edma;
190 struct sk_buff *skb;
191
192 rx_edma = &sc->rx.rx_edma[qtype];
193
194 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
195 bf = SKB_CB_ATHBUF(skb);
196 BUG_ON(!bf);
197 list_add_tail(&bf->list, &sc->rx.rxbuf);
198 }
199}
200
201static void ath_rx_edma_cleanup(struct ath_softc *sc)
202{
Mohammed Shafi Shajakhanba542382011-09-23 14:33:14 +0530203 struct ath_hw *ah = sc->sc_ah;
204 struct ath_common *common = ath9k_hw_common(ah);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400205 struct ath_buf *bf;
206
207 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
208 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
209
210 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
Mohammed Shafi Shajakhanba542382011-09-23 14:33:14 +0530211 if (bf->bf_mpdu) {
212 dma_unmap_single(sc->dev, bf->bf_buf_addr,
213 common->rx_bufsize,
214 DMA_BIDIRECTIONAL);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400215 dev_kfree_skb_any(bf->bf_mpdu);
Mohammed Shafi Shajakhanba542382011-09-23 14:33:14 +0530216 bf->bf_buf_addr = 0;
217 bf->bf_mpdu = NULL;
218 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400219 }
220
221 INIT_LIST_HEAD(&sc->rx.rxbuf);
222
223 kfree(sc->rx.rx_bufptr);
224 sc->rx.rx_bufptr = NULL;
225}
226
227static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
228{
229 skb_queue_head_init(&rx_edma->rx_fifo);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400230 rx_edma->rx_fifo_hwsize = size;
231}
232
233static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
234{
235 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
236 struct ath_hw *ah = sc->sc_ah;
237 struct sk_buff *skb;
238 struct ath_buf *bf;
239 int error = 0, i;
240 u32 size;
241
Felix Fietkaub5c804752010-04-15 17:38:48 -0400242 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
243 ah->caps.rx_status_len);
244
245 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
246 ah->caps.rx_lp_qdepth);
247 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
248 ah->caps.rx_hp_qdepth);
249
250 size = sizeof(struct ath_buf) * nbufs;
251 bf = kzalloc(size, GFP_KERNEL);
252 if (!bf)
253 return -ENOMEM;
254
255 INIT_LIST_HEAD(&sc->rx.rxbuf);
256 sc->rx.rx_bufptr = bf;
257
258 for (i = 0; i < nbufs; i++, bf++) {
259 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
260 if (!skb) {
261 error = -ENOMEM;
262 goto rx_init_fail;
263 }
264
265 memset(skb->data, 0, common->rx_bufsize);
266 bf->bf_mpdu = skb;
267
268 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
269 common->rx_bufsize,
270 DMA_BIDIRECTIONAL);
271 if (unlikely(dma_mapping_error(sc->dev,
272 bf->bf_buf_addr))) {
273 dev_kfree_skb_any(skb);
274 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700275 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800276 ath_err(common,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400277 "dma_mapping_error() on RX init\n");
278 error = -ENOMEM;
279 goto rx_init_fail;
280 }
281
282 list_add_tail(&bf->list, &sc->rx.rxbuf);
283 }
284
285 return 0;
286
287rx_init_fail:
288 ath_rx_edma_cleanup(sc);
289 return error;
290}
291
292static void ath_edma_start_recv(struct ath_softc *sc)
293{
294 spin_lock_bh(&sc->rx.rxbuflock);
295
296 ath9k_hw_rxena(sc->sc_ah);
297
298 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
299 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
300
301 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
302 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
303
Felix Fietkaub5c804752010-04-15 17:38:48 -0400304 ath_opmode_init(sc);
305
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400306 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700307
308 spin_unlock_bh(&sc->rx.rxbuflock);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400309}
310
311static void ath_edma_stop_recv(struct ath_softc *sc)
312{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400313 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
314 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400315}
316
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700317int ath_rx_init(struct ath_softc *sc, int nbufs)
318{
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -0700319 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700320 struct sk_buff *skb;
321 struct ath_buf *bf;
322 int error = 0;
323
Luis R. Rodriguez4bdd1e92010-10-26 15:27:24 -0700324 spin_lock_init(&sc->sc_pcu_lock);
Sujith797fe5cb2009-03-30 15:28:45 +0530325 sc->sc_flags &= ~SC_OP_RXFLUSH;
326 spin_lock_init(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700327
Felix Fietkau0d955212011-01-26 18:23:27 +0100328 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
329 sc->sc_ah->caps.rx_status_len;
330
Felix Fietkaub5c804752010-04-15 17:38:48 -0400331 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
332 return ath_rx_edma_init(sc, nbufs);
333 } else {
Joe Perchesd2182b62011-12-15 14:55:53 -0800334 ath_dbg(common, CONFIG, "cachelsz %u rxbufsize %u\n",
Joe Perches226afe62010-12-02 19:12:37 -0800335 common->cachelsz, common->rx_bufsize);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700336
Felix Fietkaub5c804752010-04-15 17:38:48 -0400337 /* Initialize rx descriptors */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700338
Felix Fietkaub5c804752010-04-15 17:38:48 -0400339 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
Vasanthakumar Thiagarajan4adfcde2010-04-15 17:39:33 -0400340 "rx", nbufs, 1, 0);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400341 if (error != 0) {
Joe Perches38002762010-12-02 19:12:36 -0800342 ath_err(common,
343 "failed to allocate rx descriptors: %d\n",
344 error);
Sujith797fe5cb2009-03-30 15:28:45 +0530345 goto err;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700346 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400347
348 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
349 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
350 GFP_KERNEL);
351 if (skb == NULL) {
352 error = -ENOMEM;
353 goto err;
354 }
355
356 bf->bf_mpdu = skb;
357 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
358 common->rx_bufsize,
359 DMA_FROM_DEVICE);
360 if (unlikely(dma_mapping_error(sc->dev,
361 bf->bf_buf_addr))) {
362 dev_kfree_skb_any(skb);
363 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700364 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800365 ath_err(common,
366 "dma_mapping_error() on RX init\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400367 error = -ENOMEM;
368 goto err;
369 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400370 }
371 sc->rx.rxlink = NULL;
Sujith797fe5cb2009-03-30 15:28:45 +0530372 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700373
Sujith797fe5cb2009-03-30 15:28:45 +0530374err:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700375 if (error)
376 ath_rx_cleanup(sc);
377
378 return error;
379}
380
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700381void ath_rx_cleanup(struct ath_softc *sc)
382{
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -0800383 struct ath_hw *ah = sc->sc_ah;
384 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700385 struct sk_buff *skb;
386 struct ath_buf *bf;
387
Felix Fietkaub5c804752010-04-15 17:38:48 -0400388 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
389 ath_rx_edma_cleanup(sc);
390 return;
391 } else {
392 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
393 skb = bf->bf_mpdu;
394 if (skb) {
395 dma_unmap_single(sc->dev, bf->bf_buf_addr,
396 common->rx_bufsize,
397 DMA_FROM_DEVICE);
398 dev_kfree_skb(skb);
Ben Greear6cf9e992010-10-14 12:45:30 -0700399 bf->bf_buf_addr = 0;
400 bf->bf_mpdu = NULL;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400401 }
Luis R. Rodriguez051b9192009-03-23 18:25:01 -0400402 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700403
Felix Fietkaub5c804752010-04-15 17:38:48 -0400404 if (sc->rx.rxdma.dd_desc_len != 0)
405 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
406 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700407}
408
409/*
410 * Calculate the receive filter according to the
411 * operating mode and state:
412 *
413 * o always accept unicast, broadcast, and multicast traffic
414 * o maintain current state of phy error reception (the hal
415 * may enable phy error frames for noise immunity work)
416 * o probe request frames are accepted only when operating in
417 * hostap, adhoc, or monitor modes
418 * o enable promiscuous mode according to the interface state
419 * o accept beacons:
420 * - when operating in adhoc mode so the 802.11 layer creates
421 * node table entries for peers,
422 * - when operating in station mode for collecting rssi data when
423 * the station is otherwise quiet, or
424 * - when operating as a repeater so we see repeater-sta beacons
425 * - when scanning
426 */
427
428u32 ath_calcrxfilter(struct ath_softc *sc)
429{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700430 u32 rfilt;
431
Felix Fietkauac066972011-10-08 15:49:57 +0200432 rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700433 | ATH9K_RX_FILTER_MCAST;
434
Jouni Malinen9c1d8e42010-10-13 17:29:31 +0300435 if (sc->rx.rxfilter & FIF_PROBE_REQ)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700436 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
437
Jouni Malinen217ba9d2009-03-10 10:55:50 +0200438 /*
439 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
440 * mode interface or when in monitor mode. AP mode does not need this
441 * since it receives all in-BSS frames anyway.
442 */
Felix Fietkau2e286942011-03-09 01:48:12 +0100443 if (sc->sc_ah->is_monitoring)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700444 rfilt |= ATH9K_RX_FILTER_PROM;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700445
Sujithd42c6b72009-02-04 08:10:22 +0530446 if (sc->rx.rxfilter & FIF_CONTROL)
447 rfilt |= ATH9K_RX_FILTER_CONTROL;
448
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530449 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
Ben Greearcfda6692010-09-14 12:00:22 -0700450 (sc->nvifs <= 1) &&
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530451 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
452 rfilt |= ATH9K_RX_FILTER_MYBEACON;
453 else
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700454 rfilt |= ATH9K_RX_FILTER_BEACON;
455
Felix Fietkau264bbec2011-04-07 19:24:23 +0200456 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
Senthil Balasubramanian66afad02009-09-18 15:06:07 +0530457 (sc->rx.rxfilter & FIF_PSPOLL))
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530458 rfilt |= ATH9K_RX_FILTER_PSPOLL;
Sujithbe0418a2008-11-18 09:05:55 +0530459
Sujith7ea310b2009-09-03 12:08:43 +0530460 if (conf_is_ht(&sc->hw->conf))
461 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
462
Felix Fietkau7545daf2011-01-24 19:23:16 +0100463 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
Javier Cardona5eb6ba82009-08-20 19:12:07 -0700464 /* The following may also be needed for other older chips */
465 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
466 rfilt |= ATH9K_RX_FILTER_PROM;
Jouni Malinenb93bce22009-03-03 19:23:30 +0200467 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
468 }
469
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700470 return rfilt;
Sujith7dcfdcd2008-08-11 14:03:13 +0530471
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700472}
473
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700474int ath_startrecv(struct ath_softc *sc)
475{
Sujithcbe61d82009-02-09 13:27:12 +0530476 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700477 struct ath_buf *bf, *tbf;
478
Felix Fietkaub5c804752010-04-15 17:38:48 -0400479 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
480 ath_edma_start_recv(sc);
481 return 0;
482 }
483
Sujithb77f4832008-12-07 21:44:03 +0530484 spin_lock_bh(&sc->rx.rxbuflock);
485 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700486 goto start_recv;
487
Sujithb77f4832008-12-07 21:44:03 +0530488 sc->rx.rxlink = NULL;
489 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700490 ath_rx_buf_link(sc, bf);
491 }
492
493 /* We could have deleted elements so the list may be empty now */
Sujithb77f4832008-12-07 21:44:03 +0530494 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700495 goto start_recv;
496
Sujithb77f4832008-12-07 21:44:03 +0530497 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700498 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
Sujithbe0418a2008-11-18 09:05:55 +0530499 ath9k_hw_rxena(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700500
501start_recv:
Sujithbe0418a2008-11-18 09:05:55 +0530502 ath_opmode_init(sc);
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400503 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Sujithbe0418a2008-11-18 09:05:55 +0530504
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700505 spin_unlock_bh(&sc->rx.rxbuflock);
506
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700507 return 0;
508}
509
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700510bool ath_stoprecv(struct ath_softc *sc)
511{
Sujithcbe61d82009-02-09 13:27:12 +0530512 struct ath_hw *ah = sc->sc_ah;
Felix Fietkau5882da022011-04-08 20:13:18 +0200513 bool stopped, reset = false;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700514
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700515 spin_lock_bh(&sc->rx.rxbuflock);
Felix Fietkaud47844a2010-11-20 03:08:47 +0100516 ath9k_hw_abortpcurecv(ah);
Sujithbe0418a2008-11-18 09:05:55 +0530517 ath9k_hw_setrxfilter(ah, 0);
Felix Fietkau5882da022011-04-08 20:13:18 +0200518 stopped = ath9k_hw_stopdmarecv(ah, &reset);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400519
520 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
521 ath_edma_stop_recv(sc);
522 else
523 sc->rx.rxlink = NULL;
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700524 spin_unlock_bh(&sc->rx.rxbuflock);
Sujithbe0418a2008-11-18 09:05:55 +0530525
Rajkumar Manoharand5847472010-12-20 14:39:51 +0530526 if (!(ah->ah_flags & AH_UNPLUGGED) &&
527 unlikely(!stopped)) {
Ben Greeard7fd1b502010-12-06 13:13:07 -0800528 ath_err(ath9k_hw_common(sc->sc_ah),
529 "Could not stop RX, we could be "
530 "confusing the DMA engine when we start RX up\n");
531 ATH_DBG_WARN_ON_ONCE(!stopped);
532 }
Felix Fietkau2232d312011-04-15 00:41:43 +0200533 return stopped && !reset;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700534}
535
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700536void ath_flushrecv(struct ath_softc *sc)
537{
Sujith98deeea2008-08-11 14:05:46 +0530538 sc->sc_flags |= SC_OP_RXFLUSH;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400539 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
540 ath_rx_tasklet(sc, 1, true);
541 ath_rx_tasklet(sc, 1, false);
Sujith98deeea2008-08-11 14:05:46 +0530542 sc->sc_flags &= ~SC_OP_RXFLUSH;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700543}
544
Jouni Malinencc659652009-05-14 21:28:48 +0300545static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
546{
547 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
548 struct ieee80211_mgmt *mgmt;
549 u8 *pos, *end, id, elen;
550 struct ieee80211_tim_ie *tim;
551
552 mgmt = (struct ieee80211_mgmt *)skb->data;
553 pos = mgmt->u.beacon.variable;
554 end = skb->data + skb->len;
555
556 while (pos + 2 < end) {
557 id = *pos++;
558 elen = *pos++;
559 if (pos + elen > end)
560 break;
561
562 if (id == WLAN_EID_TIM) {
563 if (elen < sizeof(*tim))
564 break;
565 tim = (struct ieee80211_tim_ie *) pos;
566 if (tim->dtim_count != 0)
567 break;
568 return tim->bitmap_ctrl & 0x01;
569 }
570
571 pos += elen;
572 }
573
574 return false;
575}
576
Jouni Malinencc659652009-05-14 21:28:48 +0300577static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
578{
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700579 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300580
581 if (skb->len < 24 + 8 + 2 + 2)
582 return;
583
Sujith1b04b932010-01-08 10:36:05 +0530584 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
Gabor Juhos293dc5d2009-06-19 12:17:48 +0200585
Sujith1b04b932010-01-08 10:36:05 +0530586 if (sc->ps_flags & PS_BEACON_SYNC) {
587 sc->ps_flags &= ~PS_BEACON_SYNC;
Joe Perchesd2182b62011-12-15 14:55:53 -0800588 ath_dbg(common, PS,
Joe Perches226afe62010-12-02 19:12:37 -0800589 "Reconfigure Beacon timers based on timestamp from the AP\n");
Rajkumar Manoharan99e4d432011-04-04 22:56:19 +0530590 ath_set_beacon(sc);
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300591 }
592
Jouni Malinencc659652009-05-14 21:28:48 +0300593 if (ath_beacon_dtim_pending_cab(skb)) {
594 /*
595 * Remain awake waiting for buffered broadcast/multicast
Gabor Juhos58f5fff2009-06-17 20:53:20 +0200596 * frames. If the last broadcast/multicast frame is not
597 * received properly, the next beacon frame will work as
598 * a backup trigger for returning into NETWORK SLEEP state,
599 * so we are waiting for it as well.
Jouni Malinencc659652009-05-14 21:28:48 +0300600 */
Joe Perchesd2182b62011-12-15 14:55:53 -0800601 ath_dbg(common, PS,
Joe Perches226afe62010-12-02 19:12:37 -0800602 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
Sujith1b04b932010-01-08 10:36:05 +0530603 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
Jouni Malinencc659652009-05-14 21:28:48 +0300604 return;
605 }
606
Sujith1b04b932010-01-08 10:36:05 +0530607 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
Jouni Malinencc659652009-05-14 21:28:48 +0300608 /*
609 * This can happen if a broadcast frame is dropped or the AP
610 * fails to send a frame indicating that all CAB frames have
611 * been delivered.
612 */
Sujith1b04b932010-01-08 10:36:05 +0530613 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
Joe Perchesd2182b62011-12-15 14:55:53 -0800614 ath_dbg(common, PS, "PS wait for CAB frames timed out\n");
Jouni Malinencc659652009-05-14 21:28:48 +0300615 }
Jouni Malinencc659652009-05-14 21:28:48 +0300616}
617
Rajkumar Manoharanf73c6042011-09-26 22:16:56 +0530618static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb, bool mybeacon)
Jouni Malinencc659652009-05-14 21:28:48 +0300619{
620 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700621 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300622
623 hdr = (struct ieee80211_hdr *)skb->data;
624
625 /* Process Beacon and CAB receive in PS state */
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -0700626 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
Rajkumar Manoharanf73c6042011-09-26 22:16:56 +0530627 && mybeacon)
Jouni Malinencc659652009-05-14 21:28:48 +0300628 ath_rx_ps_beacon(sc, skb);
Sujith1b04b932010-01-08 10:36:05 +0530629 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
Jouni Malinencc659652009-05-14 21:28:48 +0300630 (ieee80211_is_data(hdr->frame_control) ||
631 ieee80211_is_action(hdr->frame_control)) &&
632 is_multicast_ether_addr(hdr->addr1) &&
633 !ieee80211_has_moredata(hdr->frame_control)) {
Jouni Malinencc659652009-05-14 21:28:48 +0300634 /*
635 * No more broadcast/multicast frames to be received at this
636 * point.
637 */
Senthil Balasubramanian3fac6df2010-09-16 15:12:35 -0400638 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
Joe Perchesd2182b62011-12-15 14:55:53 -0800639 ath_dbg(common, PS,
Joe Perches226afe62010-12-02 19:12:37 -0800640 "All PS CAB frames received, back to sleep\n");
Sujith1b04b932010-01-08 10:36:05 +0530641 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
Jouni Malinen9a23f9c2009-05-19 17:01:38 +0300642 !is_multicast_ether_addr(hdr->addr1) &&
643 !ieee80211_has_morefrags(hdr->frame_control)) {
Sujith1b04b932010-01-08 10:36:05 +0530644 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
Joe Perchesd2182b62011-12-15 14:55:53 -0800645 ath_dbg(common, PS,
Joe Perches226afe62010-12-02 19:12:37 -0800646 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
Sujith1b04b932010-01-08 10:36:05 +0530647 sc->ps_flags & (PS_WAIT_FOR_BEACON |
648 PS_WAIT_FOR_CAB |
649 PS_WAIT_FOR_PSPOLL_DATA |
650 PS_WAIT_FOR_TX_ACK));
Jouni Malinencc659652009-05-14 21:28:48 +0300651 }
652}
653
Felix Fietkaub5c804752010-04-15 17:38:48 -0400654static bool ath_edma_get_buffers(struct ath_softc *sc,
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100655 enum ath9k_rx_qtype qtype,
656 struct ath_rx_status *rs,
657 struct ath_buf **dest)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700658{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400659 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
660 struct ath_hw *ah = sc->sc_ah;
661 struct ath_common *common = ath9k_hw_common(ah);
662 struct sk_buff *skb;
Sujithbe0418a2008-11-18 09:05:55 +0530663 struct ath_buf *bf;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400664 int ret;
665
666 skb = skb_peek(&rx_edma->rx_fifo);
667 if (!skb)
668 return false;
669
670 bf = SKB_CB_ATHBUF(skb);
671 BUG_ON(!bf);
672
Ming Leice9426d2010-05-15 18:25:40 +0800673 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400674 common->rx_bufsize, DMA_FROM_DEVICE);
675
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100676 ret = ath9k_hw_process_rxdesc_edma(ah, rs, skb->data);
Ming Leice9426d2010-05-15 18:25:40 +0800677 if (ret == -EINPROGRESS) {
678 /*let device gain the buffer again*/
679 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
680 common->rx_bufsize, DMA_FROM_DEVICE);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400681 return false;
Ming Leice9426d2010-05-15 18:25:40 +0800682 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400683
684 __skb_unlink(skb, &rx_edma->rx_fifo);
685 if (ret == -EINVAL) {
686 /* corrupt descriptor, skip this one and the following one */
687 list_add_tail(&bf->list, &sc->rx.rxbuf);
688 ath_rx_edma_buf_link(sc, qtype);
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100689
Felix Fietkaub5c804752010-04-15 17:38:48 -0400690 skb = skb_peek(&rx_edma->rx_fifo);
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100691 if (skb) {
692 bf = SKB_CB_ATHBUF(skb);
693 BUG_ON(!bf);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400694
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100695 __skb_unlink(skb, &rx_edma->rx_fifo);
696 list_add_tail(&bf->list, &sc->rx.rxbuf);
697 ath_rx_edma_buf_link(sc, qtype);
698 } else {
699 bf = NULL;
700 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400701 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400702
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100703 *dest = bf;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400704 return true;
705}
706
707static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
708 struct ath_rx_status *rs,
709 enum ath9k_rx_qtype qtype)
710{
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100711 struct ath_buf *bf = NULL;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400712
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100713 while (ath_edma_get_buffers(sc, qtype, rs, &bf)) {
714 if (!bf)
715 continue;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400716
Felix Fietkau3a2923e2012-03-03 15:17:05 +0100717 return bf;
718 }
719 return NULL;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400720}
721
722static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
723 struct ath_rx_status *rs)
724{
725 struct ath_hw *ah = sc->sc_ah;
726 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700727 struct ath_desc *ds;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400728 struct ath_buf *bf;
729 int ret;
730
731 if (list_empty(&sc->rx.rxbuf)) {
732 sc->rx.rxlink = NULL;
733 return NULL;
734 }
735
736 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
737 ds = bf->bf_desc;
738
739 /*
740 * Must provide the virtual address of the current
741 * descriptor, the physical address, and the virtual
742 * address of the next descriptor in the h/w chain.
743 * This allows the HAL to look ahead to see if the
744 * hardware is done with a descriptor by checking the
745 * done bit in the following descriptor and the address
746 * of the current descriptor the DMA engine is working
747 * on. All this is necessary because of our use of
748 * a self-linked list to avoid rx overruns.
749 */
Rajkumar Manoharan3de21112011-08-13 10:28:11 +0530750 ret = ath9k_hw_rxprocdesc(ah, ds, rs);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400751 if (ret == -EINPROGRESS) {
752 struct ath_rx_status trs;
753 struct ath_buf *tbf;
754 struct ath_desc *tds;
755
756 memset(&trs, 0, sizeof(trs));
757 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
758 sc->rx.rxlink = NULL;
759 return NULL;
760 }
761
762 tbf = list_entry(bf->list.next, struct ath_buf, list);
763
764 /*
765 * On some hardware the descriptor status words could
766 * get corrupted, including the done bit. Because of
767 * this, check if the next descriptor's done bit is
768 * set or not.
769 *
770 * If the next descriptor's done bit is set, the current
771 * descriptor has been corrupted. Force s/w to discard
772 * this descriptor and continue...
773 */
774
775 tds = tbf->bf_desc;
Rajkumar Manoharan3de21112011-08-13 10:28:11 +0530776 ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400777 if (ret == -EINPROGRESS)
778 return NULL;
779 }
780
781 if (!bf->bf_mpdu)
782 return bf;
783
784 /*
785 * Synchronize the DMA transfer with CPU before
786 * 1. accessing the frame
787 * 2. requeueing the same buffer to h/w
788 */
Ming Leice9426d2010-05-15 18:25:40 +0800789 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400790 common->rx_bufsize,
791 DMA_FROM_DEVICE);
792
793 return bf;
794}
795
Sujithd4357002010-05-20 15:34:38 +0530796/* Assumes you've already done the endian to CPU conversion */
797static bool ath9k_rx_accept(struct ath_common *common,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700798 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530799 struct ieee80211_rx_status *rxs,
800 struct ath_rx_status *rx_stats,
801 bool *decrypt_error)
802{
Felix Fietkauec205992011-10-08 22:02:59 +0200803 struct ath_softc *sc = (struct ath_softc *) common->priv;
Felix Fietkau66760ea2011-07-13 23:35:05 +0800804 bool is_mc, is_valid_tkip, strip_mic, mic_error;
Sujithd4357002010-05-20 15:34:38 +0530805 struct ath_hw *ah = common->ah;
Sujithd4357002010-05-20 15:34:38 +0530806 __le16 fc;
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700807 u8 rx_status_len = ah->caps.rx_status_len;
Sujithd4357002010-05-20 15:34:38 +0530808
Sujithd4357002010-05-20 15:34:38 +0530809 fc = hdr->frame_control;
810
Felix Fietkau66760ea2011-07-13 23:35:05 +0800811 is_mc = !!is_multicast_ether_addr(hdr->addr1);
812 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
813 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
Bill Jordan152e5852011-08-19 11:10:22 -0400814 strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
815 !(rx_stats->rs_status &
Felix Fietkau846d9362011-10-08 22:02:58 +0200816 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
817 ATH9K_RXERR_KEYMISS));
Felix Fietkau66760ea2011-07-13 23:35:05 +0800818
Felix Fietkauf88373f2012-02-05 21:15:17 +0100819 /*
820 * Key miss events are only relevant for pairwise keys where the
821 * descriptor does contain a valid key index. This has been observed
822 * mostly with CCMP encryption.
823 */
824 if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID)
825 rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
826
Sujithd4357002010-05-20 15:34:38 +0530827 if (!rx_stats->rs_datalen)
828 return false;
829 /*
830 * rs_status follows rs_datalen so if rs_datalen is too large
831 * we can take a hint that hardware corrupted it, so ignore
832 * those frames.
833 */
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700834 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
Sujithd4357002010-05-20 15:34:38 +0530835 return false;
836
Felix Fietkau0d955212011-01-26 18:23:27 +0100837 /* Only use error bits from the last fragment */
Sujithd4357002010-05-20 15:34:38 +0530838 if (rx_stats->rs_more)
Felix Fietkau0d955212011-01-26 18:23:27 +0100839 return true;
Sujithd4357002010-05-20 15:34:38 +0530840
Felix Fietkau66760ea2011-07-13 23:35:05 +0800841 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
842 !ieee80211_has_morefrags(fc) &&
843 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
844 (rx_stats->rs_status & ATH9K_RXERR_MIC);
845
Sujithd4357002010-05-20 15:34:38 +0530846 /*
847 * The rx_stats->rs_status will not be set until the end of the
848 * chained descriptors so it can be ignored if rs_more is set. The
849 * rs_more will be false at the last element of the chained
850 * descriptors.
851 */
852 if (rx_stats->rs_status != 0) {
Felix Fietkau846d9362011-10-08 22:02:58 +0200853 u8 status_mask;
854
Felix Fietkau66760ea2011-07-13 23:35:05 +0800855 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
Sujithd4357002010-05-20 15:34:38 +0530856 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
Felix Fietkau66760ea2011-07-13 23:35:05 +0800857 mic_error = false;
858 }
Sujithd4357002010-05-20 15:34:38 +0530859 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
860 return false;
861
Felix Fietkau846d9362011-10-08 22:02:58 +0200862 if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
863 (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
Sujithd4357002010-05-20 15:34:38 +0530864 *decrypt_error = true;
Felix Fietkau66760ea2011-07-13 23:35:05 +0800865 mic_error = false;
Sujithd4357002010-05-20 15:34:38 +0530866 }
Felix Fietkau66760ea2011-07-13 23:35:05 +0800867
Sujithd4357002010-05-20 15:34:38 +0530868 /*
869 * Reject error frames with the exception of
870 * decryption and MIC failures. For monitor mode,
871 * we also ignore the CRC error.
872 */
Felix Fietkau846d9362011-10-08 22:02:58 +0200873 status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
874 ATH9K_RXERR_KEYMISS;
875
Felix Fietkauec205992011-10-08 22:02:59 +0200876 if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
Felix Fietkau846d9362011-10-08 22:02:58 +0200877 status_mask |= ATH9K_RXERR_CRC;
878
879 if (rx_stats->rs_status & ~status_mask)
880 return false;
Sujithd4357002010-05-20 15:34:38 +0530881 }
Felix Fietkau66760ea2011-07-13 23:35:05 +0800882
883 /*
884 * For unicast frames the MIC error bit can have false positives,
885 * so all MIC error reports need to be validated in software.
886 * False negatives are not common, so skip software verification
887 * if the hardware considers the MIC valid.
888 */
889 if (strip_mic)
890 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
891 else if (is_mc && mic_error)
892 rxs->flag |= RX_FLAG_MMIC_ERROR;
893
Sujithd4357002010-05-20 15:34:38 +0530894 return true;
895}
896
897static int ath9k_process_rate(struct ath_common *common,
898 struct ieee80211_hw *hw,
899 struct ath_rx_status *rx_stats,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700900 struct ieee80211_rx_status *rxs)
Sujithd4357002010-05-20 15:34:38 +0530901{
902 struct ieee80211_supported_band *sband;
903 enum ieee80211_band band;
904 unsigned int i = 0;
905
906 band = hw->conf.channel->band;
907 sband = hw->wiphy->bands[band];
908
909 if (rx_stats->rs_rate & 0x80) {
910 /* HT rate */
911 rxs->flag |= RX_FLAG_HT;
912 if (rx_stats->rs_flags & ATH9K_RX_2040)
913 rxs->flag |= RX_FLAG_40MHZ;
914 if (rx_stats->rs_flags & ATH9K_RX_GI)
915 rxs->flag |= RX_FLAG_SHORT_GI;
916 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
917 return 0;
918 }
919
920 for (i = 0; i < sband->n_bitrates; i++) {
921 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
922 rxs->rate_idx = i;
923 return 0;
924 }
925 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
926 rxs->flag |= RX_FLAG_SHORTPRE;
927 rxs->rate_idx = i;
928 return 0;
929 }
930 }
931
932 /*
933 * No valid hardware bitrate found -- we should not get here
934 * because hardware has already validated this frame as OK.
935 */
Joe Perchesd2182b62011-12-15 14:55:53 -0800936 ath_dbg(common, ANY,
Joe Perches226afe62010-12-02 19:12:37 -0800937 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
938 rx_stats->rs_rate);
Sujithd4357002010-05-20 15:34:38 +0530939
940 return -EINVAL;
941}
942
943static void ath9k_process_rssi(struct ath_common *common,
944 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700945 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530946 struct ath_rx_status *rx_stats)
947{
Felix Fietkau9ac586152011-01-24 19:23:18 +0100948 struct ath_softc *sc = hw->priv;
Sujithd4357002010-05-20 15:34:38 +0530949 struct ath_hw *ah = common->ah;
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200950 int last_rssi;
Felix Fietkau2ef16752012-03-03 15:17:06 +0100951 int rssi = rx_stats->rs_rssi;
Sujithd4357002010-05-20 15:34:38 +0530952
Rajkumar Manoharancf3af742011-08-27 16:17:47 +0530953 if (!rx_stats->is_mybeacon ||
954 ((ah->opmode != NL80211_IFTYPE_STATION) &&
955 (ah->opmode != NL80211_IFTYPE_ADHOC)))
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200956 return;
957
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200958 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
Felix Fietkau9ac586152011-01-24 19:23:18 +0100959 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
Ben Greear686b9cb2010-09-23 09:44:36 -0700960
Felix Fietkau9ac586152011-01-24 19:23:18 +0100961 last_rssi = sc->last_rssi;
Sujithd4357002010-05-20 15:34:38 +0530962 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
Felix Fietkau2ef16752012-03-03 15:17:06 +0100963 rssi = ATH_EP_RND(last_rssi, ATH_RSSI_EP_MULTIPLIER);
964 if (rssi < 0)
965 rssi = 0;
Sujithd4357002010-05-20 15:34:38 +0530966
967 /* Update Beacon RSSI, this is used by ANI. */
Felix Fietkau2ef16752012-03-03 15:17:06 +0100968 ah->stats.avgbrssi = rssi;
Sujithd4357002010-05-20 15:34:38 +0530969}
970
971/*
972 * For Decrypt or Demic errors, we only mark packet status here and always push
973 * up the frame up to let mac80211 handle the actual error case, be it no
974 * decryption key or real decryption error. This let us keep statistics there.
975 */
976static int ath9k_rx_skb_preprocess(struct ath_common *common,
977 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700978 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530979 struct ath_rx_status *rx_stats,
980 struct ieee80211_rx_status *rx_status,
981 bool *decrypt_error)
982{
Felix Fietkauf749b942011-07-28 14:08:57 +0200983 struct ath_hw *ah = common->ah;
984
Sujithd4357002010-05-20 15:34:38 +0530985 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
986
987 /*
988 * everything but the rate is checked here, the rate check is done
989 * separately to avoid doing two lookups for a rate for each frame.
990 */
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700991 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
Sujithd4357002010-05-20 15:34:38 +0530992 return -EINVAL;
993
Felix Fietkau0d955212011-01-26 18:23:27 +0100994 /* Only use status info from the last fragment */
995 if (rx_stats->rs_more)
996 return 0;
997
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700998 ath9k_process_rssi(common, hw, hdr, rx_stats);
Sujithd4357002010-05-20 15:34:38 +0530999
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001000 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
Sujithd4357002010-05-20 15:34:38 +05301001 return -EINVAL;
1002
Sujithd4357002010-05-20 15:34:38 +05301003 rx_status->band = hw->conf.channel->band;
1004 rx_status->freq = hw->conf.channel->center_freq;
Felix Fietkauf749b942011-07-28 14:08:57 +02001005 rx_status->signal = ah->noise + rx_stats->rs_rssi;
Sujithd4357002010-05-20 15:34:38 +05301006 rx_status->antenna = rx_stats->rs_antenna;
Johannes Berg6ebacbb2011-02-23 15:06:08 +01001007 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
Felix Fietkau2ef16752012-03-03 15:17:06 +01001008 if (rx_stats->rs_moreaggr)
1009 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Sujithd4357002010-05-20 15:34:38 +05301010
1011 return 0;
1012}
1013
1014static void ath9k_rx_skb_postprocess(struct ath_common *common,
1015 struct sk_buff *skb,
1016 struct ath_rx_status *rx_stats,
1017 struct ieee80211_rx_status *rxs,
1018 bool decrypt_error)
1019{
1020 struct ath_hw *ah = common->ah;
1021 struct ieee80211_hdr *hdr;
1022 int hdrlen, padpos, padsize;
1023 u8 keyix;
1024 __le16 fc;
1025
1026 /* see if any padding is done by the hw and remove it */
1027 hdr = (struct ieee80211_hdr *) skb->data;
1028 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1029 fc = hdr->frame_control;
1030 padpos = ath9k_cmn_padpos(hdr->frame_control);
1031
1032 /* The MAC header is padded to have 32-bit boundary if the
1033 * packet payload is non-zero. The general calculation for
1034 * padsize would take into account odd header lengths:
1035 * padsize = (4 - padpos % 4) % 4; However, since only
1036 * even-length headers are used, padding can only be 0 or 2
1037 * bytes and we can optimize this a bit. In addition, we must
1038 * not try to remove padding from short control frames that do
1039 * not have payload. */
1040 padsize = padpos & 3;
1041 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1042 memmove(skb->data + padsize, skb->data, padpos);
1043 skb_pull(skb, padsize);
1044 }
1045
1046 keyix = rx_stats->rs_keyix;
1047
1048 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1049 ieee80211_has_protected(fc)) {
1050 rxs->flag |= RX_FLAG_DECRYPTED;
1051 } else if (ieee80211_has_protected(fc)
1052 && !decrypt_error && skb->len >= hdrlen + 4) {
1053 keyix = skb->data[hdrlen + 3] >> 6;
1054
1055 if (test_bit(keyix, common->keymap))
1056 rxs->flag |= RX_FLAG_DECRYPTED;
1057 }
1058 if (ah->sw_mgmt_crypto &&
1059 (rxs->flag & RX_FLAG_DECRYPTED) &&
1060 ieee80211_is_mgmt(fc))
1061 /* Use software decrypt for management frames. */
1062 rxs->flag &= ~RX_FLAG_DECRYPTED;
1063}
Felix Fietkaub5c804752010-04-15 17:38:48 -04001064
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001065static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1066 struct ath_hw_antcomb_conf ant_conf,
1067 int main_rssi_avg)
1068{
1069 antcomb->quick_scan_cnt = 0;
1070
1071 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1072 antcomb->rssi_lna2 = main_rssi_avg;
1073 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1074 antcomb->rssi_lna1 = main_rssi_avg;
1075
1076 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001077 case 0x10: /* LNA2 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001078 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1079 antcomb->first_quick_scan_conf =
1080 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1081 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1082 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001083 case 0x20: /* LNA1 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001084 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1085 antcomb->first_quick_scan_conf =
1086 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1087 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1088 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001089 case 0x21: /* LNA1 LNA2 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001090 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1091 antcomb->first_quick_scan_conf =
1092 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1093 antcomb->second_quick_scan_conf =
1094 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1095 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001096 case 0x12: /* LNA2 LNA1 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001097 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1098 antcomb->first_quick_scan_conf =
1099 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1100 antcomb->second_quick_scan_conf =
1101 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1102 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001103 case 0x13: /* LNA2 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001104 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1105 antcomb->first_quick_scan_conf =
1106 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1107 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1108 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001109 case 0x23: /* LNA1 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001110 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1111 antcomb->first_quick_scan_conf =
1112 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1113 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1114 break;
1115 default:
1116 break;
1117 }
1118}
1119
1120static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1121 struct ath_hw_antcomb_conf *div_ant_conf,
1122 int main_rssi_avg, int alt_rssi_avg,
1123 int alt_ratio)
1124{
1125 /* alt_good */
1126 switch (antcomb->quick_scan_cnt) {
1127 case 0:
1128 /* set alt to main, and alt to first conf */
1129 div_ant_conf->main_lna_conf = antcomb->main_conf;
1130 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1131 break;
1132 case 1:
1133 /* set alt to main, and alt to first conf */
1134 div_ant_conf->main_lna_conf = antcomb->main_conf;
1135 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1136 antcomb->rssi_first = main_rssi_avg;
1137 antcomb->rssi_second = alt_rssi_avg;
1138
1139 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1140 /* main is LNA1 */
1141 if (ath_is_alt_ant_ratio_better(alt_ratio,
1142 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1143 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1144 main_rssi_avg, alt_rssi_avg,
1145 antcomb->total_pkt_count))
1146 antcomb->first_ratio = true;
1147 else
1148 antcomb->first_ratio = false;
1149 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1150 if (ath_is_alt_ant_ratio_better(alt_ratio,
1151 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1152 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1153 main_rssi_avg, alt_rssi_avg,
1154 antcomb->total_pkt_count))
1155 antcomb->first_ratio = true;
1156 else
1157 antcomb->first_ratio = false;
1158 } else {
1159 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1160 (alt_rssi_avg > main_rssi_avg +
1161 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1162 (alt_rssi_avg > main_rssi_avg)) &&
1163 (antcomb->total_pkt_count > 50))
1164 antcomb->first_ratio = true;
1165 else
1166 antcomb->first_ratio = false;
1167 }
1168 break;
1169 case 2:
1170 antcomb->alt_good = false;
1171 antcomb->scan_not_start = false;
1172 antcomb->scan = false;
1173 antcomb->rssi_first = main_rssi_avg;
1174 antcomb->rssi_third = alt_rssi_avg;
1175
1176 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1177 antcomb->rssi_lna1 = alt_rssi_avg;
1178 else if (antcomb->second_quick_scan_conf ==
1179 ATH_ANT_DIV_COMB_LNA2)
1180 antcomb->rssi_lna2 = alt_rssi_avg;
1181 else if (antcomb->second_quick_scan_conf ==
1182 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1183 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1184 antcomb->rssi_lna2 = main_rssi_avg;
1185 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1186 antcomb->rssi_lna1 = main_rssi_avg;
1187 }
1188
1189 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1190 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1191 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1192 else
1193 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1194
1195 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1196 if (ath_is_alt_ant_ratio_better(alt_ratio,
1197 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1198 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1199 main_rssi_avg, alt_rssi_avg,
1200 antcomb->total_pkt_count))
1201 antcomb->second_ratio = true;
1202 else
1203 antcomb->second_ratio = false;
1204 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1205 if (ath_is_alt_ant_ratio_better(alt_ratio,
1206 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1207 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1208 main_rssi_avg, alt_rssi_avg,
1209 antcomb->total_pkt_count))
1210 antcomb->second_ratio = true;
1211 else
1212 antcomb->second_ratio = false;
1213 } else {
1214 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1215 (alt_rssi_avg > main_rssi_avg +
1216 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1217 (alt_rssi_avg > main_rssi_avg)) &&
1218 (antcomb->total_pkt_count > 50))
1219 antcomb->second_ratio = true;
1220 else
1221 antcomb->second_ratio = false;
1222 }
1223
1224 /* set alt to the conf with maximun ratio */
1225 if (antcomb->first_ratio && antcomb->second_ratio) {
1226 if (antcomb->rssi_second > antcomb->rssi_third) {
1227 /* first alt*/
1228 if ((antcomb->first_quick_scan_conf ==
1229 ATH_ANT_DIV_COMB_LNA1) ||
1230 (antcomb->first_quick_scan_conf ==
1231 ATH_ANT_DIV_COMB_LNA2))
1232 /* Set alt LNA1 or LNA2*/
1233 if (div_ant_conf->main_lna_conf ==
1234 ATH_ANT_DIV_COMB_LNA2)
1235 div_ant_conf->alt_lna_conf =
1236 ATH_ANT_DIV_COMB_LNA1;
1237 else
1238 div_ant_conf->alt_lna_conf =
1239 ATH_ANT_DIV_COMB_LNA2;
1240 else
1241 /* Set alt to A+B or A-B */
1242 div_ant_conf->alt_lna_conf =
1243 antcomb->first_quick_scan_conf;
1244 } else if ((antcomb->second_quick_scan_conf ==
1245 ATH_ANT_DIV_COMB_LNA1) ||
1246 (antcomb->second_quick_scan_conf ==
1247 ATH_ANT_DIV_COMB_LNA2)) {
1248 /* Set alt LNA1 or LNA2 */
1249 if (div_ant_conf->main_lna_conf ==
1250 ATH_ANT_DIV_COMB_LNA2)
1251 div_ant_conf->alt_lna_conf =
1252 ATH_ANT_DIV_COMB_LNA1;
1253 else
1254 div_ant_conf->alt_lna_conf =
1255 ATH_ANT_DIV_COMB_LNA2;
1256 } else {
1257 /* Set alt to A+B or A-B */
1258 div_ant_conf->alt_lna_conf =
1259 antcomb->second_quick_scan_conf;
1260 }
1261 } else if (antcomb->first_ratio) {
1262 /* first alt */
1263 if ((antcomb->first_quick_scan_conf ==
1264 ATH_ANT_DIV_COMB_LNA1) ||
1265 (antcomb->first_quick_scan_conf ==
1266 ATH_ANT_DIV_COMB_LNA2))
1267 /* Set alt LNA1 or LNA2 */
1268 if (div_ant_conf->main_lna_conf ==
1269 ATH_ANT_DIV_COMB_LNA2)
1270 div_ant_conf->alt_lna_conf =
1271 ATH_ANT_DIV_COMB_LNA1;
1272 else
1273 div_ant_conf->alt_lna_conf =
1274 ATH_ANT_DIV_COMB_LNA2;
1275 else
1276 /* Set alt to A+B or A-B */
1277 div_ant_conf->alt_lna_conf =
1278 antcomb->first_quick_scan_conf;
1279 } else if (antcomb->second_ratio) {
1280 /* second alt */
1281 if ((antcomb->second_quick_scan_conf ==
1282 ATH_ANT_DIV_COMB_LNA1) ||
1283 (antcomb->second_quick_scan_conf ==
1284 ATH_ANT_DIV_COMB_LNA2))
1285 /* Set alt LNA1 or LNA2 */
1286 if (div_ant_conf->main_lna_conf ==
1287 ATH_ANT_DIV_COMB_LNA2)
1288 div_ant_conf->alt_lna_conf =
1289 ATH_ANT_DIV_COMB_LNA1;
1290 else
1291 div_ant_conf->alt_lna_conf =
1292 ATH_ANT_DIV_COMB_LNA2;
1293 else
1294 /* Set alt to A+B or A-B */
1295 div_ant_conf->alt_lna_conf =
1296 antcomb->second_quick_scan_conf;
1297 } else {
1298 /* main is largest */
1299 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1300 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1301 /* Set alt LNA1 or LNA2 */
1302 if (div_ant_conf->main_lna_conf ==
1303 ATH_ANT_DIV_COMB_LNA2)
1304 div_ant_conf->alt_lna_conf =
1305 ATH_ANT_DIV_COMB_LNA1;
1306 else
1307 div_ant_conf->alt_lna_conf =
1308 ATH_ANT_DIV_COMB_LNA2;
1309 else
1310 /* Set alt to A+B or A-B */
1311 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1312 }
1313 break;
1314 default:
1315 break;
1316 }
1317}
1318
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301319static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1320 struct ath_ant_comb *antcomb, int alt_ratio)
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001321{
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301322 if (ant_conf->div_group == 0) {
1323 /* Adjust the fast_div_bias based on main and alt lna conf */
1324 switch ((ant_conf->main_lna_conf << 4) |
1325 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001326 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301327 ant_conf->fast_div_bias = 0x3b;
1328 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001329 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301330 ant_conf->fast_div_bias = 0x3d;
1331 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001332 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301333 ant_conf->fast_div_bias = 0x1;
1334 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001335 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301336 ant_conf->fast_div_bias = 0x7;
1337 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001338 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301339 ant_conf->fast_div_bias = 0x2;
1340 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001341 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301342 ant_conf->fast_div_bias = 0x7;
1343 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001344 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301345 ant_conf->fast_div_bias = 0x6;
1346 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001347 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301348 ant_conf->fast_div_bias = 0x0;
1349 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001350 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301351 ant_conf->fast_div_bias = 0x6;
1352 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001353 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301354 ant_conf->fast_div_bias = 0x1;
1355 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001356 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301357 ant_conf->fast_div_bias = 0x3b;
1358 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001359 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301360 ant_conf->fast_div_bias = 0x3d;
1361 break;
1362 default:
1363 break;
1364 }
Gabor Juhose7ef5bc2011-06-21 11:23:46 +02001365 } else if (ant_conf->div_group == 1) {
1366 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1367 switch ((ant_conf->main_lna_conf << 4) |
1368 ant_conf->alt_lna_conf) {
1369 case 0x01: /* A-B LNA2 */
1370 ant_conf->fast_div_bias = 0x1;
1371 ant_conf->main_gaintb = 0;
1372 ant_conf->alt_gaintb = 0;
1373 break;
1374 case 0x02: /* A-B LNA1 */
1375 ant_conf->fast_div_bias = 0x1;
1376 ant_conf->main_gaintb = 0;
1377 ant_conf->alt_gaintb = 0;
1378 break;
1379 case 0x03: /* A-B A+B */
1380 ant_conf->fast_div_bias = 0x1;
1381 ant_conf->main_gaintb = 0;
1382 ant_conf->alt_gaintb = 0;
1383 break;
1384 case 0x10: /* LNA2 A-B */
1385 if (!(antcomb->scan) &&
1386 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1387 ant_conf->fast_div_bias = 0x3f;
1388 else
1389 ant_conf->fast_div_bias = 0x1;
1390 ant_conf->main_gaintb = 0;
1391 ant_conf->alt_gaintb = 0;
1392 break;
1393 case 0x12: /* LNA2 LNA1 */
1394 ant_conf->fast_div_bias = 0x1;
1395 ant_conf->main_gaintb = 0;
1396 ant_conf->alt_gaintb = 0;
1397 break;
1398 case 0x13: /* LNA2 A+B */
1399 if (!(antcomb->scan) &&
1400 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1401 ant_conf->fast_div_bias = 0x3f;
1402 else
1403 ant_conf->fast_div_bias = 0x1;
1404 ant_conf->main_gaintb = 0;
1405 ant_conf->alt_gaintb = 0;
1406 break;
1407 case 0x20: /* LNA1 A-B */
1408 if (!(antcomb->scan) &&
1409 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1410 ant_conf->fast_div_bias = 0x3f;
1411 else
1412 ant_conf->fast_div_bias = 0x1;
1413 ant_conf->main_gaintb = 0;
1414 ant_conf->alt_gaintb = 0;
1415 break;
1416 case 0x21: /* LNA1 LNA2 */
1417 ant_conf->fast_div_bias = 0x1;
1418 ant_conf->main_gaintb = 0;
1419 ant_conf->alt_gaintb = 0;
1420 break;
1421 case 0x23: /* LNA1 A+B */
1422 if (!(antcomb->scan) &&
1423 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1424 ant_conf->fast_div_bias = 0x3f;
1425 else
1426 ant_conf->fast_div_bias = 0x1;
1427 ant_conf->main_gaintb = 0;
1428 ant_conf->alt_gaintb = 0;
1429 break;
1430 case 0x30: /* A+B A-B */
1431 ant_conf->fast_div_bias = 0x1;
1432 ant_conf->main_gaintb = 0;
1433 ant_conf->alt_gaintb = 0;
1434 break;
1435 case 0x31: /* A+B LNA2 */
1436 ant_conf->fast_div_bias = 0x1;
1437 ant_conf->main_gaintb = 0;
1438 ant_conf->alt_gaintb = 0;
1439 break;
1440 case 0x32: /* A+B LNA1 */
1441 ant_conf->fast_div_bias = 0x1;
1442 ant_conf->main_gaintb = 0;
1443 ant_conf->alt_gaintb = 0;
1444 break;
1445 default:
1446 break;
1447 }
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301448 } else if (ant_conf->div_group == 2) {
1449 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1450 switch ((ant_conf->main_lna_conf << 4) |
1451 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001452 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301453 ant_conf->fast_div_bias = 0x1;
1454 ant_conf->main_gaintb = 0;
1455 ant_conf->alt_gaintb = 0;
1456 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001457 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301458 ant_conf->fast_div_bias = 0x1;
1459 ant_conf->main_gaintb = 0;
1460 ant_conf->alt_gaintb = 0;
1461 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001462 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301463 ant_conf->fast_div_bias = 0x1;
1464 ant_conf->main_gaintb = 0;
1465 ant_conf->alt_gaintb = 0;
1466 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001467 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301468 if (!(antcomb->scan) &&
1469 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1470 ant_conf->fast_div_bias = 0x1;
1471 else
1472 ant_conf->fast_div_bias = 0x2;
1473 ant_conf->main_gaintb = 0;
1474 ant_conf->alt_gaintb = 0;
1475 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001476 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301477 ant_conf->fast_div_bias = 0x1;
1478 ant_conf->main_gaintb = 0;
1479 ant_conf->alt_gaintb = 0;
1480 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001481 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301482 if (!(antcomb->scan) &&
1483 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1484 ant_conf->fast_div_bias = 0x1;
1485 else
1486 ant_conf->fast_div_bias = 0x2;
1487 ant_conf->main_gaintb = 0;
1488 ant_conf->alt_gaintb = 0;
1489 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001490 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301491 if (!(antcomb->scan) &&
1492 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1493 ant_conf->fast_div_bias = 0x1;
1494 else
1495 ant_conf->fast_div_bias = 0x2;
1496 ant_conf->main_gaintb = 0;
1497 ant_conf->alt_gaintb = 0;
1498 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001499 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301500 ant_conf->fast_div_bias = 0x1;
1501 ant_conf->main_gaintb = 0;
1502 ant_conf->alt_gaintb = 0;
1503 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001504 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301505 if (!(antcomb->scan) &&
1506 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1507 ant_conf->fast_div_bias = 0x1;
1508 else
1509 ant_conf->fast_div_bias = 0x2;
1510 ant_conf->main_gaintb = 0;
1511 ant_conf->alt_gaintb = 0;
1512 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001513 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301514 ant_conf->fast_div_bias = 0x1;
1515 ant_conf->main_gaintb = 0;
1516 ant_conf->alt_gaintb = 0;
1517 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001518 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301519 ant_conf->fast_div_bias = 0x1;
1520 ant_conf->main_gaintb = 0;
1521 ant_conf->alt_gaintb = 0;
1522 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001523 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301524 ant_conf->fast_div_bias = 0x1;
1525 ant_conf->main_gaintb = 0;
1526 ant_conf->alt_gaintb = 0;
1527 break;
1528 default:
1529 break;
1530 }
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001531 }
1532}
1533
1534/* Antenna diversity and combining */
1535static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1536{
1537 struct ath_hw_antcomb_conf div_ant_conf;
1538 struct ath_ant_comb *antcomb = &sc->ant_comb;
1539 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
Sujith Manoharan0ff2b5c2011-04-20 11:00:34 +05301540 int curr_main_set;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001541 int main_rssi = rs->rs_rssi_ctl0;
1542 int alt_rssi = rs->rs_rssi_ctl1;
1543 int rx_ant_conf, main_ant_conf;
1544 bool short_scan = false;
1545
1546 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1547 ATH_ANT_RX_MASK;
1548 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1549 ATH_ANT_RX_MASK;
1550
Mohammed Shafi Shajakhan21e8ee62011-05-13 20:31:40 +05301551 /* Record packet only when both main_rssi and alt_rssi is positive */
1552 if (main_rssi > 0 && alt_rssi > 0) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001553 antcomb->total_pkt_count++;
1554 antcomb->main_total_rssi += main_rssi;
1555 antcomb->alt_total_rssi += alt_rssi;
1556 if (main_ant_conf == rx_ant_conf)
1557 antcomb->main_recv_cnt++;
1558 else
1559 antcomb->alt_recv_cnt++;
1560 }
1561
1562 /* Short scan check */
1563 if (antcomb->scan && antcomb->alt_good) {
1564 if (time_after(jiffies, antcomb->scan_start_time +
1565 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1566 short_scan = true;
1567 else
1568 if (antcomb->total_pkt_count ==
1569 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1570 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1571 antcomb->total_pkt_count);
1572 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1573 short_scan = true;
1574 }
1575 }
1576
1577 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1578 rs->rs_moreaggr) && !short_scan)
1579 return;
1580
1581 if (antcomb->total_pkt_count) {
1582 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1583 antcomb->total_pkt_count);
1584 main_rssi_avg = (antcomb->main_total_rssi /
1585 antcomb->total_pkt_count);
1586 alt_rssi_avg = (antcomb->alt_total_rssi /
1587 antcomb->total_pkt_count);
1588 }
1589
1590
1591 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1592 curr_alt_set = div_ant_conf.alt_lna_conf;
1593 curr_main_set = div_ant_conf.main_lna_conf;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001594
1595 antcomb->count++;
1596
1597 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1598 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1599 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1600 main_rssi_avg);
1601 antcomb->alt_good = true;
1602 } else {
1603 antcomb->alt_good = false;
1604 }
1605
1606 antcomb->count = 0;
1607 antcomb->scan = true;
1608 antcomb->scan_not_start = true;
1609 }
1610
1611 if (!antcomb->scan) {
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +05301612 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1613 alt_ratio, curr_main_set, curr_alt_set,
1614 alt_rssi_avg, main_rssi_avg)) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001615 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1616 /* Switch main and alt LNA */
1617 div_ant_conf.main_lna_conf =
1618 ATH_ANT_DIV_COMB_LNA2;
1619 div_ant_conf.alt_lna_conf =
1620 ATH_ANT_DIV_COMB_LNA1;
1621 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1622 div_ant_conf.main_lna_conf =
1623 ATH_ANT_DIV_COMB_LNA1;
1624 div_ant_conf.alt_lna_conf =
1625 ATH_ANT_DIV_COMB_LNA2;
1626 }
1627
1628 goto div_comb_done;
1629 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1630 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1631 /* Set alt to another LNA */
1632 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1633 div_ant_conf.alt_lna_conf =
1634 ATH_ANT_DIV_COMB_LNA1;
1635 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1636 div_ant_conf.alt_lna_conf =
1637 ATH_ANT_DIV_COMB_LNA2;
1638
1639 goto div_comb_done;
1640 }
1641
1642 if ((alt_rssi_avg < (main_rssi_avg +
Mohammed Shafi Shajakhan8afbcc82011-05-13 20:30:56 +05301643 div_ant_conf.lna1_lna2_delta)))
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001644 goto div_comb_done;
1645 }
1646
1647 if (!antcomb->scan_not_start) {
1648 switch (curr_alt_set) {
1649 case ATH_ANT_DIV_COMB_LNA2:
1650 antcomb->rssi_lna2 = alt_rssi_avg;
1651 antcomb->rssi_lna1 = main_rssi_avg;
1652 antcomb->scan = true;
1653 /* set to A+B */
1654 div_ant_conf.main_lna_conf =
1655 ATH_ANT_DIV_COMB_LNA1;
1656 div_ant_conf.alt_lna_conf =
1657 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1658 break;
1659 case ATH_ANT_DIV_COMB_LNA1:
1660 antcomb->rssi_lna1 = alt_rssi_avg;
1661 antcomb->rssi_lna2 = main_rssi_avg;
1662 antcomb->scan = true;
1663 /* set to A+B */
1664 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1665 div_ant_conf.alt_lna_conf =
1666 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1667 break;
1668 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1669 antcomb->rssi_add = alt_rssi_avg;
1670 antcomb->scan = true;
1671 /* set to A-B */
1672 div_ant_conf.alt_lna_conf =
1673 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1674 break;
1675 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1676 antcomb->rssi_sub = alt_rssi_avg;
1677 antcomb->scan = false;
1678 if (antcomb->rssi_lna2 >
1679 (antcomb->rssi_lna1 +
1680 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1681 /* use LNA2 as main LNA */
1682 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1683 (antcomb->rssi_add > antcomb->rssi_sub)) {
1684 /* set to A+B */
1685 div_ant_conf.main_lna_conf =
1686 ATH_ANT_DIV_COMB_LNA2;
1687 div_ant_conf.alt_lna_conf =
1688 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1689 } else if (antcomb->rssi_sub >
1690 antcomb->rssi_lna1) {
1691 /* set to A-B */
1692 div_ant_conf.main_lna_conf =
1693 ATH_ANT_DIV_COMB_LNA2;
1694 div_ant_conf.alt_lna_conf =
1695 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1696 } else {
1697 /* set to LNA1 */
1698 div_ant_conf.main_lna_conf =
1699 ATH_ANT_DIV_COMB_LNA2;
1700 div_ant_conf.alt_lna_conf =
1701 ATH_ANT_DIV_COMB_LNA1;
1702 }
1703 } else {
1704 /* use LNA1 as main LNA */
1705 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1706 (antcomb->rssi_add > antcomb->rssi_sub)) {
1707 /* set to A+B */
1708 div_ant_conf.main_lna_conf =
1709 ATH_ANT_DIV_COMB_LNA1;
1710 div_ant_conf.alt_lna_conf =
1711 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1712 } else if (antcomb->rssi_sub >
1713 antcomb->rssi_lna1) {
1714 /* set to A-B */
1715 div_ant_conf.main_lna_conf =
1716 ATH_ANT_DIV_COMB_LNA1;
1717 div_ant_conf.alt_lna_conf =
1718 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1719 } else {
1720 /* set to LNA2 */
1721 div_ant_conf.main_lna_conf =
1722 ATH_ANT_DIV_COMB_LNA1;
1723 div_ant_conf.alt_lna_conf =
1724 ATH_ANT_DIV_COMB_LNA2;
1725 }
1726 }
1727 break;
1728 default:
1729 break;
1730 }
1731 } else {
1732 if (!antcomb->alt_good) {
1733 antcomb->scan_not_start = false;
1734 /* Set alt to another LNA */
1735 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1736 div_ant_conf.main_lna_conf =
1737 ATH_ANT_DIV_COMB_LNA2;
1738 div_ant_conf.alt_lna_conf =
1739 ATH_ANT_DIV_COMB_LNA1;
1740 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1741 div_ant_conf.main_lna_conf =
1742 ATH_ANT_DIV_COMB_LNA1;
1743 div_ant_conf.alt_lna_conf =
1744 ATH_ANT_DIV_COMB_LNA2;
1745 }
1746 goto div_comb_done;
1747 }
1748 }
1749
1750 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1751 main_rssi_avg, alt_rssi_avg,
1752 alt_ratio);
1753
1754 antcomb->quick_scan_cnt++;
1755
1756div_comb_done:
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301757 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001758 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1759
1760 antcomb->scan_start_time = jiffies;
1761 antcomb->total_pkt_count = 0;
1762 antcomb->main_total_rssi = 0;
1763 antcomb->alt_total_rssi = 0;
1764 antcomb->main_recv_cnt = 0;
1765 antcomb->alt_recv_cnt = 0;
1766}
1767
Felix Fietkaub5c804752010-04-15 17:38:48 -04001768int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1769{
1770 struct ath_buf *bf;
Felix Fietkau0d955212011-01-26 18:23:27 +01001771 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001772 struct ieee80211_rx_status *rxs;
Sujithcbe61d82009-02-09 13:27:12 +05301773 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001774 struct ath_common *common = ath9k_hw_common(ah);
Felix Fietkau7545daf2011-01-24 19:23:16 +01001775 struct ieee80211_hw *hw = sc->hw;
Sujithbe0418a2008-11-18 09:05:55 +05301776 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc9b14172009-11-04 16:47:22 -08001777 int retval;
Sujithbe0418a2008-11-18 09:05:55 +05301778 bool decrypt_error = false;
Felix Fietkau29bffa92010-03-29 20:14:23 -07001779 struct ath_rx_status rs;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001780 enum ath9k_rx_qtype qtype;
1781 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1782 int dma_type;
Vasanthakumar Thiagarajan5c6dd922010-05-20 14:34:47 -07001783 u8 rx_status_len = ah->caps.rx_status_len;
Felix Fietkaua6d20552010-06-12 00:33:54 -04001784 u64 tsf = 0;
1785 u32 tsf_lower = 0;
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001786 unsigned long flags;
Sujithbe0418a2008-11-18 09:05:55 +05301787
Felix Fietkaub5c804752010-04-15 17:38:48 -04001788 if (edma)
Felix Fietkaub5c804752010-04-15 17:38:48 -04001789 dma_type = DMA_BIDIRECTIONAL;
Ming Lei56824222010-05-14 21:15:38 +08001790 else
1791 dma_type = DMA_FROM_DEVICE;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001792
1793 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
Sujithb77f4832008-12-07 21:44:03 +05301794 spin_lock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001795
Felix Fietkaua6d20552010-06-12 00:33:54 -04001796 tsf = ath9k_hw_gettsf64(ah);
1797 tsf_lower = tsf & 0xffffffff;
1798
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001799 do {
1800 /* If handling rx interrupt and flush is in progress => exit */
Sujith98deeea2008-08-11 14:05:46 +05301801 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001802 break;
1803
Felix Fietkau29bffa92010-03-29 20:14:23 -07001804 memset(&rs, 0, sizeof(rs));
Felix Fietkaub5c804752010-04-15 17:38:48 -04001805 if (edma)
1806 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1807 else
1808 bf = ath_get_next_rx_buf(sc, &rs);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001809
Felix Fietkaub5c804752010-04-15 17:38:48 -04001810 if (!bf)
1811 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001812
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001813 skb = bf->bf_mpdu;
Sujithbe0418a2008-11-18 09:05:55 +05301814 if (!skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001815 continue;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001816
Felix Fietkau0d955212011-01-26 18:23:27 +01001817 /*
1818 * Take frame header from the first fragment and RX status from
1819 * the last one.
1820 */
1821 if (sc->rx.frag)
1822 hdr_skb = sc->rx.frag;
1823 else
1824 hdr_skb = skb;
1825
1826 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1827 rxs = IEEE80211_SKB_RXCB(hdr_skb);
Rajkumar Manoharancf3af742011-08-27 16:17:47 +05301828 if (ieee80211_is_beacon(hdr->frame_control) &&
Mohammed Shafi Shajakhan356cb552011-12-07 16:51:38 +05301829 !is_zero_ether_addr(common->curbssid) &&
Rajkumar Manoharancf3af742011-08-27 16:17:47 +05301830 !compare_ether_addr(hdr->addr3, common->curbssid))
1831 rs.is_mybeacon = true;
1832 else
1833 rs.is_mybeacon = false;
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001834
Felix Fietkau29bffa92010-03-29 20:14:23 -07001835 ath_debug_stat_rx(sc, &rs);
Sujith1395d3f2010-01-08 10:36:11 +05301836
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301837 /*
Sujithbe0418a2008-11-18 09:05:55 +05301838 * If we're asked to flush receive queue, directly
1839 * chain it back at the queue without processing it.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001840 */
Felix Fietkau34832882011-09-14 21:23:03 +02001841 if (sc->sc_flags & SC_OP_RXFLUSH)
Felix Fietkau0d955212011-01-26 18:23:27 +01001842 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001843
Felix Fietkaua6d20552010-06-12 00:33:54 -04001844 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1845 if (rs.rs_tstamp > tsf_lower &&
1846 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1847 rxs->mactime -= 0x100000000ULL;
1848
1849 if (rs.rs_tstamp < tsf_lower &&
1850 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1851 rxs->mactime += 0x100000000ULL;
1852
Zefir Kurtisi83c76572011-11-16 11:09:44 +01001853 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1854 rxs, &decrypt_error);
1855 if (retval)
1856 goto requeue_drop_frag;
1857
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001858 /* Ensure we always have an skb to requeue once we are done
1859 * processing the current buffer's skb */
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001860 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001861
1862 /* If there is no memory we ignore the current RX'd frame,
1863 * tell hardware it can give us a new frame using the old
Sujithb77f4832008-12-07 21:44:03 +05301864 * skb and put it at the tail of the sc->rx.rxbuf list for
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001865 * processing. */
1866 if (!requeue_skb)
Felix Fietkau0d955212011-01-26 18:23:27 +01001867 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001868
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301869 /* Unmap the frame */
Gabor Juhos7da3c552009-01-14 20:17:03 +01001870 dma_unmap_single(sc->dev, bf->bf_buf_addr,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001871 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001872 dma_type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001873
Felix Fietkaub5c804752010-04-15 17:38:48 -04001874 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1875 if (ah->caps.rx_status_len)
1876 skb_pull(skb, ah->caps.rx_status_len);
Sujithbe0418a2008-11-18 09:05:55 +05301877
Felix Fietkau0d955212011-01-26 18:23:27 +01001878 if (!rs.rs_more)
1879 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1880 rxs, decrypt_error);
Sujithbe0418a2008-11-18 09:05:55 +05301881
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001882 /* We will now give hardware our shiny new allocated skb */
1883 bf->bf_mpdu = requeue_skb;
Gabor Juhos7da3c552009-01-14 20:17:03 +01001884 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001885 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001886 dma_type);
Gabor Juhos7da3c552009-01-14 20:17:03 +01001887 if (unlikely(dma_mapping_error(sc->dev,
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001888 bf->bf_buf_addr))) {
1889 dev_kfree_skb_any(requeue_skb);
1890 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -07001891 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -08001892 ath_err(common, "dma_mapping_error() on RX\n");
Felix Fietkau7545daf2011-01-24 19:23:16 +01001893 ieee80211_rx(hw, skb);
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001894 break;
1895 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001896
Felix Fietkau0d955212011-01-26 18:23:27 +01001897 if (rs.rs_more) {
1898 /*
1899 * rs_more indicates chained descriptors which can be
1900 * used to link buffers together for a sort of
1901 * scatter-gather operation.
1902 */
1903 if (sc->rx.frag) {
1904 /* too many fragments - cannot handle frame */
1905 dev_kfree_skb_any(sc->rx.frag);
1906 dev_kfree_skb_any(skb);
1907 skb = NULL;
1908 }
1909 sc->rx.frag = skb;
1910 goto requeue;
1911 }
1912
1913 if (sc->rx.frag) {
1914 int space = skb->len - skb_tailroom(hdr_skb);
1915
1916 sc->rx.frag = NULL;
1917
1918 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1919 dev_kfree_skb(skb);
1920 goto requeue_drop_frag;
1921 }
1922
1923 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1924 skb->len);
1925 dev_kfree_skb_any(skb);
1926 skb = hdr_skb;
1927 }
1928
Mohammed Shafi Shajakhaneb840a82011-11-29 20:30:35 +05301929
1930 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
1931
1932 /*
1933 * change the default rx antenna if rx diversity
1934 * chooses the other antenna 3 times in a row.
1935 */
1936 if (sc->rx.defant != rs.rs_antenna) {
1937 if (++sc->rx.rxotherant >= 3)
1938 ath_setdefantenna(sc, rs.rs_antenna);
1939 } else {
1940 sc->rx.rxotherant = 0;
1941 }
1942
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001943 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301944
Felix Fietkau66760ea2011-07-13 23:35:05 +08001945 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1946 skb_trim(skb, skb->len - 8);
1947
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001948 spin_lock_irqsave(&sc->sc_pm_lock, flags);
Mohammed Shafi Shajakhanaaef24b2010-12-07 20:40:58 +05301949
1950 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
Rajkumar Manoharanf73c6042011-09-26 22:16:56 +05301951 PS_WAIT_FOR_CAB |
1952 PS_WAIT_FOR_PSPOLL_DATA)) ||
1953 ath9k_check_auto_sleep(sc))
1954 ath_rx_ps(sc, skb, rs.is_mybeacon);
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001955 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
Jouni Malinencc659652009-05-14 21:28:48 +03001956
Felix Fietkau43c35282011-09-03 01:40:27 +02001957 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001958 ath_ant_comb_scan(sc, &rs);
1959
Felix Fietkau7545daf2011-01-24 19:23:16 +01001960 ieee80211_rx(hw, skb);
Jouni Malinencc659652009-05-14 21:28:48 +03001961
Felix Fietkau0d955212011-01-26 18:23:27 +01001962requeue_drop_frag:
1963 if (sc->rx.frag) {
1964 dev_kfree_skb_any(sc->rx.frag);
1965 sc->rx.frag = NULL;
1966 }
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001967requeue:
Felix Fietkaub5c804752010-04-15 17:38:48 -04001968 if (edma) {
1969 list_add_tail(&bf->list, &sc->rx.rxbuf);
1970 ath_rx_edma_buf_link(sc, qtype);
1971 } else {
1972 list_move_tail(&bf->list, &sc->rx.rxbuf);
1973 ath_rx_buf_link(sc, bf);
Felix Fietkau34832882011-09-14 21:23:03 +02001974 if (!flush)
1975 ath9k_hw_rxena(ah);
Felix Fietkaub5c804752010-04-15 17:38:48 -04001976 }
Sujithbe0418a2008-11-18 09:05:55 +05301977 } while (1);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001978
Sujithb77f4832008-12-07 21:44:03 +05301979 spin_unlock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001980
Rajkumar Manoharan29ab0b32011-08-13 10:28:10 +05301981 if (!(ah->imask & ATH9K_INT_RXEOL)) {
1982 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
Felix Fietkau72d874c2011-10-08 20:06:19 +02001983 ath9k_hw_set_interrupts(ah);
Rajkumar Manoharan29ab0b32011-08-13 10:28:10 +05301984 }
1985
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001986 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001987}