blob: 33a52532fac69bf45ef94df913a9a023b9ec49a4 [file] [log] [blame]
Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020044#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000050
Andy Fleming00db8182005-07-30 19:31:23 -040051#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
Andy Fleming76884672007-02-09 18:13:58 -060058#define MII_M1011_PHY_SCR 0x10
David Thomson239aa552015-07-10 16:28:25 +120059#define MII_M1011_PHY_SCR_MDI 0x0000
60#define MII_M1011_PHY_SCR_MDI_X 0x0020
Andy Fleming76884672007-02-09 18:13:58 -060061#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
62
Viet Nga Daob0224172014-10-23 19:41:53 -070063#define MII_M1145_PHY_EXT_SR 0x1b
Andy Fleming76884672007-02-09 18:13:58 -060064#define MII_M1145_PHY_EXT_CR 0x14
65#define MII_M1145_RGMII_RX_DELAY 0x0080
66#define MII_M1145_RGMII_TX_DELAY 0x0002
Viet Nga Daob0224172014-10-23 19:41:53 -070067#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
68#define MII_M1145_HWCFG_MODE_MASK 0xf
69#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
Andy Fleming76884672007-02-09 18:13:58 -060070
Vince Bridgers99d881f2014-10-26 14:22:24 -050071#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
72#define MII_M1145_HWCFG_MODE_MASK 0xf
73#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
74
Andy Fleming76884672007-02-09 18:13:58 -060075#define MII_M1111_PHY_LED_CONTROL 0x18
76#define MII_M1111_PHY_LED_DIRECT 0x4100
77#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080078#define MII_M1111_PHY_EXT_CR 0x14
79#define MII_M1111_RX_DELAY 0x80
80#define MII_M1111_TX_DELAY 0x2
81#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082
83#define MII_M1111_HWCFG_MODE_MASK 0xf
84#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
85#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050086#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000087#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030088#define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
89#define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
90
Cyril Chemparathyc477d042010-08-02 09:44:53 +000091#define MII_88E1121_PHY_MSCR_REG 21
92#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
93#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
94#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
95
Andrew Lunn0b046802017-01-20 01:37:49 +010096#define MII_88E1121_MISC_TEST 0x1a
97#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
98#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
99#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
100#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
101#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
102#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
103
104#define MII_88E1510_TEMP_SENSOR 0x1b
105#define MII_88E1510_TEMP_SENSOR_MASK 0xff
106
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700107#define MII_88E1318S_PHY_MSCR1_REG 16
108#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700109
Michael Stapelberg3871c382013-03-11 13:56:45 +0000110/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200111#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000112/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200113#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000114
115/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200116#define MII_88E1318S_PHY_LED_TCR 0x12
117#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
118#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
119#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000120
121/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200122#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
123#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
124#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000125
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200126#define MII_88E1318S_PHY_WOL_CTRL 0x10
127#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
128#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000129
Sergei Poselenov140bc922009-04-07 02:01:41 +0000130#define MII_88E1121_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000131#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000132
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300133#define MII_M1011_PHY_STATUS 0x11
134#define MII_M1011_PHY_STATUS_1000 0x8000
135#define MII_M1011_PHY_STATUS_100 0x4000
136#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
137#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
138#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
139#define MII_M1011_PHY_STATUS_LINK 0x0400
140
Michal Simek3da09a52013-05-30 20:08:26 +0000141#define MII_M1116R_CONTROL_REG_MAC 21
142
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200143#define MII_88E3016_PHY_SPEC_CTRL 0x10
144#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
145#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600146
Stefan Roese930b37e2016-02-18 10:59:07 +0100147#define MII_88E1510_GEN_CTRL_REG_1 0x14
148#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
149#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
150#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
151
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200152#define LPA_FIBER_1000HALF 0x40
153#define LPA_FIBER_1000FULL 0x20
154
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200155#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200156#define LPA_PAUSE_ASYM_FIBER 0x100
157
158#define ADVERTISE_FIBER_1000HALF 0x40
159#define ADVERTISE_FIBER_1000FULL 0x20
160
161#define ADVERTISE_PAUSE_FIBER 0x180
162#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
163
164#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200165#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200166
Andy Fleming00db8182005-07-30 19:31:23 -0400167MODULE_DESCRIPTION("Marvell PHY driver");
168MODULE_AUTHOR("Andy Fleming");
169MODULE_LICENSE("GPL");
170
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100171struct marvell_hw_stat {
172 const char *string;
173 u8 page;
174 u8 reg;
175 u8 bits;
176};
177
178static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200179 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100180 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200181 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100182};
183
184struct marvell_priv {
185 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100186 char *hwmon_name;
187 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100188};
189
Andrew Lunn6427bb22017-05-17 03:26:03 +0200190static int marvell_get_page(struct phy_device *phydev)
191{
192 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
193}
194
195static int marvell_set_page(struct phy_device *phydev, int page)
196{
197 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
198}
199
Andrew Lunn53798322017-05-25 21:42:07 +0200200static int marvell_get_set_page(struct phy_device *phydev, int page)
201{
202 int oldpage = marvell_get_page(phydev);
203
204 if (oldpage < 0)
205 return oldpage;
206
207 if (page != oldpage)
208 return marvell_set_page(phydev, page);
209
210 return 0;
211}
212
Andy Fleming00db8182005-07-30 19:31:23 -0400213static int marvell_ack_interrupt(struct phy_device *phydev)
214{
215 int err;
216
217 /* Clear the interrupts by reading the reg */
218 err = phy_read(phydev, MII_M1011_IEVENT);
219
220 if (err < 0)
221 return err;
222
223 return 0;
224}
225
226static int marvell_config_intr(struct phy_device *phydev)
227{
228 int err;
229
Andy Fleming76884672007-02-09 18:13:58 -0600230 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200231 err = phy_write(phydev, MII_M1011_IMASK,
232 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400233 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200234 err = phy_write(phydev, MII_M1011_IMASK,
235 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400236
237 return err;
238}
239
David Thomson239aa552015-07-10 16:28:25 +1200240static int marvell_set_polarity(struct phy_device *phydev, int polarity)
241{
242 int reg;
243 int err;
244 int val;
245
246 /* get the current settings */
247 reg = phy_read(phydev, MII_M1011_PHY_SCR);
248 if (reg < 0)
249 return reg;
250
251 val = reg;
252 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
253 switch (polarity) {
254 case ETH_TP_MDI:
255 val |= MII_M1011_PHY_SCR_MDI;
256 break;
257 case ETH_TP_MDI_X:
258 val |= MII_M1011_PHY_SCR_MDI_X;
259 break;
260 case ETH_TP_MDI_AUTO:
261 case ETH_TP_MDI_INVALID:
262 default:
263 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
264 break;
265 }
266
267 if (val != reg) {
268 /* Set the new polarity value in the register */
269 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
270 if (err)
271 return err;
272 }
273
274 return 0;
275}
276
Andy Fleming00db8182005-07-30 19:31:23 -0400277static int marvell_config_aneg(struct phy_device *phydev)
278{
279 int err;
280
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530281 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600282 if (err < 0)
283 return err;
284
285 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
286 MII_M1111_PHY_LED_DIRECT);
287 if (err < 0)
288 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400289
290 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000291 if (err < 0)
292 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400293
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000294 if (phydev->autoneg != AUTONEG_ENABLE) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200295 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000296 * genphy_config_aneg() call above) must be followed by
297 * a software reset. Otherwise, the write has no effect.
298 */
Andrew Lunn34386342017-07-30 22:41:45 +0200299 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000300 if (err < 0)
301 return err;
302 }
303
304 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400305}
306
Andrew Lunnf2899782017-05-23 17:49:13 +0200307static int m88e1101_config_aneg(struct phy_device *phydev)
308{
309 int err;
310
311 /* This Marvell PHY has an errata which requires
312 * that certain registers get written in order
313 * to restart autonegotiation
314 */
Andrew Lunn34386342017-07-30 22:41:45 +0200315 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200316 if (err < 0)
317 return err;
318
319 err = phy_write(phydev, 0x1d, 0x1f);
320 if (err < 0)
321 return err;
322
323 err = phy_write(phydev, 0x1e, 0x200c);
324 if (err < 0)
325 return err;
326
327 err = phy_write(phydev, 0x1d, 0x5);
328 if (err < 0)
329 return err;
330
331 err = phy_write(phydev, 0x1e, 0);
332 if (err < 0)
333 return err;
334
335 err = phy_write(phydev, 0x1e, 0x100);
336 if (err < 0)
337 return err;
338
339 return marvell_config_aneg(phydev);
340}
341
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530342static int m88e1111_config_aneg(struct phy_device *phydev)
343{
344 int err;
345
346 /* The Marvell PHY has an errata which requires
347 * that certain registers get written in order
348 * to restart autonegotiation
349 */
Andrew Lunn34386342017-07-30 22:41:45 +0200350 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530351
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530352 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530353 if (err < 0)
354 return err;
355
356 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
357 MII_M1111_PHY_LED_DIRECT);
358 if (err < 0)
359 return err;
360
361 err = genphy_config_aneg(phydev);
362 if (err < 0)
363 return err;
364
365 if (phydev->autoneg != AUTONEG_ENABLE) {
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530366 /* A write to speed/duplex bits (that is performed by
367 * genphy_config_aneg() call above) must be followed by
368 * a software reset. Otherwise, the write has no effect.
369 */
Andrew Lunn34386342017-07-30 22:41:45 +0200370 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530371 if (err < 0)
372 return err;
373 }
374
375 return 0;
376}
377
David Daneycf41a512010-11-19 12:13:18 +0000378#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200379/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000380 * marvell,reg-init property stored in the of_node for the phydev.
381 *
382 * marvell,reg-init = <reg-page reg mask value>,...;
383 *
384 * There may be one or more sets of <reg-page reg mask value>:
385 *
386 * reg-page: which register bank to use.
387 * reg: the register.
388 * mask: if non-zero, ANDed with existing register value.
389 * value: ORed with the masked value and written to the regiser.
390 *
391 */
392static int marvell_of_reg_init(struct phy_device *phydev)
393{
394 const __be32 *paddr;
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100395 int len, i, saved_page, current_page, ret;
David Daneycf41a512010-11-19 12:13:18 +0000396
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100397 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000398 return 0;
399
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100400 paddr = of_get_property(phydev->mdio.dev.of_node,
401 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000402 if (!paddr || len < (4 * sizeof(*paddr)))
403 return 0;
404
Andrew Lunn6427bb22017-05-17 03:26:03 +0200405 saved_page = marvell_get_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000406 if (saved_page < 0)
407 return saved_page;
David Daneycf41a512010-11-19 12:13:18 +0000408 current_page = saved_page;
409
410 ret = 0;
411 len /= sizeof(*paddr);
412 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200413 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000414 u16 reg = be32_to_cpup(paddr + i + 1);
415 u16 mask = be32_to_cpup(paddr + i + 2);
416 u16 val_bits = be32_to_cpup(paddr + i + 3);
417 int val;
418
Andrew Lunn6427bb22017-05-17 03:26:03 +0200419 if (page != current_page) {
420 current_page = page;
421 ret = marvell_set_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000422 if (ret < 0)
423 goto err;
424 }
425
426 val = 0;
427 if (mask) {
428 val = phy_read(phydev, reg);
429 if (val < 0) {
430 ret = val;
431 goto err;
432 }
433 val &= mask;
434 }
435 val |= val_bits;
436
437 ret = phy_write(phydev, reg, val);
438 if (ret < 0)
439 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000440 }
441err:
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100442 if (current_page != saved_page) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200443 i = marvell_set_page(phydev, saved_page);
David Daneycf41a512010-11-19 12:13:18 +0000444 if (ret == 0)
445 ret = i;
446 }
447 return ret;
448}
449#else
450static int marvell_of_reg_init(struct phy_device *phydev)
451{
452 return 0;
453}
454#endif /* CONFIG_OF_MDIO */
455
Sergei Poselenov140bc922009-04-07 02:01:41 +0000456static int m88e1121_config_aneg(struct phy_device *phydev)
457{
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000458 int err, oldpage, mscr;
459
Andrew Lunn52295662017-05-25 21:42:08 +0200460 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200461 if (oldpage < 0)
462 return oldpage;
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000463
Florian Fainelli32a64162015-05-26 12:19:59 -0700464 if (phy_interface_is_rgmii(phydev)) {
Arnaud Patardbe8c6482010-10-21 03:59:57 -0700465 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
466 MII_88E1121_PHY_MSCR_DELAY_MASK;
467
468 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
469 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
470 MII_88E1121_PHY_MSCR_TX_DELAY);
471 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
472 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
473 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
474 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
475
476 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
477 if (err < 0)
478 return err;
479 }
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000480
Andrew Lunn6427bb22017-05-17 03:26:03 +0200481 marvell_set_page(phydev, oldpage);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000482
Andrew Lunn34386342017-07-30 22:41:45 +0200483 err = genphy_soft_reset(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000484 if (err < 0)
485 return err;
486
487 err = phy_write(phydev, MII_M1011_PHY_SCR,
488 MII_M1011_PHY_SCR_AUTO_CROSS);
489 if (err < 0)
490 return err;
491
Clemens Gruberfdecf362016-06-11 17:21:26 +0200492 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000493}
494
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700495static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700496{
497 int err, oldpage, mscr;
498
Andrew Lunn52295662017-05-25 21:42:08 +0200499 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200500 if (oldpage < 0)
501 return oldpage;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700502
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700503 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
504 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700505
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700506 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700507 if (err < 0)
508 return err;
509
Andrew Lunn6427bb22017-05-17 03:26:03 +0200510 err = marvell_set_page(phydev, oldpage);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700511 if (err < 0)
512 return err;
513
514 return m88e1121_config_aneg(phydev);
515}
516
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200517/**
518 * ethtool_adv_to_fiber_adv_t
519 * @ethadv: the ethtool advertisement settings
520 *
521 * A small helper function that translates ethtool advertisement
522 * settings to phy autonegotiation advertisements for the
523 * MII_ADV register for fiber link.
524 */
525static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
526{
527 u32 result = 0;
528
529 if (ethadv & ADVERTISED_1000baseT_Half)
530 result |= ADVERTISE_FIBER_1000HALF;
531 if (ethadv & ADVERTISED_1000baseT_Full)
532 result |= ADVERTISE_FIBER_1000FULL;
533
534 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
535 result |= LPA_PAUSE_ASYM_FIBER;
536 else if (ethadv & ADVERTISE_PAUSE_CAP)
537 result |= (ADVERTISE_PAUSE_FIBER
538 & (~ADVERTISE_PAUSE_ASYM_FIBER));
539
540 return result;
541}
542
543/**
544 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
545 * @phydev: target phy_device struct
546 *
547 * Description: If auto-negotiation is enabled, we configure the
548 * advertising, and then restart auto-negotiation. If it is not
549 * enabled, then we write the BMCR. Adapted for fiber link in
550 * some Marvell's devices.
551 */
552static int marvell_config_aneg_fiber(struct phy_device *phydev)
553{
554 int changed = 0;
555 int err;
556 int adv, oldadv;
557 u32 advertise;
558
559 if (phydev->autoneg != AUTONEG_ENABLE)
560 return genphy_setup_forced(phydev);
561
562 /* Only allow advertising what this PHY supports */
563 phydev->advertising &= phydev->supported;
564 advertise = phydev->advertising;
565
566 /* Setup fiber advertisement */
567 adv = phy_read(phydev, MII_ADVERTISE);
568 if (adv < 0)
569 return adv;
570
571 oldadv = adv;
572 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
573 | LPA_PAUSE_FIBER);
574 adv |= ethtool_adv_to_fiber_adv_t(advertise);
575
576 if (adv != oldadv) {
577 err = phy_write(phydev, MII_ADVERTISE, adv);
578 if (err < 0)
579 return err;
580
581 changed = 1;
582 }
583
584 if (changed == 0) {
585 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200586 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200587 */
588 int ctl = phy_read(phydev, MII_BMCR);
589
590 if (ctl < 0)
591 return ctl;
592
593 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
594 changed = 1; /* do restart aneg */
595 }
596
597 /* Only restart aneg if we are advertising something different
598 * than we were before.
599 */
600 if (changed > 0)
601 changed = genphy_restart_aneg(phydev);
602
603 return changed;
604}
605
Michal Simek10e24caa2013-05-30 20:08:27 +0000606static int m88e1510_config_aneg(struct phy_device *phydev)
607{
608 int err;
609
Andrew Lunn52295662017-05-25 21:42:08 +0200610 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200611 if (err < 0)
612 goto error;
613
614 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000615 err = m88e1318_config_aneg(phydev);
616 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200617 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000618
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200619 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200620 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200621 if (err < 0)
622 goto error;
623
624 err = marvell_config_aneg_fiber(phydev);
625 if (err < 0)
626 goto error;
627
Andrew Lunn52295662017-05-25 21:42:08 +0200628 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200629
630error:
Andrew Lunn52295662017-05-25 21:42:08 +0200631 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200632 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100633}
634
635static int marvell_config_init(struct phy_device *phydev)
636{
637 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000638 return marvell_of_reg_init(phydev);
639}
640
Michal Simek3da09a52013-05-30 20:08:26 +0000641static int m88e1116r_config_init(struct phy_device *phydev)
642{
643 int temp;
644 int err;
645
Andrew Lunn34386342017-07-30 22:41:45 +0200646 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000647 if (err < 0)
648 return err;
649
650 mdelay(500);
651
Andrew Lunn52295662017-05-25 21:42:08 +0200652 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000653 if (err < 0)
654 return err;
655
656 temp = phy_read(phydev, MII_M1011_PHY_SCR);
657 temp |= (7 << 12); /* max number of gigabit attempts */
658 temp |= (1 << 11); /* enable downshift */
659 temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
660 err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
661 if (err < 0)
662 return err;
663
Andrew Lunn52295662017-05-25 21:42:08 +0200664 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000665 if (err < 0)
666 return err;
667 temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
668 temp |= (1 << 5);
669 temp |= (1 << 4);
670 err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
671 if (err < 0)
672 return err;
Andrew Lunn52295662017-05-25 21:42:08 +0200673 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000674 if (err < 0)
675 return err;
676
Andrew Lunn34386342017-07-30 22:41:45 +0200677 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000678 if (err < 0)
679 return err;
680
Clemens Gruber79be1a12016-02-15 23:46:45 +0100681 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000682}
683
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200684static int m88e3016_config_init(struct phy_device *phydev)
685{
686 int reg;
687
688 /* Enable Scrambler and Auto-Crossover */
689 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
690 if (reg < 0)
691 return reg;
692
693 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
694 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
695
696 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
697 if (reg < 0)
698 return reg;
699
Clemens Gruber79be1a12016-02-15 23:46:45 +0100700 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200701}
702
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200703static int m88e1111_config_init_rgmii(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800704{
705 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300706 int temp;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300707
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200708 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
709 if (temp < 0)
710 return temp;
711
712 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
713 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
714 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
715 temp &= ~MII_M1111_TX_DELAY;
716 temp |= MII_M1111_RX_DELAY;
717 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
718 temp &= ~MII_M1111_RX_DELAY;
719 temp |= MII_M1111_TX_DELAY;
720 }
721
722 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
723 if (err < 0)
724 return err;
725
726 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
727 if (temp < 0)
728 return temp;
729
730 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
731
732 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
733 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
734 else
735 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
736
737 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
738}
739
740static int m88e1111_config_init_sgmii(struct phy_device *phydev)
741{
742 int err;
743 int temp;
744
745 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
746 if (temp < 0)
747 return temp;
748
749 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
750 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
751 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
752
753 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
754 if (err < 0)
755 return err;
756
757 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200758 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200759}
760
761static int m88e1111_config_init_rtbi(struct phy_device *phydev)
762{
763 int err;
764 int temp;
765
766 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
767 if (temp < 0)
768 return temp;
769
770 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
771 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
772 if (err < 0)
773 return err;
774
775 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
776 if (temp < 0)
777 return temp;
778
779 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
780 MII_M1111_HWCFG_FIBER_COPPER_RES);
781 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
782
783 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
784 if (err < 0)
785 return err;
786
787 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200788 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200789 if (err < 0)
790 return err;
791
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200792 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
793 if (temp < 0)
794 return temp;
795
796 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
797 MII_M1111_HWCFG_FIBER_COPPER_RES);
798 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI |
799 MII_M1111_HWCFG_FIBER_COPPER_AUTO;
800
801 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
802}
803
804static int m88e1111_config_init(struct phy_device *phydev)
805{
806 int err;
807
Florian Fainelli32a64162015-05-26 12:19:59 -0700808 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200809 err = m88e1111_config_init_rgmii(phydev);
810 if (err)
Kim Phillips895ee682007-06-05 18:46:47 +0800811 return err;
812 }
813
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500814 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200815 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800816 if (err < 0)
817 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500818 }
819
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000820 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200821 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000822 if (err < 0)
823 return err;
824 }
825
David Daneycf41a512010-11-19 12:13:18 +0000826 err = marvell_of_reg_init(phydev);
827 if (err < 0)
828 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000829
Andrew Lunn34386342017-07-30 22:41:45 +0200830 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800831}
832
Clemens Gruberfdecf362016-06-11 17:21:26 +0200833static int m88e1121_config_init(struct phy_device *phydev)
834{
835 int err, oldpage;
836
Andrew Lunn52295662017-05-25 21:42:08 +0200837 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200838 if (oldpage < 0)
839 return oldpage;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200840
841 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
842 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
843 MII_88E1121_PHY_LED_DEF);
844 if (err < 0)
845 return err;
846
Andrew Lunn6427bb22017-05-17 03:26:03 +0200847 marvell_set_page(phydev, oldpage);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200848
849 /* Set marvell,reg-init configuration from device tree */
850 return marvell_config_init(phydev);
851}
852
Clemens Gruber407353e2016-02-23 20:16:58 +0100853static int m88e1510_config_init(struct phy_device *phydev)
854{
855 int err;
856 int temp;
857
858 /* SGMII-to-Copper mode initialization */
859 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
860 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200861 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100862 if (err < 0)
863 return err;
864
865 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
866 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
867 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
868 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
869 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
870 if (err < 0)
871 return err;
872
873 /* PHY reset is necessary after changing MODE[2:0] */
874 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
875 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
876 if (err < 0)
877 return err;
878
879 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200880 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100881 if (err < 0)
882 return err;
883 }
884
Clemens Gruberfdecf362016-06-11 17:21:26 +0200885 return m88e1121_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100886}
887
Ron Madrid605f1962008-11-06 09:05:26 +0000888static int m88e1118_config_aneg(struct phy_device *phydev)
889{
890 int err;
891
Andrew Lunn34386342017-07-30 22:41:45 +0200892 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000893 if (err < 0)
894 return err;
895
896 err = phy_write(phydev, MII_M1011_PHY_SCR,
897 MII_M1011_PHY_SCR_AUTO_CROSS);
898 if (err < 0)
899 return err;
900
901 err = genphy_config_aneg(phydev);
902 return 0;
903}
904
905static int m88e1118_config_init(struct phy_device *phydev)
906{
907 int err;
908
909 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200910 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000911 if (err < 0)
912 return err;
913
914 /* Enable 1000 Mbit */
915 err = phy_write(phydev, 0x15, 0x1070);
916 if (err < 0)
917 return err;
918
919 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200920 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000921 if (err < 0)
922 return err;
923
924 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000925 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
926 err = phy_write(phydev, 0x10, 0x1100);
927 else
928 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000929 if (err < 0)
930 return err;
931
David Daneycf41a512010-11-19 12:13:18 +0000932 err = marvell_of_reg_init(phydev);
933 if (err < 0)
934 return err;
935
Ron Madrid605f1962008-11-06 09:05:26 +0000936 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200937 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000938 if (err < 0)
939 return err;
940
Andrew Lunn34386342017-07-30 22:41:45 +0200941 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000942}
943
David Daney90600732010-11-19 11:58:53 +0000944static int m88e1149_config_init(struct phy_device *phydev)
945{
946 int err;
947
948 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200949 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000950 if (err < 0)
951 return err;
952
953 /* Enable 1000 Mbit */
954 err = phy_write(phydev, 0x15, 0x1048);
955 if (err < 0)
956 return err;
957
David Daneycf41a512010-11-19 12:13:18 +0000958 err = marvell_of_reg_init(phydev);
959 if (err < 0)
960 return err;
961
David Daney90600732010-11-19 11:58:53 +0000962 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200963 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +0000964 if (err < 0)
965 return err;
966
Andrew Lunn34386342017-07-30 22:41:45 +0200967 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +0000968}
969
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200970static int m88e1145_config_init_rgmii(struct phy_device *phydev)
971{
972 int err;
973 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
974
975 if (temp < 0)
976 return temp;
977
978 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
979
980 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
981 if (err < 0)
982 return err;
983
984 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
985 err = phy_write(phydev, 0x1d, 0x0012);
986 if (err < 0)
987 return err;
988
989 temp = phy_read(phydev, 0x1e);
990 if (temp < 0)
991 return temp;
992
993 temp &= 0xf03f;
994 temp |= 2 << 9; /* 36 ohm */
995 temp |= 2 << 6; /* 39 ohm */
996
997 err = phy_write(phydev, 0x1e, temp);
998 if (err < 0)
999 return err;
1000
1001 err = phy_write(phydev, 0x1d, 0x3);
1002 if (err < 0)
1003 return err;
1004
1005 err = phy_write(phydev, 0x1e, 0x8000);
1006 }
1007 return err;
1008}
1009
1010static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1011{
1012 int temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);
1013
1014 if (temp < 0)
1015 return temp;
1016
1017 temp &= ~MII_M1145_HWCFG_MODE_MASK;
1018 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
1019 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;
1020
1021 return phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
1022}
1023
Andy Fleming76884672007-02-09 18:13:58 -06001024static int m88e1145_config_init(struct phy_device *phydev)
1025{
1026 int err;
1027
1028 /* Take care of errata E0 & E1 */
1029 err = phy_write(phydev, 0x1d, 0x001b);
1030 if (err < 0)
1031 return err;
1032
1033 err = phy_write(phydev, 0x1e, 0x418f);
1034 if (err < 0)
1035 return err;
1036
1037 err = phy_write(phydev, 0x1d, 0x0016);
1038 if (err < 0)
1039 return err;
1040
1041 err = phy_write(phydev, 0x1e, 0xa2da);
1042 if (err < 0)
1043 return err;
1044
Kim Phillips895ee682007-06-05 18:46:47 +08001045 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001046 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001047 if (err < 0)
1048 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001049 }
1050
Viet Nga Daob0224172014-10-23 19:41:53 -07001051 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001052 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001053 if (err < 0)
1054 return err;
1055 }
1056
David Daneycf41a512010-11-19 12:13:18 +00001057 err = marvell_of_reg_init(phydev);
1058 if (err < 0)
1059 return err;
1060
Andy Fleming76884672007-02-09 18:13:58 -06001061 return 0;
1062}
Andy Fleming00db8182005-07-30 19:31:23 -04001063
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001064/**
1065 * fiber_lpa_to_ethtool_lpa_t
1066 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001067 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001068 * A small helper function that translates MII_LPA
1069 * bits to ethtool LP advertisement settings.
1070 */
1071static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1072{
1073 u32 result = 0;
1074
1075 if (lpa & LPA_FIBER_1000HALF)
1076 result |= ADVERTISED_1000baseT_Half;
1077 if (lpa & LPA_FIBER_1000FULL)
1078 result |= ADVERTISED_1000baseT_Full;
1079
1080 return result;
1081}
1082
1083/**
1084 * marvell_update_link - update link status in real time in @phydev
1085 * @phydev: target phy_device struct
1086 *
1087 * Description: Update the value in phydev->link to reflect the
1088 * current link value.
1089 */
1090static int marvell_update_link(struct phy_device *phydev, int fiber)
1091{
1092 int status;
1093
1094 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001095 * register for fiber case
1096 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001097 if (fiber) {
1098 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1099 if (status < 0)
1100 return status;
1101
1102 if ((status & REGISTER_LINK_STATUS) == 0)
1103 phydev->link = 0;
1104 else
1105 phydev->link = 1;
1106 } else {
1107 return genphy_update_link(phydev);
1108 }
1109
1110 return 0;
1111}
1112
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001113static int marvell_read_status_page_an(struct phy_device *phydev,
1114 int fiber)
1115{
1116 int status;
1117 int lpa;
1118 int lpagb;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001119
1120 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1121 if (status < 0)
1122 return status;
1123
1124 lpa = phy_read(phydev, MII_LPA);
1125 if (lpa < 0)
1126 return lpa;
1127
1128 lpagb = phy_read(phydev, MII_STAT1000);
1129 if (lpagb < 0)
1130 return lpagb;
1131
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001132 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1133 phydev->duplex = DUPLEX_FULL;
1134 else
1135 phydev->duplex = DUPLEX_HALF;
1136
1137 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1138 phydev->pause = 0;
1139 phydev->asym_pause = 0;
1140
1141 switch (status) {
1142 case MII_M1011_PHY_STATUS_1000:
1143 phydev->speed = SPEED_1000;
1144 break;
1145
1146 case MII_M1011_PHY_STATUS_100:
1147 phydev->speed = SPEED_100;
1148 break;
1149
1150 default:
1151 phydev->speed = SPEED_10;
1152 break;
1153 }
1154
1155 if (!fiber) {
1156 phydev->lp_advertising =
1157 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1158 mii_lpa_to_ethtool_lpa_t(lpa);
1159
1160 if (phydev->duplex == DUPLEX_FULL) {
1161 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1162 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1163 }
1164 } else {
1165 /* The fiber link is only 1000M capable */
1166 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1167
1168 if (phydev->duplex == DUPLEX_FULL) {
1169 if (!(lpa & LPA_PAUSE_FIBER)) {
1170 phydev->pause = 0;
1171 phydev->asym_pause = 0;
1172 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1173 phydev->pause = 1;
1174 phydev->asym_pause = 1;
1175 } else {
1176 phydev->pause = 1;
1177 phydev->asym_pause = 0;
1178 }
1179 }
1180 }
1181 return 0;
1182}
1183
1184static int marvell_read_status_page_fixed(struct phy_device *phydev)
1185{
1186 int bmcr = phy_read(phydev, MII_BMCR);
1187
1188 if (bmcr < 0)
1189 return bmcr;
1190
1191 if (bmcr & BMCR_FULLDPLX)
1192 phydev->duplex = DUPLEX_FULL;
1193 else
1194 phydev->duplex = DUPLEX_HALF;
1195
1196 if (bmcr & BMCR_SPEED1000)
1197 phydev->speed = SPEED_1000;
1198 else if (bmcr & BMCR_SPEED100)
1199 phydev->speed = SPEED_100;
1200 else
1201 phydev->speed = SPEED_10;
1202
1203 phydev->pause = 0;
1204 phydev->asym_pause = 0;
1205 phydev->lp_advertising = 0;
1206
1207 return 0;
1208}
1209
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001210/* marvell_read_status_page
1211 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001212 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001213 * Check the link, then figure out the current state
1214 * by comparing what we advertise with what the link partner
1215 * advertises. Start by checking the gigabit possibilities,
1216 * then move on to 10/100.
1217 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001218static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001219{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001220 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001221 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001222
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001223 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001224 * was an error
1225 */
Andrew Lunn52295662017-05-25 21:42:08 +02001226 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001227 fiber = 1;
1228 else
1229 fiber = 0;
1230
1231 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001232 if (err)
1233 return err;
1234
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001235 if (phydev->autoneg == AUTONEG_ENABLE)
1236 err = marvell_read_status_page_an(phydev, fiber);
1237 else
1238 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001239
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001240 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001241}
1242
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001243/* marvell_read_status
1244 *
1245 * Some Marvell's phys have two modes: fiber and copper.
1246 * Both need status checked.
1247 * Description:
1248 * First, check the fiber link and status.
1249 * If the fiber link is down, check the copper link and status which
1250 * will be the default value if both link are down.
1251 */
1252static int marvell_read_status(struct phy_device *phydev)
1253{
1254 int err;
1255
1256 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001257 if (phydev->supported & SUPPORTED_FIBRE &&
1258 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001259 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001260 if (err < 0)
1261 goto error;
1262
Andrew Lunn52295662017-05-25 21:42:08 +02001263 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001264 if (err < 0)
1265 goto error;
1266
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001267 /* If the fiber link is up, it is the selected and
1268 * used link. In this case, we need to stay in the
1269 * fiber page. Please to be careful about that, avoid
1270 * to restore Copper page in other functions which
1271 * could break the behaviour for some fiber phy like
1272 * 88E1512.
1273 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001274 if (phydev->link)
1275 return 0;
1276
1277 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001278 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001279 if (err < 0)
1280 goto error;
1281 }
1282
Andrew Lunn52295662017-05-25 21:42:08 +02001283 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001284
1285error:
Andrew Lunn52295662017-05-25 21:42:08 +02001286 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001287 return err;
1288}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001289
1290/* marvell_suspend
1291 *
1292 * Some Marvell's phys have two modes: fiber and copper.
1293 * Both need to be suspended
1294 */
1295static int marvell_suspend(struct phy_device *phydev)
1296{
1297 int err;
1298
1299 /* Suspend the fiber mode first */
1300 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001301 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001302 if (err < 0)
1303 goto error;
1304
1305 /* With the page set, use the generic suspend */
1306 err = genphy_suspend(phydev);
1307 if (err < 0)
1308 goto error;
1309
1310 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001311 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001312 if (err < 0)
1313 goto error;
1314 }
1315
1316 /* With the page set, use the generic suspend */
1317 return genphy_suspend(phydev);
1318
1319error:
Andrew Lunn52295662017-05-25 21:42:08 +02001320 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001321 return err;
1322}
1323
1324/* marvell_resume
1325 *
1326 * Some Marvell's phys have two modes: fiber and copper.
1327 * Both need to be resumed
1328 */
1329static int marvell_resume(struct phy_device *phydev)
1330{
1331 int err;
1332
1333 /* Resume the fiber mode first */
1334 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001335 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001336 if (err < 0)
1337 goto error;
1338
1339 /* With the page set, use the generic resume */
1340 err = genphy_resume(phydev);
1341 if (err < 0)
1342 goto error;
1343
1344 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001345 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001346 if (err < 0)
1347 goto error;
1348 }
1349
1350 /* With the page set, use the generic resume */
1351 return genphy_resume(phydev);
1352
1353error:
Andrew Lunn52295662017-05-25 21:42:08 +02001354 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001355 return err;
1356}
1357
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001358static int marvell_aneg_done(struct phy_device *phydev)
1359{
1360 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001361
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001362 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1363}
1364
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001365static int m88e1121_did_interrupt(struct phy_device *phydev)
1366{
1367 int imask;
1368
1369 imask = phy_read(phydev, MII_M1011_IEVENT);
1370
1371 if (imask & MII_M1011_IMASK_INIT)
1372 return 1;
1373
1374 return 0;
1375}
1376
Andrew Lunn23beb382017-05-17 03:26:04 +02001377static void m88e1318_get_wol(struct phy_device *phydev,
1378 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001379{
1380 wol->supported = WAKE_MAGIC;
1381 wol->wolopts = 0;
1382
Andrew Lunn52295662017-05-25 21:42:08 +02001383 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001384 return;
1385
1386 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1387 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1388 wol->wolopts |= WAKE_MAGIC;
1389
Andrew Lunn52295662017-05-25 21:42:08 +02001390 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001391 return;
1392}
1393
Andrew Lunn23beb382017-05-17 03:26:04 +02001394static int m88e1318_set_wol(struct phy_device *phydev,
1395 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001396{
1397 int err, oldpage, temp;
1398
Andrew Lunn6427bb22017-05-17 03:26:03 +02001399 oldpage = marvell_get_page(phydev);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001400
1401 if (wol->wolopts & WAKE_MAGIC) {
1402 /* Explicitly switch to page 0x00, just to be sure */
Andrew Lunn52295662017-05-25 21:42:08 +02001403 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001404 if (err < 0)
1405 return err;
1406
1407 /* Enable the WOL interrupt */
1408 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1409 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1410 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1411 if (err < 0)
1412 return err;
1413
Andrew Lunn52295662017-05-25 21:42:08 +02001414 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001415 if (err < 0)
1416 return err;
1417
1418 /* Setup LED[2] as interrupt pin (active low) */
1419 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1420 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1421 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1422 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1423 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1424 if (err < 0)
1425 return err;
1426
Andrew Lunn52295662017-05-25 21:42:08 +02001427 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001428 if (err < 0)
1429 return err;
1430
1431 /* Store the device address for the magic packet */
1432 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1433 ((phydev->attached_dev->dev_addr[5] << 8) |
1434 phydev->attached_dev->dev_addr[4]));
1435 if (err < 0)
1436 return err;
1437 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1438 ((phydev->attached_dev->dev_addr[3] << 8) |
1439 phydev->attached_dev->dev_addr[2]));
1440 if (err < 0)
1441 return err;
1442 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1443 ((phydev->attached_dev->dev_addr[1] << 8) |
1444 phydev->attached_dev->dev_addr[0]));
1445 if (err < 0)
1446 return err;
1447
1448 /* Clear WOL status and enable magic packet matching */
1449 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1450 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1451 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1452 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1453 if (err < 0)
1454 return err;
1455 } else {
Andrew Lunn52295662017-05-25 21:42:08 +02001456 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001457 if (err < 0)
1458 return err;
1459
1460 /* Clear WOL status and disable magic packet matching */
1461 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1462 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1463 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1464 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1465 if (err < 0)
1466 return err;
1467 }
1468
Andrew Lunn6427bb22017-05-17 03:26:03 +02001469 err = marvell_set_page(phydev, oldpage);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001470 if (err < 0)
1471 return err;
1472
1473 return 0;
1474}
1475
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001476static int marvell_get_sset_count(struct phy_device *phydev)
1477{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001478 if (phydev->supported & SUPPORTED_FIBRE)
1479 return ARRAY_SIZE(marvell_hw_stats);
1480 else
1481 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001482}
1483
1484static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1485{
1486 int i;
1487
1488 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1489 memcpy(data + i * ETH_GSTRING_LEN,
1490 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1491 }
1492}
1493
1494#ifndef UINT64_MAX
Andrew Lunn8cf8b872017-07-30 22:41:44 +02001495#define UINT64_MAX (u64)(~((u64)0))
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001496#endif
1497static u64 marvell_get_stat(struct phy_device *phydev, int i)
1498{
1499 struct marvell_hw_stat stat = marvell_hw_stats[i];
1500 struct marvell_priv *priv = phydev->priv;
Andrew Lunn53798322017-05-25 21:42:07 +02001501 int oldpage, val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001502 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001503
Andrew Lunn53798322017-05-25 21:42:07 +02001504 oldpage = marvell_get_set_page(phydev, stat.page);
1505 if (oldpage < 0)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001506 return UINT64_MAX;
1507
1508 val = phy_read(phydev, stat.reg);
1509 if (val < 0) {
Andrew Lunn321b4d42016-02-20 00:35:29 +01001510 ret = UINT64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001511 } else {
1512 val = val & ((1 << stat.bits) - 1);
1513 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001514 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001515 }
1516
Andrew Lunn6427bb22017-05-17 03:26:03 +02001517 marvell_set_page(phydev, oldpage);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001518
Andrew Lunn321b4d42016-02-20 00:35:29 +01001519 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001520}
1521
1522static void marvell_get_stats(struct phy_device *phydev,
1523 struct ethtool_stats *stats, u64 *data)
1524{
1525 int i;
1526
1527 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1528 data[i] = marvell_get_stat(phydev, i);
1529}
1530
Andrew Lunn0b046802017-01-20 01:37:49 +01001531#ifdef CONFIG_HWMON
1532static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1533{
Andrew Lunn975b3882017-05-25 21:42:06 +02001534 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001535 int ret;
1536 int val;
1537
1538 *temp = 0;
1539
1540 mutex_lock(&phydev->lock);
1541
Andrew Lunn52295662017-05-25 21:42:08 +02001542 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001543 if (oldpage < 0) {
1544 mutex_unlock(&phydev->lock);
1545 return oldpage;
1546 }
1547
Andrew Lunn0b046802017-01-20 01:37:49 +01001548 /* Enable temperature sensor */
1549 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1550 if (ret < 0)
1551 goto error;
1552
1553 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1554 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1555 if (ret < 0)
1556 goto error;
1557
1558 /* Wait for temperature to stabilize */
1559 usleep_range(10000, 12000);
1560
1561 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1562 if (val < 0) {
1563 ret = val;
1564 goto error;
1565 }
1566
1567 /* Disable temperature sensor */
1568 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1569 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1570 if (ret < 0)
1571 goto error;
1572
1573 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1574
1575error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001576 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001577 mutex_unlock(&phydev->lock);
1578
1579 return ret;
1580}
1581
1582static int m88e1121_hwmon_read(struct device *dev,
1583 enum hwmon_sensor_types type,
1584 u32 attr, int channel, long *temp)
1585{
1586 struct phy_device *phydev = dev_get_drvdata(dev);
1587 int err;
1588
1589 switch (attr) {
1590 case hwmon_temp_input:
1591 err = m88e1121_get_temp(phydev, temp);
1592 break;
1593 default:
1594 return -EOPNOTSUPP;
1595 }
1596
1597 return err;
1598}
1599
1600static umode_t m88e1121_hwmon_is_visible(const void *data,
1601 enum hwmon_sensor_types type,
1602 u32 attr, int channel)
1603{
1604 if (type != hwmon_temp)
1605 return 0;
1606
1607 switch (attr) {
1608 case hwmon_temp_input:
1609 return 0444;
1610 default:
1611 return 0;
1612 }
1613}
1614
1615static u32 m88e1121_hwmon_chip_config[] = {
1616 HWMON_C_REGISTER_TZ,
1617 0
1618};
1619
1620static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1621 .type = hwmon_chip,
1622 .config = m88e1121_hwmon_chip_config,
1623};
1624
1625static u32 m88e1121_hwmon_temp_config[] = {
1626 HWMON_T_INPUT,
1627 0
1628};
1629
1630static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1631 .type = hwmon_temp,
1632 .config = m88e1121_hwmon_temp_config,
1633};
1634
1635static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1636 &m88e1121_hwmon_chip,
1637 &m88e1121_hwmon_temp,
1638 NULL
1639};
1640
1641static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1642 .is_visible = m88e1121_hwmon_is_visible,
1643 .read = m88e1121_hwmon_read,
1644};
1645
1646static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1647 .ops = &m88e1121_hwmon_hwmon_ops,
1648 .info = m88e1121_hwmon_info,
1649};
1650
1651static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1652{
Andrew Lunn975b3882017-05-25 21:42:06 +02001653 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001654 int ret;
1655
1656 *temp = 0;
1657
1658 mutex_lock(&phydev->lock);
1659
Andrew Lunn52295662017-05-25 21:42:08 +02001660 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001661 if (oldpage < 0) {
1662 mutex_unlock(&phydev->lock);
1663 return oldpage;
1664 }
1665
Andrew Lunn0b046802017-01-20 01:37:49 +01001666 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1667 if (ret < 0)
1668 goto error;
1669
1670 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1671
1672error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001673 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001674 mutex_unlock(&phydev->lock);
1675
1676 return ret;
1677}
1678
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001679static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001680{
Andrew Lunn975b3882017-05-25 21:42:06 +02001681 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001682 int ret;
1683
1684 *temp = 0;
1685
1686 mutex_lock(&phydev->lock);
Andrew Lunn53798322017-05-25 21:42:07 +02001687
Andrew Lunn52295662017-05-25 21:42:08 +02001688 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001689 if (oldpage < 0) {
1690 mutex_unlock(&phydev->lock);
1691 return oldpage;
1692 }
Andrew Lunn0b046802017-01-20 01:37:49 +01001693
Andrew Lunn0b046802017-01-20 01:37:49 +01001694 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1695 if (ret < 0)
1696 goto error;
1697
1698 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1699 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1700 /* convert to mC */
1701 *temp *= 1000;
1702
1703error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001704 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001705 mutex_unlock(&phydev->lock);
1706
1707 return ret;
1708}
1709
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001710static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001711{
Andrew Lunn975b3882017-05-25 21:42:06 +02001712 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001713 int ret;
1714
1715 mutex_lock(&phydev->lock);
1716
Andrew Lunn52295662017-05-25 21:42:08 +02001717 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001718 if (oldpage < 0) {
1719 mutex_unlock(&phydev->lock);
1720 return oldpage;
1721 }
1722
Andrew Lunn0b046802017-01-20 01:37:49 +01001723 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1724 if (ret < 0)
1725 goto error;
1726
1727 temp = temp / 1000;
1728 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1729 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1730 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1731 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1732
1733error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001734 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001735 mutex_unlock(&phydev->lock);
1736
1737 return ret;
1738}
1739
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001740static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001741{
Andrew Lunn975b3882017-05-25 21:42:06 +02001742 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001743 int ret;
1744
1745 *alarm = false;
1746
1747 mutex_lock(&phydev->lock);
1748
Andrew Lunn52295662017-05-25 21:42:08 +02001749 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001750 if (oldpage < 0) {
1751 mutex_unlock(&phydev->lock);
1752 return oldpage;
1753 }
1754
Andrew Lunn0b046802017-01-20 01:37:49 +01001755 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1756 if (ret < 0)
1757 goto error;
1758 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1759
1760error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001761 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001762 mutex_unlock(&phydev->lock);
1763
1764 return ret;
1765}
1766
1767static int m88e1510_hwmon_read(struct device *dev,
1768 enum hwmon_sensor_types type,
1769 u32 attr, int channel, long *temp)
1770{
1771 struct phy_device *phydev = dev_get_drvdata(dev);
1772 int err;
1773
1774 switch (attr) {
1775 case hwmon_temp_input:
1776 err = m88e1510_get_temp(phydev, temp);
1777 break;
1778 case hwmon_temp_crit:
1779 err = m88e1510_get_temp_critical(phydev, temp);
1780 break;
1781 case hwmon_temp_max_alarm:
1782 err = m88e1510_get_temp_alarm(phydev, temp);
1783 break;
1784 default:
1785 return -EOPNOTSUPP;
1786 }
1787
1788 return err;
1789}
1790
1791static int m88e1510_hwmon_write(struct device *dev,
1792 enum hwmon_sensor_types type,
1793 u32 attr, int channel, long temp)
1794{
1795 struct phy_device *phydev = dev_get_drvdata(dev);
1796 int err;
1797
1798 switch (attr) {
1799 case hwmon_temp_crit:
1800 err = m88e1510_set_temp_critical(phydev, temp);
1801 break;
1802 default:
1803 return -EOPNOTSUPP;
1804 }
1805 return err;
1806}
1807
1808static umode_t m88e1510_hwmon_is_visible(const void *data,
1809 enum hwmon_sensor_types type,
1810 u32 attr, int channel)
1811{
1812 if (type != hwmon_temp)
1813 return 0;
1814
1815 switch (attr) {
1816 case hwmon_temp_input:
1817 case hwmon_temp_max_alarm:
1818 return 0444;
1819 case hwmon_temp_crit:
1820 return 0644;
1821 default:
1822 return 0;
1823 }
1824}
1825
1826static u32 m88e1510_hwmon_temp_config[] = {
1827 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1828 0
1829};
1830
1831static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1832 .type = hwmon_temp,
1833 .config = m88e1510_hwmon_temp_config,
1834};
1835
1836static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1837 &m88e1121_hwmon_chip,
1838 &m88e1510_hwmon_temp,
1839 NULL
1840};
1841
1842static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1843 .is_visible = m88e1510_hwmon_is_visible,
1844 .read = m88e1510_hwmon_read,
1845 .write = m88e1510_hwmon_write,
1846};
1847
1848static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1849 .ops = &m88e1510_hwmon_hwmon_ops,
1850 .info = m88e1510_hwmon_info,
1851};
1852
1853static int marvell_hwmon_name(struct phy_device *phydev)
1854{
1855 struct marvell_priv *priv = phydev->priv;
1856 struct device *dev = &phydev->mdio.dev;
1857 const char *devname = dev_name(dev);
1858 size_t len = strlen(devname);
1859 int i, j;
1860
1861 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1862 if (!priv->hwmon_name)
1863 return -ENOMEM;
1864
1865 for (i = j = 0; i < len && devname[i]; i++) {
1866 if (isalnum(devname[i]))
1867 priv->hwmon_name[j++] = devname[i];
1868 }
1869
1870 return 0;
1871}
1872
1873static int marvell_hwmon_probe(struct phy_device *phydev,
1874 const struct hwmon_chip_info *chip)
1875{
1876 struct marvell_priv *priv = phydev->priv;
1877 struct device *dev = &phydev->mdio.dev;
1878 int err;
1879
1880 err = marvell_hwmon_name(phydev);
1881 if (err)
1882 return err;
1883
1884 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1885 dev, priv->hwmon_name, phydev, chip, NULL);
1886
1887 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1888}
1889
1890static int m88e1121_hwmon_probe(struct phy_device *phydev)
1891{
1892 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1893}
1894
1895static int m88e1510_hwmon_probe(struct phy_device *phydev)
1896{
1897 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1898}
1899#else
1900static int m88e1121_hwmon_probe(struct phy_device *phydev)
1901{
1902 return 0;
1903}
1904
1905static int m88e1510_hwmon_probe(struct phy_device *phydev)
1906{
1907 return 0;
1908}
1909#endif
1910
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001911static int marvell_probe(struct phy_device *phydev)
1912{
1913 struct marvell_priv *priv;
1914
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001915 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001916 if (!priv)
1917 return -ENOMEM;
1918
1919 phydev->priv = priv;
1920
1921 return 0;
1922}
1923
Andrew Lunn0b046802017-01-20 01:37:49 +01001924static int m88e1121_probe(struct phy_device *phydev)
1925{
1926 int err;
1927
1928 err = marvell_probe(phydev);
1929 if (err)
1930 return err;
1931
1932 return m88e1121_hwmon_probe(phydev);
1933}
1934
1935static int m88e1510_probe(struct phy_device *phydev)
1936{
1937 int err;
1938
1939 err = marvell_probe(phydev);
1940 if (err)
1941 return err;
1942
1943 return m88e1510_hwmon_probe(phydev);
1944}
1945
Olof Johanssone5479232007-07-03 16:23:46 -05001946static struct phy_driver marvell_drivers[] = {
1947 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001948 .phy_id = MARVELL_PHY_ID_88E1101,
1949 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001950 .name = "Marvell 88E1101",
1951 .features = PHY_GBIT_FEATURES,
1952 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01001953 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01001954 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02001955 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05001956 .read_status = &genphy_read_status,
1957 .ack_interrupt = &marvell_ack_interrupt,
1958 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001959 .resume = &genphy_resume,
1960 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001961 .get_sset_count = marvell_get_sset_count,
1962 .get_strings = marvell_get_strings,
1963 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05001964 },
1965 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001966 .phy_id = MARVELL_PHY_ID_88E1112,
1967 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05001968 .name = "Marvell 88E1112",
1969 .features = PHY_GBIT_FEATURES,
1970 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001971 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05001972 .config_init = &m88e1111_config_init,
1973 .config_aneg = &marvell_config_aneg,
1974 .read_status = &genphy_read_status,
1975 .ack_interrupt = &marvell_ack_interrupt,
1976 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001977 .resume = &genphy_resume,
1978 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001979 .get_sset_count = marvell_get_sset_count,
1980 .get_strings = marvell_get_strings,
1981 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05001982 },
1983 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001984 .phy_id = MARVELL_PHY_ID_88E1111,
1985 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001986 .name = "Marvell 88E1111",
1987 .features = PHY_GBIT_FEATURES,
1988 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001989 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05001990 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05301991 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001992 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05001993 .ack_interrupt = &marvell_ack_interrupt,
1994 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001995 .resume = &genphy_resume,
1996 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001997 .get_sset_count = marvell_get_sset_count,
1998 .get_strings = marvell_get_strings,
1999 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002000 },
2001 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002002 .phy_id = MARVELL_PHY_ID_88E1118,
2003 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002004 .name = "Marvell 88E1118",
2005 .features = PHY_GBIT_FEATURES,
2006 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002007 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002008 .config_init = &m88e1118_config_init,
2009 .config_aneg = &m88e1118_config_aneg,
2010 .read_status = &genphy_read_status,
2011 .ack_interrupt = &marvell_ack_interrupt,
2012 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002013 .resume = &genphy_resume,
2014 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002015 .get_sset_count = marvell_get_sset_count,
2016 .get_strings = marvell_get_strings,
2017 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002018 },
2019 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002020 .phy_id = MARVELL_PHY_ID_88E1121R,
2021 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002022 .name = "Marvell 88E1121R",
2023 .features = PHY_GBIT_FEATURES,
2024 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002025 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002026 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002027 .config_aneg = &m88e1121_config_aneg,
2028 .read_status = &marvell_read_status,
2029 .ack_interrupt = &marvell_ack_interrupt,
2030 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002031 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002032 .resume = &genphy_resume,
2033 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002034 .get_sset_count = marvell_get_sset_count,
2035 .get_strings = marvell_get_strings,
2036 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002037 },
2038 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002039 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002040 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002041 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002042 .features = PHY_GBIT_FEATURES,
2043 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002044 .probe = marvell_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002045 .config_init = &m88e1121_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002046 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002047 .read_status = &marvell_read_status,
2048 .ack_interrupt = &marvell_ack_interrupt,
2049 .config_intr = &marvell_config_intr,
2050 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002051 .get_wol = &m88e1318_get_wol,
2052 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002053 .resume = &genphy_resume,
2054 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002055 .get_sset_count = marvell_get_sset_count,
2056 .get_strings = marvell_get_strings,
2057 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002058 },
2059 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002060 .phy_id = MARVELL_PHY_ID_88E1145,
2061 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002062 .name = "Marvell 88E1145",
2063 .features = PHY_GBIT_FEATURES,
2064 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002065 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002066 .config_init = &m88e1145_config_init,
2067 .config_aneg = &marvell_config_aneg,
2068 .read_status = &genphy_read_status,
2069 .ack_interrupt = &marvell_ack_interrupt,
2070 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002071 .resume = &genphy_resume,
2072 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002073 .get_sset_count = marvell_get_sset_count,
2074 .get_strings = marvell_get_strings,
2075 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002076 },
2077 {
David Daney90600732010-11-19 11:58:53 +00002078 .phy_id = MARVELL_PHY_ID_88E1149R,
2079 .phy_id_mask = MARVELL_PHY_ID_MASK,
2080 .name = "Marvell 88E1149R",
2081 .features = PHY_GBIT_FEATURES,
2082 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002083 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002084 .config_init = &m88e1149_config_init,
2085 .config_aneg = &m88e1118_config_aneg,
2086 .read_status = &genphy_read_status,
2087 .ack_interrupt = &marvell_ack_interrupt,
2088 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002089 .resume = &genphy_resume,
2090 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002091 .get_sset_count = marvell_get_sset_count,
2092 .get_strings = marvell_get_strings,
2093 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002094 },
2095 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002096 .phy_id = MARVELL_PHY_ID_88E1240,
2097 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002098 .name = "Marvell 88E1240",
2099 .features = PHY_GBIT_FEATURES,
2100 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002101 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002102 .config_init = &m88e1111_config_init,
2103 .config_aneg = &marvell_config_aneg,
2104 .read_status = &genphy_read_status,
2105 .ack_interrupt = &marvell_ack_interrupt,
2106 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002107 .resume = &genphy_resume,
2108 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002109 .get_sset_count = marvell_get_sset_count,
2110 .get_strings = marvell_get_strings,
2111 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002112 },
Michal Simek3da09a52013-05-30 20:08:26 +00002113 {
2114 .phy_id = MARVELL_PHY_ID_88E1116R,
2115 .phy_id_mask = MARVELL_PHY_ID_MASK,
2116 .name = "Marvell 88E1116R",
2117 .features = PHY_GBIT_FEATURES,
2118 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002119 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002120 .config_init = &m88e1116r_config_init,
2121 .config_aneg = &genphy_config_aneg,
2122 .read_status = &genphy_read_status,
2123 .ack_interrupt = &marvell_ack_interrupt,
2124 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002125 .resume = &genphy_resume,
2126 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002127 .get_sset_count = marvell_get_sset_count,
2128 .get_strings = marvell_get_strings,
2129 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002130 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002131 {
2132 .phy_id = MARVELL_PHY_ID_88E1510,
2133 .phy_id_mask = MARVELL_PHY_ID_MASK,
2134 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002135 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002136 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002137 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002138 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002139 .config_aneg = &m88e1510_config_aneg,
2140 .read_status = &marvell_read_status,
2141 .ack_interrupt = &marvell_ack_interrupt,
2142 .config_intr = &marvell_config_intr,
2143 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002144 .get_wol = &m88e1318_get_wol,
2145 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002146 .resume = &marvell_resume,
2147 .suspend = &marvell_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002148 .get_sset_count = marvell_get_sset_count,
2149 .get_strings = marvell_get_strings,
2150 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002151 .set_loopback = genphy_loopback,
Michal Simek10e24caa2013-05-30 20:08:27 +00002152 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002153 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002154 .phy_id = MARVELL_PHY_ID_88E1540,
2155 .phy_id_mask = MARVELL_PHY_ID_MASK,
2156 .name = "Marvell 88E1540",
2157 .features = PHY_GBIT_FEATURES,
2158 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002159 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002160 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002161 .config_aneg = &m88e1510_config_aneg,
2162 .read_status = &marvell_read_status,
2163 .ack_interrupt = &marvell_ack_interrupt,
2164 .config_intr = &marvell_config_intr,
2165 .did_interrupt = &m88e1121_did_interrupt,
2166 .resume = &genphy_resume,
2167 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002168 .get_sset_count = marvell_get_sset_count,
2169 .get_strings = marvell_get_strings,
2170 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002171 },
2172 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002173 .phy_id = MARVELL_PHY_ID_88E1545,
2174 .phy_id_mask = MARVELL_PHY_ID_MASK,
2175 .name = "Marvell 88E1545",
2176 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002177 .features = PHY_GBIT_FEATURES,
2178 .flags = PHY_HAS_INTERRUPT,
2179 .config_init = &marvell_config_init,
2180 .config_aneg = &m88e1510_config_aneg,
2181 .read_status = &marvell_read_status,
2182 .ack_interrupt = &marvell_ack_interrupt,
2183 .config_intr = &marvell_config_intr,
2184 .did_interrupt = &m88e1121_did_interrupt,
2185 .resume = &genphy_resume,
2186 .suspend = &genphy_suspend,
2187 .get_sset_count = marvell_get_sset_count,
2188 .get_strings = marvell_get_strings,
2189 .get_stats = marvell_get_stats,
2190 },
2191 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002192 .phy_id = MARVELL_PHY_ID_88E3016,
2193 .phy_id_mask = MARVELL_PHY_ID_MASK,
2194 .name = "Marvell 88E3016",
2195 .features = PHY_BASIC_FEATURES,
2196 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002197 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002198 .config_aneg = &genphy_config_aneg,
2199 .config_init = &m88e3016_config_init,
2200 .aneg_done = &marvell_aneg_done,
2201 .read_status = &marvell_read_status,
2202 .ack_interrupt = &marvell_ack_interrupt,
2203 .config_intr = &marvell_config_intr,
2204 .did_interrupt = &m88e1121_did_interrupt,
2205 .resume = &genphy_resume,
2206 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002207 .get_sset_count = marvell_get_sset_count,
2208 .get_strings = marvell_get_strings,
2209 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002210 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002211 {
2212 .phy_id = MARVELL_PHY_ID_88E6390,
2213 .phy_id_mask = MARVELL_PHY_ID_MASK,
2214 .name = "Marvell 88E6390",
2215 .features = PHY_GBIT_FEATURES,
2216 .flags = PHY_HAS_INTERRUPT,
2217 .probe = m88e1510_probe,
2218 .config_init = &marvell_config_init,
2219 .config_aneg = &m88e1510_config_aneg,
2220 .read_status = &marvell_read_status,
2221 .ack_interrupt = &marvell_ack_interrupt,
2222 .config_intr = &marvell_config_intr,
2223 .did_interrupt = &m88e1121_did_interrupt,
2224 .resume = &genphy_resume,
2225 .suspend = &genphy_suspend,
2226 .get_sset_count = marvell_get_sset_count,
2227 .get_strings = marvell_get_strings,
2228 .get_stats = marvell_get_stats,
2229 },
Andy Fleming00db8182005-07-30 19:31:23 -04002230};
2231
Johan Hovold50fd7152014-11-11 19:45:59 +01002232module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002233
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002234static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002235 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2236 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2237 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2238 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2239 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2240 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2241 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2242 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2243 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002244 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002245 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002246 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002247 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002248 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002249 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002250 { }
2251};
2252
2253MODULE_DEVICE_TABLE(mdio, marvell_tbl);